ipu-smfc.c 4.1 KB

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  1. // SPDX-License-Identifier: GPL-2.0-or-later
  2. /*
  3. * Copyright 2008-2010 Freescale Semiconductor, Inc. All Rights Reserved.
  4. */
  5. #include <linux/export.h>
  6. #include <linux/types.h>
  7. #include <linux/init.h>
  8. #include <linux/io.h>
  9. #include <linux/errno.h>
  10. #include <linux/spinlock.h>
  11. #include <linux/delay.h>
  12. #include <linux/clk.h>
  13. #include <video/imx-ipu-v3.h>
  14. #include "ipu-prv.h"
  15. struct ipu_smfc {
  16. struct ipu_smfc_priv *priv;
  17. int chno;
  18. bool inuse;
  19. };
  20. struct ipu_smfc_priv {
  21. void __iomem *base;
  22. spinlock_t lock;
  23. struct ipu_soc *ipu;
  24. struct ipu_smfc channel[4];
  25. int use_count;
  26. };
  27. /*SMFC Registers */
  28. #define SMFC_MAP 0x0000
  29. #define SMFC_WMC 0x0004
  30. #define SMFC_BS 0x0008
  31. int ipu_smfc_set_burstsize(struct ipu_smfc *smfc, int burstsize)
  32. {
  33. struct ipu_smfc_priv *priv = smfc->priv;
  34. unsigned long flags;
  35. u32 val, shift;
  36. spin_lock_irqsave(&priv->lock, flags);
  37. shift = smfc->chno * 4;
  38. val = readl(priv->base + SMFC_BS);
  39. val &= ~(0xf << shift);
  40. val |= burstsize << shift;
  41. writel(val, priv->base + SMFC_BS);
  42. spin_unlock_irqrestore(&priv->lock, flags);
  43. return 0;
  44. }
  45. EXPORT_SYMBOL_GPL(ipu_smfc_set_burstsize);
  46. int ipu_smfc_map_channel(struct ipu_smfc *smfc, int csi_id, int mipi_id)
  47. {
  48. struct ipu_smfc_priv *priv = smfc->priv;
  49. unsigned long flags;
  50. u32 val, shift;
  51. spin_lock_irqsave(&priv->lock, flags);
  52. shift = smfc->chno * 3;
  53. val = readl(priv->base + SMFC_MAP);
  54. val &= ~(0x7 << shift);
  55. val |= ((csi_id << 2) | mipi_id) << shift;
  56. writel(val, priv->base + SMFC_MAP);
  57. spin_unlock_irqrestore(&priv->lock, flags);
  58. return 0;
  59. }
  60. EXPORT_SYMBOL_GPL(ipu_smfc_map_channel);
  61. int ipu_smfc_set_watermark(struct ipu_smfc *smfc, u32 set_level, u32 clr_level)
  62. {
  63. struct ipu_smfc_priv *priv = smfc->priv;
  64. unsigned long flags;
  65. u32 val, shift;
  66. spin_lock_irqsave(&priv->lock, flags);
  67. shift = smfc->chno * 6 + (smfc->chno > 1 ? 4 : 0);
  68. val = readl(priv->base + SMFC_WMC);
  69. val &= ~(0x3f << shift);
  70. val |= ((clr_level << 3) | set_level) << shift;
  71. writel(val, priv->base + SMFC_WMC);
  72. spin_unlock_irqrestore(&priv->lock, flags);
  73. return 0;
  74. }
  75. EXPORT_SYMBOL_GPL(ipu_smfc_set_watermark);
  76. int ipu_smfc_enable(struct ipu_smfc *smfc)
  77. {
  78. struct ipu_smfc_priv *priv = smfc->priv;
  79. unsigned long flags;
  80. spin_lock_irqsave(&priv->lock, flags);
  81. if (!priv->use_count)
  82. ipu_module_enable(priv->ipu, IPU_CONF_SMFC_EN);
  83. priv->use_count++;
  84. spin_unlock_irqrestore(&priv->lock, flags);
  85. return 0;
  86. }
  87. EXPORT_SYMBOL_GPL(ipu_smfc_enable);
  88. int ipu_smfc_disable(struct ipu_smfc *smfc)
  89. {
  90. struct ipu_smfc_priv *priv = smfc->priv;
  91. unsigned long flags;
  92. spin_lock_irqsave(&priv->lock, flags);
  93. priv->use_count--;
  94. if (!priv->use_count)
  95. ipu_module_disable(priv->ipu, IPU_CONF_SMFC_EN);
  96. if (priv->use_count < 0)
  97. priv->use_count = 0;
  98. spin_unlock_irqrestore(&priv->lock, flags);
  99. return 0;
  100. }
  101. EXPORT_SYMBOL_GPL(ipu_smfc_disable);
  102. struct ipu_smfc *ipu_smfc_get(struct ipu_soc *ipu, unsigned int chno)
  103. {
  104. struct ipu_smfc_priv *priv = ipu->smfc_priv;
  105. struct ipu_smfc *smfc, *ret;
  106. unsigned long flags;
  107. if (chno >= 4)
  108. return ERR_PTR(-EINVAL);
  109. smfc = &priv->channel[chno];
  110. ret = smfc;
  111. spin_lock_irqsave(&priv->lock, flags);
  112. if (smfc->inuse) {
  113. ret = ERR_PTR(-EBUSY);
  114. goto unlock;
  115. }
  116. smfc->inuse = true;
  117. unlock:
  118. spin_unlock_irqrestore(&priv->lock, flags);
  119. return ret;
  120. }
  121. EXPORT_SYMBOL_GPL(ipu_smfc_get);
  122. void ipu_smfc_put(struct ipu_smfc *smfc)
  123. {
  124. struct ipu_smfc_priv *priv = smfc->priv;
  125. unsigned long flags;
  126. spin_lock_irqsave(&priv->lock, flags);
  127. smfc->inuse = false;
  128. spin_unlock_irqrestore(&priv->lock, flags);
  129. }
  130. EXPORT_SYMBOL_GPL(ipu_smfc_put);
  131. int ipu_smfc_init(struct ipu_soc *ipu, struct device *dev,
  132. unsigned long base)
  133. {
  134. struct ipu_smfc_priv *priv;
  135. int i;
  136. priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
  137. if (!priv)
  138. return -ENOMEM;
  139. ipu->smfc_priv = priv;
  140. spin_lock_init(&priv->lock);
  141. priv->ipu = ipu;
  142. priv->base = devm_ioremap(dev, base, PAGE_SIZE);
  143. if (!priv->base)
  144. return -ENOMEM;
  145. for (i = 0; i < 4; i++) {
  146. priv->channel[i].priv = priv;
  147. priv->channel[i].chno = i;
  148. }
  149. pr_debug("%s: ioremap 0x%08lx -> %p\n", __func__, base, priv->base);
  150. return 0;
  151. }
  152. void ipu_smfc_exit(struct ipu_soc *ipu)
  153. {
  154. }