trng.c 8.0 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /* Copyright (c) 2019 HiSilicon Limited. */
  3. #include <linux/acpi.h>
  4. #include <linux/crypto.h>
  5. #include <linux/err.h>
  6. #include <linux/hw_random.h>
  7. #include <linux/io.h>
  8. #include <linux/iopoll.h>
  9. #include <linux/kernel.h>
  10. #include <linux/list.h>
  11. #include <linux/module.h>
  12. #include <linux/mutex.h>
  13. #include <linux/platform_device.h>
  14. #include <linux/random.h>
  15. #include <crypto/internal/rng.h>
  16. #define HISI_TRNG_REG 0x00F0
  17. #define HISI_TRNG_BYTES 4
  18. #define HISI_TRNG_QUALITY 512
  19. #define HISI_TRNG_VERSION 0x01B8
  20. #define HISI_TRNG_VER_V1 GENMASK(31, 0)
  21. #define SLEEP_US 10
  22. #define TIMEOUT_US 10000
  23. #define SW_DRBG_NUM_SHIFT 2
  24. #define SW_DRBG_KEY_BASE 0x082C
  25. #define SW_DRBG_SEED(n) (SW_DRBG_KEY_BASE - ((n) << SW_DRBG_NUM_SHIFT))
  26. #define SW_DRBG_SEED_REGS_NUM 12
  27. #define SW_DRBG_SEED_SIZE 48
  28. #define SW_DRBG_BLOCKS 0x0830
  29. #define SW_DRBG_INIT 0x0834
  30. #define SW_DRBG_GEN 0x083c
  31. #define SW_DRBG_STATUS 0x0840
  32. #define SW_DRBG_BLOCKS_NUM 4095
  33. #define SW_DRBG_DATA_BASE 0x0850
  34. #define SW_DRBG_DATA_NUM 4
  35. #define SW_DRBG_DATA(n) (SW_DRBG_DATA_BASE - ((n) << SW_DRBG_NUM_SHIFT))
  36. #define SW_DRBG_BYTES 16
  37. #define SW_DRBG_ENABLE_SHIFT 12
  38. #define SEED_SHIFT_24 24
  39. #define SEED_SHIFT_16 16
  40. #define SEED_SHIFT_8 8
  41. struct hisi_trng_list {
  42. struct mutex lock;
  43. struct list_head list;
  44. bool is_init;
  45. };
  46. struct hisi_trng {
  47. void __iomem *base;
  48. struct hisi_trng_list *trng_list;
  49. struct list_head list;
  50. struct hwrng rng;
  51. u32 ver;
  52. bool is_used;
  53. struct mutex mutex;
  54. };
  55. struct hisi_trng_ctx {
  56. struct hisi_trng *trng;
  57. };
  58. static atomic_t trng_active_devs;
  59. static struct hisi_trng_list trng_devices;
  60. static void hisi_trng_set_seed(struct hisi_trng *trng, const u8 *seed)
  61. {
  62. u32 val, seed_reg, i;
  63. for (i = 0; i < SW_DRBG_SEED_SIZE;
  64. i += SW_DRBG_SEED_SIZE / SW_DRBG_SEED_REGS_NUM) {
  65. val = seed[i] << SEED_SHIFT_24;
  66. val |= seed[i + 1UL] << SEED_SHIFT_16;
  67. val |= seed[i + 2UL] << SEED_SHIFT_8;
  68. val |= seed[i + 3UL];
  69. seed_reg = (i >> SW_DRBG_NUM_SHIFT) % SW_DRBG_SEED_REGS_NUM;
  70. writel(val, trng->base + SW_DRBG_SEED(seed_reg));
  71. }
  72. }
  73. static int hisi_trng_seed(struct crypto_rng *tfm, const u8 *seed,
  74. unsigned int slen)
  75. {
  76. struct hisi_trng_ctx *ctx = crypto_rng_ctx(tfm);
  77. struct hisi_trng *trng = ctx->trng;
  78. u32 val = 0;
  79. int ret = 0;
  80. if (slen < SW_DRBG_SEED_SIZE) {
  81. pr_err("slen(%u) is not matched with trng(%d)\n", slen,
  82. SW_DRBG_SEED_SIZE);
  83. return -EINVAL;
  84. }
  85. writel(0x0, trng->base + SW_DRBG_BLOCKS);
  86. hisi_trng_set_seed(trng, seed);
  87. writel(SW_DRBG_BLOCKS_NUM | (0x1 << SW_DRBG_ENABLE_SHIFT),
  88. trng->base + SW_DRBG_BLOCKS);
  89. writel(0x1, trng->base + SW_DRBG_INIT);
  90. ret = readl_relaxed_poll_timeout(trng->base + SW_DRBG_STATUS,
  91. val, val & BIT(0), SLEEP_US, TIMEOUT_US);
  92. if (ret)
  93. pr_err("fail to init trng(%d)\n", ret);
  94. return ret;
  95. }
  96. static int hisi_trng_generate(struct crypto_rng *tfm, const u8 *src,
  97. unsigned int slen, u8 *dstn, unsigned int dlen)
  98. {
  99. struct hisi_trng_ctx *ctx = crypto_rng_ctx(tfm);
  100. struct hisi_trng *trng = ctx->trng;
  101. u32 data[SW_DRBG_DATA_NUM];
  102. u32 currsize = 0;
  103. u32 val = 0;
  104. int ret;
  105. u32 i;
  106. if (dlen > SW_DRBG_BLOCKS_NUM * SW_DRBG_BYTES || dlen == 0) {
  107. pr_err("dlen(%d) exceeds limit(%d)!\n", dlen,
  108. SW_DRBG_BLOCKS_NUM * SW_DRBG_BYTES);
  109. return -EINVAL;
  110. }
  111. do {
  112. ret = readl_relaxed_poll_timeout(trng->base + SW_DRBG_STATUS,
  113. val, val & BIT(1), SLEEP_US, TIMEOUT_US);
  114. if (ret) {
  115. pr_err("fail to generate random number(%d)!\n", ret);
  116. break;
  117. }
  118. for (i = 0; i < SW_DRBG_DATA_NUM; i++)
  119. data[i] = readl(trng->base + SW_DRBG_DATA(i));
  120. if (dlen - currsize >= SW_DRBG_BYTES) {
  121. memcpy(dstn + currsize, data, SW_DRBG_BYTES);
  122. currsize += SW_DRBG_BYTES;
  123. } else {
  124. memcpy(dstn + currsize, data, dlen - currsize);
  125. currsize = dlen;
  126. }
  127. writel(0x1, trng->base + SW_DRBG_GEN);
  128. } while (currsize < dlen);
  129. return ret;
  130. }
  131. static int hisi_trng_init(struct crypto_tfm *tfm)
  132. {
  133. struct hisi_trng_ctx *ctx = crypto_tfm_ctx(tfm);
  134. struct hisi_trng *trng;
  135. int ret = -EBUSY;
  136. mutex_lock(&trng_devices.lock);
  137. list_for_each_entry(trng, &trng_devices.list, list) {
  138. if (!trng->is_used) {
  139. trng->is_used = true;
  140. ctx->trng = trng;
  141. ret = 0;
  142. break;
  143. }
  144. }
  145. mutex_unlock(&trng_devices.lock);
  146. return ret;
  147. }
  148. static void hisi_trng_exit(struct crypto_tfm *tfm)
  149. {
  150. struct hisi_trng_ctx *ctx = crypto_tfm_ctx(tfm);
  151. mutex_lock(&trng_devices.lock);
  152. ctx->trng->is_used = false;
  153. mutex_unlock(&trng_devices.lock);
  154. }
  155. static int hisi_trng_read(struct hwrng *rng, void *buf, size_t max, bool wait)
  156. {
  157. struct hisi_trng *trng;
  158. int currsize = 0;
  159. u32 val = 0;
  160. int ret;
  161. trng = container_of(rng, struct hisi_trng, rng);
  162. do {
  163. ret = readl_poll_timeout(trng->base + HISI_TRNG_REG, val,
  164. val, SLEEP_US, TIMEOUT_US);
  165. if (ret)
  166. return currsize;
  167. if (max - currsize >= HISI_TRNG_BYTES) {
  168. memcpy(buf + currsize, &val, HISI_TRNG_BYTES);
  169. currsize += HISI_TRNG_BYTES;
  170. if (currsize == max)
  171. return currsize;
  172. continue;
  173. }
  174. /* copy remaining bytes */
  175. memcpy(buf + currsize, &val, max - currsize);
  176. currsize = max;
  177. } while (currsize < max);
  178. return currsize;
  179. }
  180. static struct rng_alg hisi_trng_alg = {
  181. .generate = hisi_trng_generate,
  182. .seed = hisi_trng_seed,
  183. .seedsize = SW_DRBG_SEED_SIZE,
  184. .base = {
  185. .cra_name = "stdrng",
  186. .cra_driver_name = "hisi_stdrng",
  187. .cra_priority = 300,
  188. .cra_ctxsize = sizeof(struct hisi_trng_ctx),
  189. .cra_module = THIS_MODULE,
  190. .cra_init = hisi_trng_init,
  191. .cra_exit = hisi_trng_exit,
  192. },
  193. };
  194. static void hisi_trng_add_to_list(struct hisi_trng *trng)
  195. {
  196. mutex_lock(&trng_devices.lock);
  197. list_add_tail(&trng->list, &trng_devices.list);
  198. mutex_unlock(&trng_devices.lock);
  199. }
  200. static int hisi_trng_del_from_list(struct hisi_trng *trng)
  201. {
  202. int ret = -EBUSY;
  203. mutex_lock(&trng_devices.lock);
  204. if (!trng->is_used) {
  205. list_del(&trng->list);
  206. ret = 0;
  207. }
  208. mutex_unlock(&trng_devices.lock);
  209. return ret;
  210. }
  211. static int hisi_trng_probe(struct platform_device *pdev)
  212. {
  213. struct hisi_trng *trng;
  214. int ret;
  215. trng = devm_kzalloc(&pdev->dev, sizeof(*trng), GFP_KERNEL);
  216. if (!trng)
  217. return -ENOMEM;
  218. platform_set_drvdata(pdev, trng);
  219. trng->base = devm_platform_ioremap_resource(pdev, 0);
  220. if (IS_ERR(trng->base))
  221. return PTR_ERR(trng->base);
  222. trng->is_used = false;
  223. trng->ver = readl(trng->base + HISI_TRNG_VERSION);
  224. if (!trng_devices.is_init) {
  225. INIT_LIST_HEAD(&trng_devices.list);
  226. mutex_init(&trng_devices.lock);
  227. trng_devices.is_init = true;
  228. }
  229. hisi_trng_add_to_list(trng);
  230. if (trng->ver != HISI_TRNG_VER_V1 &&
  231. atomic_inc_return(&trng_active_devs) == 1) {
  232. ret = crypto_register_rng(&hisi_trng_alg);
  233. if (ret) {
  234. dev_err(&pdev->dev,
  235. "failed to register crypto(%d)\n", ret);
  236. atomic_dec_return(&trng_active_devs);
  237. goto err_remove_from_list;
  238. }
  239. }
  240. trng->rng.name = pdev->name;
  241. trng->rng.read = hisi_trng_read;
  242. trng->rng.quality = HISI_TRNG_QUALITY;
  243. ret = devm_hwrng_register(&pdev->dev, &trng->rng);
  244. if (ret) {
  245. dev_err(&pdev->dev, "failed to register hwrng: %d!\n", ret);
  246. goto err_crypto_unregister;
  247. }
  248. return ret;
  249. err_crypto_unregister:
  250. if (trng->ver != HISI_TRNG_VER_V1 &&
  251. atomic_dec_return(&trng_active_devs) == 0)
  252. crypto_unregister_rng(&hisi_trng_alg);
  253. err_remove_from_list:
  254. hisi_trng_del_from_list(trng);
  255. return ret;
  256. }
  257. static int hisi_trng_remove(struct platform_device *pdev)
  258. {
  259. struct hisi_trng *trng = platform_get_drvdata(pdev);
  260. /* Wait until the task is finished */
  261. while (hisi_trng_del_from_list(trng))
  262. ;
  263. if (trng->ver != HISI_TRNG_VER_V1 &&
  264. atomic_dec_return(&trng_active_devs) == 0)
  265. crypto_unregister_rng(&hisi_trng_alg);
  266. return 0;
  267. }
  268. static const struct acpi_device_id hisi_trng_acpi_match[] = {
  269. { "HISI02B3", 0 },
  270. { }
  271. };
  272. MODULE_DEVICE_TABLE(acpi, hisi_trng_acpi_match);
  273. static struct platform_driver hisi_trng_driver = {
  274. .probe = hisi_trng_probe,
  275. .remove = hisi_trng_remove,
  276. .driver = {
  277. .name = "hisi-trng-v2",
  278. .acpi_match_table = ACPI_PTR(hisi_trng_acpi_match),
  279. },
  280. };
  281. module_platform_driver(hisi_trng_driver);
  282. MODULE_LICENSE("GPL v2");
  283. MODULE_AUTHOR("Weili Qian <[email protected]>");
  284. MODULE_AUTHOR("Zaibo Xu <[email protected]>");
  285. MODULE_DESCRIPTION("HiSilicon true random number generator V2 driver");