ccu_mmc_timing.c 1.6 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2017 Chen-Yu Tsai. All rights reserved.
  4. */
  5. #include <linux/clk-provider.h>
  6. #include <linux/clk/sunxi-ng.h>
  7. #include <linux/io.h>
  8. #include "ccu_common.h"
  9. /**
  10. * sunxi_ccu_set_mmc_timing_mode: Configure the MMC clock timing mode
  11. * @clk: clock to be configured
  12. * @new_mode: true for new timing mode introduced in A83T and later
  13. *
  14. * Returns 0 on success, -ENOTSUPP if the clock does not support
  15. * switching modes.
  16. */
  17. int sunxi_ccu_set_mmc_timing_mode(struct clk *clk, bool new_mode)
  18. {
  19. struct clk_hw *hw = __clk_get_hw(clk);
  20. struct ccu_common *cm = hw_to_ccu_common(hw);
  21. unsigned long flags;
  22. u32 val;
  23. if (!(cm->features & CCU_FEATURE_MMC_TIMING_SWITCH))
  24. return -ENOTSUPP;
  25. spin_lock_irqsave(cm->lock, flags);
  26. val = readl(cm->base + cm->reg);
  27. if (new_mode)
  28. val |= CCU_MMC_NEW_TIMING_MODE;
  29. else
  30. val &= ~CCU_MMC_NEW_TIMING_MODE;
  31. writel(val, cm->base + cm->reg);
  32. spin_unlock_irqrestore(cm->lock, flags);
  33. return 0;
  34. }
  35. EXPORT_SYMBOL_GPL(sunxi_ccu_set_mmc_timing_mode);
  36. /**
  37. * sunxi_ccu_get_mmc_timing_mode: Get the current MMC clock timing mode
  38. * @clk: clock to query
  39. *
  40. * Returns 0 if the clock is in old timing mode, > 0 if it is in
  41. * new timing mode, and -ENOTSUPP if the clock does not support
  42. * this function.
  43. */
  44. int sunxi_ccu_get_mmc_timing_mode(struct clk *clk)
  45. {
  46. struct clk_hw *hw = __clk_get_hw(clk);
  47. struct ccu_common *cm = hw_to_ccu_common(hw);
  48. if (!(cm->features & CCU_FEATURE_MMC_TIMING_SWITCH))
  49. return -ENOTSUPP;
  50. return !!(readl(cm->base + cm->reg) & CCU_MMC_NEW_TIMING_MODE);
  51. }
  52. EXPORT_SYMBOL_GPL(sunxi_ccu_get_mmc_timing_mode);