ccu-sun8i-a23-a33.h 1.2 KB

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  1. /* SPDX-License-Identifier: GPL-2.0-or-later */
  2. /*
  3. * Copyright 2016 Maxime Ripard
  4. *
  5. * Maxime Ripard <[email protected]>
  6. */
  7. #ifndef _CCU_SUN8I_A23_A33_H_
  8. #define _CCU_SUN8I_A23_A33_H_
  9. #include <dt-bindings/clock/sun8i-a23-a33-ccu.h>
  10. #include <dt-bindings/reset/sun8i-a23-a33-ccu.h>
  11. #define CLK_PLL_CPUX 0
  12. #define CLK_PLL_AUDIO_BASE 1
  13. #define CLK_PLL_AUDIO 2
  14. #define CLK_PLL_AUDIO_2X 3
  15. #define CLK_PLL_AUDIO_4X 4
  16. #define CLK_PLL_AUDIO_8X 5
  17. #define CLK_PLL_VIDEO 6
  18. #define CLK_PLL_VIDEO_2X 7
  19. #define CLK_PLL_VE 8
  20. #define CLK_PLL_DDR0 9
  21. #define CLK_PLL_PERIPH 10
  22. #define CLK_PLL_PERIPH_2X 11
  23. #define CLK_PLL_GPU 12
  24. /* The PLL MIPI clock is exported */
  25. #define CLK_PLL_HSIC 14
  26. #define CLK_PLL_DE 15
  27. #define CLK_PLL_DDR1 16
  28. #define CLK_PLL_DDR 17
  29. /* The CPUX clock is exported */
  30. #define CLK_AXI 19
  31. #define CLK_AHB1 20
  32. #define CLK_APB1 21
  33. #define CLK_APB2 22
  34. /* All the bus gates are exported */
  35. /* The first part of the mod clocks is exported */
  36. #define CLK_DRAM 79
  37. /* Some more module clocks are exported */
  38. #define CLK_MBUS 95
  39. /* And the last module clocks are exported */
  40. #define CLK_NUMBER (CLK_ATS + 1)
  41. #endif /* _CCU_SUN8I_A23_A33_H_ */