clk-mt8192-msdc.c 2.3 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. //
  3. // Copyright (c) 2021 MediaTek Inc.
  4. // Author: Chun-Jie Chen <[email protected]>
  5. #include <linux/clk-provider.h>
  6. #include <linux/of_device.h>
  7. #include <linux/platform_device.h>
  8. #include "clk-mtk.h"
  9. #include "clk-gate.h"
  10. #include <dt-bindings/clock/mt8192-clk.h>
  11. static const struct mtk_gate_regs msdc_top_cg_regs = {
  12. .set_ofs = 0x0,
  13. .clr_ofs = 0x0,
  14. .sta_ofs = 0x0,
  15. };
  16. #define GATE_MSDC_TOP(_id, _name, _parent, _shift) \
  17. GATE_MTK(_id, _name, _parent, &msdc_top_cg_regs, _shift, &mtk_clk_gate_ops_no_setclr_inv)
  18. static const struct mtk_gate msdc_top_clks[] = {
  19. GATE_MSDC_TOP(CLK_MSDC_TOP_AES_0P, "msdc_top_aes_0p", "aes_msdcfde_sel", 0),
  20. GATE_MSDC_TOP(CLK_MSDC_TOP_SRC_0P, "msdc_top_src_0p", "infra_msdc0_src", 1),
  21. GATE_MSDC_TOP(CLK_MSDC_TOP_SRC_1P, "msdc_top_src_1p", "infra_msdc1_src", 2),
  22. GATE_MSDC_TOP(CLK_MSDC_TOP_SRC_2P, "msdc_top_src_2p", "infra_msdc2_src", 3),
  23. GATE_MSDC_TOP(CLK_MSDC_TOP_P_MSDC0, "msdc_top_p_msdc0", "axi_sel", 4),
  24. GATE_MSDC_TOP(CLK_MSDC_TOP_P_MSDC1, "msdc_top_p_msdc1", "axi_sel", 5),
  25. GATE_MSDC_TOP(CLK_MSDC_TOP_P_MSDC2, "msdc_top_p_msdc2", "axi_sel", 6),
  26. GATE_MSDC_TOP(CLK_MSDC_TOP_P_CFG, "msdc_top_p_cfg", "axi_sel", 7),
  27. GATE_MSDC_TOP(CLK_MSDC_TOP_AXI, "msdc_top_axi", "axi_sel", 8),
  28. GATE_MSDC_TOP(CLK_MSDC_TOP_H_MST_0P, "msdc_top_h_mst_0p", "infra_msdc0", 9),
  29. GATE_MSDC_TOP(CLK_MSDC_TOP_H_MST_1P, "msdc_top_h_mst_1p", "infra_msdc1", 10),
  30. GATE_MSDC_TOP(CLK_MSDC_TOP_H_MST_2P, "msdc_top_h_mst_2p", "infra_msdc2", 11),
  31. GATE_MSDC_TOP(CLK_MSDC_TOP_MEM_OFF_DLY_26M, "msdc_top_mem_off_dly_26m", "clk26m", 12),
  32. GATE_MSDC_TOP(CLK_MSDC_TOP_32K, "msdc_top_32k", "clk32k", 13),
  33. GATE_MSDC_TOP(CLK_MSDC_TOP_AHB2AXI_BRG_AXI, "msdc_top_ahb2axi_brg_axi", "axi_sel", 14),
  34. };
  35. static const struct mtk_clk_desc msdc_top_desc = {
  36. .clks = msdc_top_clks,
  37. .num_clks = ARRAY_SIZE(msdc_top_clks),
  38. };
  39. static const struct of_device_id of_match_clk_mt8192_msdc[] = {
  40. {
  41. .compatible = "mediatek,mt8192-msdc_top",
  42. .data = &msdc_top_desc,
  43. }, {
  44. /* sentinel */
  45. }
  46. };
  47. static struct platform_driver clk_mt8192_msdc_drv = {
  48. .probe = mtk_clk_simple_probe,
  49. .remove = mtk_clk_simple_remove,
  50. .driver = {
  51. .name = "clk-mt8192-msdc",
  52. .of_match_table = of_match_clk_mt8192_msdc,
  53. },
  54. };
  55. builtin_platform_driver(clk_mt8192_msdc_drv);