Kconfig 15 KB

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  1. # SPDX-License-Identifier: GPL-2.0
  2. config HAVE_CLK
  3. bool
  4. help
  5. The <linux/clk.h> calls support software clock gating and
  6. thus are a key power management tool on many systems.
  7. config HAVE_CLK_PREPARE
  8. bool
  9. config HAVE_LEGACY_CLK # TODO: Remove once all legacy users are migrated
  10. bool
  11. select HAVE_CLK
  12. help
  13. Select this option when the clock API in <linux/clk.h> is implemented
  14. by platform/architecture code. This method is deprecated. Modern
  15. code should select COMMON_CLK instead and not define a custom
  16. 'struct clk'.
  17. menuconfig COMMON_CLK
  18. bool "Common Clock Framework"
  19. depends on !HAVE_LEGACY_CLK
  20. select HAVE_CLK_PREPARE
  21. select HAVE_CLK
  22. select SRCU
  23. select RATIONAL
  24. help
  25. The common clock framework is a single definition of struct
  26. clk, useful across many platforms, as well as an
  27. implementation of the clock API in include/linux/clk.h.
  28. Architectures utilizing the common struct clk should select
  29. this option.
  30. if COMMON_CLK
  31. config COMMON_CLK_WM831X
  32. tristate "Clock driver for WM831x/2x PMICs"
  33. depends on MFD_WM831X
  34. help
  35. Supports the clocking subsystem of the WM831x/2x series of
  36. PMICs from Wolfson Microelectronics.
  37. source "drivers/clk/versatile/Kconfig"
  38. config CLK_HSDK
  39. bool "PLL Driver for HSDK platform"
  40. depends on ARC_SOC_HSDK || COMPILE_TEST
  41. depends on HAS_IOMEM
  42. help
  43. This driver supports the HSDK core, system, ddr, tunnel and hdmi PLLs
  44. control.
  45. config LMK04832
  46. tristate "Ti LMK04832 JESD204B Compliant Clock Jitter Cleaner"
  47. depends on SPI
  48. select REGMAP_SPI
  49. help
  50. Say yes here to build support for Texas Instruments' LMK04832 Ultra
  51. Low-Noise JESD204B Compliant Clock Jitter Cleaner With Dual Loop PLLs
  52. config COMMON_CLK_APPLE_NCO
  53. tristate "Clock driver for Apple SoC NCOs"
  54. depends on ARCH_APPLE || COMPILE_TEST
  55. default ARCH_APPLE
  56. help
  57. This driver supports NCO (Numerically Controlled Oscillator) blocks
  58. found on Apple SoCs such as t8103 (M1). The blocks are typically
  59. generators of audio clocks.
  60. config COMMON_CLK_MAX77686
  61. tristate "Clock driver for Maxim 77620/77686/77802 MFD"
  62. depends on MFD_MAX77686 || MFD_MAX77620 || COMPILE_TEST
  63. help
  64. This driver supports Maxim 77620/77686/77802 crystal oscillator
  65. clock.
  66. config COMMON_CLK_MAX9485
  67. tristate "Maxim 9485 Programmable Clock Generator"
  68. depends on I2C
  69. help
  70. This driver supports Maxim 9485 Programmable Audio Clock Generator
  71. config COMMON_CLK_RK808
  72. tristate "Clock driver for RK805/RK808/RK809/RK817/RK818"
  73. depends on MFD_RK808
  74. help
  75. This driver supports RK805, RK809 and RK817, RK808 and RK818 crystal oscillator clock.
  76. These multi-function devices have two fixed-rate oscillators, clocked at 32KHz each.
  77. Clkout1 is always on, Clkout2 can off by control register.
  78. config COMMON_CLK_HI655X
  79. tristate "Clock driver for Hi655x" if EXPERT
  80. depends on (MFD_HI655X_PMIC || COMPILE_TEST)
  81. select REGMAP
  82. default MFD_HI655X_PMIC
  83. help
  84. This driver supports the hi655x PMIC clock. This
  85. multi-function device has one fixed-rate oscillator, clocked
  86. at 32KHz.
  87. config COMMON_CLK_SCMI
  88. tristate "Clock driver controlled via SCMI interface"
  89. depends on ARM_SCMI_PROTOCOL || COMPILE_TEST
  90. help
  91. This driver provides support for clocks that are controlled
  92. by firmware that implements the SCMI interface.
  93. This driver uses SCMI Message Protocol to interact with the
  94. firmware providing all the clock controls.
  95. config COMMON_CLK_SCPI
  96. tristate "Clock driver controlled via SCPI interface"
  97. depends on ARM_SCPI_PROTOCOL || COMPILE_TEST
  98. help
  99. This driver provides support for clocks that are controlled
  100. by firmware that implements the SCPI interface.
  101. This driver uses SCPI Message Protocol to interact with the
  102. firmware providing all the clock controls.
  103. config COMMON_CLK_SI5341
  104. tristate "Clock driver for SiLabs 5341 and 5340 A/B/C/D devices"
  105. depends on I2C
  106. select REGMAP_I2C
  107. help
  108. This driver supports Silicon Labs Si5341 and Si5340 programmable clock
  109. generators. Not all features of these chips are currently supported
  110. by the driver, in particular it only supports XTAL input. The chip can
  111. be pre-programmed to support other configurations and features not yet
  112. implemented in the driver.
  113. config COMMON_CLK_SI5351
  114. tristate "Clock driver for SiLabs 5351A/B/C"
  115. depends on I2C
  116. select REGMAP_I2C
  117. help
  118. This driver supports Silicon Labs 5351A/B/C programmable clock
  119. generators.
  120. config COMMON_CLK_SI514
  121. tristate "Clock driver for SiLabs 514 devices"
  122. depends on I2C
  123. depends on OF
  124. select REGMAP_I2C
  125. help
  126. This driver supports the Silicon Labs 514 programmable clock
  127. generator.
  128. config COMMON_CLK_SI544
  129. tristate "Clock driver for SiLabs 544 devices"
  130. depends on I2C
  131. select REGMAP_I2C
  132. help
  133. This driver supports the Silicon Labs 544 programmable clock
  134. generator.
  135. config COMMON_CLK_SI570
  136. tristate "Clock driver for SiLabs 570 and compatible devices"
  137. depends on I2C
  138. depends on OF
  139. select REGMAP_I2C
  140. help
  141. This driver supports Silicon Labs 570/571/598/599 programmable
  142. clock generators.
  143. config COMMON_CLK_BM1880
  144. bool "Clock driver for Bitmain BM1880 SoC"
  145. depends on ARCH_BITMAIN || COMPILE_TEST
  146. default ARCH_BITMAIN
  147. help
  148. This driver supports the clocks on Bitmain BM1880 SoC.
  149. config COMMON_CLK_CDCE706
  150. tristate "Clock driver for TI CDCE706 clock synthesizer"
  151. depends on I2C
  152. select REGMAP_I2C
  153. help
  154. This driver supports TI CDCE706 programmable 3-PLL clock synthesizer.
  155. config COMMON_CLK_TPS68470
  156. tristate "Clock Driver for TI TPS68470 PMIC"
  157. depends on I2C
  158. depends on INTEL_SKL_INT3472 || COMPILE_TEST
  159. select REGMAP_I2C
  160. help
  161. This driver supports the clocks provided by the TPS68470 PMIC.
  162. config COMMON_CLK_CDCE925
  163. tristate "Clock driver for TI CDCE913/925/937/949 devices"
  164. depends on I2C
  165. depends on OF
  166. select REGMAP_I2C
  167. help
  168. This driver supports the TI CDCE913/925/937/949 programmable clock
  169. synthesizer. Each chip has different number of PLLs and outputs.
  170. For example, the CDCE925 contains two PLLs with spread-spectrum
  171. clocking support and five output dividers. The driver only supports
  172. the following setup, and uses a fixed setting for the output muxes.
  173. Y1 is derived from the input clock
  174. Y2 and Y3 derive from PLL1
  175. Y4 and Y5 derive from PLL2
  176. Given a target output frequency, the driver will set the PLL and
  177. divider to best approximate the desired output.
  178. config COMMON_CLK_CS2000_CP
  179. tristate "Clock driver for CS2000 Fractional-N Clock Synthesizer & Clock Multiplier"
  180. depends on I2C
  181. select REGMAP_I2C
  182. help
  183. If you say yes here you get support for the CS2000 clock multiplier.
  184. config COMMON_CLK_EN7523
  185. bool "Clock driver for Airoha EN7523 SoC system clocks"
  186. depends on OF
  187. depends on ARCH_AIROHA || COMPILE_TEST
  188. default ARCH_AIROHA
  189. help
  190. This driver provides the fixed clocks and gates present on Airoha
  191. ARM silicon.
  192. config COMMON_CLK_FSL_FLEXSPI
  193. tristate "Clock driver for FlexSPI on Layerscape SoCs"
  194. depends on ARCH_LAYERSCAPE || COMPILE_TEST
  195. default ARCH_LAYERSCAPE && SPI_NXP_FLEXSPI
  196. help
  197. On Layerscape SoCs there is a special clock for the FlexSPI
  198. interface.
  199. config COMMON_CLK_FSL_SAI
  200. bool "Clock driver for BCLK of Freescale SAI cores"
  201. depends on ARCH_LAYERSCAPE || COMPILE_TEST
  202. help
  203. This driver supports the Freescale SAI (Synchronous Audio Interface)
  204. to be used as a generic clock output. Some SoCs have restrictions
  205. regarding the possible pin multiplexer settings. Eg. on some SoCs
  206. two SAI interfaces can only be enabled together. If just one is
  207. needed, the BCLK pin of the second one can be used as general
  208. purpose clock output. Ideally, it can be used to drive an audio
  209. codec (sometimes known as MCLK).
  210. config COMMON_CLK_GEMINI
  211. bool "Clock driver for Cortina Systems Gemini SoC"
  212. depends on ARCH_GEMINI || COMPILE_TEST
  213. select MFD_SYSCON
  214. select RESET_CONTROLLER
  215. help
  216. This driver supports the SoC clocks on the Cortina Systems Gemini
  217. platform, also known as SL3516 or CS3516.
  218. config COMMON_CLK_LAN966X
  219. tristate "Generic Clock Controller driver for LAN966X SoC"
  220. depends on HAS_IOMEM
  221. depends on OF
  222. depends on SOC_LAN966 || COMPILE_TEST
  223. help
  224. This driver provides support for Generic Clock Controller(GCK) on
  225. LAN966X SoC. GCK generates and supplies clock to various peripherals
  226. within the SoC.
  227. config COMMON_CLK_ASPEED
  228. bool "Clock driver for Aspeed BMC SoCs"
  229. depends on ARCH_ASPEED || COMPILE_TEST
  230. default ARCH_ASPEED
  231. select MFD_SYSCON
  232. select RESET_CONTROLLER
  233. help
  234. This driver supports the SoC clocks on the Aspeed BMC platforms.
  235. The G4 and G5 series, including the ast2400 and ast2500, are supported
  236. by this driver.
  237. config COMMON_CLK_S2MPS11
  238. tristate "Clock driver for S2MPS1X/S5M8767 MFD"
  239. depends on MFD_SEC_CORE || COMPILE_TEST
  240. help
  241. This driver supports S2MPS11/S2MPS14/S5M8767 crystal oscillator
  242. clock. These multi-function devices have two (S2MPS14) or three
  243. (S2MPS11, S5M8767) fixed-rate oscillators, clocked at 32KHz each.
  244. config CLK_TWL6040
  245. tristate "External McPDM functional clock from twl6040"
  246. depends on TWL6040_CORE
  247. help
  248. Enable the external functional clock support on OMAP4+ platforms for
  249. McPDM. McPDM module is using the external bit clock on the McPDM bus
  250. as functional clock.
  251. config COMMON_CLK_AXI_CLKGEN
  252. tristate "AXI clkgen driver"
  253. depends on HAS_IOMEM || COMPILE_TEST
  254. depends on OF
  255. help
  256. Support for the Analog Devices axi-clkgen pcore clock generator for Xilinx
  257. FPGAs. It is commonly used in Analog Devices' reference designs.
  258. config CLK_QORIQ
  259. bool "Clock driver for Freescale QorIQ platforms"
  260. depends on OF
  261. depends on PPC_E500MC || SOC_LS1021A || ARCH_LAYERSCAPE || COMPILE_TEST
  262. help
  263. This adds the clock driver support for Freescale QorIQ platforms
  264. using common clock framework.
  265. config CLK_LS1028A_PLLDIG
  266. tristate "Clock driver for LS1028A Display output"
  267. depends on ARCH_LAYERSCAPE || COMPILE_TEST
  268. default ARCH_LAYERSCAPE
  269. help
  270. This driver support the Display output interfaces(LCD, DPHY) pixel clocks
  271. of the QorIQ Layerscape LS1028A, as implemented TSMC CLN28HPM PLL. Not all
  272. features of the PLL are currently supported by the driver. By default,
  273. configured bypass mode with this PLL.
  274. config COMMON_CLK_XGENE
  275. bool "Clock driver for APM XGene SoC"
  276. default ARCH_XGENE
  277. depends on ARM64 || COMPILE_TEST
  278. help
  279. Support for the APM X-Gene SoC reference, PLL, and device clocks.
  280. config COMMON_CLK_LOCHNAGAR
  281. tristate "Cirrus Logic Lochnagar clock driver"
  282. depends on MFD_LOCHNAGAR
  283. help
  284. This driver supports the clocking features of the Cirrus Logic
  285. Lochnagar audio development board.
  286. config COMMON_CLK_NXP
  287. def_bool COMMON_CLK && (ARCH_LPC18XX || ARCH_LPC32XX)
  288. select REGMAP_MMIO if ARCH_LPC32XX
  289. select MFD_SYSCON if ARCH_LPC18XX
  290. help
  291. Support for clock providers on NXP platforms.
  292. config COMMON_CLK_PALMAS
  293. tristate "Clock driver for TI Palmas devices"
  294. depends on MFD_PALMAS
  295. help
  296. This driver supports TI Palmas devices 32KHz output KG and KG_AUDIO
  297. using common clock framework.
  298. config COMMON_CLK_PWM
  299. tristate "Clock driver for PWMs used as clock outputs"
  300. depends on PWM
  301. help
  302. Adapter driver so that any PWM output can be (mis)used as clock signal
  303. at 50% duty cycle.
  304. config COMMON_CLK_PXA
  305. def_bool COMMON_CLK && ARCH_PXA
  306. help
  307. Support for the Marvell PXA SoC.
  308. config COMMON_CLK_OXNAS
  309. bool "Clock driver for the OXNAS SoC Family"
  310. depends on ARCH_OXNAS || COMPILE_TEST
  311. select MFD_SYSCON
  312. help
  313. Support for the OXNAS SoC Family clocks.
  314. config COMMON_CLK_RS9_PCIE
  315. tristate "Clock driver for Renesas 9-series PCIe clock generators"
  316. depends on I2C
  317. depends on OF
  318. select REGMAP_I2C
  319. help
  320. This driver supports the Renesas 9-series PCIe clock generator
  321. models 9FGV/9DBV/9DMV/9FGL/9DML/9QXL/9SQ.
  322. config COMMON_CLK_VC5
  323. tristate "Clock driver for IDT VersaClock 5,6 devices"
  324. depends on I2C
  325. depends on OF
  326. select REGMAP_I2C
  327. help
  328. This driver supports the IDT VersaClock 5 and VersaClock 6
  329. programmable clock generators.
  330. config COMMON_CLK_VC7
  331. tristate "Clock driver for Renesas Versaclock 7 devices"
  332. depends on I2C
  333. depends on OF
  334. select REGMAP_I2C
  335. help
  336. Renesas Versaclock7 is a family of configurable clock generator
  337. and jitter attenuator ICs with fractional and integer dividers.
  338. config COMMON_CLK_STM32MP135
  339. def_bool COMMON_CLK && MACH_STM32MP13
  340. help
  341. Support for stm32mp135 SoC family clocks
  342. config COMMON_CLK_STM32MP157
  343. def_bool COMMON_CLK && MACH_STM32MP157
  344. help
  345. Support for stm32mp157 SoC family clocks
  346. config COMMON_CLK_STM32F
  347. def_bool COMMON_CLK && (MACH_STM32F429 || MACH_STM32F469 || MACH_STM32F746)
  348. help
  349. Support for stm32f4 and stm32f7 SoC families clocks
  350. config COMMON_CLK_STM32H7
  351. def_bool COMMON_CLK && MACH_STM32H743
  352. help
  353. Support for stm32h7 SoC family clocks
  354. config COMMON_CLK_MMP2
  355. def_bool COMMON_CLK && (MACH_MMP2_DT || MACH_MMP3_DT)
  356. help
  357. Support for Marvell MMP2 and MMP3 SoC clocks
  358. config COMMON_CLK_MMP2_AUDIO
  359. tristate "Clock driver for MMP2 Audio subsystem"
  360. depends on COMMON_CLK_MMP2 || COMPILE_TEST
  361. help
  362. This driver supports clocks for Audio subsystem on MMP2 SoC.
  363. config COMMON_CLK_BD718XX
  364. tristate "Clock driver for 32K clk gates on ROHM PMICs"
  365. depends on MFD_ROHM_BD718XX || MFD_ROHM_BD71828
  366. help
  367. This driver supports ROHM BD71837, BD71847, BD71850, BD71815
  368. and BD71828 PMICs clock gates.
  369. config COMMON_CLK_FIXED_MMIO
  370. bool "Clock driver for Memory Mapped Fixed values"
  371. depends on COMMON_CLK && OF
  372. depends on HAS_IOMEM
  373. help
  374. Support for Memory Mapped IO Fixed clocks
  375. config COMMON_CLK_K210
  376. bool "Clock driver for the Canaan Kendryte K210 SoC"
  377. depends on OF && RISCV && SOC_CANAAN
  378. default SOC_CANAAN
  379. help
  380. Support for the Canaan Kendryte K210 RISC-V SoC clocks.
  381. source "drivers/clk/actions/Kconfig"
  382. source "drivers/clk/analogbits/Kconfig"
  383. source "drivers/clk/baikal-t1/Kconfig"
  384. source "drivers/clk/bcm/Kconfig"
  385. source "drivers/clk/hisilicon/Kconfig"
  386. source "drivers/clk/imgtec/Kconfig"
  387. source "drivers/clk/imx/Kconfig"
  388. source "drivers/clk/ingenic/Kconfig"
  389. source "drivers/clk/keystone/Kconfig"
  390. source "drivers/clk/mediatek/Kconfig"
  391. source "drivers/clk/meson/Kconfig"
  392. source "drivers/clk/mstar/Kconfig"
  393. source "drivers/clk/microchip/Kconfig"
  394. source "drivers/clk/mvebu/Kconfig"
  395. source "drivers/clk/pistachio/Kconfig"
  396. source "drivers/clk/qcom/Kconfig"
  397. source "drivers/clk/ralink/Kconfig"
  398. source "drivers/clk/renesas/Kconfig"
  399. source "drivers/clk/rockchip/Kconfig"
  400. source "drivers/clk/samsung/Kconfig"
  401. source "drivers/clk/sifive/Kconfig"
  402. source "drivers/clk/socfpga/Kconfig"
  403. source "drivers/clk/sprd/Kconfig"
  404. source "drivers/clk/starfive/Kconfig"
  405. source "drivers/clk/sunxi/Kconfig"
  406. source "drivers/clk/sunxi-ng/Kconfig"
  407. source "drivers/clk/tegra/Kconfig"
  408. source "drivers/clk/ti/Kconfig"
  409. source "drivers/clk/uniphier/Kconfig"
  410. source "drivers/clk/visconti/Kconfig"
  411. source "drivers/clk/x86/Kconfig"
  412. source "drivers/clk/xilinx/Kconfig"
  413. source "drivers/clk/zynqmp/Kconfig"
  414. # Kunit test cases
  415. config CLK_KUNIT_TEST
  416. tristate "Basic Clock Framework Kunit Tests" if !KUNIT_ALL_TESTS
  417. depends on KUNIT
  418. default KUNIT_ALL_TESTS
  419. help
  420. Kunit tests for the common clock framework.
  421. config CLK_GATE_KUNIT_TEST
  422. tristate "Basic gate type Kunit test" if !KUNIT_ALL_TESTS
  423. depends on KUNIT
  424. default KUNIT_ALL_TESTS
  425. help
  426. Kunit test for the basic clk gate type.
  427. endif