cm4040_cs.c 15 KB

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  1. /*
  2. * A driver for the Omnikey PCMCIA smartcard reader CardMan 4040
  3. *
  4. * (c) 2000-2004 Omnikey AG (http://www.omnikey.com/)
  5. *
  6. * (C) 2005-2006 Harald Welte <[email protected]>
  7. * - add support for poll()
  8. * - driver cleanup
  9. * - add waitqueues
  10. * - adhere to linux kernel coding style and policies
  11. * - support 2.6.13 "new style" pcmcia interface
  12. * - add class interface for udev device creation
  13. *
  14. * The device basically is a USB CCID compliant device that has been
  15. * attached to an I/O-Mapped FIFO.
  16. *
  17. * All rights reserved, Dual BSD/GPL Licensed.
  18. */
  19. #include <linux/kernel.h>
  20. #include <linux/module.h>
  21. #include <linux/slab.h>
  22. #include <linux/init.h>
  23. #include <linux/fs.h>
  24. #include <linux/delay.h>
  25. #include <linux/poll.h>
  26. #include <linux/mutex.h>
  27. #include <linux/wait.h>
  28. #include <linux/uaccess.h>
  29. #include <asm/io.h>
  30. #include <pcmcia/cistpl.h>
  31. #include <pcmcia/cisreg.h>
  32. #include <pcmcia/ciscode.h>
  33. #include <pcmcia/ds.h>
  34. #include "cm4040_cs.h"
  35. #define reader_to_dev(x) (&x->p_dev->dev)
  36. /* n (debug level) is ignored */
  37. /* additional debug output may be enabled by re-compiling with
  38. * CM4040_DEBUG set */
  39. /* #define CM4040_DEBUG */
  40. #define DEBUGP(n, rdr, x, args...) do { \
  41. dev_dbg(reader_to_dev(rdr), "%s:" x, \
  42. __func__ , ## args); \
  43. } while (0)
  44. static DEFINE_MUTEX(cm4040_mutex);
  45. #define CCID_DRIVER_BULK_DEFAULT_TIMEOUT (150*HZ)
  46. #define CCID_DRIVER_ASYNC_POWERUP_TIMEOUT (35*HZ)
  47. #define CCID_DRIVER_MINIMUM_TIMEOUT (3*HZ)
  48. #define READ_WRITE_BUFFER_SIZE 512
  49. #define POLL_LOOP_COUNT 1000
  50. /* how often to poll for fifo status change */
  51. #define POLL_PERIOD msecs_to_jiffies(10)
  52. static void reader_release(struct pcmcia_device *link);
  53. static int major;
  54. static struct class *cmx_class;
  55. #define BS_READABLE 0x01
  56. #define BS_WRITABLE 0x02
  57. struct reader_dev {
  58. struct pcmcia_device *p_dev;
  59. wait_queue_head_t devq;
  60. wait_queue_head_t poll_wait;
  61. wait_queue_head_t read_wait;
  62. wait_queue_head_t write_wait;
  63. unsigned long buffer_status;
  64. unsigned long timeout;
  65. unsigned char s_buf[READ_WRITE_BUFFER_SIZE];
  66. unsigned char r_buf[READ_WRITE_BUFFER_SIZE];
  67. struct timer_list poll_timer;
  68. };
  69. static struct pcmcia_device *dev_table[CM_MAX_DEV];
  70. #ifndef CM4040_DEBUG
  71. #define xoutb outb
  72. #define xinb inb
  73. #else
  74. static inline void xoutb(unsigned char val, unsigned short port)
  75. {
  76. pr_debug("outb(val=%.2x,port=%.4x)\n", val, port);
  77. outb(val, port);
  78. }
  79. static inline unsigned char xinb(unsigned short port)
  80. {
  81. unsigned char val;
  82. val = inb(port);
  83. pr_debug("%.2x=inb(%.4x)\n", val, port);
  84. return val;
  85. }
  86. #endif
  87. /* poll the device fifo status register. not to be confused with
  88. * the poll syscall. */
  89. static void cm4040_do_poll(struct timer_list *t)
  90. {
  91. struct reader_dev *dev = from_timer(dev, t, poll_timer);
  92. unsigned int obs = xinb(dev->p_dev->resource[0]->start
  93. + REG_OFFSET_BUFFER_STATUS);
  94. if ((obs & BSR_BULK_IN_FULL)) {
  95. set_bit(BS_READABLE, &dev->buffer_status);
  96. DEBUGP(4, dev, "waking up read_wait\n");
  97. wake_up_interruptible(&dev->read_wait);
  98. } else
  99. clear_bit(BS_READABLE, &dev->buffer_status);
  100. if (!(obs & BSR_BULK_OUT_FULL)) {
  101. set_bit(BS_WRITABLE, &dev->buffer_status);
  102. DEBUGP(4, dev, "waking up write_wait\n");
  103. wake_up_interruptible(&dev->write_wait);
  104. } else
  105. clear_bit(BS_WRITABLE, &dev->buffer_status);
  106. if (dev->buffer_status)
  107. wake_up_interruptible(&dev->poll_wait);
  108. mod_timer(&dev->poll_timer, jiffies + POLL_PERIOD);
  109. }
  110. static void cm4040_stop_poll(struct reader_dev *dev)
  111. {
  112. del_timer_sync(&dev->poll_timer);
  113. }
  114. static int wait_for_bulk_out_ready(struct reader_dev *dev)
  115. {
  116. int i, rc;
  117. int iobase = dev->p_dev->resource[0]->start;
  118. for (i = 0; i < POLL_LOOP_COUNT; i++) {
  119. if ((xinb(iobase + REG_OFFSET_BUFFER_STATUS)
  120. & BSR_BULK_OUT_FULL) == 0) {
  121. DEBUGP(4, dev, "BulkOut empty (i=%d)\n", i);
  122. return 1;
  123. }
  124. }
  125. DEBUGP(4, dev, "wait_event_interruptible_timeout(timeout=%ld\n",
  126. dev->timeout);
  127. rc = wait_event_interruptible_timeout(dev->write_wait,
  128. test_and_clear_bit(BS_WRITABLE,
  129. &dev->buffer_status),
  130. dev->timeout);
  131. if (rc > 0)
  132. DEBUGP(4, dev, "woke up: BulkOut empty\n");
  133. else if (rc == 0)
  134. DEBUGP(4, dev, "woke up: BulkOut full, returning 0 :(\n");
  135. else if (rc < 0)
  136. DEBUGP(4, dev, "woke up: signal arrived\n");
  137. return rc;
  138. }
  139. /* Write to Sync Control Register */
  140. static int write_sync_reg(unsigned char val, struct reader_dev *dev)
  141. {
  142. int iobase = dev->p_dev->resource[0]->start;
  143. int rc;
  144. rc = wait_for_bulk_out_ready(dev);
  145. if (rc <= 0)
  146. return rc;
  147. xoutb(val, iobase + REG_OFFSET_SYNC_CONTROL);
  148. rc = wait_for_bulk_out_ready(dev);
  149. if (rc <= 0)
  150. return rc;
  151. return 1;
  152. }
  153. static int wait_for_bulk_in_ready(struct reader_dev *dev)
  154. {
  155. int i, rc;
  156. int iobase = dev->p_dev->resource[0]->start;
  157. for (i = 0; i < POLL_LOOP_COUNT; i++) {
  158. if ((xinb(iobase + REG_OFFSET_BUFFER_STATUS)
  159. & BSR_BULK_IN_FULL) == BSR_BULK_IN_FULL) {
  160. DEBUGP(3, dev, "BulkIn full (i=%d)\n", i);
  161. return 1;
  162. }
  163. }
  164. DEBUGP(4, dev, "wait_event_interruptible_timeout(timeout=%ld\n",
  165. dev->timeout);
  166. rc = wait_event_interruptible_timeout(dev->read_wait,
  167. test_and_clear_bit(BS_READABLE,
  168. &dev->buffer_status),
  169. dev->timeout);
  170. if (rc > 0)
  171. DEBUGP(4, dev, "woke up: BulkIn full\n");
  172. else if (rc == 0)
  173. DEBUGP(4, dev, "woke up: BulkIn not full, returning 0 :(\n");
  174. else if (rc < 0)
  175. DEBUGP(4, dev, "woke up: signal arrived\n");
  176. return rc;
  177. }
  178. static ssize_t cm4040_read(struct file *filp, char __user *buf,
  179. size_t count, loff_t *ppos)
  180. {
  181. struct reader_dev *dev = filp->private_data;
  182. int iobase = dev->p_dev->resource[0]->start;
  183. size_t bytes_to_read;
  184. unsigned long i;
  185. size_t min_bytes_to_read;
  186. int rc;
  187. DEBUGP(2, dev, "-> cm4040_read(%s,%d)\n", current->comm, current->pid);
  188. if (count == 0)
  189. return 0;
  190. if (count < 10)
  191. return -EFAULT;
  192. if (filp->f_flags & O_NONBLOCK) {
  193. DEBUGP(4, dev, "filep->f_flags O_NONBLOCK set\n");
  194. DEBUGP(2, dev, "<- cm4040_read (failure)\n");
  195. return -EAGAIN;
  196. }
  197. if (!pcmcia_dev_present(dev->p_dev))
  198. return -ENODEV;
  199. for (i = 0; i < 5; i++) {
  200. rc = wait_for_bulk_in_ready(dev);
  201. if (rc <= 0) {
  202. DEBUGP(5, dev, "wait_for_bulk_in_ready rc=%.2x\n", rc);
  203. DEBUGP(2, dev, "<- cm4040_read (failed)\n");
  204. if (rc == -ERESTARTSYS)
  205. return rc;
  206. return -EIO;
  207. }
  208. dev->r_buf[i] = xinb(iobase + REG_OFFSET_BULK_IN);
  209. #ifdef CM4040_DEBUG
  210. pr_debug("%lu:%2x ", i, dev->r_buf[i]);
  211. }
  212. pr_debug("\n");
  213. #else
  214. }
  215. #endif
  216. bytes_to_read = 5 + le32_to_cpu(*(__le32 *)&dev->r_buf[1]);
  217. DEBUGP(6, dev, "BytesToRead=%zu\n", bytes_to_read);
  218. min_bytes_to_read = min(count, bytes_to_read + 5);
  219. min_bytes_to_read = min_t(size_t, min_bytes_to_read, READ_WRITE_BUFFER_SIZE);
  220. DEBUGP(6, dev, "Min=%zu\n", min_bytes_to_read);
  221. for (i = 0; i < (min_bytes_to_read-5); i++) {
  222. rc = wait_for_bulk_in_ready(dev);
  223. if (rc <= 0) {
  224. DEBUGP(5, dev, "wait_for_bulk_in_ready rc=%.2x\n", rc);
  225. DEBUGP(2, dev, "<- cm4040_read (failed)\n");
  226. if (rc == -ERESTARTSYS)
  227. return rc;
  228. return -EIO;
  229. }
  230. dev->r_buf[i+5] = xinb(iobase + REG_OFFSET_BULK_IN);
  231. #ifdef CM4040_DEBUG
  232. pr_debug("%lu:%2x ", i, dev->r_buf[i]);
  233. }
  234. pr_debug("\n");
  235. #else
  236. }
  237. #endif
  238. *ppos = min_bytes_to_read;
  239. if (copy_to_user(buf, dev->r_buf, min_bytes_to_read))
  240. return -EFAULT;
  241. rc = wait_for_bulk_in_ready(dev);
  242. if (rc <= 0) {
  243. DEBUGP(5, dev, "wait_for_bulk_in_ready rc=%.2x\n", rc);
  244. DEBUGP(2, dev, "<- cm4040_read (failed)\n");
  245. if (rc == -ERESTARTSYS)
  246. return rc;
  247. return -EIO;
  248. }
  249. rc = write_sync_reg(SCR_READER_TO_HOST_DONE, dev);
  250. if (rc <= 0) {
  251. DEBUGP(5, dev, "write_sync_reg c=%.2x\n", rc);
  252. DEBUGP(2, dev, "<- cm4040_read (failed)\n");
  253. if (rc == -ERESTARTSYS)
  254. return rc;
  255. else
  256. return -EIO;
  257. }
  258. xinb(iobase + REG_OFFSET_BULK_IN);
  259. DEBUGP(2, dev, "<- cm4040_read (successfully)\n");
  260. return min_bytes_to_read;
  261. }
  262. static ssize_t cm4040_write(struct file *filp, const char __user *buf,
  263. size_t count, loff_t *ppos)
  264. {
  265. struct reader_dev *dev = filp->private_data;
  266. int iobase = dev->p_dev->resource[0]->start;
  267. ssize_t rc;
  268. int i;
  269. unsigned int bytes_to_write;
  270. DEBUGP(2, dev, "-> cm4040_write(%s,%d)\n", current->comm, current->pid);
  271. if (count == 0) {
  272. DEBUGP(2, dev, "<- cm4040_write empty read (successfully)\n");
  273. return 0;
  274. }
  275. if ((count < 5) || (count > READ_WRITE_BUFFER_SIZE)) {
  276. DEBUGP(2, dev, "<- cm4040_write buffersize=%zd < 5\n", count);
  277. return -EIO;
  278. }
  279. if (filp->f_flags & O_NONBLOCK) {
  280. DEBUGP(4, dev, "filep->f_flags O_NONBLOCK set\n");
  281. DEBUGP(4, dev, "<- cm4040_write (failure)\n");
  282. return -EAGAIN;
  283. }
  284. if (!pcmcia_dev_present(dev->p_dev))
  285. return -ENODEV;
  286. bytes_to_write = count;
  287. if (copy_from_user(dev->s_buf, buf, bytes_to_write))
  288. return -EFAULT;
  289. switch (dev->s_buf[0]) {
  290. case CMD_PC_TO_RDR_XFRBLOCK:
  291. case CMD_PC_TO_RDR_SECURE:
  292. case CMD_PC_TO_RDR_TEST_SECURE:
  293. case CMD_PC_TO_RDR_OK_SECURE:
  294. dev->timeout = CCID_DRIVER_BULK_DEFAULT_TIMEOUT;
  295. break;
  296. case CMD_PC_TO_RDR_ICCPOWERON:
  297. dev->timeout = CCID_DRIVER_ASYNC_POWERUP_TIMEOUT;
  298. break;
  299. case CMD_PC_TO_RDR_GETSLOTSTATUS:
  300. case CMD_PC_TO_RDR_ICCPOWEROFF:
  301. case CMD_PC_TO_RDR_GETPARAMETERS:
  302. case CMD_PC_TO_RDR_RESETPARAMETERS:
  303. case CMD_PC_TO_RDR_SETPARAMETERS:
  304. case CMD_PC_TO_RDR_ESCAPE:
  305. case CMD_PC_TO_RDR_ICCCLOCK:
  306. default:
  307. dev->timeout = CCID_DRIVER_MINIMUM_TIMEOUT;
  308. break;
  309. }
  310. rc = write_sync_reg(SCR_HOST_TO_READER_START, dev);
  311. if (rc <= 0) {
  312. DEBUGP(5, dev, "write_sync_reg c=%.2zx\n", rc);
  313. DEBUGP(2, dev, "<- cm4040_write (failed)\n");
  314. if (rc == -ERESTARTSYS)
  315. return rc;
  316. else
  317. return -EIO;
  318. }
  319. DEBUGP(4, dev, "start \n");
  320. for (i = 0; i < bytes_to_write; i++) {
  321. rc = wait_for_bulk_out_ready(dev);
  322. if (rc <= 0) {
  323. DEBUGP(5, dev, "wait_for_bulk_out_ready rc=%.2zx\n",
  324. rc);
  325. DEBUGP(2, dev, "<- cm4040_write (failed)\n");
  326. if (rc == -ERESTARTSYS)
  327. return rc;
  328. else
  329. return -EIO;
  330. }
  331. xoutb(dev->s_buf[i],iobase + REG_OFFSET_BULK_OUT);
  332. }
  333. DEBUGP(4, dev, "end\n");
  334. rc = write_sync_reg(SCR_HOST_TO_READER_DONE, dev);
  335. if (rc <= 0) {
  336. DEBUGP(5, dev, "write_sync_reg c=%.2zx\n", rc);
  337. DEBUGP(2, dev, "<- cm4040_write (failed)\n");
  338. if (rc == -ERESTARTSYS)
  339. return rc;
  340. else
  341. return -EIO;
  342. }
  343. DEBUGP(2, dev, "<- cm4040_write (successfully)\n");
  344. return count;
  345. }
  346. static __poll_t cm4040_poll(struct file *filp, poll_table *wait)
  347. {
  348. struct reader_dev *dev = filp->private_data;
  349. __poll_t mask = 0;
  350. poll_wait(filp, &dev->poll_wait, wait);
  351. if (test_and_clear_bit(BS_READABLE, &dev->buffer_status))
  352. mask |= EPOLLIN | EPOLLRDNORM;
  353. if (test_and_clear_bit(BS_WRITABLE, &dev->buffer_status))
  354. mask |= EPOLLOUT | EPOLLWRNORM;
  355. DEBUGP(2, dev, "<- cm4040_poll(%u)\n", mask);
  356. return mask;
  357. }
  358. static int cm4040_open(struct inode *inode, struct file *filp)
  359. {
  360. struct reader_dev *dev;
  361. struct pcmcia_device *link;
  362. int minor = iminor(inode);
  363. int ret;
  364. if (minor >= CM_MAX_DEV)
  365. return -ENODEV;
  366. mutex_lock(&cm4040_mutex);
  367. link = dev_table[minor];
  368. if (link == NULL || !pcmcia_dev_present(link)) {
  369. ret = -ENODEV;
  370. goto out;
  371. }
  372. if (link->open) {
  373. ret = -EBUSY;
  374. goto out;
  375. }
  376. dev = link->priv;
  377. filp->private_data = dev;
  378. if (filp->f_flags & O_NONBLOCK) {
  379. DEBUGP(4, dev, "filep->f_flags O_NONBLOCK set\n");
  380. ret = -EAGAIN;
  381. goto out;
  382. }
  383. link->open = 1;
  384. mod_timer(&dev->poll_timer, jiffies + POLL_PERIOD);
  385. DEBUGP(2, dev, "<- cm4040_open (successfully)\n");
  386. ret = nonseekable_open(inode, filp);
  387. out:
  388. mutex_unlock(&cm4040_mutex);
  389. return ret;
  390. }
  391. static int cm4040_close(struct inode *inode, struct file *filp)
  392. {
  393. struct reader_dev *dev = filp->private_data;
  394. struct pcmcia_device *link;
  395. int minor = iminor(inode);
  396. DEBUGP(2, dev, "-> cm4040_close(maj/min=%d.%d)\n", imajor(inode),
  397. iminor(inode));
  398. if (minor >= CM_MAX_DEV)
  399. return -ENODEV;
  400. link = dev_table[minor];
  401. if (link == NULL)
  402. return -ENODEV;
  403. cm4040_stop_poll(dev);
  404. link->open = 0;
  405. wake_up(&dev->devq);
  406. DEBUGP(2, dev, "<- cm4040_close\n");
  407. return 0;
  408. }
  409. static void cm4040_reader_release(struct pcmcia_device *link)
  410. {
  411. struct reader_dev *dev = link->priv;
  412. DEBUGP(3, dev, "-> cm4040_reader_release\n");
  413. while (link->open) {
  414. DEBUGP(3, dev, MODULE_NAME ": delaying release "
  415. "until process has terminated\n");
  416. wait_event(dev->devq, (link->open == 0));
  417. }
  418. DEBUGP(3, dev, "<- cm4040_reader_release\n");
  419. return;
  420. }
  421. static int cm4040_config_check(struct pcmcia_device *p_dev, void *priv_data)
  422. {
  423. return pcmcia_request_io(p_dev);
  424. }
  425. static int reader_config(struct pcmcia_device *link, int devno)
  426. {
  427. struct reader_dev *dev;
  428. int fail_rc;
  429. link->config_flags |= CONF_AUTO_SET_IO;
  430. if (pcmcia_loop_config(link, cm4040_config_check, NULL))
  431. goto cs_release;
  432. fail_rc = pcmcia_enable_device(link);
  433. if (fail_rc != 0) {
  434. dev_info(&link->dev, "pcmcia_enable_device failed 0x%x\n",
  435. fail_rc);
  436. goto cs_release;
  437. }
  438. dev = link->priv;
  439. DEBUGP(2, dev, "device " DEVICE_NAME "%d at %pR\n", devno,
  440. link->resource[0]);
  441. DEBUGP(2, dev, "<- reader_config (succ)\n");
  442. return 0;
  443. cs_release:
  444. reader_release(link);
  445. return -ENODEV;
  446. }
  447. static void reader_release(struct pcmcia_device *link)
  448. {
  449. cm4040_reader_release(link);
  450. pcmcia_disable_device(link);
  451. }
  452. static int reader_probe(struct pcmcia_device *link)
  453. {
  454. struct reader_dev *dev;
  455. int i, ret;
  456. for (i = 0; i < CM_MAX_DEV; i++) {
  457. if (dev_table[i] == NULL)
  458. break;
  459. }
  460. if (i == CM_MAX_DEV)
  461. return -ENODEV;
  462. dev = kzalloc(sizeof(struct reader_dev), GFP_KERNEL);
  463. if (dev == NULL)
  464. return -ENOMEM;
  465. dev->timeout = CCID_DRIVER_MINIMUM_TIMEOUT;
  466. dev->buffer_status = 0;
  467. link->priv = dev;
  468. dev->p_dev = link;
  469. dev_table[i] = link;
  470. init_waitqueue_head(&dev->devq);
  471. init_waitqueue_head(&dev->poll_wait);
  472. init_waitqueue_head(&dev->read_wait);
  473. init_waitqueue_head(&dev->write_wait);
  474. timer_setup(&dev->poll_timer, cm4040_do_poll, 0);
  475. ret = reader_config(link, i);
  476. if (ret) {
  477. dev_table[i] = NULL;
  478. kfree(dev);
  479. return ret;
  480. }
  481. device_create(cmx_class, NULL, MKDEV(major, i), NULL, "cmx%d", i);
  482. return 0;
  483. }
  484. static void reader_detach(struct pcmcia_device *link)
  485. {
  486. struct reader_dev *dev = link->priv;
  487. int devno;
  488. /* find device */
  489. for (devno = 0; devno < CM_MAX_DEV; devno++) {
  490. if (dev_table[devno] == link)
  491. break;
  492. }
  493. if (devno == CM_MAX_DEV)
  494. return;
  495. reader_release(link);
  496. dev_table[devno] = NULL;
  497. kfree(dev);
  498. device_destroy(cmx_class, MKDEV(major, devno));
  499. return;
  500. }
  501. static const struct file_operations reader_fops = {
  502. .owner = THIS_MODULE,
  503. .read = cm4040_read,
  504. .write = cm4040_write,
  505. .open = cm4040_open,
  506. .release = cm4040_close,
  507. .poll = cm4040_poll,
  508. .llseek = no_llseek,
  509. };
  510. static const struct pcmcia_device_id cm4040_ids[] = {
  511. PCMCIA_DEVICE_MANF_CARD(0x0223, 0x0200),
  512. PCMCIA_DEVICE_PROD_ID12("OMNIKEY", "CardMan 4040",
  513. 0xE32CDD8C, 0x8F23318B),
  514. PCMCIA_DEVICE_NULL,
  515. };
  516. MODULE_DEVICE_TABLE(pcmcia, cm4040_ids);
  517. static struct pcmcia_driver reader_driver = {
  518. .owner = THIS_MODULE,
  519. .name = "cm4040_cs",
  520. .probe = reader_probe,
  521. .remove = reader_detach,
  522. .id_table = cm4040_ids,
  523. };
  524. static int __init cm4040_init(void)
  525. {
  526. int rc;
  527. cmx_class = class_create(THIS_MODULE, "cardman_4040");
  528. if (IS_ERR(cmx_class))
  529. return PTR_ERR(cmx_class);
  530. major = register_chrdev(0, DEVICE_NAME, &reader_fops);
  531. if (major < 0) {
  532. printk(KERN_WARNING MODULE_NAME
  533. ": could not get major number\n");
  534. class_destroy(cmx_class);
  535. return major;
  536. }
  537. rc = pcmcia_register_driver(&reader_driver);
  538. if (rc < 0) {
  539. unregister_chrdev(major, DEVICE_NAME);
  540. class_destroy(cmx_class);
  541. return rc;
  542. }
  543. return 0;
  544. }
  545. static void __exit cm4040_exit(void)
  546. {
  547. pcmcia_unregister_driver(&reader_driver);
  548. unregister_chrdev(major, DEVICE_NAME);
  549. class_destroy(cmx_class);
  550. }
  551. module_init(cm4040_init);
  552. module_exit(cm4040_exit);
  553. MODULE_LICENSE("Dual BSD/GPL");