btmrvl_sdio.h 2.6 KB

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  1. /* SPDX-License-Identifier: GPL-2.0-only */
  2. /**
  3. * Marvell BT-over-SDIO driver: SDIO interface related definitions
  4. *
  5. * Copyright (C) 2009, Marvell International Ltd.
  6. **/
  7. #define SDIO_HEADER_LEN 4
  8. /* SD block size can not bigger than 64 due to buf size limit in firmware */
  9. /* define SD block size for data Tx/Rx */
  10. #define SDIO_BLOCK_SIZE 64
  11. /* Number of blocks for firmware transfer */
  12. #define FIRMWARE_TRANSFER_NBLOCK 2
  13. /* This is for firmware specific length */
  14. #define FW_EXTRA_LEN 36
  15. #define MRVDRV_SIZE_OF_CMD_BUFFER (2 * 1024)
  16. #define MRVDRV_BT_RX_PACKET_BUFFER_SIZE \
  17. (HCI_MAX_FRAME_SIZE + FW_EXTRA_LEN)
  18. #define ALLOC_BUF_SIZE (((max_t (int, MRVDRV_BT_RX_PACKET_BUFFER_SIZE, \
  19. MRVDRV_SIZE_OF_CMD_BUFFER) + SDIO_HEADER_LEN \
  20. + SDIO_BLOCK_SIZE - 1) / SDIO_BLOCK_SIZE) \
  21. * SDIO_BLOCK_SIZE)
  22. /* The number of times to try when polling for status */
  23. #define MAX_POLL_TRIES 100
  24. /* Max retry number of CMD53 write */
  25. #define MAX_WRITE_IOMEM_RETRY 2
  26. /* register bitmasks */
  27. #define HOST_POWER_UP BIT(1)
  28. #define HOST_CMD53_FIN BIT(2)
  29. #define HIM_DISABLE 0xff
  30. #define HIM_ENABLE (BIT(0) | BIT(1))
  31. #define UP_LD_HOST_INT_STATUS BIT(0)
  32. #define DN_LD_HOST_INT_STATUS BIT(1)
  33. #define DN_LD_CARD_RDY BIT(0)
  34. #define CARD_IO_READY BIT(3)
  35. #define FIRMWARE_READY 0xfedc
  36. struct btmrvl_plt_wake_cfg {
  37. int irq_bt;
  38. bool wake_by_bt;
  39. };
  40. struct btmrvl_sdio_card_reg {
  41. u8 cfg;
  42. u8 host_int_mask;
  43. u8 host_intstatus;
  44. u8 card_status;
  45. u8 sq_read_base_addr_a0;
  46. u8 sq_read_base_addr_a1;
  47. u8 card_revision;
  48. u8 card_fw_status0;
  49. u8 card_fw_status1;
  50. u8 card_rx_len;
  51. u8 card_rx_unit;
  52. u8 io_port_0;
  53. u8 io_port_1;
  54. u8 io_port_2;
  55. bool int_read_to_clear;
  56. u8 host_int_rsr;
  57. u8 card_misc_cfg;
  58. u8 fw_dump_ctrl;
  59. u8 fw_dump_start;
  60. u8 fw_dump_end;
  61. };
  62. struct btmrvl_sdio_card {
  63. struct sdio_func *func;
  64. u32 ioport;
  65. const char *helper;
  66. const char *firmware;
  67. const struct btmrvl_sdio_card_reg *reg;
  68. bool support_pscan_win_report;
  69. bool supports_fw_dump;
  70. u16 sd_blksz_fw_dl;
  71. u8 rx_unit;
  72. struct btmrvl_private *priv;
  73. struct device_node *plt_of_node;
  74. struct btmrvl_plt_wake_cfg *plt_wake_cfg;
  75. };
  76. struct btmrvl_sdio_device {
  77. const char *helper;
  78. const char *firmware;
  79. const struct btmrvl_sdio_card_reg *reg;
  80. const bool support_pscan_win_report;
  81. u16 sd_blksz_fw_dl;
  82. bool supports_fw_dump;
  83. };
  84. /* Platform specific DMA alignment */
  85. #define BTSDIO_DMA_ALIGN 8
  86. /* Macros for Data Alignment : size */
  87. #define ALIGN_SZ(p, a) \
  88. (((p) + ((a) - 1)) & ~((a) - 1))
  89. /* Macros for Data Alignment : address */
  90. #define ALIGN_ADDR(p, a) \
  91. ((((unsigned long)(p)) + (((unsigned long)(a)) - 1)) & \
  92. ~(((unsigned long)(a)) - 1))