pata_atp867x.c 13 KB

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  1. // SPDX-License-Identifier: GPL-2.0-or-later
  2. /*
  3. * pata_atp867x.c - ARTOP 867X 64bit 4-channel UDMA133 ATA controller driver
  4. *
  5. * (C) 2009 Google Inc. John(Jung-Ik) Lee <[email protected]>
  6. *
  7. * Per Atp867 data sheet rev 1.2, Acard.
  8. * Based in part on early ide code from
  9. * 2003-2004 by Eric Uhrhane, Google, Inc.
  10. *
  11. * TODO:
  12. * 1. RAID features [comparison, XOR, striping, mirroring, etc.]
  13. */
  14. #include <linux/kernel.h>
  15. #include <linux/module.h>
  16. #include <linux/pci.h>
  17. #include <linux/blkdev.h>
  18. #include <linux/delay.h>
  19. #include <linux/device.h>
  20. #include <linux/gfp.h>
  21. #include <scsi/scsi_host.h>
  22. #include <linux/libata.h>
  23. #define DRV_NAME "pata_atp867x"
  24. #define DRV_VERSION "0.7.5"
  25. /*
  26. * IO Registers
  27. * Note that all runtime hot priv ports are cached in ap private_data
  28. */
  29. enum {
  30. ATP867X_IO_CHANNEL_OFFSET = 0x10,
  31. /*
  32. * IO Register Bitfields
  33. */
  34. ATP867X_IO_PIOSPD_ACTIVE_SHIFT = 4,
  35. ATP867X_IO_PIOSPD_RECOVER_SHIFT = 0,
  36. ATP867X_IO_DMAMODE_MSTR_SHIFT = 0,
  37. ATP867X_IO_DMAMODE_MSTR_MASK = 0x07,
  38. ATP867X_IO_DMAMODE_SLAVE_SHIFT = 4,
  39. ATP867X_IO_DMAMODE_SLAVE_MASK = 0x70,
  40. ATP867X_IO_DMAMODE_UDMA_6 = 0x07,
  41. ATP867X_IO_DMAMODE_UDMA_5 = 0x06,
  42. ATP867X_IO_DMAMODE_UDMA_4 = 0x05,
  43. ATP867X_IO_DMAMODE_UDMA_3 = 0x04,
  44. ATP867X_IO_DMAMODE_UDMA_2 = 0x03,
  45. ATP867X_IO_DMAMODE_UDMA_1 = 0x02,
  46. ATP867X_IO_DMAMODE_UDMA_0 = 0x01,
  47. ATP867X_IO_DMAMODE_DISABLE = 0x00,
  48. ATP867X_IO_SYS_INFO_66MHZ = 0x04,
  49. ATP867X_IO_SYS_INFO_SLOW_UDMA5 = 0x02,
  50. ATP867X_IO_SYS_MASK_RESERVED = (~0xf1),
  51. ATP867X_IO_PORTSPD_VAL = 0x1143,
  52. ATP867X_PREREAD_VAL = 0x0200,
  53. ATP867X_NUM_PORTS = 4,
  54. ATP867X_BAR_IOBASE = 0,
  55. ATP867X_BAR_ROMBASE = 6,
  56. };
  57. #define ATP867X_IOBASE(ap) ((ap)->host->iomap[0])
  58. #define ATP867X_SYS_INFO(ap) (0x3F + ATP867X_IOBASE(ap))
  59. #define ATP867X_IO_PORTBASE(ap, port) (0x00 + ATP867X_IOBASE(ap) + \
  60. (port) * ATP867X_IO_CHANNEL_OFFSET)
  61. #define ATP867X_IO_DMABASE(ap, port) (0x40 + \
  62. ATP867X_IO_PORTBASE((ap), (port)))
  63. #define ATP867X_IO_STATUS(ap, port) (0x07 + \
  64. ATP867X_IO_PORTBASE((ap), (port)))
  65. #define ATP867X_IO_ALTSTATUS(ap, port) (0x0E + \
  66. ATP867X_IO_PORTBASE((ap), (port)))
  67. /*
  68. * hot priv ports
  69. */
  70. #define ATP867X_IO_MSTRPIOSPD(ap, port) (0x08 + \
  71. ATP867X_IO_DMABASE((ap), (port)))
  72. #define ATP867X_IO_SLAVPIOSPD(ap, port) (0x09 + \
  73. ATP867X_IO_DMABASE((ap), (port)))
  74. #define ATP867X_IO_8BPIOSPD(ap, port) (0x0A + \
  75. ATP867X_IO_DMABASE((ap), (port)))
  76. #define ATP867X_IO_DMAMODE(ap, port) (0x0B + \
  77. ATP867X_IO_DMABASE((ap), (port)))
  78. #define ATP867X_IO_PORTSPD(ap, port) (0x4A + \
  79. ATP867X_IO_PORTBASE((ap), (port)))
  80. #define ATP867X_IO_PREREAD(ap, port) (0x4C + \
  81. ATP867X_IO_PORTBASE((ap), (port)))
  82. struct atp867x_priv {
  83. void __iomem *dma_mode;
  84. void __iomem *mstr_piospd;
  85. void __iomem *slave_piospd;
  86. void __iomem *eightb_piospd;
  87. int pci66mhz;
  88. };
  89. static void atp867x_set_dmamode(struct ata_port *ap, struct ata_device *adev)
  90. {
  91. struct pci_dev *pdev = to_pci_dev(ap->host->dev);
  92. struct atp867x_priv *dp = ap->private_data;
  93. u8 speed = adev->dma_mode;
  94. u8 b;
  95. u8 mode = speed - XFER_UDMA_0 + 1;
  96. /*
  97. * Doc 6.6.9: decrease the udma mode value by 1 for safer UDMA speed
  98. * on 66MHz bus
  99. * rev-A: UDMA_1~4 (5, 6 no change)
  100. * rev-B: all UDMA modes
  101. * UDMA_0 stays not to disable UDMA
  102. */
  103. if (dp->pci66mhz && mode > ATP867X_IO_DMAMODE_UDMA_0 &&
  104. (pdev->device == PCI_DEVICE_ID_ARTOP_ATP867B ||
  105. mode < ATP867X_IO_DMAMODE_UDMA_5))
  106. mode--;
  107. b = ioread8(dp->dma_mode);
  108. if (adev->devno & 1) {
  109. b = (b & ~ATP867X_IO_DMAMODE_SLAVE_MASK) |
  110. (mode << ATP867X_IO_DMAMODE_SLAVE_SHIFT);
  111. } else {
  112. b = (b & ~ATP867X_IO_DMAMODE_MSTR_MASK) |
  113. (mode << ATP867X_IO_DMAMODE_MSTR_SHIFT);
  114. }
  115. iowrite8(b, dp->dma_mode);
  116. }
  117. static int atp867x_get_active_clocks_shifted(struct ata_port *ap,
  118. unsigned int clk)
  119. {
  120. struct atp867x_priv *dp = ap->private_data;
  121. unsigned char clocks = clk;
  122. /*
  123. * Doc 6.6.9: increase the clock value by 1 for safer PIO speed
  124. * on 66MHz bus
  125. */
  126. if (dp->pci66mhz)
  127. clocks++;
  128. switch (clocks) {
  129. case 0:
  130. clocks = 1;
  131. break;
  132. case 1 ... 6:
  133. break;
  134. default:
  135. ata_port_warn(ap, "ATP867X: active %dclk is invalid. "
  136. "Using 12clk.\n", clk);
  137. fallthrough;
  138. case 9 ... 12:
  139. clocks = 7; /* 12 clk */
  140. break;
  141. case 7:
  142. case 8: /* default 8 clk */
  143. clocks = 0;
  144. goto active_clock_shift_done;
  145. }
  146. active_clock_shift_done:
  147. return clocks << ATP867X_IO_PIOSPD_ACTIVE_SHIFT;
  148. }
  149. static int atp867x_get_recover_clocks_shifted(struct ata_port *ap,
  150. unsigned int clk)
  151. {
  152. unsigned char clocks = clk;
  153. switch (clocks) {
  154. case 0:
  155. clocks = 1;
  156. break;
  157. case 1 ... 11:
  158. break;
  159. case 13:
  160. case 14:
  161. --clocks; /* by the spec */
  162. break;
  163. case 15:
  164. break;
  165. default:
  166. ata_port_warn(ap, "ATP867X: recover %dclk is invalid. "
  167. "Using default 12clk.\n", clk);
  168. fallthrough;
  169. case 12: /* default 12 clk */
  170. clocks = 0;
  171. break;
  172. }
  173. return clocks << ATP867X_IO_PIOSPD_RECOVER_SHIFT;
  174. }
  175. static void atp867x_set_piomode(struct ata_port *ap, struct ata_device *adev)
  176. {
  177. struct ata_device *peer = ata_dev_pair(adev);
  178. struct atp867x_priv *dp = ap->private_data;
  179. u8 speed = adev->pio_mode;
  180. struct ata_timing t, p;
  181. int T, UT;
  182. u8 b;
  183. T = 1000000000 / 33333;
  184. UT = T / 4;
  185. ata_timing_compute(adev, speed, &t, T, UT);
  186. if (peer && peer->pio_mode) {
  187. ata_timing_compute(peer, peer->pio_mode, &p, T, UT);
  188. ata_timing_merge(&p, &t, &t, ATA_TIMING_8BIT);
  189. }
  190. b = ioread8(dp->dma_mode);
  191. if (adev->devno & 1)
  192. b = (b & ~ATP867X_IO_DMAMODE_SLAVE_MASK);
  193. else
  194. b = (b & ~ATP867X_IO_DMAMODE_MSTR_MASK);
  195. iowrite8(b, dp->dma_mode);
  196. b = atp867x_get_active_clocks_shifted(ap, t.active) |
  197. atp867x_get_recover_clocks_shifted(ap, t.recover);
  198. if (adev->devno & 1)
  199. iowrite8(b, dp->slave_piospd);
  200. else
  201. iowrite8(b, dp->mstr_piospd);
  202. b = atp867x_get_active_clocks_shifted(ap, t.act8b) |
  203. atp867x_get_recover_clocks_shifted(ap, t.rec8b);
  204. iowrite8(b, dp->eightb_piospd);
  205. }
  206. static int atp867x_cable_override(struct pci_dev *pdev)
  207. {
  208. if (pdev->subsystem_vendor == PCI_VENDOR_ID_ARTOP &&
  209. (pdev->subsystem_device == PCI_DEVICE_ID_ARTOP_ATP867A ||
  210. pdev->subsystem_device == PCI_DEVICE_ID_ARTOP_ATP867B)) {
  211. return 1;
  212. }
  213. return 0;
  214. }
  215. static int atp867x_cable_detect(struct ata_port *ap)
  216. {
  217. struct pci_dev *pdev = to_pci_dev(ap->host->dev);
  218. if (atp867x_cable_override(pdev))
  219. return ATA_CBL_PATA40_SHORT;
  220. return ATA_CBL_PATA_UNK;
  221. }
  222. static struct scsi_host_template atp867x_sht = {
  223. ATA_BMDMA_SHT(DRV_NAME),
  224. };
  225. static struct ata_port_operations atp867x_ops = {
  226. .inherits = &ata_bmdma_port_ops,
  227. .cable_detect = atp867x_cable_detect,
  228. .set_piomode = atp867x_set_piomode,
  229. .set_dmamode = atp867x_set_dmamode,
  230. };
  231. static void atp867x_check_res(struct pci_dev *pdev)
  232. {
  233. int i;
  234. unsigned long start, len;
  235. /* Check the PCI resources for this channel are enabled */
  236. for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
  237. start = pci_resource_start(pdev, i);
  238. len = pci_resource_len(pdev, i);
  239. dev_dbg(&pdev->dev, "ATP867X: resource start:len=%lx:%lx\n",
  240. start, len);
  241. }
  242. }
  243. static void atp867x_check_ports(struct ata_port *ap, int port)
  244. {
  245. struct ata_ioports *ioaddr = &ap->ioaddr;
  246. struct atp867x_priv *dp = ap->private_data;
  247. ata_port_dbg(ap, "ATP867X: port[%d] addresses\n"
  248. " cmd_addr =0x%lx, 0x%lx\n"
  249. " ctl_addr =0x%lx, 0x%lx\n"
  250. " bmdma_addr =0x%lx, 0x%lx\n"
  251. " data_addr =0x%lx\n"
  252. " error_addr =0x%lx\n"
  253. " feature_addr =0x%lx\n"
  254. " nsect_addr =0x%lx\n"
  255. " lbal_addr =0x%lx\n"
  256. " lbam_addr =0x%lx\n"
  257. " lbah_addr =0x%lx\n"
  258. " device_addr =0x%lx\n"
  259. " status_addr =0x%lx\n"
  260. " command_addr =0x%lx\n"
  261. " dp->dma_mode =0x%lx\n"
  262. " dp->mstr_piospd =0x%lx\n"
  263. " dp->slave_piospd =0x%lx\n"
  264. " dp->eightb_piospd =0x%lx\n"
  265. " dp->pci66mhz =0x%lx\n",
  266. port,
  267. (unsigned long)ioaddr->cmd_addr,
  268. (unsigned long)ATP867X_IO_PORTBASE(ap, port),
  269. (unsigned long)ioaddr->ctl_addr,
  270. (unsigned long)ATP867X_IO_ALTSTATUS(ap, port),
  271. (unsigned long)ioaddr->bmdma_addr,
  272. (unsigned long)ATP867X_IO_DMABASE(ap, port),
  273. (unsigned long)ioaddr->data_addr,
  274. (unsigned long)ioaddr->error_addr,
  275. (unsigned long)ioaddr->feature_addr,
  276. (unsigned long)ioaddr->nsect_addr,
  277. (unsigned long)ioaddr->lbal_addr,
  278. (unsigned long)ioaddr->lbam_addr,
  279. (unsigned long)ioaddr->lbah_addr,
  280. (unsigned long)ioaddr->device_addr,
  281. (unsigned long)ioaddr->status_addr,
  282. (unsigned long)ioaddr->command_addr,
  283. (unsigned long)dp->dma_mode,
  284. (unsigned long)dp->mstr_piospd,
  285. (unsigned long)dp->slave_piospd,
  286. (unsigned long)dp->eightb_piospd,
  287. (unsigned long)dp->pci66mhz);
  288. }
  289. static int atp867x_set_priv(struct ata_port *ap)
  290. {
  291. struct pci_dev *pdev = to_pci_dev(ap->host->dev);
  292. struct atp867x_priv *dp;
  293. int port = ap->port_no;
  294. dp = ap->private_data =
  295. devm_kzalloc(&pdev->dev, sizeof(*dp), GFP_KERNEL);
  296. if (dp == NULL)
  297. return -ENOMEM;
  298. dp->dma_mode = ATP867X_IO_DMAMODE(ap, port);
  299. dp->mstr_piospd = ATP867X_IO_MSTRPIOSPD(ap, port);
  300. dp->slave_piospd = ATP867X_IO_SLAVPIOSPD(ap, port);
  301. dp->eightb_piospd = ATP867X_IO_8BPIOSPD(ap, port);
  302. dp->pci66mhz =
  303. ioread8(ATP867X_SYS_INFO(ap)) & ATP867X_IO_SYS_INFO_66MHZ;
  304. return 0;
  305. }
  306. static void atp867x_fixup(struct ata_host *host)
  307. {
  308. struct pci_dev *pdev = to_pci_dev(host->dev);
  309. struct ata_port *ap = host->ports[0];
  310. int i;
  311. u8 v;
  312. /*
  313. * Broken BIOS might not set latency high enough
  314. */
  315. pci_read_config_byte(pdev, PCI_LATENCY_TIMER, &v);
  316. if (v < 0x80) {
  317. v = 0x80;
  318. pci_write_config_byte(pdev, PCI_LATENCY_TIMER, v);
  319. dev_dbg(&pdev->dev, "ATP867X: set latency timer to %d\n", v);
  320. }
  321. /*
  322. * init 8bit io ports speed(0aaarrrr) to 43h and
  323. * init udma modes of master/slave to 0/0(11h)
  324. */
  325. for (i = 0; i < ATP867X_NUM_PORTS; i++)
  326. iowrite16(ATP867X_IO_PORTSPD_VAL, ATP867X_IO_PORTSPD(ap, i));
  327. /*
  328. * init PreREAD counts
  329. */
  330. for (i = 0; i < ATP867X_NUM_PORTS; i++)
  331. iowrite16(ATP867X_PREREAD_VAL, ATP867X_IO_PREREAD(ap, i));
  332. v = ioread8(ATP867X_IOBASE(ap) + 0x28);
  333. v &= 0xcf; /* Enable INTA#: bit4=0 means enable */
  334. v |= 0xc0; /* Enable PCI burst, MRM & not immediate interrupts */
  335. iowrite8(v, ATP867X_IOBASE(ap) + 0x28);
  336. /*
  337. * Turn off the over clocked udma5 mode, only for Rev-B
  338. */
  339. v = ioread8(ATP867X_SYS_INFO(ap));
  340. v &= ATP867X_IO_SYS_MASK_RESERVED;
  341. if (pdev->device == PCI_DEVICE_ID_ARTOP_ATP867B)
  342. v |= ATP867X_IO_SYS_INFO_SLOW_UDMA5;
  343. iowrite8(v, ATP867X_SYS_INFO(ap));
  344. }
  345. static int atp867x_ata_pci_sff_init_host(struct ata_host *host)
  346. {
  347. struct device *gdev = host->dev;
  348. struct pci_dev *pdev = to_pci_dev(gdev);
  349. unsigned int mask = 0;
  350. int i, rc;
  351. /*
  352. * do not map rombase
  353. */
  354. rc = pcim_iomap_regions(pdev, 1 << ATP867X_BAR_IOBASE, DRV_NAME);
  355. if (rc == -EBUSY)
  356. pcim_pin_device(pdev);
  357. if (rc)
  358. return rc;
  359. host->iomap = pcim_iomap_table(pdev);
  360. atp867x_check_res(pdev);
  361. for (i = 0; i < PCI_STD_NUM_BARS; i++)
  362. dev_dbg(gdev, "ATP867X: iomap[%d]=0x%p\n", i,
  363. host->iomap[i]);
  364. /*
  365. * request, iomap BARs and init port addresses accordingly
  366. */
  367. for (i = 0; i < host->n_ports; i++) {
  368. struct ata_port *ap = host->ports[i];
  369. struct ata_ioports *ioaddr = &ap->ioaddr;
  370. ioaddr->cmd_addr = ATP867X_IO_PORTBASE(ap, i);
  371. ioaddr->ctl_addr = ioaddr->altstatus_addr
  372. = ATP867X_IO_ALTSTATUS(ap, i);
  373. ioaddr->bmdma_addr = ATP867X_IO_DMABASE(ap, i);
  374. ata_sff_std_ports(ioaddr);
  375. rc = atp867x_set_priv(ap);
  376. if (rc)
  377. return rc;
  378. atp867x_check_ports(ap, i);
  379. ata_port_desc(ap, "cmd 0x%lx ctl 0x%lx",
  380. (unsigned long)ioaddr->cmd_addr,
  381. (unsigned long)ioaddr->ctl_addr);
  382. ata_port_desc(ap, "bmdma 0x%lx",
  383. (unsigned long)ioaddr->bmdma_addr);
  384. mask |= 1 << i;
  385. }
  386. if (!mask) {
  387. dev_err(gdev, "no available native port\n");
  388. return -ENODEV;
  389. }
  390. atp867x_fixup(host);
  391. return dma_set_mask_and_coherent(&pdev->dev, ATA_DMA_MASK);
  392. }
  393. static int atp867x_init_one(struct pci_dev *pdev,
  394. const struct pci_device_id *id)
  395. {
  396. static const struct ata_port_info info_867x = {
  397. .flags = ATA_FLAG_SLAVE_POSS,
  398. .pio_mask = ATA_PIO4,
  399. .udma_mask = ATA_UDMA6,
  400. .port_ops = &atp867x_ops,
  401. };
  402. struct ata_host *host;
  403. const struct ata_port_info *ppi[] = { &info_867x, NULL };
  404. int rc;
  405. ata_print_version_once(&pdev->dev, DRV_VERSION);
  406. rc = pcim_enable_device(pdev);
  407. if (rc)
  408. return rc;
  409. dev_info(&pdev->dev, "ATP867X: ATP867 ATA UDMA133 controller (rev %02X)",
  410. pdev->device);
  411. host = ata_host_alloc_pinfo(&pdev->dev, ppi, ATP867X_NUM_PORTS);
  412. if (!host) {
  413. dev_err(&pdev->dev, "failed to allocate ATA host\n");
  414. rc = -ENOMEM;
  415. goto err_out;
  416. }
  417. rc = atp867x_ata_pci_sff_init_host(host);
  418. if (rc) {
  419. dev_err(&pdev->dev, "failed to init host\n");
  420. goto err_out;
  421. }
  422. pci_set_master(pdev);
  423. rc = ata_host_activate(host, pdev->irq, ata_bmdma_interrupt,
  424. IRQF_SHARED, &atp867x_sht);
  425. if (rc)
  426. dev_err(&pdev->dev, "failed to activate host\n");
  427. err_out:
  428. return rc;
  429. }
  430. #ifdef CONFIG_PM_SLEEP
  431. static int atp867x_reinit_one(struct pci_dev *pdev)
  432. {
  433. struct ata_host *host = pci_get_drvdata(pdev);
  434. int rc;
  435. rc = ata_pci_device_do_resume(pdev);
  436. if (rc)
  437. return rc;
  438. atp867x_fixup(host);
  439. ata_host_resume(host);
  440. return 0;
  441. }
  442. #endif
  443. static struct pci_device_id atp867x_pci_tbl[] = {
  444. { PCI_VDEVICE(ARTOP, PCI_DEVICE_ID_ARTOP_ATP867A), 0 },
  445. { PCI_VDEVICE(ARTOP, PCI_DEVICE_ID_ARTOP_ATP867B), 0 },
  446. { },
  447. };
  448. static struct pci_driver atp867x_driver = {
  449. .name = DRV_NAME,
  450. .id_table = atp867x_pci_tbl,
  451. .probe = atp867x_init_one,
  452. .remove = ata_pci_remove_one,
  453. #ifdef CONFIG_PM_SLEEP
  454. .suspend = ata_pci_device_suspend,
  455. .resume = atp867x_reinit_one,
  456. #endif
  457. };
  458. module_pci_driver(atp867x_driver);
  459. MODULE_AUTHOR("John(Jung-Ik) Lee, Google Inc.");
  460. MODULE_DESCRIPTION("low level driver for Artop/Acard 867x ATA controller");
  461. MODULE_LICENSE("GPL");
  462. MODULE_DEVICE_TABLE(pci, atp867x_pci_tbl);
  463. MODULE_VERSION(DRV_VERSION);