hwregs.c 22 KB

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  1. // SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0
  2. /*******************************************************************************
  3. *
  4. * Module Name: hwregs - Read/write access functions for the various ACPI
  5. * control and status registers.
  6. *
  7. ******************************************************************************/
  8. #include <acpi/acpi.h>
  9. #include "accommon.h"
  10. #include "acevents.h"
  11. #define _COMPONENT ACPI_HARDWARE
  12. ACPI_MODULE_NAME("hwregs")
  13. #if (!ACPI_REDUCED_HARDWARE)
  14. /* Local Prototypes */
  15. static u8
  16. acpi_hw_get_access_bit_width(u64 address,
  17. struct acpi_generic_address *reg,
  18. u8 max_bit_width);
  19. static acpi_status
  20. acpi_hw_read_multiple(u32 *value,
  21. struct acpi_generic_address *register_a,
  22. struct acpi_generic_address *register_b);
  23. static acpi_status
  24. acpi_hw_write_multiple(u32 value,
  25. struct acpi_generic_address *register_a,
  26. struct acpi_generic_address *register_b);
  27. #endif /* !ACPI_REDUCED_HARDWARE */
  28. /******************************************************************************
  29. *
  30. * FUNCTION: acpi_hw_get_access_bit_width
  31. *
  32. * PARAMETERS: address - GAS register address
  33. * reg - GAS register structure
  34. * max_bit_width - Max bit_width supported (32 or 64)
  35. *
  36. * RETURN: Status
  37. *
  38. * DESCRIPTION: Obtain optimal access bit width
  39. *
  40. ******************************************************************************/
  41. static u8
  42. acpi_hw_get_access_bit_width(u64 address,
  43. struct acpi_generic_address *reg, u8 max_bit_width)
  44. {
  45. u8 access_bit_width;
  46. /*
  47. * GAS format "register", used by FADT:
  48. * 1. Detected if bit_offset is 0 and bit_width is 8/16/32/64;
  49. * 2. access_size field is ignored and bit_width field is used for
  50. * determining the boundary of the IO accesses.
  51. * GAS format "region", used by APEI registers:
  52. * 1. Detected if bit_offset is not 0 or bit_width is not 8/16/32/64;
  53. * 2. access_size field is used for determining the boundary of the
  54. * IO accesses;
  55. * 3. bit_offset/bit_width fields are used to describe the "region".
  56. *
  57. * Note: This algorithm assumes that the "Address" fields should always
  58. * contain aligned values.
  59. */
  60. if (!reg->bit_offset && reg->bit_width &&
  61. ACPI_IS_POWER_OF_TWO(reg->bit_width) &&
  62. ACPI_IS_ALIGNED(reg->bit_width, 8)) {
  63. access_bit_width = reg->bit_width;
  64. } else if (reg->access_width) {
  65. access_bit_width = ACPI_ACCESS_BIT_WIDTH(reg->access_width);
  66. } else {
  67. access_bit_width =
  68. ACPI_ROUND_UP_POWER_OF_TWO_8(reg->bit_offset +
  69. reg->bit_width);
  70. if (access_bit_width <= 8) {
  71. access_bit_width = 8;
  72. } else {
  73. while (!ACPI_IS_ALIGNED(address, access_bit_width >> 3)) {
  74. access_bit_width >>= 1;
  75. }
  76. }
  77. }
  78. /* Maximum IO port access bit width is 32 */
  79. if (reg->space_id == ACPI_ADR_SPACE_SYSTEM_IO) {
  80. max_bit_width = 32;
  81. }
  82. /*
  83. * Return access width according to the requested maximum access bit width,
  84. * as the caller should know the format of the register and may enforce
  85. * a 32-bit accesses.
  86. */
  87. if (access_bit_width < max_bit_width) {
  88. return (access_bit_width);
  89. }
  90. return (max_bit_width);
  91. }
  92. /******************************************************************************
  93. *
  94. * FUNCTION: acpi_hw_validate_register
  95. *
  96. * PARAMETERS: reg - GAS register structure
  97. * max_bit_width - Max bit_width supported (32 or 64)
  98. * address - Pointer to where the gas->address
  99. * is returned
  100. *
  101. * RETURN: Status
  102. *
  103. * DESCRIPTION: Validate the contents of a GAS register. Checks the GAS
  104. * pointer, Address, space_id, bit_width, and bit_offset.
  105. *
  106. ******************************************************************************/
  107. acpi_status
  108. acpi_hw_validate_register(struct acpi_generic_address *reg,
  109. u8 max_bit_width, u64 *address)
  110. {
  111. u8 bit_width;
  112. u8 access_width;
  113. /* Must have a valid pointer to a GAS structure */
  114. if (!reg) {
  115. return (AE_BAD_PARAMETER);
  116. }
  117. /*
  118. * Copy the target address. This handles possible alignment issues.
  119. * Address must not be null. A null address also indicates an optional
  120. * ACPI register that is not supported, so no error message.
  121. */
  122. ACPI_MOVE_64_TO_64(address, &reg->address);
  123. if (!(*address)) {
  124. return (AE_BAD_ADDRESS);
  125. }
  126. /* Validate the space_ID */
  127. if ((reg->space_id != ACPI_ADR_SPACE_SYSTEM_MEMORY) &&
  128. (reg->space_id != ACPI_ADR_SPACE_SYSTEM_IO)) {
  129. ACPI_ERROR((AE_INFO,
  130. "Unsupported address space: 0x%X", reg->space_id));
  131. return (AE_SUPPORT);
  132. }
  133. /* Validate the access_width */
  134. if (reg->access_width > 4) {
  135. ACPI_ERROR((AE_INFO,
  136. "Unsupported register access width: 0x%X",
  137. reg->access_width));
  138. return (AE_SUPPORT);
  139. }
  140. /* Validate the bit_width, convert access_width into number of bits */
  141. access_width =
  142. acpi_hw_get_access_bit_width(*address, reg, max_bit_width);
  143. bit_width =
  144. ACPI_ROUND_UP(reg->bit_offset + reg->bit_width, access_width);
  145. if (max_bit_width < bit_width) {
  146. ACPI_WARNING((AE_INFO,
  147. "Requested bit width 0x%X is smaller than register bit width 0x%X",
  148. max_bit_width, bit_width));
  149. return (AE_SUPPORT);
  150. }
  151. return (AE_OK);
  152. }
  153. /******************************************************************************
  154. *
  155. * FUNCTION: acpi_hw_read
  156. *
  157. * PARAMETERS: value - Where the value is returned
  158. * reg - GAS register structure
  159. *
  160. * RETURN: Status
  161. *
  162. * DESCRIPTION: Read from either memory or IO space. This is a 64-bit max
  163. * version of acpi_read.
  164. *
  165. * LIMITATIONS: <These limitations also apply to acpi_hw_write>
  166. * space_ID must be system_memory or system_IO.
  167. *
  168. ******************************************************************************/
  169. acpi_status acpi_hw_read(u64 *value, struct acpi_generic_address *reg)
  170. {
  171. u64 address;
  172. u8 access_width;
  173. u32 bit_width;
  174. u8 bit_offset;
  175. u64 value64;
  176. u32 value32;
  177. u8 index;
  178. acpi_status status;
  179. ACPI_FUNCTION_NAME(hw_read);
  180. /* Validate contents of the GAS register */
  181. status = acpi_hw_validate_register(reg, 64, &address);
  182. if (ACPI_FAILURE(status)) {
  183. return (status);
  184. }
  185. /*
  186. * Initialize entire 64-bit return value to zero, convert access_width
  187. * into number of bits based
  188. */
  189. *value = 0;
  190. access_width = acpi_hw_get_access_bit_width(address, reg, 64);
  191. bit_width = reg->bit_offset + reg->bit_width;
  192. bit_offset = reg->bit_offset;
  193. /*
  194. * Two address spaces supported: Memory or IO. PCI_Config is
  195. * not supported here because the GAS structure is insufficient
  196. */
  197. index = 0;
  198. while (bit_width) {
  199. if (bit_offset >= access_width) {
  200. value64 = 0;
  201. bit_offset -= access_width;
  202. } else {
  203. if (reg->space_id == ACPI_ADR_SPACE_SYSTEM_MEMORY) {
  204. status =
  205. acpi_os_read_memory((acpi_physical_address)
  206. address +
  207. index *
  208. ACPI_DIV_8
  209. (access_width),
  210. &value64, access_width);
  211. } else { /* ACPI_ADR_SPACE_SYSTEM_IO, validated earlier */
  212. status = acpi_hw_read_port((acpi_io_address)
  213. address +
  214. index *
  215. ACPI_DIV_8
  216. (access_width),
  217. &value32,
  218. access_width);
  219. value64 = (u64)value32;
  220. }
  221. }
  222. /*
  223. * Use offset style bit writes because "Index * AccessWidth" is
  224. * ensured to be less than 64-bits by acpi_hw_validate_register().
  225. */
  226. ACPI_SET_BITS(value, index * access_width,
  227. ACPI_MASK_BITS_ABOVE_64(access_width), value64);
  228. bit_width -=
  229. bit_width > access_width ? access_width : bit_width;
  230. index++;
  231. }
  232. ACPI_DEBUG_PRINT((ACPI_DB_IO,
  233. "Read: %8.8X%8.8X width %2d from %8.8X%8.8X (%s)\n",
  234. ACPI_FORMAT_UINT64(*value), access_width,
  235. ACPI_FORMAT_UINT64(address),
  236. acpi_ut_get_region_name(reg->space_id)));
  237. return (status);
  238. }
  239. /******************************************************************************
  240. *
  241. * FUNCTION: acpi_hw_write
  242. *
  243. * PARAMETERS: value - Value to be written
  244. * reg - GAS register structure
  245. *
  246. * RETURN: Status
  247. *
  248. * DESCRIPTION: Write to either memory or IO space. This is a 64-bit max
  249. * version of acpi_write.
  250. *
  251. ******************************************************************************/
  252. acpi_status acpi_hw_write(u64 value, struct acpi_generic_address *reg)
  253. {
  254. u64 address;
  255. u8 access_width;
  256. u32 bit_width;
  257. u8 bit_offset;
  258. u64 value64;
  259. u8 index;
  260. acpi_status status;
  261. ACPI_FUNCTION_NAME(hw_write);
  262. /* Validate contents of the GAS register */
  263. status = acpi_hw_validate_register(reg, 64, &address);
  264. if (ACPI_FAILURE(status)) {
  265. return (status);
  266. }
  267. /* Convert access_width into number of bits based */
  268. access_width = acpi_hw_get_access_bit_width(address, reg, 64);
  269. bit_width = reg->bit_offset + reg->bit_width;
  270. bit_offset = reg->bit_offset;
  271. /*
  272. * Two address spaces supported: Memory or IO. PCI_Config is
  273. * not supported here because the GAS structure is insufficient
  274. */
  275. index = 0;
  276. while (bit_width) {
  277. /*
  278. * Use offset style bit reads because "Index * AccessWidth" is
  279. * ensured to be less than 64-bits by acpi_hw_validate_register().
  280. */
  281. value64 = ACPI_GET_BITS(&value, index * access_width,
  282. ACPI_MASK_BITS_ABOVE_64(access_width));
  283. if (bit_offset >= access_width) {
  284. bit_offset -= access_width;
  285. } else {
  286. if (reg->space_id == ACPI_ADR_SPACE_SYSTEM_MEMORY) {
  287. status =
  288. acpi_os_write_memory((acpi_physical_address)
  289. address +
  290. index *
  291. ACPI_DIV_8
  292. (access_width),
  293. value64, access_width);
  294. } else { /* ACPI_ADR_SPACE_SYSTEM_IO, validated earlier */
  295. status = acpi_hw_write_port((acpi_io_address)
  296. address +
  297. index *
  298. ACPI_DIV_8
  299. (access_width),
  300. (u32)value64,
  301. access_width);
  302. }
  303. }
  304. /*
  305. * Index * access_width is ensured to be less than 32-bits by
  306. * acpi_hw_validate_register().
  307. */
  308. bit_width -=
  309. bit_width > access_width ? access_width : bit_width;
  310. index++;
  311. }
  312. ACPI_DEBUG_PRINT((ACPI_DB_IO,
  313. "Wrote: %8.8X%8.8X width %2d to %8.8X%8.8X (%s)\n",
  314. ACPI_FORMAT_UINT64(value), access_width,
  315. ACPI_FORMAT_UINT64(address),
  316. acpi_ut_get_region_name(reg->space_id)));
  317. return (status);
  318. }
  319. #if (!ACPI_REDUCED_HARDWARE)
  320. /*******************************************************************************
  321. *
  322. * FUNCTION: acpi_hw_clear_acpi_status
  323. *
  324. * PARAMETERS: None
  325. *
  326. * RETURN: Status
  327. *
  328. * DESCRIPTION: Clears all fixed and general purpose status bits
  329. *
  330. ******************************************************************************/
  331. acpi_status acpi_hw_clear_acpi_status(void)
  332. {
  333. acpi_status status;
  334. acpi_cpu_flags lock_flags = 0;
  335. ACPI_FUNCTION_TRACE(hw_clear_acpi_status);
  336. ACPI_DEBUG_PRINT((ACPI_DB_IO, "About to write %04X to %8.8X%8.8X\n",
  337. ACPI_BITMASK_ALL_FIXED_STATUS,
  338. ACPI_FORMAT_UINT64(acpi_gbl_xpm1a_status.address)));
  339. lock_flags = acpi_os_acquire_raw_lock(acpi_gbl_hardware_lock);
  340. /* Clear the fixed events in PM1 A/B */
  341. status = acpi_hw_register_write(ACPI_REGISTER_PM1_STATUS,
  342. ACPI_BITMASK_ALL_FIXED_STATUS);
  343. acpi_os_release_raw_lock(acpi_gbl_hardware_lock, lock_flags);
  344. if (ACPI_FAILURE(status)) {
  345. goto exit;
  346. }
  347. /* Clear the GPE Bits in all GPE registers in all GPE blocks */
  348. status = acpi_ev_walk_gpe_list(acpi_hw_clear_gpe_block, NULL);
  349. exit:
  350. return_ACPI_STATUS(status);
  351. }
  352. /*******************************************************************************
  353. *
  354. * FUNCTION: acpi_hw_get_bit_register_info
  355. *
  356. * PARAMETERS: register_id - Index of ACPI Register to access
  357. *
  358. * RETURN: The bitmask to be used when accessing the register
  359. *
  360. * DESCRIPTION: Map register_id into a register bitmask.
  361. *
  362. ******************************************************************************/
  363. struct acpi_bit_register_info *acpi_hw_get_bit_register_info(u32 register_id)
  364. {
  365. ACPI_FUNCTION_ENTRY();
  366. if (register_id > ACPI_BITREG_MAX) {
  367. ACPI_ERROR((AE_INFO, "Invalid BitRegister ID: 0x%X",
  368. register_id));
  369. return (NULL);
  370. }
  371. return (&acpi_gbl_bit_register_info[register_id]);
  372. }
  373. /******************************************************************************
  374. *
  375. * FUNCTION: acpi_hw_write_pm1_control
  376. *
  377. * PARAMETERS: pm1a_control - Value to be written to PM1A control
  378. * pm1b_control - Value to be written to PM1B control
  379. *
  380. * RETURN: Status
  381. *
  382. * DESCRIPTION: Write the PM1 A/B control registers. These registers are
  383. * different than the PM1 A/B status and enable registers
  384. * in that different values can be written to the A/B registers.
  385. * Most notably, the SLP_TYP bits can be different, as per the
  386. * values returned from the _Sx predefined methods.
  387. *
  388. ******************************************************************************/
  389. acpi_status acpi_hw_write_pm1_control(u32 pm1a_control, u32 pm1b_control)
  390. {
  391. acpi_status status;
  392. ACPI_FUNCTION_TRACE(hw_write_pm1_control);
  393. status =
  394. acpi_hw_write(pm1a_control, &acpi_gbl_FADT.xpm1a_control_block);
  395. if (ACPI_FAILURE(status)) {
  396. return_ACPI_STATUS(status);
  397. }
  398. if (acpi_gbl_FADT.xpm1b_control_block.address) {
  399. status =
  400. acpi_hw_write(pm1b_control,
  401. &acpi_gbl_FADT.xpm1b_control_block);
  402. }
  403. return_ACPI_STATUS(status);
  404. }
  405. /******************************************************************************
  406. *
  407. * FUNCTION: acpi_hw_register_read
  408. *
  409. * PARAMETERS: register_id - ACPI Register ID
  410. * return_value - Where the register value is returned
  411. *
  412. * RETURN: Status and the value read.
  413. *
  414. * DESCRIPTION: Read from the specified ACPI register
  415. *
  416. ******************************************************************************/
  417. acpi_status acpi_hw_register_read(u32 register_id, u32 *return_value)
  418. {
  419. u32 value = 0;
  420. u64 value64;
  421. acpi_status status;
  422. ACPI_FUNCTION_TRACE(hw_register_read);
  423. switch (register_id) {
  424. case ACPI_REGISTER_PM1_STATUS: /* PM1 A/B: 16-bit access each */
  425. status = acpi_hw_read_multiple(&value,
  426. &acpi_gbl_xpm1a_status,
  427. &acpi_gbl_xpm1b_status);
  428. break;
  429. case ACPI_REGISTER_PM1_ENABLE: /* PM1 A/B: 16-bit access each */
  430. status = acpi_hw_read_multiple(&value,
  431. &acpi_gbl_xpm1a_enable,
  432. &acpi_gbl_xpm1b_enable);
  433. break;
  434. case ACPI_REGISTER_PM1_CONTROL: /* PM1 A/B: 16-bit access each */
  435. status = acpi_hw_read_multiple(&value,
  436. &acpi_gbl_FADT.
  437. xpm1a_control_block,
  438. &acpi_gbl_FADT.
  439. xpm1b_control_block);
  440. /*
  441. * Zero the write-only bits. From the ACPI specification, "Hardware
  442. * Write-Only Bits": "Upon reads to registers with write-only bits,
  443. * software masks out all write-only bits."
  444. */
  445. value &= ~ACPI_PM1_CONTROL_WRITEONLY_BITS;
  446. break;
  447. case ACPI_REGISTER_PM2_CONTROL: /* 8-bit access */
  448. status =
  449. acpi_hw_read(&value64, &acpi_gbl_FADT.xpm2_control_block);
  450. if (ACPI_SUCCESS(status)) {
  451. value = (u32)value64;
  452. }
  453. break;
  454. case ACPI_REGISTER_PM_TIMER: /* 32-bit access */
  455. status = acpi_hw_read(&value64, &acpi_gbl_FADT.xpm_timer_block);
  456. if (ACPI_SUCCESS(status)) {
  457. value = (u32)value64;
  458. }
  459. break;
  460. case ACPI_REGISTER_SMI_COMMAND_BLOCK: /* 8-bit access */
  461. status =
  462. acpi_hw_read_port(acpi_gbl_FADT.smi_command, &value, 8);
  463. break;
  464. default:
  465. ACPI_ERROR((AE_INFO, "Unknown Register ID: 0x%X", register_id));
  466. status = AE_BAD_PARAMETER;
  467. break;
  468. }
  469. if (ACPI_SUCCESS(status)) {
  470. *return_value = (u32)value;
  471. }
  472. return_ACPI_STATUS(status);
  473. }
  474. /******************************************************************************
  475. *
  476. * FUNCTION: acpi_hw_register_write
  477. *
  478. * PARAMETERS: register_id - ACPI Register ID
  479. * value - The value to write
  480. *
  481. * RETURN: Status
  482. *
  483. * DESCRIPTION: Write to the specified ACPI register
  484. *
  485. * NOTE: In accordance with the ACPI specification, this function automatically
  486. * preserves the value of the following bits, meaning that these bits cannot be
  487. * changed via this interface:
  488. *
  489. * PM1_CONTROL[0] = SCI_EN
  490. * PM1_CONTROL[9]
  491. * PM1_STATUS[11]
  492. *
  493. * ACPI References:
  494. * 1) Hardware Ignored Bits: When software writes to a register with ignored
  495. * bit fields, it preserves the ignored bit fields
  496. * 2) SCI_EN: OSPM always preserves this bit position
  497. *
  498. ******************************************************************************/
  499. acpi_status acpi_hw_register_write(u32 register_id, u32 value)
  500. {
  501. acpi_status status;
  502. u32 read_value;
  503. u64 read_value64;
  504. ACPI_FUNCTION_TRACE(hw_register_write);
  505. switch (register_id) {
  506. case ACPI_REGISTER_PM1_STATUS: /* PM1 A/B: 16-bit access each */
  507. /*
  508. * Handle the "ignored" bit in PM1 Status. According to the ACPI
  509. * specification, ignored bits are to be preserved when writing.
  510. * Normally, this would mean a read/modify/write sequence. However,
  511. * preserving a bit in the status register is different. Writing a
  512. * one clears the status, and writing a zero preserves the status.
  513. * Therefore, we must always write zero to the ignored bit.
  514. *
  515. * This behavior is clarified in the ACPI 4.0 specification.
  516. */
  517. value &= ~ACPI_PM1_STATUS_PRESERVED_BITS;
  518. status = acpi_hw_write_multiple(value,
  519. &acpi_gbl_xpm1a_status,
  520. &acpi_gbl_xpm1b_status);
  521. break;
  522. case ACPI_REGISTER_PM1_ENABLE: /* PM1 A/B: 16-bit access each */
  523. status = acpi_hw_write_multiple(value,
  524. &acpi_gbl_xpm1a_enable,
  525. &acpi_gbl_xpm1b_enable);
  526. break;
  527. case ACPI_REGISTER_PM1_CONTROL: /* PM1 A/B: 16-bit access each */
  528. /*
  529. * Perform a read first to preserve certain bits (per ACPI spec)
  530. * Note: This includes SCI_EN, we never want to change this bit
  531. */
  532. status = acpi_hw_read_multiple(&read_value,
  533. &acpi_gbl_FADT.
  534. xpm1a_control_block,
  535. &acpi_gbl_FADT.
  536. xpm1b_control_block);
  537. if (ACPI_FAILURE(status)) {
  538. goto exit;
  539. }
  540. /* Insert the bits to be preserved */
  541. ACPI_INSERT_BITS(value, ACPI_PM1_CONTROL_PRESERVED_BITS,
  542. read_value);
  543. /* Now we can write the data */
  544. status = acpi_hw_write_multiple(value,
  545. &acpi_gbl_FADT.
  546. xpm1a_control_block,
  547. &acpi_gbl_FADT.
  548. xpm1b_control_block);
  549. break;
  550. case ACPI_REGISTER_PM2_CONTROL: /* 8-bit access */
  551. /*
  552. * For control registers, all reserved bits must be preserved,
  553. * as per the ACPI spec.
  554. */
  555. status =
  556. acpi_hw_read(&read_value64,
  557. &acpi_gbl_FADT.xpm2_control_block);
  558. if (ACPI_FAILURE(status)) {
  559. goto exit;
  560. }
  561. read_value = (u32)read_value64;
  562. /* Insert the bits to be preserved */
  563. ACPI_INSERT_BITS(value, ACPI_PM2_CONTROL_PRESERVED_BITS,
  564. read_value);
  565. status =
  566. acpi_hw_write(value, &acpi_gbl_FADT.xpm2_control_block);
  567. break;
  568. case ACPI_REGISTER_PM_TIMER: /* 32-bit access */
  569. status = acpi_hw_write(value, &acpi_gbl_FADT.xpm_timer_block);
  570. break;
  571. case ACPI_REGISTER_SMI_COMMAND_BLOCK: /* 8-bit access */
  572. /* SMI_CMD is currently always in IO space */
  573. status =
  574. acpi_hw_write_port(acpi_gbl_FADT.smi_command, value, 8);
  575. break;
  576. default:
  577. ACPI_ERROR((AE_INFO, "Unknown Register ID: 0x%X", register_id));
  578. status = AE_BAD_PARAMETER;
  579. break;
  580. }
  581. exit:
  582. return_ACPI_STATUS(status);
  583. }
  584. /******************************************************************************
  585. *
  586. * FUNCTION: acpi_hw_read_multiple
  587. *
  588. * PARAMETERS: value - Where the register value is returned
  589. * register_a - First ACPI register (required)
  590. * register_b - Second ACPI register (optional)
  591. *
  592. * RETURN: Status
  593. *
  594. * DESCRIPTION: Read from the specified two-part ACPI register (such as PM1 A/B)
  595. *
  596. ******************************************************************************/
  597. static acpi_status
  598. acpi_hw_read_multiple(u32 *value,
  599. struct acpi_generic_address *register_a,
  600. struct acpi_generic_address *register_b)
  601. {
  602. u32 value_a = 0;
  603. u32 value_b = 0;
  604. u64 value64;
  605. acpi_status status;
  606. /* The first register is always required */
  607. status = acpi_hw_read(&value64, register_a);
  608. if (ACPI_FAILURE(status)) {
  609. return (status);
  610. }
  611. value_a = (u32)value64;
  612. /* Second register is optional */
  613. if (register_b->address) {
  614. status = acpi_hw_read(&value64, register_b);
  615. if (ACPI_FAILURE(status)) {
  616. return (status);
  617. }
  618. value_b = (u32)value64;
  619. }
  620. /*
  621. * OR the two return values together. No shifting or masking is necessary,
  622. * because of how the PM1 registers are defined in the ACPI specification:
  623. *
  624. * "Although the bits can be split between the two register blocks (each
  625. * register block has a unique pointer within the FADT), the bit positions
  626. * are maintained. The register block with unimplemented bits (that is,
  627. * those implemented in the other register block) always returns zeros,
  628. * and writes have no side effects"
  629. */
  630. *value = (value_a | value_b);
  631. return (AE_OK);
  632. }
  633. /******************************************************************************
  634. *
  635. * FUNCTION: acpi_hw_write_multiple
  636. *
  637. * PARAMETERS: value - The value to write
  638. * register_a - First ACPI register (required)
  639. * register_b - Second ACPI register (optional)
  640. *
  641. * RETURN: Status
  642. *
  643. * DESCRIPTION: Write to the specified two-part ACPI register (such as PM1 A/B)
  644. *
  645. ******************************************************************************/
  646. static acpi_status
  647. acpi_hw_write_multiple(u32 value,
  648. struct acpi_generic_address *register_a,
  649. struct acpi_generic_address *register_b)
  650. {
  651. acpi_status status;
  652. /* The first register is always required */
  653. status = acpi_hw_write(value, register_a);
  654. if (ACPI_FAILURE(status)) {
  655. return (status);
  656. }
  657. /*
  658. * Second register is optional
  659. *
  660. * No bit shifting or clearing is necessary, because of how the PM1
  661. * registers are defined in the ACPI specification:
  662. *
  663. * "Although the bits can be split between the two register blocks (each
  664. * register block has a unique pointer within the FADT), the bit positions
  665. * are maintained. The register block with unimplemented bits (that is,
  666. * those implemented in the other register block) always returns zeros,
  667. * and writes have no side effects"
  668. */
  669. if (register_b->address) {
  670. status = acpi_hw_write(value, register_b);
  671. }
  672. return (status);
  673. }
  674. #endif /* !ACPI_REDUCED_HARDWARE */