54 lines
1.9 KiB
C
Executable File
54 lines
1.9 KiB
C
Executable File
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Copyright (c) 2021, The Linux Foundation. All rights reserved.
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& Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved.
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*/
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/*
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* DMA_ATTR_NO_DELAYED_UNMAP: Used by msm specific lazy mapping to indicate
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* that the mapping can be freed on unmap, rather than when the ion_buffer
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* is freed.
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*/
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#define DMA_ATTR_NO_DELAYED_UNMAP (1UL << 13)
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/*
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* When passed to a DMA map call the DMA_ATTR_FORCE_COHERENT DMA
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* attribute can be used to force a buffer to be mapped as IO coherent.
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*/
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#define DMA_ATTR_FORCE_COHERENT (1UL << 15)
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/*
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* When passed to a DMA map call the DMA_ATTR_FORCE_NON_COHERENT DMA
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* attribute can be used to force a buffer to not be mapped as IO
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* coherent.
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*/
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#define DMA_ATTR_FORCE_NON_COHERENT (1UL << 16)
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/*
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* DMA_ATTR_DELAYED_UNMAP: Used by ION, it will ensure that mappings are not
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* removed on unmap but instead are removed when the ion_buffer is freed.
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*/
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#define DMA_ATTR_DELAYED_UNMAP (1UL << 17)
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/*
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* DMA_ATTR_QTI_SMMU_PROXY_MAP : Map this buffer in the TVM SMMU if supported
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* on the target.
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*/
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#define DMA_ATTR_QTI_SMMU_PROXY_MAP (1UL << 18)
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#ifndef DMA_ATTR_SYS_CACHE_ONLY
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/* Attributes are not supported, so render them ineffective. */
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#define DMA_ATTR_SYS_CACHE_ONLY (0UL)
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#define DMA_ATTR_SYS_CACHE_ONLY_NWA (0UL)
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#endif
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/*
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* DMA_ATTR_IOMMU_USE_UPSTREAM_HINT: Normally an smmu will override any bus
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* attributes (i.e cacheablilty) provided by the client device. Some hardware
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* may be designed to use the original attributes instead.
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*/
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#define DMA_ATTR_IOMMU_USE_UPSTREAM_HINT (DMA_ATTR_SYS_CACHE_ONLY)
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/*
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* DMA_ATTR_IOMMU_USE_LLC_NWA: Overrides the bus attributes to use the System
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* Cache(LLC) with allocation policy as Inner Non-Cacheable, Outer Cacheable:
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* Write-Back, Read-Allocate, No Write-Allocate policy.
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*/
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#define DMA_ATTR_IOMMU_USE_LLC_NWA (DMA_ATTR_SYS_CACHE_ONLY_NWA)
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