glossary.txt 7.3 KB

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  1. This document contains brief definitions of LKMM-related terms. Like most
  2. glossaries, it is not intended to be read front to back (except perhaps
  3. as a way of confirming a diagnosis of OCD), but rather to be searched
  4. for specific terms.
  5. Address Dependency: When the address of a later memory access is computed
  6. based on the value returned by an earlier load, an "address
  7. dependency" extends from that load extending to the later access.
  8. Address dependencies are quite common in RCU read-side critical
  9. sections:
  10. 1 rcu_read_lock();
  11. 2 p = rcu_dereference(gp);
  12. 3 do_something(p->a);
  13. 4 rcu_read_unlock();
  14. In this case, because the address of "p->a" on line 3 is computed
  15. from the value returned by the rcu_dereference() on line 2, the
  16. address dependency extends from that rcu_dereference() to that
  17. "p->a". In rare cases, optimizing compilers can destroy address
  18. dependencies. Please see Documentation/RCU/rcu_dereference.rst
  19. for more information.
  20. See also "Control Dependency" and "Data Dependency".
  21. Acquire: With respect to a lock, acquiring that lock, for example,
  22. using spin_lock(). With respect to a non-lock shared variable,
  23. a special operation that includes a load and which orders that
  24. load before later memory references running on that same CPU.
  25. An example special acquire operation is smp_load_acquire(),
  26. but atomic_read_acquire() and atomic_xchg_acquire() also include
  27. acquire loads.
  28. When an acquire load returns the value stored by a release store
  29. to that same variable, (in other words, the acquire load "reads
  30. from" the release store), then all operations preceding that
  31. store "happen before" any operations following that load acquire.
  32. See also "Happens-Before", "Reads-From", "Relaxed", and "Release".
  33. Coherence (co): When one CPU's store to a given variable overwrites
  34. either the value from another CPU's store or some later value,
  35. there is said to be a coherence link from the second CPU to
  36. the first.
  37. It is also possible to have a coherence link within a CPU, which
  38. is a "coherence internal" (coi) link. The term "coherence
  39. external" (coe) link is used when it is necessary to exclude
  40. the coi case.
  41. See also "From-reads" and "Reads-from".
  42. Control Dependency: When a later store's execution depends on a test
  43. of a value computed from a value returned by an earlier load,
  44. a "control dependency" extends from that load to that store.
  45. For example:
  46. 1 if (READ_ONCE(x))
  47. 2 WRITE_ONCE(y, 1);
  48. Here, the control dependency extends from the READ_ONCE() on
  49. line 1 to the WRITE_ONCE() on line 2. Control dependencies are
  50. fragile, and can be easily destroyed by optimizing compilers.
  51. Please see control-dependencies.txt for more information.
  52. See also "Address Dependency" and "Data Dependency".
  53. Cycle: Memory-barrier pairing is restricted to a pair of CPUs, as the
  54. name suggests. And in a great many cases, a pair of CPUs is all
  55. that is required. In other cases, the notion of pairing must be
  56. extended to additional CPUs, and the result is called a "cycle".
  57. In a cycle, each CPU's ordering interacts with that of the next:
  58. CPU 0 CPU 1 CPU 2
  59. WRITE_ONCE(x, 1); WRITE_ONCE(y, 1); WRITE_ONCE(z, 1);
  60. smp_mb(); smp_mb(); smp_mb();
  61. r0 = READ_ONCE(y); r1 = READ_ONCE(z); r2 = READ_ONCE(x);
  62. CPU 0's smp_mb() interacts with that of CPU 1, which interacts
  63. with that of CPU 2, which in turn interacts with that of CPU 0
  64. to complete the cycle. Because of the smp_mb() calls between
  65. each pair of memory accesses, the outcome where r0, r1, and r2
  66. are all equal to zero is forbidden by LKMM.
  67. See also "Pairing".
  68. Data Dependency: When the data written by a later store is computed based
  69. on the value returned by an earlier load, a "data dependency"
  70. extends from that load to that later store. For example:
  71. 1 r1 = READ_ONCE(x);
  72. 2 WRITE_ONCE(y, r1 + 1);
  73. In this case, the data dependency extends from the READ_ONCE()
  74. on line 1 to the WRITE_ONCE() on line 2. Data dependencies are
  75. fragile and can be easily destroyed by optimizing compilers.
  76. Because optimizing compilers put a great deal of effort into
  77. working out what values integer variables might have, this is
  78. especially true in cases where the dependency is carried through
  79. an integer.
  80. See also "Address Dependency" and "Control Dependency".
  81. From-Reads (fr): When one CPU's store to a given variable happened
  82. too late to affect the value returned by another CPU's
  83. load from that same variable, there is said to be a from-reads
  84. link from the load to the store.
  85. It is also possible to have a from-reads link within a CPU, which
  86. is a "from-reads internal" (fri) link. The term "from-reads
  87. external" (fre) link is used when it is necessary to exclude
  88. the fri case.
  89. See also "Coherence" and "Reads-from".
  90. Fully Ordered: An operation such as smp_mb() that orders all of
  91. its CPU's prior accesses with all of that CPU's subsequent
  92. accesses, or a marked access such as atomic_add_return()
  93. that orders all of its CPU's prior accesses, itself, and
  94. all of its CPU's subsequent accesses.
  95. Happens-Before (hb): A relation between two accesses in which LKMM
  96. guarantees the first access precedes the second. For more
  97. detail, please see the "THE HAPPENS-BEFORE RELATION: hb"
  98. section of explanation.txt.
  99. Marked Access: An access to a variable that uses an special function or
  100. macro such as "r1 = READ_ONCE(x)" or "smp_store_release(&a, 1)".
  101. See also "Unmarked Access".
  102. Pairing: "Memory-barrier pairing" reflects the fact that synchronizing
  103. data between two CPUs requires that both CPUs their accesses.
  104. Memory barriers thus tend to come in pairs, one executed by
  105. one of the CPUs and the other by the other CPU. Of course,
  106. pairing also occurs with other types of operations, so that a
  107. smp_store_release() pairs with an smp_load_acquire() that reads
  108. the value stored.
  109. See also "Cycle".
  110. Reads-From (rf): When one CPU's load returns the value stored by some other
  111. CPU, there is said to be a reads-from link from the second
  112. CPU's store to the first CPU's load. Reads-from links have the
  113. nice property that time must advance from the store to the load,
  114. which means that algorithms using reads-from links can use lighter
  115. weight ordering and synchronization compared to algorithms using
  116. coherence and from-reads links.
  117. It is also possible to have a reads-from link within a CPU, which
  118. is a "reads-from internal" (rfi) link. The term "reads-from
  119. external" (rfe) link is used when it is necessary to exclude
  120. the rfi case.
  121. See also Coherence" and "From-reads".
  122. Relaxed: A marked access that does not imply ordering, for example, a
  123. READ_ONCE(), WRITE_ONCE(), a non-value-returning read-modify-write
  124. operation, or a value-returning read-modify-write operation whose
  125. name ends in "_relaxed".
  126. See also "Acquire" and "Release".
  127. Release: With respect to a lock, releasing that lock, for example,
  128. using spin_unlock(). With respect to a non-lock shared variable,
  129. a special operation that includes a store and which orders that
  130. store after earlier memory references that ran on that same CPU.
  131. An example special release store is smp_store_release(), but
  132. atomic_set_release() and atomic_cmpxchg_release() also include
  133. release stores.
  134. See also "Acquire" and "Relaxed".
  135. Unmarked Access: An access to a variable that uses normal C-language
  136. syntax, for example, "a = b[2]";
  137. See also "Marked Access".