tas5805m.c 19 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. //
  3. // Driver for the TAS5805M Audio Amplifier
  4. //
  5. // Author: Andy Liu <[email protected]>
  6. // Author: Daniel Beer <[email protected]>
  7. //
  8. // This is based on a driver originally written by Andy Liu at TI and
  9. // posted here:
  10. //
  11. // https://e2e.ti.com/support/audio-group/audio/f/audio-forum/722027/linux-tas5825m-linux-drivers
  12. //
  13. // It has been simplified a little and reworked for the 5.x ALSA SoC API.
  14. #include <linux/module.h>
  15. #include <linux/moduleparam.h>
  16. #include <linux/kernel.h>
  17. #include <linux/firmware.h>
  18. #include <linux/slab.h>
  19. #include <linux/of.h>
  20. #include <linux/init.h>
  21. #include <linux/i2c.h>
  22. #include <linux/regmap.h>
  23. #include <linux/gpio/consumer.h>
  24. #include <linux/regulator/consumer.h>
  25. #include <linux/atomic.h>
  26. #include <linux/workqueue.h>
  27. #include <sound/soc.h>
  28. #include <sound/pcm.h>
  29. #include <sound/initval.h>
  30. /* Datasheet-defined registers on page 0, book 0 */
  31. #define REG_PAGE 0x00
  32. #define REG_DEVICE_CTRL_1 0x02
  33. #define REG_DEVICE_CTRL_2 0x03
  34. #define REG_SIG_CH_CTRL 0x28
  35. #define REG_SAP_CTRL_1 0x33
  36. #define REG_FS_MON 0x37
  37. #define REG_BCK_MON 0x38
  38. #define REG_CLKDET_STATUS 0x39
  39. #define REG_VOL_CTL 0x4c
  40. #define REG_AGAIN 0x54
  41. #define REG_ADR_PIN_CTRL 0x60
  42. #define REG_ADR_PIN_CONFIG 0x61
  43. #define REG_CHAN_FAULT 0x70
  44. #define REG_GLOBAL_FAULT1 0x71
  45. #define REG_GLOBAL_FAULT2 0x72
  46. #define REG_FAULT 0x78
  47. #define REG_BOOK 0x7f
  48. /* DEVICE_CTRL_2 register values */
  49. #define DCTRL2_MODE_DEEP_SLEEP 0x00
  50. #define DCTRL2_MODE_SLEEP 0x01
  51. #define DCTRL2_MODE_HIZ 0x02
  52. #define DCTRL2_MODE_PLAY 0x03
  53. #define DCTRL2_MUTE 0x08
  54. #define DCTRL2_DIS_DSP 0x10
  55. /* This sequence of register writes must always be sent, prior to the
  56. * 5ms delay while we wait for the DSP to boot.
  57. */
  58. static const uint8_t dsp_cfg_preboot[] = {
  59. 0x00, 0x00, 0x7f, 0x00, 0x03, 0x02, 0x01, 0x11,
  60. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  61. 0x00, 0x00, 0x7f, 0x00, 0x03, 0x02,
  62. };
  63. static const uint32_t tas5805m_volume[] = {
  64. 0x0000001B, /* 0, -110dB */ 0x0000001E, /* 1, -109dB */
  65. 0x00000021, /* 2, -108dB */ 0x00000025, /* 3, -107dB */
  66. 0x0000002A, /* 4, -106dB */ 0x0000002F, /* 5, -105dB */
  67. 0x00000035, /* 6, -104dB */ 0x0000003B, /* 7, -103dB */
  68. 0x00000043, /* 8, -102dB */ 0x0000004B, /* 9, -101dB */
  69. 0x00000054, /* 10, -100dB */ 0x0000005E, /* 11, -99dB */
  70. 0x0000006A, /* 12, -98dB */ 0x00000076, /* 13, -97dB */
  71. 0x00000085, /* 14, -96dB */ 0x00000095, /* 15, -95dB */
  72. 0x000000A7, /* 16, -94dB */ 0x000000BC, /* 17, -93dB */
  73. 0x000000D3, /* 18, -92dB */ 0x000000EC, /* 19, -91dB */
  74. 0x00000109, /* 20, -90dB */ 0x0000012A, /* 21, -89dB */
  75. 0x0000014E, /* 22, -88dB */ 0x00000177, /* 23, -87dB */
  76. 0x000001A4, /* 24, -86dB */ 0x000001D8, /* 25, -85dB */
  77. 0x00000211, /* 26, -84dB */ 0x00000252, /* 27, -83dB */
  78. 0x0000029A, /* 28, -82dB */ 0x000002EC, /* 29, -81dB */
  79. 0x00000347, /* 30, -80dB */ 0x000003AD, /* 31, -79dB */
  80. 0x00000420, /* 32, -78dB */ 0x000004A1, /* 33, -77dB */
  81. 0x00000532, /* 34, -76dB */ 0x000005D4, /* 35, -75dB */
  82. 0x0000068A, /* 36, -74dB */ 0x00000756, /* 37, -73dB */
  83. 0x0000083B, /* 38, -72dB */ 0x0000093C, /* 39, -71dB */
  84. 0x00000A5D, /* 40, -70dB */ 0x00000BA0, /* 41, -69dB */
  85. 0x00000D0C, /* 42, -68dB */ 0x00000EA3, /* 43, -67dB */
  86. 0x0000106C, /* 44, -66dB */ 0x0000126D, /* 45, -65dB */
  87. 0x000014AD, /* 46, -64dB */ 0x00001733, /* 47, -63dB */
  88. 0x00001A07, /* 48, -62dB */ 0x00001D34, /* 49, -61dB */
  89. 0x000020C5, /* 50, -60dB */ 0x000024C4, /* 51, -59dB */
  90. 0x00002941, /* 52, -58dB */ 0x00002E49, /* 53, -57dB */
  91. 0x000033EF, /* 54, -56dB */ 0x00003A45, /* 55, -55dB */
  92. 0x00004161, /* 56, -54dB */ 0x0000495C, /* 57, -53dB */
  93. 0x0000524F, /* 58, -52dB */ 0x00005C5A, /* 59, -51dB */
  94. 0x0000679F, /* 60, -50dB */ 0x00007444, /* 61, -49dB */
  95. 0x00008274, /* 62, -48dB */ 0x0000925F, /* 63, -47dB */
  96. 0x0000A43B, /* 64, -46dB */ 0x0000B845, /* 65, -45dB */
  97. 0x0000CEC1, /* 66, -44dB */ 0x0000E7FB, /* 67, -43dB */
  98. 0x00010449, /* 68, -42dB */ 0x0001240C, /* 69, -41dB */
  99. 0x000147AE, /* 70, -40dB */ 0x00016FAA, /* 71, -39dB */
  100. 0x00019C86, /* 72, -38dB */ 0x0001CEDC, /* 73, -37dB */
  101. 0x00020756, /* 74, -36dB */ 0x000246B5, /* 75, -35dB */
  102. 0x00028DCF, /* 76, -34dB */ 0x0002DD96, /* 77, -33dB */
  103. 0x00033718, /* 78, -32dB */ 0x00039B87, /* 79, -31dB */
  104. 0x00040C37, /* 80, -30dB */ 0x00048AA7, /* 81, -29dB */
  105. 0x00051884, /* 82, -28dB */ 0x0005B7B1, /* 83, -27dB */
  106. 0x00066A4A, /* 84, -26dB */ 0x000732AE, /* 85, -25dB */
  107. 0x00081385, /* 86, -24dB */ 0x00090FCC, /* 87, -23dB */
  108. 0x000A2ADB, /* 88, -22dB */ 0x000B6873, /* 89, -21dB */
  109. 0x000CCCCD, /* 90, -20dB */ 0x000E5CA1, /* 91, -19dB */
  110. 0x00101D3F, /* 92, -18dB */ 0x0012149A, /* 93, -17dB */
  111. 0x00144961, /* 94, -16dB */ 0x0016C311, /* 95, -15dB */
  112. 0x00198A13, /* 96, -14dB */ 0x001CA7D7, /* 97, -13dB */
  113. 0x002026F3, /* 98, -12dB */ 0x00241347, /* 99, -11dB */
  114. 0x00287A27, /* 100, -10dB */ 0x002D6A86, /* 101, -9dB */
  115. 0x0032F52D, /* 102, -8dB */ 0x00392CEE, /* 103, -7dB */
  116. 0x004026E7, /* 104, -6dB */ 0x0047FACD, /* 105, -5dB */
  117. 0x0050C336, /* 106, -4dB */ 0x005A9DF8, /* 107, -3dB */
  118. 0x0065AC8C, /* 108, -2dB */ 0x00721483, /* 109, -1dB */
  119. 0x00800000, /* 110, 0dB */ 0x008F9E4D, /* 111, 1dB */
  120. 0x00A12478, /* 112, 2dB */ 0x00B4CE08, /* 113, 3dB */
  121. 0x00CADDC8, /* 114, 4dB */ 0x00E39EA9, /* 115, 5dB */
  122. 0x00FF64C1, /* 116, 6dB */ 0x011E8E6A, /* 117, 7dB */
  123. 0x0141857F, /* 118, 8dB */ 0x0168C0C6, /* 119, 9dB */
  124. 0x0194C584, /* 120, 10dB */ 0x01C62940, /* 121, 11dB */
  125. 0x01FD93C2, /* 122, 12dB */ 0x023BC148, /* 123, 13dB */
  126. 0x02818508, /* 124, 14dB */ 0x02CFCC01, /* 125, 15dB */
  127. 0x0327A01A, /* 126, 16dB */ 0x038A2BAD, /* 127, 17dB */
  128. 0x03F8BD7A, /* 128, 18dB */ 0x0474CD1B, /* 129, 19dB */
  129. 0x05000000, /* 130, 20dB */ 0x059C2F02, /* 131, 21dB */
  130. 0x064B6CAE, /* 132, 22dB */ 0x07100C4D, /* 133, 23dB */
  131. 0x07ECA9CD, /* 134, 24dB */ 0x08E43299, /* 135, 25dB */
  132. 0x09F9EF8E, /* 136, 26dB */ 0x0B319025, /* 137, 27dB */
  133. 0x0C8F36F2, /* 138, 28dB */ 0x0E1787B8, /* 139, 29dB */
  134. 0x0FCFB725, /* 140, 30dB */ 0x11BD9C84, /* 141, 31dB */
  135. 0x13E7C594, /* 142, 32dB */ 0x16558CCB, /* 143, 33dB */
  136. 0x190F3254, /* 144, 34dB */ 0x1C1DF80E, /* 145, 35dB */
  137. 0x1F8C4107, /* 146, 36dB */ 0x2365B4BF, /* 147, 37dB */
  138. 0x27B766C2, /* 148, 38dB */ 0x2C900313, /* 149, 39dB */
  139. 0x32000000, /* 150, 40dB */ 0x3819D612, /* 151, 41dB */
  140. 0x3EF23ECA, /* 152, 42dB */ 0x46A07B07, /* 153, 43dB */
  141. 0x4F3EA203, /* 154, 44dB */ 0x58E9F9F9, /* 155, 45dB */
  142. 0x63C35B8E, /* 156, 46dB */ 0x6FEFA16D, /* 157, 47dB */
  143. 0x7D982575, /* 158, 48dB */
  144. };
  145. #define TAS5805M_VOLUME_MAX ((int)ARRAY_SIZE(tas5805m_volume) - 1)
  146. #define TAS5805M_VOLUME_MIN 0
  147. struct tas5805m_priv {
  148. struct i2c_client *i2c;
  149. struct regulator *pvdd;
  150. struct gpio_desc *gpio_pdn_n;
  151. uint8_t *dsp_cfg_data;
  152. int dsp_cfg_len;
  153. struct regmap *regmap;
  154. int vol[2];
  155. bool is_powered;
  156. bool is_muted;
  157. struct work_struct work;
  158. struct mutex lock;
  159. };
  160. static void set_dsp_scale(struct regmap *rm, int offset, int vol)
  161. {
  162. uint8_t v[4];
  163. uint32_t x = tas5805m_volume[vol];
  164. int i;
  165. for (i = 0; i < 4; i++) {
  166. v[3 - i] = x;
  167. x >>= 8;
  168. }
  169. regmap_bulk_write(rm, offset, v, ARRAY_SIZE(v));
  170. }
  171. static void tas5805m_refresh(struct tas5805m_priv *tas5805m)
  172. {
  173. struct regmap *rm = tas5805m->regmap;
  174. dev_dbg(&tas5805m->i2c->dev, "refresh: is_muted=%d, vol=%d/%d\n",
  175. tas5805m->is_muted, tas5805m->vol[0], tas5805m->vol[1]);
  176. regmap_write(rm, REG_PAGE, 0x00);
  177. regmap_write(rm, REG_BOOK, 0x8c);
  178. regmap_write(rm, REG_PAGE, 0x2a);
  179. /* Refresh volume. The actual volume control documented in the
  180. * datasheet doesn't seem to work correctly. This is a pair of
  181. * DSP registers which are *not* documented in the datasheet.
  182. */
  183. set_dsp_scale(rm, 0x24, tas5805m->vol[0]);
  184. set_dsp_scale(rm, 0x28, tas5805m->vol[1]);
  185. regmap_write(rm, REG_PAGE, 0x00);
  186. regmap_write(rm, REG_BOOK, 0x00);
  187. /* Set/clear digital soft-mute */
  188. regmap_write(rm, REG_DEVICE_CTRL_2,
  189. (tas5805m->is_muted ? DCTRL2_MUTE : 0) |
  190. DCTRL2_MODE_PLAY);
  191. }
  192. static int tas5805m_vol_info(struct snd_kcontrol *kcontrol,
  193. struct snd_ctl_elem_info *uinfo)
  194. {
  195. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  196. uinfo->count = 2;
  197. uinfo->value.integer.min = TAS5805M_VOLUME_MIN;
  198. uinfo->value.integer.max = TAS5805M_VOLUME_MAX;
  199. return 0;
  200. }
  201. static int tas5805m_vol_get(struct snd_kcontrol *kcontrol,
  202. struct snd_ctl_elem_value *ucontrol)
  203. {
  204. struct snd_soc_component *component =
  205. snd_soc_kcontrol_component(kcontrol);
  206. struct tas5805m_priv *tas5805m =
  207. snd_soc_component_get_drvdata(component);
  208. mutex_lock(&tas5805m->lock);
  209. ucontrol->value.integer.value[0] = tas5805m->vol[0];
  210. ucontrol->value.integer.value[1] = tas5805m->vol[1];
  211. mutex_unlock(&tas5805m->lock);
  212. return 0;
  213. }
  214. static inline int volume_is_valid(int v)
  215. {
  216. return (v >= TAS5805M_VOLUME_MIN) && (v <= TAS5805M_VOLUME_MAX);
  217. }
  218. static int tas5805m_vol_put(struct snd_kcontrol *kcontrol,
  219. struct snd_ctl_elem_value *ucontrol)
  220. {
  221. struct snd_soc_component *component =
  222. snd_soc_kcontrol_component(kcontrol);
  223. struct tas5805m_priv *tas5805m =
  224. snd_soc_component_get_drvdata(component);
  225. int ret = 0;
  226. if (!(volume_is_valid(ucontrol->value.integer.value[0]) &&
  227. volume_is_valid(ucontrol->value.integer.value[1])))
  228. return -EINVAL;
  229. mutex_lock(&tas5805m->lock);
  230. if (tas5805m->vol[0] != ucontrol->value.integer.value[0] ||
  231. tas5805m->vol[1] != ucontrol->value.integer.value[1]) {
  232. tas5805m->vol[0] = ucontrol->value.integer.value[0];
  233. tas5805m->vol[1] = ucontrol->value.integer.value[1];
  234. dev_dbg(component->dev, "set vol=%d/%d (is_powered=%d)\n",
  235. tas5805m->vol[0], tas5805m->vol[1],
  236. tas5805m->is_powered);
  237. if (tas5805m->is_powered)
  238. tas5805m_refresh(tas5805m);
  239. ret = 1;
  240. }
  241. mutex_unlock(&tas5805m->lock);
  242. return ret;
  243. }
  244. static const struct snd_kcontrol_new tas5805m_snd_controls[] = {
  245. {
  246. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  247. .name = "Master Playback Volume",
  248. .access = SNDRV_CTL_ELEM_ACCESS_TLV_READ |
  249. SNDRV_CTL_ELEM_ACCESS_READWRITE,
  250. .info = tas5805m_vol_info,
  251. .get = tas5805m_vol_get,
  252. .put = tas5805m_vol_put,
  253. },
  254. };
  255. static void send_cfg(struct regmap *rm,
  256. const uint8_t *s, unsigned int len)
  257. {
  258. unsigned int i;
  259. for (i = 0; i + 1 < len; i += 2)
  260. regmap_write(rm, s[i], s[i + 1]);
  261. }
  262. /* The TAS5805M DSP can't be configured until the I2S clock has been
  263. * present and stable for 5ms, or else it won't boot and we get no
  264. * sound.
  265. */
  266. static int tas5805m_trigger(struct snd_pcm_substream *substream, int cmd,
  267. struct snd_soc_dai *dai)
  268. {
  269. struct snd_soc_component *component = dai->component;
  270. struct tas5805m_priv *tas5805m =
  271. snd_soc_component_get_drvdata(component);
  272. switch (cmd) {
  273. case SNDRV_PCM_TRIGGER_START:
  274. case SNDRV_PCM_TRIGGER_RESUME:
  275. case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
  276. dev_dbg(component->dev, "clock start\n");
  277. schedule_work(&tas5805m->work);
  278. break;
  279. case SNDRV_PCM_TRIGGER_STOP:
  280. case SNDRV_PCM_TRIGGER_SUSPEND:
  281. case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
  282. break;
  283. default:
  284. return -EINVAL;
  285. }
  286. return 0;
  287. }
  288. static void do_work(struct work_struct *work)
  289. {
  290. struct tas5805m_priv *tas5805m =
  291. container_of(work, struct tas5805m_priv, work);
  292. struct regmap *rm = tas5805m->regmap;
  293. dev_dbg(&tas5805m->i2c->dev, "DSP startup\n");
  294. mutex_lock(&tas5805m->lock);
  295. /* We mustn't issue any I2C transactions until the I2S
  296. * clock is stable. Furthermore, we must allow a 5ms
  297. * delay after the first set of register writes to
  298. * allow the DSP to boot before configuring it.
  299. */
  300. usleep_range(5000, 10000);
  301. send_cfg(rm, dsp_cfg_preboot, ARRAY_SIZE(dsp_cfg_preboot));
  302. usleep_range(5000, 15000);
  303. send_cfg(rm, tas5805m->dsp_cfg_data, tas5805m->dsp_cfg_len);
  304. tas5805m->is_powered = true;
  305. tas5805m_refresh(tas5805m);
  306. mutex_unlock(&tas5805m->lock);
  307. }
  308. static int tas5805m_dac_event(struct snd_soc_dapm_widget *w,
  309. struct snd_kcontrol *kcontrol, int event)
  310. {
  311. struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
  312. struct tas5805m_priv *tas5805m =
  313. snd_soc_component_get_drvdata(component);
  314. struct regmap *rm = tas5805m->regmap;
  315. if (event & SND_SOC_DAPM_PRE_PMD) {
  316. unsigned int chan, global1, global2;
  317. dev_dbg(component->dev, "DSP shutdown\n");
  318. cancel_work_sync(&tas5805m->work);
  319. mutex_lock(&tas5805m->lock);
  320. if (tas5805m->is_powered) {
  321. tas5805m->is_powered = false;
  322. regmap_write(rm, REG_PAGE, 0x00);
  323. regmap_write(rm, REG_BOOK, 0x00);
  324. regmap_read(rm, REG_CHAN_FAULT, &chan);
  325. regmap_read(rm, REG_GLOBAL_FAULT1, &global1);
  326. regmap_read(rm, REG_GLOBAL_FAULT2, &global2);
  327. dev_dbg(component->dev, "fault regs: CHAN=%02x, "
  328. "GLOBAL1=%02x, GLOBAL2=%02x\n",
  329. chan, global1, global2);
  330. regmap_write(rm, REG_DEVICE_CTRL_2, DCTRL2_MODE_HIZ);
  331. }
  332. mutex_unlock(&tas5805m->lock);
  333. }
  334. return 0;
  335. }
  336. static const struct snd_soc_dapm_route tas5805m_audio_map[] = {
  337. { "DAC", NULL, "DAC IN" },
  338. { "OUT", NULL, "DAC" },
  339. };
  340. static const struct snd_soc_dapm_widget tas5805m_dapm_widgets[] = {
  341. SND_SOC_DAPM_AIF_IN("DAC IN", "Playback", 0, SND_SOC_NOPM, 0, 0),
  342. SND_SOC_DAPM_DAC_E("DAC", NULL, SND_SOC_NOPM, 0, 0,
  343. tas5805m_dac_event, SND_SOC_DAPM_PRE_PMD),
  344. SND_SOC_DAPM_OUTPUT("OUT")
  345. };
  346. static const struct snd_soc_component_driver soc_codec_dev_tas5805m = {
  347. .controls = tas5805m_snd_controls,
  348. .num_controls = ARRAY_SIZE(tas5805m_snd_controls),
  349. .dapm_widgets = tas5805m_dapm_widgets,
  350. .num_dapm_widgets = ARRAY_SIZE(tas5805m_dapm_widgets),
  351. .dapm_routes = tas5805m_audio_map,
  352. .num_dapm_routes = ARRAY_SIZE(tas5805m_audio_map),
  353. .use_pmdown_time = 1,
  354. .endianness = 1,
  355. };
  356. static int tas5805m_mute(struct snd_soc_dai *dai, int mute, int direction)
  357. {
  358. struct snd_soc_component *component = dai->component;
  359. struct tas5805m_priv *tas5805m =
  360. snd_soc_component_get_drvdata(component);
  361. mutex_lock(&tas5805m->lock);
  362. dev_dbg(component->dev, "set mute=%d (is_powered=%d)\n",
  363. mute, tas5805m->is_powered);
  364. tas5805m->is_muted = mute;
  365. if (tas5805m->is_powered)
  366. tas5805m_refresh(tas5805m);
  367. mutex_unlock(&tas5805m->lock);
  368. return 0;
  369. }
  370. static const struct snd_soc_dai_ops tas5805m_dai_ops = {
  371. .trigger = tas5805m_trigger,
  372. .mute_stream = tas5805m_mute,
  373. .no_capture_mute = 1,
  374. };
  375. static struct snd_soc_dai_driver tas5805m_dai = {
  376. .name = "tas5805m-amplifier",
  377. .playback = {
  378. .stream_name = "Playback",
  379. .channels_min = 2,
  380. .channels_max = 2,
  381. .rates = SNDRV_PCM_RATE_48000,
  382. .formats = SNDRV_PCM_FMTBIT_S32_LE,
  383. },
  384. .ops = &tas5805m_dai_ops,
  385. };
  386. static const struct regmap_config tas5805m_regmap = {
  387. .reg_bits = 8,
  388. .val_bits = 8,
  389. /* We have quite a lot of multi-level bank switching and a
  390. * relatively small number of register writes between bank
  391. * switches.
  392. */
  393. .cache_type = REGCACHE_NONE,
  394. };
  395. static int tas5805m_i2c_probe(struct i2c_client *i2c)
  396. {
  397. struct device *dev = &i2c->dev;
  398. struct regmap *regmap;
  399. struct tas5805m_priv *tas5805m;
  400. char filename[128];
  401. const char *config_name;
  402. const struct firmware *fw;
  403. int ret;
  404. regmap = devm_regmap_init_i2c(i2c, &tas5805m_regmap);
  405. if (IS_ERR(regmap)) {
  406. ret = PTR_ERR(regmap);
  407. dev_err(dev, "unable to allocate register map: %d\n", ret);
  408. return ret;
  409. }
  410. tas5805m = devm_kzalloc(dev, sizeof(struct tas5805m_priv), GFP_KERNEL);
  411. if (!tas5805m)
  412. return -ENOMEM;
  413. tas5805m->i2c = i2c;
  414. tas5805m->pvdd = devm_regulator_get(dev, "pvdd");
  415. if (IS_ERR(tas5805m->pvdd)) {
  416. dev_err(dev, "failed to get pvdd supply: %ld\n",
  417. PTR_ERR(tas5805m->pvdd));
  418. return PTR_ERR(tas5805m->pvdd);
  419. }
  420. dev_set_drvdata(dev, tas5805m);
  421. tas5805m->regmap = regmap;
  422. tas5805m->gpio_pdn_n = devm_gpiod_get(dev, "pdn", GPIOD_OUT_LOW);
  423. if (IS_ERR(tas5805m->gpio_pdn_n)) {
  424. dev_err(dev, "error requesting PDN gpio: %ld\n",
  425. PTR_ERR(tas5805m->gpio_pdn_n));
  426. return PTR_ERR(tas5805m->gpio_pdn_n);
  427. }
  428. /* This configuration must be generated by PPC3. The file loaded
  429. * consists of a sequence of register writes, where bytes at
  430. * even indices are register addresses and those at odd indices
  431. * are register values.
  432. *
  433. * The fixed portion of PPC3's output prior to the 5ms delay
  434. * should be omitted.
  435. */
  436. if (device_property_read_string(dev, "ti,dsp-config-name",
  437. &config_name))
  438. config_name = "default";
  439. snprintf(filename, sizeof(filename), "tas5805m_dsp_%s.bin",
  440. config_name);
  441. ret = request_firmware(&fw, filename, dev);
  442. if (ret)
  443. return ret;
  444. if ((fw->size < 2) || (fw->size & 1)) {
  445. dev_err(dev, "firmware is invalid\n");
  446. release_firmware(fw);
  447. return -EINVAL;
  448. }
  449. tas5805m->dsp_cfg_len = fw->size;
  450. tas5805m->dsp_cfg_data = devm_kmalloc(dev, fw->size, GFP_KERNEL);
  451. if (!tas5805m->dsp_cfg_data) {
  452. release_firmware(fw);
  453. return -ENOMEM;
  454. }
  455. memcpy(tas5805m->dsp_cfg_data, fw->data, fw->size);
  456. release_firmware(fw);
  457. /* Do the first part of the power-on here, while we can expect
  458. * the I2S interface to be quiet. We must raise PDN# and then
  459. * wait 5ms before any I2S clock is sent, or else the internal
  460. * regulator apparently won't come on.
  461. *
  462. * Also, we must keep the device in power down for 100ms or so
  463. * after PVDD is applied, or else the ADR pin is sampled
  464. * incorrectly and the device comes up with an unpredictable I2C
  465. * address.
  466. */
  467. tas5805m->vol[0] = TAS5805M_VOLUME_MIN;
  468. tas5805m->vol[1] = TAS5805M_VOLUME_MIN;
  469. ret = regulator_enable(tas5805m->pvdd);
  470. if (ret < 0) {
  471. dev_err(dev, "failed to enable pvdd: %d\n", ret);
  472. return ret;
  473. }
  474. usleep_range(100000, 150000);
  475. gpiod_set_value(tas5805m->gpio_pdn_n, 1);
  476. usleep_range(10000, 15000);
  477. INIT_WORK(&tas5805m->work, do_work);
  478. mutex_init(&tas5805m->lock);
  479. /* Don't register through devm. We need to be able to unregister
  480. * the component prior to deasserting PDN#
  481. */
  482. ret = snd_soc_register_component(dev, &soc_codec_dev_tas5805m,
  483. &tas5805m_dai, 1);
  484. if (ret < 0) {
  485. dev_err(dev, "unable to register codec: %d\n", ret);
  486. gpiod_set_value(tas5805m->gpio_pdn_n, 0);
  487. regulator_disable(tas5805m->pvdd);
  488. return ret;
  489. }
  490. return 0;
  491. }
  492. static void tas5805m_i2c_remove(struct i2c_client *i2c)
  493. {
  494. struct device *dev = &i2c->dev;
  495. struct tas5805m_priv *tas5805m = dev_get_drvdata(dev);
  496. cancel_work_sync(&tas5805m->work);
  497. snd_soc_unregister_component(dev);
  498. gpiod_set_value(tas5805m->gpio_pdn_n, 0);
  499. usleep_range(10000, 15000);
  500. regulator_disable(tas5805m->pvdd);
  501. }
  502. static const struct i2c_device_id tas5805m_i2c_id[] = {
  503. { "tas5805m", },
  504. { }
  505. };
  506. MODULE_DEVICE_TABLE(i2c, tas5805m_i2c_id);
  507. #if IS_ENABLED(CONFIG_OF)
  508. static const struct of_device_id tas5805m_of_match[] = {
  509. { .compatible = "ti,tas5805m", },
  510. { }
  511. };
  512. MODULE_DEVICE_TABLE(of, tas5805m_of_match);
  513. #endif
  514. static struct i2c_driver tas5805m_i2c_driver = {
  515. .probe_new = tas5805m_i2c_probe,
  516. .remove = tas5805m_i2c_remove,
  517. .id_table = tas5805m_i2c_id,
  518. .driver = {
  519. .name = "tas5805m",
  520. .of_match_table = of_match_ptr(tas5805m_of_match),
  521. },
  522. };
  523. module_i2c_driver(tas5805m_i2c_driver);
  524. MODULE_AUTHOR("Andy Liu <[email protected]>");
  525. MODULE_AUTHOR("Daniel Beer <[email protected]>");
  526. MODULE_DESCRIPTION("TAS5805M Audio Amplifier Driver");
  527. MODULE_LICENSE("GPL v2");