tas2770.c 19 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. //
  3. // ALSA SoC Texas Instruments TAS2770 20-W Digital Input Mono Class-D
  4. // Audio Amplifier with Speaker I/V Sense
  5. //
  6. // Copyright (C) 2016-2017 Texas Instruments Incorporated - https://www.ti.com/
  7. // Author: Tracy Yi <[email protected]>
  8. // Frank Shi <[email protected]>
  9. #include <linux/module.h>
  10. #include <linux/moduleparam.h>
  11. #include <linux/err.h>
  12. #include <linux/init.h>
  13. #include <linux/delay.h>
  14. #include <linux/pm.h>
  15. #include <linux/i2c.h>
  16. #include <linux/gpio.h>
  17. #include <linux/gpio/consumer.h>
  18. #include <linux/regulator/consumer.h>
  19. #include <linux/firmware.h>
  20. #include <linux/regmap.h>
  21. #include <linux/of.h>
  22. #include <linux/of_gpio.h>
  23. #include <linux/slab.h>
  24. #include <sound/soc.h>
  25. #include <sound/pcm.h>
  26. #include <sound/pcm_params.h>
  27. #include <sound/initval.h>
  28. #include <sound/tlv.h>
  29. #include "tas2770.h"
  30. #define TAS2770_MDELAY 0xFFFFFFFE
  31. static void tas2770_reset(struct tas2770_priv *tas2770)
  32. {
  33. if (tas2770->reset_gpio) {
  34. gpiod_set_value_cansleep(tas2770->reset_gpio, 0);
  35. msleep(20);
  36. gpiod_set_value_cansleep(tas2770->reset_gpio, 1);
  37. usleep_range(1000, 2000);
  38. }
  39. snd_soc_component_write(tas2770->component, TAS2770_SW_RST,
  40. TAS2770_RST);
  41. usleep_range(1000, 2000);
  42. }
  43. static int tas2770_update_pwr_ctrl(struct tas2770_priv *tas2770)
  44. {
  45. struct snd_soc_component *component = tas2770->component;
  46. unsigned int val;
  47. int ret;
  48. if (tas2770->dac_powered)
  49. val = tas2770->unmuted ?
  50. TAS2770_PWR_CTRL_ACTIVE : TAS2770_PWR_CTRL_MUTE;
  51. else
  52. val = TAS2770_PWR_CTRL_SHUTDOWN;
  53. ret = snd_soc_component_update_bits(component, TAS2770_PWR_CTRL,
  54. TAS2770_PWR_CTRL_MASK, val);
  55. if (ret < 0)
  56. return ret;
  57. return 0;
  58. }
  59. #ifdef CONFIG_PM
  60. static int tas2770_codec_suspend(struct snd_soc_component *component)
  61. {
  62. struct tas2770_priv *tas2770 = snd_soc_component_get_drvdata(component);
  63. int ret = 0;
  64. regcache_cache_only(tas2770->regmap, true);
  65. regcache_mark_dirty(tas2770->regmap);
  66. if (tas2770->sdz_gpio) {
  67. gpiod_set_value_cansleep(tas2770->sdz_gpio, 0);
  68. } else {
  69. ret = snd_soc_component_update_bits(component, TAS2770_PWR_CTRL,
  70. TAS2770_PWR_CTRL_MASK,
  71. TAS2770_PWR_CTRL_SHUTDOWN);
  72. if (ret < 0) {
  73. regcache_cache_only(tas2770->regmap, false);
  74. regcache_sync(tas2770->regmap);
  75. return ret;
  76. }
  77. ret = 0;
  78. }
  79. return ret;
  80. }
  81. static int tas2770_codec_resume(struct snd_soc_component *component)
  82. {
  83. struct tas2770_priv *tas2770 = snd_soc_component_get_drvdata(component);
  84. int ret;
  85. if (tas2770->sdz_gpio) {
  86. gpiod_set_value_cansleep(tas2770->sdz_gpio, 1);
  87. usleep_range(1000, 2000);
  88. } else {
  89. ret = tas2770_update_pwr_ctrl(tas2770);
  90. if (ret < 0)
  91. return ret;
  92. }
  93. regcache_cache_only(tas2770->regmap, false);
  94. return regcache_sync(tas2770->regmap);
  95. }
  96. #else
  97. #define tas2770_codec_suspend NULL
  98. #define tas2770_codec_resume NULL
  99. #endif
  100. static const char * const tas2770_ASI1_src[] = {
  101. "I2C offset", "Left", "Right", "LeftRightDiv2",
  102. };
  103. static SOC_ENUM_SINGLE_DECL(
  104. tas2770_ASI1_src_enum, TAS2770_TDM_CFG_REG2,
  105. 4, tas2770_ASI1_src);
  106. static const struct snd_kcontrol_new tas2770_asi1_mux =
  107. SOC_DAPM_ENUM("ASI1 Source", tas2770_ASI1_src_enum);
  108. static int tas2770_dac_event(struct snd_soc_dapm_widget *w,
  109. struct snd_kcontrol *kcontrol, int event)
  110. {
  111. struct snd_soc_component *component =
  112. snd_soc_dapm_to_component(w->dapm);
  113. struct tas2770_priv *tas2770 =
  114. snd_soc_component_get_drvdata(component);
  115. int ret;
  116. switch (event) {
  117. case SND_SOC_DAPM_POST_PMU:
  118. tas2770->dac_powered = 1;
  119. ret = tas2770_update_pwr_ctrl(tas2770);
  120. break;
  121. case SND_SOC_DAPM_PRE_PMD:
  122. tas2770->dac_powered = 0;
  123. ret = tas2770_update_pwr_ctrl(tas2770);
  124. break;
  125. default:
  126. dev_err(tas2770->dev, "Not supported evevt\n");
  127. return -EINVAL;
  128. }
  129. return ret;
  130. }
  131. static const struct snd_kcontrol_new isense_switch =
  132. SOC_DAPM_SINGLE("Switch", TAS2770_PWR_CTRL, 3, 1, 1);
  133. static const struct snd_kcontrol_new vsense_switch =
  134. SOC_DAPM_SINGLE("Switch", TAS2770_PWR_CTRL, 2, 1, 1);
  135. static const struct snd_soc_dapm_widget tas2770_dapm_widgets[] = {
  136. SND_SOC_DAPM_AIF_IN("ASI1", "ASI1 Playback", 0, SND_SOC_NOPM, 0, 0),
  137. SND_SOC_DAPM_MUX("ASI1 Sel", SND_SOC_NOPM, 0, 0, &tas2770_asi1_mux),
  138. SND_SOC_DAPM_SWITCH("ISENSE", TAS2770_PWR_CTRL, 3, 1, &isense_switch),
  139. SND_SOC_DAPM_SWITCH("VSENSE", TAS2770_PWR_CTRL, 2, 1, &vsense_switch),
  140. SND_SOC_DAPM_DAC_E("DAC", NULL, SND_SOC_NOPM, 0, 0, tas2770_dac_event,
  141. SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
  142. SND_SOC_DAPM_OUTPUT("OUT"),
  143. SND_SOC_DAPM_SIGGEN("VMON"),
  144. SND_SOC_DAPM_SIGGEN("IMON")
  145. };
  146. static const struct snd_soc_dapm_route tas2770_audio_map[] = {
  147. {"ASI1 Sel", "I2C offset", "ASI1"},
  148. {"ASI1 Sel", "Left", "ASI1"},
  149. {"ASI1 Sel", "Right", "ASI1"},
  150. {"ASI1 Sel", "LeftRightDiv2", "ASI1"},
  151. {"DAC", NULL, "ASI1 Sel"},
  152. {"OUT", NULL, "DAC"},
  153. {"ISENSE", "Switch", "IMON"},
  154. {"VSENSE", "Switch", "VMON"},
  155. };
  156. static int tas2770_mute(struct snd_soc_dai *dai, int mute, int direction)
  157. {
  158. struct snd_soc_component *component = dai->component;
  159. struct tas2770_priv *tas2770 =
  160. snd_soc_component_get_drvdata(component);
  161. tas2770->unmuted = !mute;
  162. return tas2770_update_pwr_ctrl(tas2770);
  163. }
  164. static int tas2770_set_bitwidth(struct tas2770_priv *tas2770, int bitwidth)
  165. {
  166. int ret;
  167. struct snd_soc_component *component = tas2770->component;
  168. switch (bitwidth) {
  169. case SNDRV_PCM_FORMAT_S16_LE:
  170. ret = snd_soc_component_update_bits(component, TAS2770_TDM_CFG_REG2,
  171. TAS2770_TDM_CFG_REG2_RXW_MASK,
  172. TAS2770_TDM_CFG_REG2_RXW_16BITS);
  173. tas2770->v_sense_slot = tas2770->i_sense_slot + 2;
  174. break;
  175. case SNDRV_PCM_FORMAT_S24_LE:
  176. ret = snd_soc_component_update_bits(component, TAS2770_TDM_CFG_REG2,
  177. TAS2770_TDM_CFG_REG2_RXW_MASK,
  178. TAS2770_TDM_CFG_REG2_RXW_24BITS);
  179. tas2770->v_sense_slot = tas2770->i_sense_slot + 4;
  180. break;
  181. case SNDRV_PCM_FORMAT_S32_LE:
  182. ret = snd_soc_component_update_bits(component, TAS2770_TDM_CFG_REG2,
  183. TAS2770_TDM_CFG_REG2_RXW_MASK,
  184. TAS2770_TDM_CFG_REG2_RXW_32BITS);
  185. tas2770->v_sense_slot = tas2770->i_sense_slot + 4;
  186. break;
  187. default:
  188. return -EINVAL;
  189. }
  190. if (ret < 0)
  191. return ret;
  192. ret = snd_soc_component_update_bits(component, TAS2770_TDM_CFG_REG5,
  193. TAS2770_TDM_CFG_REG5_VSNS_MASK |
  194. TAS2770_TDM_CFG_REG5_50_MASK,
  195. TAS2770_TDM_CFG_REG5_VSNS_ENABLE |
  196. tas2770->v_sense_slot);
  197. if (ret < 0)
  198. return ret;
  199. ret = snd_soc_component_update_bits(component, TAS2770_TDM_CFG_REG6,
  200. TAS2770_TDM_CFG_REG6_ISNS_MASK |
  201. TAS2770_TDM_CFG_REG6_50_MASK,
  202. TAS2770_TDM_CFG_REG6_ISNS_ENABLE |
  203. tas2770->i_sense_slot);
  204. if (ret < 0)
  205. return ret;
  206. return 0;
  207. }
  208. static int tas2770_set_samplerate(struct tas2770_priv *tas2770, int samplerate)
  209. {
  210. struct snd_soc_component *component = tas2770->component;
  211. int ramp_rate_val;
  212. int ret;
  213. switch (samplerate) {
  214. case 48000:
  215. ramp_rate_val = TAS2770_TDM_CFG_REG0_SMP_48KHZ |
  216. TAS2770_TDM_CFG_REG0_31_44_1_48KHZ;
  217. break;
  218. case 44100:
  219. ramp_rate_val = TAS2770_TDM_CFG_REG0_SMP_44_1KHZ |
  220. TAS2770_TDM_CFG_REG0_31_44_1_48KHZ;
  221. break;
  222. case 96000:
  223. ramp_rate_val = TAS2770_TDM_CFG_REG0_SMP_48KHZ |
  224. TAS2770_TDM_CFG_REG0_31_88_2_96KHZ;
  225. break;
  226. case 88200:
  227. ramp_rate_val = TAS2770_TDM_CFG_REG0_SMP_44_1KHZ |
  228. TAS2770_TDM_CFG_REG0_31_88_2_96KHZ;
  229. break;
  230. case 192000:
  231. ramp_rate_val = TAS2770_TDM_CFG_REG0_SMP_48KHZ |
  232. TAS2770_TDM_CFG_REG0_31_176_4_192KHZ;
  233. break;
  234. case 176400:
  235. ramp_rate_val = TAS2770_TDM_CFG_REG0_SMP_44_1KHZ |
  236. TAS2770_TDM_CFG_REG0_31_176_4_192KHZ;
  237. break;
  238. default:
  239. return -EINVAL;
  240. }
  241. ret = snd_soc_component_update_bits(component, TAS2770_TDM_CFG_REG0,
  242. TAS2770_TDM_CFG_REG0_SMP_MASK |
  243. TAS2770_TDM_CFG_REG0_31_MASK,
  244. ramp_rate_val);
  245. if (ret < 0)
  246. return ret;
  247. return 0;
  248. }
  249. static int tas2770_hw_params(struct snd_pcm_substream *substream,
  250. struct snd_pcm_hw_params *params,
  251. struct snd_soc_dai *dai)
  252. {
  253. struct snd_soc_component *component = dai->component;
  254. struct tas2770_priv *tas2770 =
  255. snd_soc_component_get_drvdata(component);
  256. int ret;
  257. ret = tas2770_set_bitwidth(tas2770, params_format(params));
  258. if (ret)
  259. return ret;
  260. return tas2770_set_samplerate(tas2770, params_rate(params));
  261. }
  262. static int tas2770_set_fmt(struct snd_soc_dai *dai, unsigned int fmt)
  263. {
  264. struct snd_soc_component *component = dai->component;
  265. struct tas2770_priv *tas2770 =
  266. snd_soc_component_get_drvdata(component);
  267. u8 tdm_rx_start_slot = 0, invert_fpol = 0, fpol_preinv = 0, asi_cfg_1 = 0;
  268. int ret;
  269. switch (fmt & SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK) {
  270. case SND_SOC_DAIFMT_CBC_CFC:
  271. break;
  272. default:
  273. dev_err(tas2770->dev, "ASI invalid DAI clocking\n");
  274. return -EINVAL;
  275. }
  276. switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
  277. case SND_SOC_DAIFMT_NB_IF:
  278. invert_fpol = 1;
  279. fallthrough;
  280. case SND_SOC_DAIFMT_NB_NF:
  281. asi_cfg_1 |= TAS2770_TDM_CFG_REG1_RX_RSING;
  282. break;
  283. case SND_SOC_DAIFMT_IB_IF:
  284. invert_fpol = 1;
  285. fallthrough;
  286. case SND_SOC_DAIFMT_IB_NF:
  287. asi_cfg_1 |= TAS2770_TDM_CFG_REG1_RX_FALING;
  288. break;
  289. default:
  290. dev_err(tas2770->dev, "ASI format Inverse is not found\n");
  291. return -EINVAL;
  292. }
  293. ret = snd_soc_component_update_bits(component, TAS2770_TDM_CFG_REG1,
  294. TAS2770_TDM_CFG_REG1_RX_MASK,
  295. asi_cfg_1);
  296. if (ret < 0)
  297. return ret;
  298. switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
  299. case SND_SOC_DAIFMT_I2S:
  300. tdm_rx_start_slot = 1;
  301. fpol_preinv = 0;
  302. break;
  303. case SND_SOC_DAIFMT_DSP_A:
  304. tdm_rx_start_slot = 0;
  305. fpol_preinv = 1;
  306. break;
  307. case SND_SOC_DAIFMT_DSP_B:
  308. tdm_rx_start_slot = 1;
  309. fpol_preinv = 1;
  310. break;
  311. case SND_SOC_DAIFMT_LEFT_J:
  312. tdm_rx_start_slot = 0;
  313. fpol_preinv = 1;
  314. break;
  315. default:
  316. dev_err(tas2770->dev,
  317. "DAI Format is not found, fmt=0x%x\n", fmt);
  318. return -EINVAL;
  319. }
  320. ret = snd_soc_component_update_bits(component, TAS2770_TDM_CFG_REG1,
  321. TAS2770_TDM_CFG_REG1_MASK,
  322. (tdm_rx_start_slot << TAS2770_TDM_CFG_REG1_51_SHIFT));
  323. if (ret < 0)
  324. return ret;
  325. ret = snd_soc_component_update_bits(component, TAS2770_TDM_CFG_REG0,
  326. TAS2770_TDM_CFG_REG0_FPOL_MASK,
  327. (fpol_preinv ^ invert_fpol)
  328. ? TAS2770_TDM_CFG_REG0_FPOL_RSING
  329. : TAS2770_TDM_CFG_REG0_FPOL_FALING);
  330. if (ret < 0)
  331. return ret;
  332. return 0;
  333. }
  334. static int tas2770_set_dai_tdm_slot(struct snd_soc_dai *dai,
  335. unsigned int tx_mask,
  336. unsigned int rx_mask,
  337. int slots, int slot_width)
  338. {
  339. struct snd_soc_component *component = dai->component;
  340. int left_slot, right_slot;
  341. int ret;
  342. if (tx_mask == 0 || rx_mask != 0)
  343. return -EINVAL;
  344. left_slot = __ffs(tx_mask);
  345. tx_mask &= ~(1 << left_slot);
  346. if (tx_mask == 0) {
  347. right_slot = left_slot;
  348. } else {
  349. right_slot = __ffs(tx_mask);
  350. tx_mask &= ~(1 << right_slot);
  351. }
  352. if (tx_mask != 0 || left_slot >= slots || right_slot >= slots)
  353. return -EINVAL;
  354. ret = snd_soc_component_update_bits(component, TAS2770_TDM_CFG_REG3,
  355. TAS2770_TDM_CFG_REG3_30_MASK,
  356. (left_slot << TAS2770_TDM_CFG_REG3_30_SHIFT));
  357. if (ret < 0)
  358. return ret;
  359. ret = snd_soc_component_update_bits(component, TAS2770_TDM_CFG_REG3,
  360. TAS2770_TDM_CFG_REG3_RXS_MASK,
  361. (right_slot << TAS2770_TDM_CFG_REG3_RXS_SHIFT));
  362. if (ret < 0)
  363. return ret;
  364. switch (slot_width) {
  365. case 16:
  366. ret = snd_soc_component_update_bits(component, TAS2770_TDM_CFG_REG2,
  367. TAS2770_TDM_CFG_REG2_RXS_MASK,
  368. TAS2770_TDM_CFG_REG2_RXS_16BITS);
  369. break;
  370. case 24:
  371. ret = snd_soc_component_update_bits(component, TAS2770_TDM_CFG_REG2,
  372. TAS2770_TDM_CFG_REG2_RXS_MASK,
  373. TAS2770_TDM_CFG_REG2_RXS_24BITS);
  374. break;
  375. case 32:
  376. ret = snd_soc_component_update_bits(component, TAS2770_TDM_CFG_REG2,
  377. TAS2770_TDM_CFG_REG2_RXS_MASK,
  378. TAS2770_TDM_CFG_REG2_RXS_32BITS);
  379. break;
  380. case 0:
  381. /* Do not change slot width */
  382. ret = 0;
  383. break;
  384. default:
  385. ret = -EINVAL;
  386. }
  387. if (ret < 0)
  388. return ret;
  389. return 0;
  390. }
  391. static const struct snd_soc_dai_ops tas2770_dai_ops = {
  392. .mute_stream = tas2770_mute,
  393. .hw_params = tas2770_hw_params,
  394. .set_fmt = tas2770_set_fmt,
  395. .set_tdm_slot = tas2770_set_dai_tdm_slot,
  396. .no_capture_mute = 1,
  397. };
  398. #define TAS2770_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\
  399. SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE)
  400. #define TAS2770_RATES (SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 |\
  401. SNDRV_PCM_RATE_96000 |\
  402. SNDRV_PCM_RATE_192000\
  403. )
  404. static struct snd_soc_dai_driver tas2770_dai_driver[] = {
  405. {
  406. .name = "tas2770 ASI1",
  407. .id = 0,
  408. .playback = {
  409. .stream_name = "ASI1 Playback",
  410. .channels_min = 1,
  411. .channels_max = 2,
  412. .rates = TAS2770_RATES,
  413. .formats = TAS2770_FORMATS,
  414. },
  415. .capture = {
  416. .stream_name = "ASI1 Capture",
  417. .channels_min = 0,
  418. .channels_max = 2,
  419. .rates = TAS2770_RATES,
  420. .formats = TAS2770_FORMATS,
  421. },
  422. .ops = &tas2770_dai_ops,
  423. .symmetric_rate = 1,
  424. },
  425. };
  426. static const struct regmap_config tas2770_i2c_regmap;
  427. static int tas2770_codec_probe(struct snd_soc_component *component)
  428. {
  429. struct tas2770_priv *tas2770 =
  430. snd_soc_component_get_drvdata(component);
  431. tas2770->component = component;
  432. if (tas2770->sdz_gpio) {
  433. gpiod_set_value_cansleep(tas2770->sdz_gpio, 1);
  434. usleep_range(1000, 2000);
  435. }
  436. tas2770_reset(tas2770);
  437. regmap_reinit_cache(tas2770->regmap, &tas2770_i2c_regmap);
  438. return 0;
  439. }
  440. static DECLARE_TLV_DB_SCALE(tas2770_digital_tlv, 1100, 50, 0);
  441. static DECLARE_TLV_DB_SCALE(tas2770_playback_volume, -12750, 50, 0);
  442. static const struct snd_kcontrol_new tas2770_snd_controls[] = {
  443. SOC_SINGLE_TLV("Speaker Playback Volume", TAS2770_PLAY_CFG_REG2,
  444. 0, TAS2770_PLAY_CFG_REG2_VMAX, 1, tas2770_playback_volume),
  445. SOC_SINGLE_TLV("Amp Gain Volume", TAS2770_PLAY_CFG_REG0, 0, 0x14, 0,
  446. tas2770_digital_tlv),
  447. };
  448. static const struct snd_soc_component_driver soc_component_driver_tas2770 = {
  449. .probe = tas2770_codec_probe,
  450. .suspend = tas2770_codec_suspend,
  451. .resume = tas2770_codec_resume,
  452. .controls = tas2770_snd_controls,
  453. .num_controls = ARRAY_SIZE(tas2770_snd_controls),
  454. .dapm_widgets = tas2770_dapm_widgets,
  455. .num_dapm_widgets = ARRAY_SIZE(tas2770_dapm_widgets),
  456. .dapm_routes = tas2770_audio_map,
  457. .num_dapm_routes = ARRAY_SIZE(tas2770_audio_map),
  458. .idle_bias_on = 1,
  459. .endianness = 1,
  460. };
  461. static int tas2770_register_codec(struct tas2770_priv *tas2770)
  462. {
  463. return devm_snd_soc_register_component(tas2770->dev,
  464. &soc_component_driver_tas2770,
  465. tas2770_dai_driver, ARRAY_SIZE(tas2770_dai_driver));
  466. }
  467. static const struct reg_default tas2770_reg_defaults[] = {
  468. { TAS2770_PAGE, 0x00 },
  469. { TAS2770_SW_RST, 0x00 },
  470. { TAS2770_PWR_CTRL, 0x0e },
  471. { TAS2770_PLAY_CFG_REG0, 0x10 },
  472. { TAS2770_PLAY_CFG_REG1, 0x01 },
  473. { TAS2770_PLAY_CFG_REG2, 0x00 },
  474. { TAS2770_MSC_CFG_REG0, 0x07 },
  475. { TAS2770_TDM_CFG_REG1, 0x02 },
  476. { TAS2770_TDM_CFG_REG2, 0x0a },
  477. { TAS2770_TDM_CFG_REG3, 0x10 },
  478. { TAS2770_INT_MASK_REG0, 0xfc },
  479. { TAS2770_INT_MASK_REG1, 0xb1 },
  480. { TAS2770_INT_CFG, 0x05 },
  481. { TAS2770_MISC_IRQ, 0x81 },
  482. { TAS2770_CLK_CGF, 0x0c },
  483. };
  484. static bool tas2770_volatile(struct device *dev, unsigned int reg)
  485. {
  486. switch (reg) {
  487. case TAS2770_PAGE: /* regmap implementation requires this */
  488. case TAS2770_SW_RST: /* always clears after write */
  489. case TAS2770_BO_PRV_REG0:/* has a self clearing bit */
  490. case TAS2770_LVE_INT_REG0:
  491. case TAS2770_LVE_INT_REG1:
  492. case TAS2770_LAT_INT_REG0:/* Sticky interrupt flags */
  493. case TAS2770_LAT_INT_REG1:/* Sticky interrupt flags */
  494. case TAS2770_VBAT_MSB:
  495. case TAS2770_VBAT_LSB:
  496. case TAS2770_TEMP_MSB:
  497. case TAS2770_TEMP_LSB:
  498. return true;
  499. }
  500. return false;
  501. }
  502. static bool tas2770_writeable(struct device *dev, unsigned int reg)
  503. {
  504. switch (reg) {
  505. case TAS2770_LVE_INT_REG0:
  506. case TAS2770_LVE_INT_REG1:
  507. case TAS2770_LAT_INT_REG0:
  508. case TAS2770_LAT_INT_REG1:
  509. case TAS2770_VBAT_MSB:
  510. case TAS2770_VBAT_LSB:
  511. case TAS2770_TEMP_MSB:
  512. case TAS2770_TEMP_LSB:
  513. case TAS2770_TDM_CLK_DETC:
  514. case TAS2770_REV_AND_GPID:
  515. return false;
  516. }
  517. return true;
  518. }
  519. static const struct regmap_range_cfg tas2770_regmap_ranges[] = {
  520. {
  521. .range_min = 0,
  522. .range_max = 1 * 128,
  523. .selector_reg = TAS2770_PAGE,
  524. .selector_mask = 0xff,
  525. .selector_shift = 0,
  526. .window_start = 0,
  527. .window_len = 128,
  528. },
  529. };
  530. static const struct regmap_config tas2770_i2c_regmap = {
  531. .reg_bits = 8,
  532. .val_bits = 8,
  533. .writeable_reg = tas2770_writeable,
  534. .volatile_reg = tas2770_volatile,
  535. .reg_defaults = tas2770_reg_defaults,
  536. .num_reg_defaults = ARRAY_SIZE(tas2770_reg_defaults),
  537. .cache_type = REGCACHE_RBTREE,
  538. .ranges = tas2770_regmap_ranges,
  539. .num_ranges = ARRAY_SIZE(tas2770_regmap_ranges),
  540. .max_register = 1 * 128,
  541. };
  542. static int tas2770_parse_dt(struct device *dev, struct tas2770_priv *tas2770)
  543. {
  544. int rc = 0;
  545. rc = fwnode_property_read_u32(dev->fwnode, "ti,imon-slot-no",
  546. &tas2770->i_sense_slot);
  547. if (rc) {
  548. dev_info(tas2770->dev, "Property %s is missing setting default slot\n",
  549. "ti,imon-slot-no");
  550. tas2770->i_sense_slot = 0;
  551. }
  552. rc = fwnode_property_read_u32(dev->fwnode, "ti,vmon-slot-no",
  553. &tas2770->v_sense_slot);
  554. if (rc) {
  555. dev_info(tas2770->dev, "Property %s is missing setting default slot\n",
  556. "ti,vmon-slot-no");
  557. tas2770->v_sense_slot = 2;
  558. }
  559. tas2770->sdz_gpio = devm_gpiod_get_optional(dev, "shutdown", GPIOD_OUT_HIGH);
  560. if (IS_ERR(tas2770->sdz_gpio)) {
  561. if (PTR_ERR(tas2770->sdz_gpio) == -EPROBE_DEFER)
  562. return -EPROBE_DEFER;
  563. tas2770->sdz_gpio = NULL;
  564. }
  565. return 0;
  566. }
  567. static int tas2770_i2c_probe(struct i2c_client *client)
  568. {
  569. struct tas2770_priv *tas2770;
  570. int result;
  571. tas2770 = devm_kzalloc(&client->dev, sizeof(struct tas2770_priv),
  572. GFP_KERNEL);
  573. if (!tas2770)
  574. return -ENOMEM;
  575. tas2770->dev = &client->dev;
  576. i2c_set_clientdata(client, tas2770);
  577. dev_set_drvdata(&client->dev, tas2770);
  578. tas2770->regmap = devm_regmap_init_i2c(client, &tas2770_i2c_regmap);
  579. if (IS_ERR(tas2770->regmap)) {
  580. result = PTR_ERR(tas2770->regmap);
  581. dev_err(&client->dev, "Failed to allocate register map: %d\n",
  582. result);
  583. return result;
  584. }
  585. if (client->dev.of_node) {
  586. result = tas2770_parse_dt(&client->dev, tas2770);
  587. if (result) {
  588. dev_err(tas2770->dev, "%s: Failed to parse devicetree\n",
  589. __func__);
  590. return result;
  591. }
  592. }
  593. tas2770->reset_gpio = devm_gpiod_get_optional(tas2770->dev, "reset",
  594. GPIOD_OUT_HIGH);
  595. if (IS_ERR(tas2770->reset_gpio)) {
  596. if (PTR_ERR(tas2770->reset_gpio) == -EPROBE_DEFER) {
  597. tas2770->reset_gpio = NULL;
  598. return -EPROBE_DEFER;
  599. }
  600. }
  601. result = tas2770_register_codec(tas2770);
  602. if (result)
  603. dev_err(tas2770->dev, "Register codec failed.\n");
  604. return result;
  605. }
  606. static const struct i2c_device_id tas2770_i2c_id[] = {
  607. { "tas2770", 0},
  608. { }
  609. };
  610. MODULE_DEVICE_TABLE(i2c, tas2770_i2c_id);
  611. #if defined(CONFIG_OF)
  612. static const struct of_device_id tas2770_of_match[] = {
  613. { .compatible = "ti,tas2770" },
  614. {},
  615. };
  616. MODULE_DEVICE_TABLE(of, tas2770_of_match);
  617. #endif
  618. static struct i2c_driver tas2770_i2c_driver = {
  619. .driver = {
  620. .name = "tas2770",
  621. .of_match_table = of_match_ptr(tas2770_of_match),
  622. },
  623. .probe_new = tas2770_i2c_probe,
  624. .id_table = tas2770_i2c_id,
  625. };
  626. module_i2c_driver(tas2770_i2c_driver);
  627. MODULE_AUTHOR("Shi Fu <[email protected]>");
  628. MODULE_DESCRIPTION("TAS2770 I2C Smart Amplifier driver");
  629. MODULE_LICENSE("GPL v2");