rt715-sdca-sdw.c 7.1 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291
  1. // SPDX-License-Identifier: GPL-2.0-only
  2. //
  3. // rt715-sdca-sdw.c -- rt715 ALSA SoC audio driver
  4. //
  5. // Copyright(c) 2020 Realtek Semiconductor Corp.
  6. //
  7. //
  8. #include <linux/delay.h>
  9. #include <linux/device.h>
  10. #include <linux/mod_devicetable.h>
  11. #include <linux/soundwire/sdw.h>
  12. #include <linux/soundwire/sdw_type.h>
  13. #include <linux/soundwire/sdw_registers.h>
  14. #include <linux/module.h>
  15. #include <linux/pm_runtime.h>
  16. #include <linux/regmap.h>
  17. #include <sound/soc.h>
  18. #include "rt715-sdca.h"
  19. #include "rt715-sdca-sdw.h"
  20. static bool rt715_sdca_readable_register(struct device *dev, unsigned int reg)
  21. {
  22. switch (reg) {
  23. case 0x201a ... 0x2027:
  24. case 0x2029 ... 0x202a:
  25. case 0x202d ... 0x2034:
  26. case 0x2200 ... 0x2204:
  27. case 0x2206 ... 0x2212:
  28. case 0x2230 ... 0x2239:
  29. case 0x2f5b:
  30. case SDW_SDCA_CTL(FUN_MIC_ARRAY, RT715_SDCA_SMPU_TRIG_ST_EN,
  31. RT715_SDCA_SMPU_TRIG_ST_CTRL, CH_00):
  32. return true;
  33. default:
  34. return false;
  35. }
  36. }
  37. static bool rt715_sdca_volatile_register(struct device *dev, unsigned int reg)
  38. {
  39. switch (reg) {
  40. case 0x201b:
  41. case 0x201c:
  42. case 0x201d:
  43. case 0x201f:
  44. case 0x2021:
  45. case 0x2023:
  46. case 0x2230:
  47. case 0x202d ... 0x202f: /* BRA */
  48. case 0x2200 ... 0x2212: /* i2c debug */
  49. case 0x2f07:
  50. case 0x2f1b ... 0x2f1e:
  51. case 0x2f30 ... 0x2f34:
  52. case 0x2f50 ... 0x2f51:
  53. case 0x2f53 ... 0x2f59:
  54. case 0x2f5c ... 0x2f5f:
  55. case SDW_SDCA_CTL(FUN_MIC_ARRAY, RT715_SDCA_SMPU_TRIG_ST_EN,
  56. RT715_SDCA_SMPU_TRIG_ST_CTRL, CH_00): /* VAD Searching status */
  57. return true;
  58. default:
  59. return false;
  60. }
  61. }
  62. static bool rt715_sdca_mbq_readable_register(struct device *dev, unsigned int reg)
  63. {
  64. switch (reg) {
  65. case 0x2000000:
  66. case 0x200002b:
  67. case 0x2000036:
  68. case 0x2000037:
  69. case 0x2000039:
  70. case 0x2000044:
  71. case 0x6100000:
  72. return true;
  73. default:
  74. return false;
  75. }
  76. }
  77. static bool rt715_sdca_mbq_volatile_register(struct device *dev, unsigned int reg)
  78. {
  79. switch (reg) {
  80. case 0x2000000:
  81. return true;
  82. default:
  83. return false;
  84. }
  85. }
  86. static const struct regmap_config rt715_sdca_regmap = {
  87. .reg_bits = 32,
  88. .val_bits = 8,
  89. .readable_reg = rt715_sdca_readable_register,
  90. .volatile_reg = rt715_sdca_volatile_register,
  91. .max_register = 0x43ffffff,
  92. .reg_defaults = rt715_reg_defaults_sdca,
  93. .num_reg_defaults = ARRAY_SIZE(rt715_reg_defaults_sdca),
  94. .cache_type = REGCACHE_RBTREE,
  95. .use_single_read = true,
  96. .use_single_write = true,
  97. };
  98. static const struct regmap_config rt715_sdca_mbq_regmap = {
  99. .name = "sdw-mbq",
  100. .reg_bits = 32,
  101. .val_bits = 16,
  102. .readable_reg = rt715_sdca_mbq_readable_register,
  103. .volatile_reg = rt715_sdca_mbq_volatile_register,
  104. .max_register = 0x43ffffff,
  105. .reg_defaults = rt715_mbq_reg_defaults_sdca,
  106. .num_reg_defaults = ARRAY_SIZE(rt715_mbq_reg_defaults_sdca),
  107. .cache_type = REGCACHE_RBTREE,
  108. .use_single_read = true,
  109. .use_single_write = true,
  110. };
  111. static int rt715_sdca_update_status(struct sdw_slave *slave,
  112. enum sdw_slave_status status)
  113. {
  114. struct rt715_sdca_priv *rt715 = dev_get_drvdata(&slave->dev);
  115. /* Update the status */
  116. rt715->status = status;
  117. /*
  118. * Perform initialization only if slave status is present and
  119. * hw_init flag is false
  120. */
  121. if (rt715->hw_init || rt715->status != SDW_SLAVE_ATTACHED)
  122. return 0;
  123. /* perform I/O transfers required for Slave initialization */
  124. return rt715_sdca_io_init(&slave->dev, slave);
  125. }
  126. static int rt715_sdca_read_prop(struct sdw_slave *slave)
  127. {
  128. struct sdw_slave_prop *prop = &slave->prop;
  129. int nval, i;
  130. u32 bit;
  131. unsigned long addr;
  132. struct sdw_dpn_prop *dpn;
  133. prop->paging_support = true;
  134. /* first we need to allocate memory for set bits in port lists */
  135. prop->source_ports = 0x50;/* BITMAP: 01010000 */
  136. prop->sink_ports = 0x0; /* BITMAP: 00000000 */
  137. nval = hweight32(prop->source_ports);
  138. prop->src_dpn_prop = devm_kcalloc(&slave->dev, nval,
  139. sizeof(*prop->src_dpn_prop),
  140. GFP_KERNEL);
  141. if (!prop->src_dpn_prop)
  142. return -ENOMEM;
  143. dpn = prop->src_dpn_prop;
  144. i = 0;
  145. addr = prop->source_ports;
  146. for_each_set_bit(bit, &addr, 32) {
  147. dpn[i].num = bit;
  148. dpn[i].simple_ch_prep_sm = true;
  149. dpn[i].ch_prep_timeout = 10;
  150. i++;
  151. }
  152. /* set the timeout values */
  153. prop->clk_stop_timeout = 200;
  154. return 0;
  155. }
  156. static const struct sdw_slave_ops rt715_sdca_slave_ops = {
  157. .read_prop = rt715_sdca_read_prop,
  158. .update_status = rt715_sdca_update_status,
  159. };
  160. static int rt715_sdca_sdw_probe(struct sdw_slave *slave,
  161. const struct sdw_device_id *id)
  162. {
  163. struct regmap *mbq_regmap, *regmap;
  164. /* Regmap Initialization */
  165. mbq_regmap = devm_regmap_init_sdw_mbq(slave, &rt715_sdca_mbq_regmap);
  166. if (IS_ERR(mbq_regmap))
  167. return PTR_ERR(mbq_regmap);
  168. regmap = devm_regmap_init_sdw(slave, &rt715_sdca_regmap);
  169. if (IS_ERR(regmap))
  170. return PTR_ERR(regmap);
  171. return rt715_sdca_init(&slave->dev, mbq_regmap, regmap, slave);
  172. }
  173. static int rt715_sdca_sdw_remove(struct sdw_slave *slave)
  174. {
  175. struct rt715_sdca_priv *rt715 = dev_get_drvdata(&slave->dev);
  176. if (rt715->first_hw_init)
  177. pm_runtime_disable(&slave->dev);
  178. return 0;
  179. }
  180. static const struct sdw_device_id rt715_sdca_id[] = {
  181. SDW_SLAVE_ENTRY_EXT(0x025d, 0x715, 0x3, 0x1, 0),
  182. SDW_SLAVE_ENTRY_EXT(0x025d, 0x714, 0x3, 0x1, 0),
  183. {},
  184. };
  185. MODULE_DEVICE_TABLE(sdw, rt715_sdca_id);
  186. static int __maybe_unused rt715_dev_suspend(struct device *dev)
  187. {
  188. struct rt715_sdca_priv *rt715 = dev_get_drvdata(dev);
  189. if (!rt715->hw_init)
  190. return 0;
  191. regcache_cache_only(rt715->regmap, true);
  192. regcache_mark_dirty(rt715->regmap);
  193. regcache_cache_only(rt715->mbq_regmap, true);
  194. regcache_mark_dirty(rt715->mbq_regmap);
  195. return 0;
  196. }
  197. #define RT715_PROBE_TIMEOUT 5000
  198. static int __maybe_unused rt715_dev_resume(struct device *dev)
  199. {
  200. struct sdw_slave *slave = dev_to_sdw_dev(dev);
  201. struct rt715_sdca_priv *rt715 = dev_get_drvdata(dev);
  202. unsigned long time;
  203. if (!rt715->first_hw_init)
  204. return 0;
  205. if (!slave->unattach_request)
  206. goto regmap_sync;
  207. time = wait_for_completion_timeout(&slave->enumeration_complete,
  208. msecs_to_jiffies(RT715_PROBE_TIMEOUT));
  209. if (!time) {
  210. dev_err(&slave->dev, "Enumeration not complete, timed out\n");
  211. sdw_show_ping_status(slave->bus, true);
  212. return -ETIMEDOUT;
  213. }
  214. regmap_sync:
  215. slave->unattach_request = 0;
  216. regcache_cache_only(rt715->regmap, false);
  217. regcache_sync_region(rt715->regmap,
  218. SDW_SDCA_CTL(FUN_JACK_CODEC, RT715_SDCA_ST_EN, RT715_SDCA_ST_CTRL,
  219. CH_00),
  220. SDW_SDCA_CTL(FUN_MIC_ARRAY, RT715_SDCA_SMPU_TRIG_ST_EN,
  221. RT715_SDCA_SMPU_TRIG_ST_CTRL, CH_00));
  222. regcache_cache_only(rt715->mbq_regmap, false);
  223. regcache_sync_region(rt715->mbq_regmap, 0x2000000, 0x61020ff);
  224. regcache_sync_region(rt715->mbq_regmap,
  225. SDW_SDCA_CTL(FUN_JACK_CODEC, RT715_SDCA_ST_EN, RT715_SDCA_ST_CTRL,
  226. CH_00),
  227. SDW_SDCA_CTL(FUN_MIC_ARRAY, RT715_SDCA_SMPU_TRIG_ST_EN,
  228. RT715_SDCA_SMPU_TRIG_ST_CTRL, CH_00));
  229. return 0;
  230. }
  231. static const struct dev_pm_ops rt715_pm = {
  232. SET_SYSTEM_SLEEP_PM_OPS(rt715_dev_suspend, rt715_dev_resume)
  233. SET_RUNTIME_PM_OPS(rt715_dev_suspend, rt715_dev_resume, NULL)
  234. };
  235. static struct sdw_driver rt715_sdw_driver = {
  236. .driver = {
  237. .name = "rt715-sdca",
  238. .owner = THIS_MODULE,
  239. .pm = &rt715_pm,
  240. },
  241. .probe = rt715_sdca_sdw_probe,
  242. .remove = rt715_sdca_sdw_remove,
  243. .ops = &rt715_sdca_slave_ops,
  244. .id_table = rt715_sdca_id,
  245. };
  246. module_sdw_driver(rt715_sdw_driver);
  247. MODULE_DESCRIPTION("ASoC RT715 driver SDW SDCA");
  248. MODULE_AUTHOR("Jack Yu <[email protected]>");
  249. MODULE_LICENSE("GPL v2");