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pcm186x.h

pcm186x.h 9.2 KB
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  1. // SPDX-License-Identifier: GPL-2.0
    2. 

  2. /*
    3. 

  3.  * Texas Instruments PCM186x Universal Audio ADC
    4. 

  4.  *
    5. 

  5.  * Copyright (C) 2015-2017 Texas Instruments Incorporated - https://www.ti.com
    6. 

  6.  *	Andreas Dannenberg <[email protected]>
    7. 

  7.  *	Andrew F. Davis <[email protected]>
    8. 

  8.  */
    9. 

  9. 

  10. #ifndef _PCM186X_H_
    11. 

  11. #define _PCM186X_H_
    12. 

  12. 

  13. #include <linux/pm.h>
    14. 

  14. #include <linux/regmap.h>
    15. 

  15. 

  16. enum pcm186x_type {
    17. 

  17. 	PCM1862,
    18. 

  18. 	PCM1863,
    19. 

  19. 	PCM1864,
    20. 

  20. 	PCM1865,
    21. 

  21. };
    22. 

  22. 

  23. #define PCM186X_RATES	SNDRV_PCM_RATE_8000_192000
    24. 

  24. #define PCM186X_FORMATS	(SNDRV_PCM_FMTBIT_S16_LE | \
    25. 

  25. 			 SNDRV_PCM_FMTBIT_S20_3LE |\
    26. 

  26. 			 SNDRV_PCM_FMTBIT_S24_LE | \
    27. 

  27. 			 SNDRV_PCM_FMTBIT_S32_LE)
    28. 

  28. 

  29. #define PCM186X_PAGE_LEN		0x0100
    30. 

  30. #define PCM186X_PAGE_BASE(n)		(PCM186X_PAGE_LEN * n)
    31. 

  31. 

  32. /* The page selection register address is the same on all pages */
    33. 

  33. #define PCM186X_PAGE			0
    34. 

  34. 

  35. /* Register Definitions - Page 0 */
    36. 

  36. #define PCM186X_PGA_VAL_CH1_L		(PCM186X_PAGE_BASE(0) +   1)
    37. 

  37. #define PCM186X_PGA_VAL_CH1_R		(PCM186X_PAGE_BASE(0) +   2)
    38. 

  38. #define PCM186X_PGA_VAL_CH2_L		(PCM186X_PAGE_BASE(0) +   3)
    39. 

  39. #define PCM186X_PGA_VAL_CH2_R		(PCM186X_PAGE_BASE(0) +   4)
    40. 

  40. #define PCM186X_PGA_CTRL		(PCM186X_PAGE_BASE(0) +   5)
    41. 

  41. #define PCM186X_ADC1_INPUT_SEL_L	(PCM186X_PAGE_BASE(0) +   6)
    42. 

  42. #define PCM186X_ADC1_INPUT_SEL_R	(PCM186X_PAGE_BASE(0) +   7)
    43. 

  43. #define PCM186X_ADC2_INPUT_SEL_L	(PCM186X_PAGE_BASE(0) +   8)
    44. 

  44. #define PCM186X_ADC2_INPUT_SEL_R	(PCM186X_PAGE_BASE(0) +   9)
    45. 

  45. #define PCM186X_AUXADC_INPUT_SEL	(PCM186X_PAGE_BASE(0) +  10)
    46. 

  46. #define PCM186X_PCM_CFG			(PCM186X_PAGE_BASE(0) +  11)
    47. 

  47. #define PCM186X_TDM_TX_SEL		(PCM186X_PAGE_BASE(0) +  12)
    48. 

  48. #define PCM186X_TDM_TX_OFFSET		(PCM186X_PAGE_BASE(0) +  13)
    49. 

  49. #define PCM186X_TDM_RX_OFFSET		(PCM186X_PAGE_BASE(0) +  14)
    50. 

  50. #define PCM186X_DPGA_VAL_CH1_L		(PCM186X_PAGE_BASE(0) +  15)
    51. 

  51. #define PCM186X_GPIO1_0_CTRL		(PCM186X_PAGE_BASE(0) +  16)
    52. 

  52. #define PCM186X_GPIO3_2_CTRL		(PCM186X_PAGE_BASE(0) +  17)
    53. 

  53. #define PCM186X_GPIO1_0_DIR_CTRL	(PCM186X_PAGE_BASE(0) +  18)
    54. 

  54. #define PCM186X_GPIO3_2_DIR_CTRL	(PCM186X_PAGE_BASE(0) +  19)
    55. 

  55. #define PCM186X_GPIO_IN_OUT		(PCM186X_PAGE_BASE(0) +  20)
    56. 

  56. #define PCM186X_GPIO_PULL_CTRL		(PCM186X_PAGE_BASE(0) +  21)
    57. 

  57. #define PCM186X_DPGA_VAL_CH1_R		(PCM186X_PAGE_BASE(0) +  22)
    58. 

  58. #define PCM186X_DPGA_VAL_CH2_L		(PCM186X_PAGE_BASE(0) +  23)
    59. 

  59. #define PCM186X_DPGA_VAL_CH2_R		(PCM186X_PAGE_BASE(0) +  24)
    60. 

  60. #define PCM186X_DPGA_GAIN_CTRL		(PCM186X_PAGE_BASE(0) +  25)
    61. 

  61. #define PCM186X_DPGA_MIC_CTRL		(PCM186X_PAGE_BASE(0) +  26)
    62. 

  62. #define PCM186X_DIN_RESAMP_CTRL		(PCM186X_PAGE_BASE(0) +  27)
    63. 

  63. #define PCM186X_CLK_CTRL		(PCM186X_PAGE_BASE(0) +  32)
    64. 

  64. #define PCM186X_DSP1_CLK_DIV		(PCM186X_PAGE_BASE(0) +  33)
    65. 

  65. #define PCM186X_DSP2_CLK_DIV		(PCM186X_PAGE_BASE(0) +  34)
    66. 

  66. #define PCM186X_ADC_CLK_DIV		(PCM186X_PAGE_BASE(0) +  35)
    67. 

  67. #define PCM186X_PLL_SCK_DIV		(PCM186X_PAGE_BASE(0) +  37)
    68. 

  68. #define PCM186X_BCK_DIV			(PCM186X_PAGE_BASE(0) +  38)
    69. 

  69. #define PCM186X_LRK_DIV			(PCM186X_PAGE_BASE(0) +  39)
    70. 

  70. #define PCM186X_PLL_CTRL		(PCM186X_PAGE_BASE(0) +  40)
    71. 

  71. #define PCM186X_PLL_P_DIV		(PCM186X_PAGE_BASE(0) +  41)
    72. 

  72. #define PCM186X_PLL_R_DIV		(PCM186X_PAGE_BASE(0) +  42)
    73. 

  73. #define PCM186X_PLL_J_DIV		(PCM186X_PAGE_BASE(0) +  43)
    74. 

  74. #define PCM186X_PLL_D_DIV_LSB		(PCM186X_PAGE_BASE(0) +  44)
    75. 

  75. #define PCM186X_PLL_D_DIV_MSB		(PCM186X_PAGE_BASE(0) +  45)
    76. 

  76. #define PCM186X_SIGDET_MODE		(PCM186X_PAGE_BASE(0) +  48)
    77. 

  77. #define PCM186X_SIGDET_MASK		(PCM186X_PAGE_BASE(0) +  49)
    78. 

  78. #define PCM186X_SIGDET_STAT		(PCM186X_PAGE_BASE(0) +  50)
    79. 

  79. #define PCM186X_SIGDET_LOSS_TIME	(PCM186X_PAGE_BASE(0) +  52)
    80. 

  80. #define PCM186X_SIGDET_SCAN_TIME	(PCM186X_PAGE_BASE(0) +  53)
    81. 

  81. #define PCM186X_SIGDET_INT_INTVL	(PCM186X_PAGE_BASE(0) +  54)
    82. 

  82. #define PCM186X_SIGDET_DC_REF_CH1_L	(PCM186X_PAGE_BASE(0) +  64)
    83. 

  83. #define PCM186X_SIGDET_DC_DIFF_CH1_L	(PCM186X_PAGE_BASE(0) +  65)
    84. 

  84. #define PCM186X_SIGDET_DC_LEV_CH1_L	(PCM186X_PAGE_BASE(0) +  66)
    85. 

  85. #define PCM186X_SIGDET_DC_REF_CH1_R	(PCM186X_PAGE_BASE(0) +  67)
    86. 

  86. #define PCM186X_SIGDET_DC_DIFF_CH1_R	(PCM186X_PAGE_BASE(0) +  68)
    87. 

  87. #define PCM186X_SIGDET_DC_LEV_CH1_R	(PCM186X_PAGE_BASE(0) +  69)
    88. 

  88. #define PCM186X_SIGDET_DC_REF_CH2_L	(PCM186X_PAGE_BASE(0) +  70)
    89. 

  89. #define PCM186X_SIGDET_DC_DIFF_CH2_L	(PCM186X_PAGE_BASE(0) +  71)
    90. 

  90. #define PCM186X_SIGDET_DC_LEV_CH2_L	(PCM186X_PAGE_BASE(0) +  72)
    91. 

  91. #define PCM186X_SIGDET_DC_REF_CH2_R	(PCM186X_PAGE_BASE(0) +  73)
    92. 

  92. #define PCM186X_SIGDET_DC_DIFF_CH2_R	(PCM186X_PAGE_BASE(0) +  74)
    93. 

  93. #define PCM186X_SIGDET_DC_LEV_CH2_R	(PCM186X_PAGE_BASE(0) +  75)
    94. 

  94. #define PCM186X_SIGDET_DC_REF_CH3_L	(PCM186X_PAGE_BASE(0) +  76)
    95. 

  95. #define PCM186X_SIGDET_DC_DIFF_CH3_L	(PCM186X_PAGE_BASE(0) +  77)
    96. 

  96. #define PCM186X_SIGDET_DC_LEV_CH3_L	(PCM186X_PAGE_BASE(0) +  78)
    97. 

  97. #define PCM186X_SIGDET_DC_REF_CH3_R	(PCM186X_PAGE_BASE(0) +  79)
    98. 

  98. #define PCM186X_SIGDET_DC_DIFF_CH3_R	(PCM186X_PAGE_BASE(0) +  80)
    99. 

  99. #define PCM186X_SIGDET_DC_LEV_CH3_R	(PCM186X_PAGE_BASE(0) +  81)
    100. 

  100. #define PCM186X_SIGDET_DC_REF_CH4_L	(PCM186X_PAGE_BASE(0) +  82)
    101. 

  101. #define PCM186X_SIGDET_DC_DIFF_CH4_L	(PCM186X_PAGE_BASE(0) +  83)
    102. 

  102. #define PCM186X_SIGDET_DC_LEV_CH4_L	(PCM186X_PAGE_BASE(0) +  84)
    103. 

  103. #define PCM186X_SIGDET_DC_REF_CH4_R	(PCM186X_PAGE_BASE(0) +  85)
    104. 

  104. #define PCM186X_SIGDET_DC_DIFF_CH4_R	(PCM186X_PAGE_BASE(0) +  86)
    105. 

  105. #define PCM186X_SIGDET_DC_LEV_CH4_R	(PCM186X_PAGE_BASE(0) +  87)
    106. 

  106. #define PCM186X_AUXADC_DATA_CTRL	(PCM186X_PAGE_BASE(0) +  88)
    107. 

  107. #define PCM186X_AUXADC_DATA_LSB		(PCM186X_PAGE_BASE(0) +  89)
    108. 

  108. #define PCM186X_AUXADC_DATA_MSB		(PCM186X_PAGE_BASE(0) +  90)
    109. 

  109. #define PCM186X_INT_ENABLE		(PCM186X_PAGE_BASE(0) +  96)
    110. 

  110. #define PCM186X_INT_FLAG		(PCM186X_PAGE_BASE(0) +  97)
    111. 

  111. #define PCM186X_INT_POL_WIDTH		(PCM186X_PAGE_BASE(0) +  98)
    112. 

  112. #define PCM186X_POWER_CTRL		(PCM186X_PAGE_BASE(0) + 112)
    113. 

  113. #define PCM186X_FILTER_MUTE_CTRL	(PCM186X_PAGE_BASE(0) + 113)
    114. 

  114. #define PCM186X_DEVICE_STATUS		(PCM186X_PAGE_BASE(0) + 114)
    115. 

  115. #define PCM186X_FSAMPLE_STATUS		(PCM186X_PAGE_BASE(0) + 115)
    116. 

  116. #define PCM186X_DIV_STATUS		(PCM186X_PAGE_BASE(0) + 116)
    117. 

  117. #define PCM186X_CLK_STATUS		(PCM186X_PAGE_BASE(0) + 117)
    118. 

  118. #define PCM186X_SUPPLY_STATUS		(PCM186X_PAGE_BASE(0) + 120)
    119. 

  119. 

  120. /* Register Definitions - Page 1 */
    121. 

  121. #define PCM186X_MMAP_STAT_CTRL		(PCM186X_PAGE_BASE(1) +   1)
    122. 

  122. #define PCM186X_MMAP_ADDRESS		(PCM186X_PAGE_BASE(1) +   2)
    123. 

  123. #define PCM186X_MEM_WDATA0		(PCM186X_PAGE_BASE(1) +   4)
    124. 

  124. #define PCM186X_MEM_WDATA1		(PCM186X_PAGE_BASE(1) +   5)
    125. 

  125. #define PCM186X_MEM_WDATA2		(PCM186X_PAGE_BASE(1) +   6)
    126. 

  126. #define PCM186X_MEM_WDATA3		(PCM186X_PAGE_BASE(1) +   7)
    127. 

  127. #define PCM186X_MEM_RDATA0		(PCM186X_PAGE_BASE(1) +   8)
    128. 

  128. #define PCM186X_MEM_RDATA1		(PCM186X_PAGE_BASE(1) +   9)
    129. 

  129. #define PCM186X_MEM_RDATA2		(PCM186X_PAGE_BASE(1) +  10)
    130. 

  130. #define PCM186X_MEM_RDATA3		(PCM186X_PAGE_BASE(1) +  11)
    131. 

  131. 

  132. /* Register Definitions - Page 3 */
    133. 

  133. #define PCM186X_OSC_PWR_DOWN_CTRL	(PCM186X_PAGE_BASE(3) +  18)
    134. 

  134. #define PCM186X_MIC_BIAS_CTRL		(PCM186X_PAGE_BASE(3) +  21)
    135. 

  135. 

  136. /* Register Definitions - Page 253 */
    137. 

  137. #define PCM186X_CURR_TRIM_CTRL		(PCM186X_PAGE_BASE(253) +  20)
    138. 

  138. 

  139. #define PCM186X_MAX_REGISTER		PCM186X_CURR_TRIM_CTRL
    140. 

  140. 

  141. /* PCM186X_PAGE */
    142. 

  142. #define PCM186X_RESET			0xfe
    143. 

  143. 

  144. /* PCM186X_ADCX_INPUT_SEL_X */
    145. 

  145. #define PCM186X_ADC_INPUT_SEL_POL	BIT(7)
    146. 

  146. #define PCM186X_ADC_INPUT_SEL_MASK	GENMASK(5, 0)
    147. 

  147. 

  148. /* PCM186X_PCM_CFG */
    149. 

  149. #define PCM186X_PCM_CFG_RX_WLEN_MASK	GENMASK(7, 6)
    150. 

  150. #define PCM186X_PCM_CFG_RX_WLEN_SHIFT	6
    151. 

  151. #define PCM186X_PCM_CFG_RX_WLEN_32	0x00
    152. 

  152. #define PCM186X_PCM_CFG_RX_WLEN_24	0x01
    153. 

  153. #define PCM186X_PCM_CFG_RX_WLEN_20	0x02
    154. 

  154. #define PCM186X_PCM_CFG_RX_WLEN_16	0x03
    155. 

  155. #define PCM186X_PCM_CFG_TDM_LRCK_MODE	BIT(4)
    156. 

  156. #define PCM186X_PCM_CFG_TX_WLEN_MASK	GENMASK(3, 2)
    157. 

  157. #define PCM186X_PCM_CFG_TX_WLEN_SHIFT	2
    158. 

  158. #define PCM186X_PCM_CFG_TX_WLEN_32	0x00
    159. 

  159. #define PCM186X_PCM_CFG_TX_WLEN_24	0x01
    160. 

  160. #define PCM186X_PCM_CFG_TX_WLEN_20	0x02
    161. 

  161. #define PCM186X_PCM_CFG_TX_WLEN_16	0x03
    162. 

  162. #define PCM186X_PCM_CFG_FMT_MASK	GENMASK(1, 0)
    163. 

  163. #define PCM186X_PCM_CFG_FMT_SHIFT	0
    164. 

  164. #define PCM186X_PCM_CFG_FMT_I2S		0x00
    165. 

  165. #define PCM186X_PCM_CFG_FMT_LEFTJ	0x01
    166. 

  166. #define PCM186X_PCM_CFG_FMT_RIGHTJ	0x02
    167. 

  167. #define PCM186X_PCM_CFG_FMT_TDM		0x03
    168. 

  168. 

  169. /* PCM186X_TDM_TX_SEL */
    170. 

  170. #define PCM186X_TDM_TX_SEL_2CH		0x00
    171. 

  171. #define PCM186X_TDM_TX_SEL_4CH		0x01
    172. 

  172. #define PCM186X_TDM_TX_SEL_6CH		0x02
    173. 

  173. #define PCM186X_TDM_TX_SEL_MASK		0x03
    174. 

  174. 

  175. /* PCM186X_CLK_CTRL */
    176. 

  176. #define PCM186X_CLK_CTRL_SCK_XI_SEL1	BIT(7)
    177. 

  177. #define PCM186X_CLK_CTRL_SCK_XI_SEL0	BIT(6)
    178. 

  178. #define PCM186X_CLK_CTRL_SCK_SRC_PLL	BIT(5)
    179. 

  179. #define PCM186X_CLK_CTRL_MST_MODE	BIT(4)
    180. 

  180. #define PCM186X_CLK_CTRL_ADC_SRC_PLL	BIT(3)
    181. 

  181. #define PCM186X_CLK_CTRL_DSP2_SRC_PLL	BIT(2)
    182. 

  182. #define PCM186X_CLK_CTRL_DSP1_SRC_PLL	BIT(1)
    183. 

  183. #define PCM186X_CLK_CTRL_CLKDET_EN	BIT(0)
    184. 

  184. 

  185. /* PCM186X_PLL_CTRL */
    186. 

  186. #define PCM186X_PLL_CTRL_LOCK		BIT(4)
    187. 

  187. #define PCM186X_PLL_CTRL_REF_SEL	BIT(1)
    188. 

  188. #define PCM186X_PLL_CTRL_EN		BIT(0)
    189. 

  189. 

  190. /* PCM186X_POWER_CTRL */
    191. 

  191. #define PCM186X_PWR_CTRL_PWRDN		BIT(2)
    192. 

  192. #define PCM186X_PWR_CTRL_SLEEP		BIT(1)
    193. 

  193. #define PCM186X_PWR_CTRL_STBY		BIT(0)
    194. 

  194. 

  195. /* PCM186X_CLK_STATUS */
    196. 

  196. #define PCM186X_CLK_STATUS_LRCKHLT	BIT(6)
    197. 

  197. #define PCM186X_CLK_STATUS_BCKHLT	BIT(5)
    198. 

  198. #define PCM186X_CLK_STATUS_SCKHLT	BIT(4)
    199. 

  199. #define PCM186X_CLK_STATUS_LRCKERR	BIT(2)
    200. 

  200. #define PCM186X_CLK_STATUS_BCKERR	BIT(1)
    201. 

  201. #define PCM186X_CLK_STATUS_SCKERR	BIT(0)
    202. 

  202. 

  203. /* PCM186X_SUPPLY_STATUS */
    204. 

  204. #define PCM186X_SUPPLY_STATUS_DVDD	BIT(2)
    205. 

  205. #define PCM186X_SUPPLY_STATUS_AVDD	BIT(1)
    206. 

  206. #define PCM186X_SUPPLY_STATUS_LDO	BIT(0)
    207. 

  207. 

  208. /* PCM186X_MMAP_STAT_CTRL */
    209. 

  209. #define PCM186X_MMAP_STAT_DONE		BIT(4)
    210. 

  210. #define PCM186X_MMAP_STAT_BUSY		BIT(2)
    211. 

  211. #define PCM186X_MMAP_STAT_R_REQ		BIT(1)
    212. 

  212. #define PCM186X_MMAP_STAT_W_REQ		BIT(0)
    213. 

  213. 

  214. extern const struct regmap_config pcm186x_regmap;
    215. 

  215. 

  216. int pcm186x_probe(struct device *dev, enum pcm186x_type type, int irq,
    217. 

  217. 		  struct regmap *regmap);
    218. 

  218. 

  219. #endif /* _PCM186X_H_ */
    220.