cros_ec_codec.c 27 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Copyright 2019 Google, Inc.
  4. *
  5. * ChromeOS Embedded Controller codec driver.
  6. *
  7. * This driver uses the cros-ec interface to communicate with the ChromeOS
  8. * EC for audio function.
  9. */
  10. #include <crypto/sha2.h>
  11. #include <linux/acpi.h>
  12. #include <linux/delay.h>
  13. #include <linux/device.h>
  14. #include <linux/io.h>
  15. #include <linux/jiffies.h>
  16. #include <linux/kernel.h>
  17. #include <linux/module.h>
  18. #include <linux/of.h>
  19. #include <linux/of_address.h>
  20. #include <linux/platform_data/cros_ec_commands.h>
  21. #include <linux/platform_data/cros_ec_proto.h>
  22. #include <linux/platform_device.h>
  23. #include <sound/pcm.h>
  24. #include <sound/pcm_params.h>
  25. #include <sound/soc.h>
  26. #include <sound/tlv.h>
  27. struct cros_ec_codec_priv {
  28. struct device *dev;
  29. struct cros_ec_device *ec_device;
  30. /* common */
  31. uint32_t ec_capabilities;
  32. uint64_t ec_shm_addr;
  33. uint32_t ec_shm_len;
  34. uint64_t ap_shm_phys_addr;
  35. uint32_t ap_shm_len;
  36. uint64_t ap_shm_addr;
  37. uint64_t ap_shm_last_alloc;
  38. /* DMIC */
  39. atomic_t dmic_probed;
  40. /* I2S_RX */
  41. uint32_t i2s_rx_bclk_ratio;
  42. /* WoV */
  43. bool wov_enabled;
  44. uint8_t *wov_audio_shm_p;
  45. uint32_t wov_audio_shm_len;
  46. uint8_t wov_audio_shm_type;
  47. uint8_t *wov_lang_shm_p;
  48. uint32_t wov_lang_shm_len;
  49. uint8_t wov_lang_shm_type;
  50. struct mutex wov_dma_lock;
  51. uint8_t wov_buf[64000];
  52. uint32_t wov_rp, wov_wp;
  53. size_t wov_dma_offset;
  54. bool wov_burst_read;
  55. struct snd_pcm_substream *wov_substream;
  56. struct delayed_work wov_copy_work;
  57. struct notifier_block wov_notifier;
  58. };
  59. static int ec_codec_capable(struct cros_ec_codec_priv *priv, uint8_t cap)
  60. {
  61. return priv->ec_capabilities & BIT(cap);
  62. }
  63. static int send_ec_host_command(struct cros_ec_device *ec_dev, uint32_t cmd,
  64. uint8_t *out, size_t outsize,
  65. uint8_t *in, size_t insize)
  66. {
  67. int ret;
  68. struct cros_ec_command *msg;
  69. msg = kmalloc(sizeof(*msg) + max(outsize, insize), GFP_KERNEL);
  70. if (!msg)
  71. return -ENOMEM;
  72. msg->version = 0;
  73. msg->command = cmd;
  74. msg->outsize = outsize;
  75. msg->insize = insize;
  76. if (outsize)
  77. memcpy(msg->data, out, outsize);
  78. ret = cros_ec_cmd_xfer_status(ec_dev, msg);
  79. if (ret < 0)
  80. goto error;
  81. if (in && insize)
  82. memcpy(in, msg->data, insize);
  83. ret = 0;
  84. error:
  85. kfree(msg);
  86. return ret;
  87. }
  88. static int dmic_get_gain(struct snd_kcontrol *kcontrol,
  89. struct snd_ctl_elem_value *ucontrol)
  90. {
  91. struct snd_soc_component *component =
  92. snd_soc_kcontrol_component(kcontrol);
  93. struct cros_ec_codec_priv *priv =
  94. snd_soc_component_get_drvdata(component);
  95. struct ec_param_ec_codec_dmic p;
  96. struct ec_response_ec_codec_dmic_get_gain_idx r;
  97. int ret;
  98. p.cmd = EC_CODEC_DMIC_GET_GAIN_IDX;
  99. p.get_gain_idx_param.channel = EC_CODEC_DMIC_CHANNEL_0;
  100. ret = send_ec_host_command(priv->ec_device, EC_CMD_EC_CODEC_DMIC,
  101. (uint8_t *)&p, sizeof(p),
  102. (uint8_t *)&r, sizeof(r));
  103. if (ret < 0)
  104. return ret;
  105. ucontrol->value.integer.value[0] = r.gain;
  106. p.cmd = EC_CODEC_DMIC_GET_GAIN_IDX;
  107. p.get_gain_idx_param.channel = EC_CODEC_DMIC_CHANNEL_1;
  108. ret = send_ec_host_command(priv->ec_device, EC_CMD_EC_CODEC_DMIC,
  109. (uint8_t *)&p, sizeof(p),
  110. (uint8_t *)&r, sizeof(r));
  111. if (ret < 0)
  112. return ret;
  113. ucontrol->value.integer.value[1] = r.gain;
  114. return 0;
  115. }
  116. static int dmic_put_gain(struct snd_kcontrol *kcontrol,
  117. struct snd_ctl_elem_value *ucontrol)
  118. {
  119. struct snd_soc_component *component =
  120. snd_soc_kcontrol_component(kcontrol);
  121. struct cros_ec_codec_priv *priv =
  122. snd_soc_component_get_drvdata(component);
  123. struct soc_mixer_control *control =
  124. (struct soc_mixer_control *)kcontrol->private_value;
  125. int max_dmic_gain = control->max;
  126. int left = ucontrol->value.integer.value[0];
  127. int right = ucontrol->value.integer.value[1];
  128. struct ec_param_ec_codec_dmic p;
  129. int ret;
  130. if (left > max_dmic_gain || right > max_dmic_gain)
  131. return -EINVAL;
  132. dev_dbg(component->dev, "set mic gain to %u, %u\n", left, right);
  133. p.cmd = EC_CODEC_DMIC_SET_GAIN_IDX;
  134. p.set_gain_idx_param.channel = EC_CODEC_DMIC_CHANNEL_0;
  135. p.set_gain_idx_param.gain = left;
  136. ret = send_ec_host_command(priv->ec_device, EC_CMD_EC_CODEC_DMIC,
  137. (uint8_t *)&p, sizeof(p), NULL, 0);
  138. if (ret < 0)
  139. return ret;
  140. p.cmd = EC_CODEC_DMIC_SET_GAIN_IDX;
  141. p.set_gain_idx_param.channel = EC_CODEC_DMIC_CHANNEL_1;
  142. p.set_gain_idx_param.gain = right;
  143. return send_ec_host_command(priv->ec_device, EC_CMD_EC_CODEC_DMIC,
  144. (uint8_t *)&p, sizeof(p), NULL, 0);
  145. }
  146. static const DECLARE_TLV_DB_SCALE(dmic_gain_tlv, 0, 100, 0);
  147. enum {
  148. DMIC_CTL_GAIN = 0,
  149. };
  150. static struct snd_kcontrol_new dmic_controls[] = {
  151. [DMIC_CTL_GAIN] =
  152. SOC_DOUBLE_EXT_TLV("EC Mic Gain", SND_SOC_NOPM, SND_SOC_NOPM,
  153. 0, 0, 0, dmic_get_gain, dmic_put_gain,
  154. dmic_gain_tlv),
  155. };
  156. static int dmic_probe(struct snd_soc_component *component)
  157. {
  158. struct cros_ec_codec_priv *priv =
  159. snd_soc_component_get_drvdata(component);
  160. struct device *dev = priv->dev;
  161. struct soc_mixer_control *control;
  162. struct ec_param_ec_codec_dmic p;
  163. struct ec_response_ec_codec_dmic_get_max_gain r;
  164. int ret;
  165. if (!atomic_add_unless(&priv->dmic_probed, 1, 1))
  166. return 0;
  167. p.cmd = EC_CODEC_DMIC_GET_MAX_GAIN;
  168. ret = send_ec_host_command(priv->ec_device, EC_CMD_EC_CODEC_DMIC,
  169. (uint8_t *)&p, sizeof(p),
  170. (uint8_t *)&r, sizeof(r));
  171. if (ret < 0) {
  172. dev_warn(dev, "get_max_gain() unsupported\n");
  173. return 0;
  174. }
  175. dev_dbg(dev, "max gain = %d\n", r.max_gain);
  176. control = (struct soc_mixer_control *)
  177. dmic_controls[DMIC_CTL_GAIN].private_value;
  178. control->max = r.max_gain;
  179. control->platform_max = r.max_gain;
  180. return snd_soc_add_component_controls(component,
  181. &dmic_controls[DMIC_CTL_GAIN], 1);
  182. }
  183. static int i2s_rx_hw_params(struct snd_pcm_substream *substream,
  184. struct snd_pcm_hw_params *params,
  185. struct snd_soc_dai *dai)
  186. {
  187. struct snd_soc_component *component = dai->component;
  188. struct cros_ec_codec_priv *priv =
  189. snd_soc_component_get_drvdata(component);
  190. struct ec_param_ec_codec_i2s_rx p;
  191. enum ec_codec_i2s_rx_sample_depth depth;
  192. uint32_t bclk;
  193. int ret;
  194. if (params_rate(params) != 48000)
  195. return -EINVAL;
  196. switch (params_width(params)) {
  197. case 16:
  198. depth = EC_CODEC_I2S_RX_SAMPLE_DEPTH_16;
  199. break;
  200. case 24:
  201. depth = EC_CODEC_I2S_RX_SAMPLE_DEPTH_24;
  202. break;
  203. default:
  204. return -EINVAL;
  205. }
  206. dev_dbg(component->dev, "set depth to %u\n", depth);
  207. p.cmd = EC_CODEC_I2S_RX_SET_SAMPLE_DEPTH;
  208. p.set_sample_depth_param.depth = depth;
  209. ret = send_ec_host_command(priv->ec_device, EC_CMD_EC_CODEC_I2S_RX,
  210. (uint8_t *)&p, sizeof(p), NULL, 0);
  211. if (ret < 0)
  212. return ret;
  213. if (priv->i2s_rx_bclk_ratio)
  214. bclk = params_rate(params) * priv->i2s_rx_bclk_ratio;
  215. else
  216. bclk = snd_soc_params_to_bclk(params);
  217. dev_dbg(component->dev, "set bclk to %u\n", bclk);
  218. p.cmd = EC_CODEC_I2S_RX_SET_BCLK;
  219. p.set_bclk_param.bclk = bclk;
  220. return send_ec_host_command(priv->ec_device, EC_CMD_EC_CODEC_I2S_RX,
  221. (uint8_t *)&p, sizeof(p), NULL, 0);
  222. }
  223. static int i2s_rx_set_bclk_ratio(struct snd_soc_dai *dai, unsigned int ratio)
  224. {
  225. struct snd_soc_component *component = dai->component;
  226. struct cros_ec_codec_priv *priv =
  227. snd_soc_component_get_drvdata(component);
  228. priv->i2s_rx_bclk_ratio = ratio;
  229. return 0;
  230. }
  231. static int i2s_rx_set_fmt(struct snd_soc_dai *dai, unsigned int fmt)
  232. {
  233. struct snd_soc_component *component = dai->component;
  234. struct cros_ec_codec_priv *priv =
  235. snd_soc_component_get_drvdata(component);
  236. struct ec_param_ec_codec_i2s_rx p;
  237. enum ec_codec_i2s_rx_daifmt daifmt;
  238. switch (fmt & SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK) {
  239. case SND_SOC_DAIFMT_CBC_CFC:
  240. break;
  241. default:
  242. return -EINVAL;
  243. }
  244. switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
  245. case SND_SOC_DAIFMT_NB_NF:
  246. break;
  247. default:
  248. return -EINVAL;
  249. }
  250. switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
  251. case SND_SOC_DAIFMT_I2S:
  252. daifmt = EC_CODEC_I2S_RX_DAIFMT_I2S;
  253. break;
  254. case SND_SOC_DAIFMT_RIGHT_J:
  255. daifmt = EC_CODEC_I2S_RX_DAIFMT_RIGHT_J;
  256. break;
  257. case SND_SOC_DAIFMT_LEFT_J:
  258. daifmt = EC_CODEC_I2S_RX_DAIFMT_LEFT_J;
  259. break;
  260. default:
  261. return -EINVAL;
  262. }
  263. dev_dbg(component->dev, "set format to %u\n", daifmt);
  264. p.cmd = EC_CODEC_I2S_RX_SET_DAIFMT;
  265. p.set_daifmt_param.daifmt = daifmt;
  266. return send_ec_host_command(priv->ec_device, EC_CMD_EC_CODEC_I2S_RX,
  267. (uint8_t *)&p, sizeof(p), NULL, 0);
  268. }
  269. static const struct snd_soc_dai_ops i2s_rx_dai_ops = {
  270. .hw_params = i2s_rx_hw_params,
  271. .set_fmt = i2s_rx_set_fmt,
  272. .set_bclk_ratio = i2s_rx_set_bclk_ratio,
  273. };
  274. static int i2s_rx_event(struct snd_soc_dapm_widget *w,
  275. struct snd_kcontrol *kcontrol, int event)
  276. {
  277. struct snd_soc_component *component =
  278. snd_soc_dapm_to_component(w->dapm);
  279. struct cros_ec_codec_priv *priv =
  280. snd_soc_component_get_drvdata(component);
  281. struct ec_param_ec_codec_i2s_rx p = {};
  282. switch (event) {
  283. case SND_SOC_DAPM_PRE_PMU:
  284. dev_dbg(component->dev, "enable I2S RX\n");
  285. p.cmd = EC_CODEC_I2S_RX_ENABLE;
  286. break;
  287. case SND_SOC_DAPM_PRE_PMD:
  288. dev_dbg(component->dev, "disable I2S RX\n");
  289. p.cmd = EC_CODEC_I2S_RX_DISABLE;
  290. break;
  291. default:
  292. return 0;
  293. }
  294. return send_ec_host_command(priv->ec_device, EC_CMD_EC_CODEC_I2S_RX,
  295. (uint8_t *)&p, sizeof(p), NULL, 0);
  296. }
  297. static struct snd_soc_dapm_widget i2s_rx_dapm_widgets[] = {
  298. SND_SOC_DAPM_INPUT("DMIC"),
  299. SND_SOC_DAPM_SUPPLY("I2S RX Enable", SND_SOC_NOPM, 0, 0, i2s_rx_event,
  300. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_PRE_PMD),
  301. SND_SOC_DAPM_AIF_OUT("I2S RX", "I2S Capture", 0, SND_SOC_NOPM, 0, 0),
  302. };
  303. static struct snd_soc_dapm_route i2s_rx_dapm_routes[] = {
  304. {"I2S RX", NULL, "DMIC"},
  305. {"I2S RX", NULL, "I2S RX Enable"},
  306. };
  307. static struct snd_soc_dai_driver i2s_rx_dai_driver = {
  308. .name = "EC Codec I2S RX",
  309. .capture = {
  310. .stream_name = "I2S Capture",
  311. .channels_min = 2,
  312. .channels_max = 2,
  313. .rates = SNDRV_PCM_RATE_48000,
  314. .formats = SNDRV_PCM_FMTBIT_S16_LE |
  315. SNDRV_PCM_FMTBIT_S24_LE,
  316. },
  317. .ops = &i2s_rx_dai_ops,
  318. };
  319. static int i2s_rx_probe(struct snd_soc_component *component)
  320. {
  321. return dmic_probe(component);
  322. }
  323. static const struct snd_soc_component_driver i2s_rx_component_driver = {
  324. .probe = i2s_rx_probe,
  325. .dapm_widgets = i2s_rx_dapm_widgets,
  326. .num_dapm_widgets = ARRAY_SIZE(i2s_rx_dapm_widgets),
  327. .dapm_routes = i2s_rx_dapm_routes,
  328. .num_dapm_routes = ARRAY_SIZE(i2s_rx_dapm_routes),
  329. .endianness = 1,
  330. };
  331. static void *wov_map_shm(struct cros_ec_codec_priv *priv,
  332. uint8_t shm_id, uint32_t *len, uint8_t *type)
  333. {
  334. struct ec_param_ec_codec p;
  335. struct ec_response_ec_codec_get_shm_addr r;
  336. uint32_t req, offset;
  337. p.cmd = EC_CODEC_GET_SHM_ADDR;
  338. p.get_shm_addr_param.shm_id = shm_id;
  339. if (send_ec_host_command(priv->ec_device, EC_CMD_EC_CODEC,
  340. (uint8_t *)&p, sizeof(p),
  341. (uint8_t *)&r, sizeof(r)) < 0) {
  342. dev_err(priv->dev, "failed to EC_CODEC_GET_SHM_ADDR\n");
  343. return NULL;
  344. }
  345. dev_dbg(priv->dev, "phys_addr=%#llx, len=%#x\n", r.phys_addr, r.len);
  346. *len = r.len;
  347. *type = r.type;
  348. switch (r.type) {
  349. case EC_CODEC_SHM_TYPE_EC_RAM:
  350. return (void __force *)devm_ioremap_wc(priv->dev,
  351. r.phys_addr + priv->ec_shm_addr, r.len);
  352. case EC_CODEC_SHM_TYPE_SYSTEM_RAM:
  353. if (r.phys_addr) {
  354. dev_err(priv->dev, "unknown status\n");
  355. return NULL;
  356. }
  357. req = round_up(r.len, PAGE_SIZE);
  358. dev_dbg(priv->dev, "round up from %u to %u\n", r.len, req);
  359. if (priv->ap_shm_last_alloc + req >
  360. priv->ap_shm_phys_addr + priv->ap_shm_len) {
  361. dev_err(priv->dev, "insufficient space for AP SHM\n");
  362. return NULL;
  363. }
  364. dev_dbg(priv->dev, "alloc AP SHM addr=%#llx, len=%#x\n",
  365. priv->ap_shm_last_alloc, req);
  366. p.cmd = EC_CODEC_SET_SHM_ADDR;
  367. p.set_shm_addr_param.phys_addr = priv->ap_shm_last_alloc;
  368. p.set_shm_addr_param.len = req;
  369. p.set_shm_addr_param.shm_id = shm_id;
  370. if (send_ec_host_command(priv->ec_device, EC_CMD_EC_CODEC,
  371. (uint8_t *)&p, sizeof(p),
  372. NULL, 0) < 0) {
  373. dev_err(priv->dev, "failed to EC_CODEC_SET_SHM_ADDR\n");
  374. return NULL;
  375. }
  376. /*
  377. * Note: EC codec only requests for `r.len' but we allocate
  378. * round up PAGE_SIZE `req'.
  379. */
  380. offset = priv->ap_shm_last_alloc - priv->ap_shm_phys_addr;
  381. priv->ap_shm_last_alloc += req;
  382. return (void *)(uintptr_t)(priv->ap_shm_addr + offset);
  383. default:
  384. return NULL;
  385. }
  386. }
  387. static bool wov_queue_full(struct cros_ec_codec_priv *priv)
  388. {
  389. return ((priv->wov_wp + 1) % sizeof(priv->wov_buf)) == priv->wov_rp;
  390. }
  391. static size_t wov_queue_size(struct cros_ec_codec_priv *priv)
  392. {
  393. if (priv->wov_wp >= priv->wov_rp)
  394. return priv->wov_wp - priv->wov_rp;
  395. else
  396. return sizeof(priv->wov_buf) - priv->wov_rp + priv->wov_wp;
  397. }
  398. static void wov_queue_dequeue(struct cros_ec_codec_priv *priv, size_t len)
  399. {
  400. struct snd_pcm_runtime *runtime = priv->wov_substream->runtime;
  401. size_t req;
  402. while (len) {
  403. req = min(len, runtime->dma_bytes - priv->wov_dma_offset);
  404. if (priv->wov_wp >= priv->wov_rp)
  405. req = min(req, (size_t)priv->wov_wp - priv->wov_rp);
  406. else
  407. req = min(req, sizeof(priv->wov_buf) - priv->wov_rp);
  408. memcpy(runtime->dma_area + priv->wov_dma_offset,
  409. priv->wov_buf + priv->wov_rp, req);
  410. priv->wov_dma_offset += req;
  411. if (priv->wov_dma_offset == runtime->dma_bytes)
  412. priv->wov_dma_offset = 0;
  413. priv->wov_rp += req;
  414. if (priv->wov_rp == sizeof(priv->wov_buf))
  415. priv->wov_rp = 0;
  416. len -= req;
  417. }
  418. snd_pcm_period_elapsed(priv->wov_substream);
  419. }
  420. static void wov_queue_try_dequeue(struct cros_ec_codec_priv *priv)
  421. {
  422. size_t period_bytes = snd_pcm_lib_period_bytes(priv->wov_substream);
  423. while (period_bytes && wov_queue_size(priv) >= period_bytes) {
  424. wov_queue_dequeue(priv, period_bytes);
  425. period_bytes = snd_pcm_lib_period_bytes(priv->wov_substream);
  426. }
  427. }
  428. static void wov_queue_enqueue(struct cros_ec_codec_priv *priv,
  429. uint8_t *addr, size_t len, bool iomem)
  430. {
  431. size_t req;
  432. while (len) {
  433. if (wov_queue_full(priv)) {
  434. wov_queue_try_dequeue(priv);
  435. if (wov_queue_full(priv)) {
  436. dev_err(priv->dev, "overrun detected\n");
  437. return;
  438. }
  439. }
  440. if (priv->wov_wp >= priv->wov_rp)
  441. req = sizeof(priv->wov_buf) - priv->wov_wp;
  442. else
  443. /* Note: waste 1-byte to differentiate full and empty */
  444. req = priv->wov_rp - priv->wov_wp - 1;
  445. req = min(req, len);
  446. if (iomem)
  447. memcpy_fromio(priv->wov_buf + priv->wov_wp,
  448. (void __force __iomem *)addr, req);
  449. else
  450. memcpy(priv->wov_buf + priv->wov_wp, addr, req);
  451. priv->wov_wp += req;
  452. if (priv->wov_wp == sizeof(priv->wov_buf))
  453. priv->wov_wp = 0;
  454. addr += req;
  455. len -= req;
  456. }
  457. wov_queue_try_dequeue(priv);
  458. }
  459. static int wov_read_audio_shm(struct cros_ec_codec_priv *priv)
  460. {
  461. struct ec_param_ec_codec_wov p;
  462. struct ec_response_ec_codec_wov_read_audio_shm r;
  463. int ret;
  464. p.cmd = EC_CODEC_WOV_READ_AUDIO_SHM;
  465. ret = send_ec_host_command(priv->ec_device, EC_CMD_EC_CODEC_WOV,
  466. (uint8_t *)&p, sizeof(p),
  467. (uint8_t *)&r, sizeof(r));
  468. if (ret) {
  469. dev_err(priv->dev, "failed to EC_CODEC_WOV_READ_AUDIO_SHM\n");
  470. return ret;
  471. }
  472. if (!r.len)
  473. dev_dbg(priv->dev, "no data, sleep\n");
  474. else
  475. wov_queue_enqueue(priv, priv->wov_audio_shm_p + r.offset, r.len,
  476. priv->wov_audio_shm_type == EC_CODEC_SHM_TYPE_EC_RAM);
  477. return -EAGAIN;
  478. }
  479. static int wov_read_audio(struct cros_ec_codec_priv *priv)
  480. {
  481. struct ec_param_ec_codec_wov p;
  482. struct ec_response_ec_codec_wov_read_audio r;
  483. int remain = priv->wov_burst_read ? 16000 : 320;
  484. int ret;
  485. while (remain >= 0) {
  486. p.cmd = EC_CODEC_WOV_READ_AUDIO;
  487. ret = send_ec_host_command(priv->ec_device, EC_CMD_EC_CODEC_WOV,
  488. (uint8_t *)&p, sizeof(p),
  489. (uint8_t *)&r, sizeof(r));
  490. if (ret) {
  491. dev_err(priv->dev,
  492. "failed to EC_CODEC_WOV_READ_AUDIO\n");
  493. return ret;
  494. }
  495. if (!r.len) {
  496. dev_dbg(priv->dev, "no data, sleep\n");
  497. priv->wov_burst_read = false;
  498. break;
  499. }
  500. wov_queue_enqueue(priv, r.buf, r.len, false);
  501. remain -= r.len;
  502. }
  503. return -EAGAIN;
  504. }
  505. static void wov_copy_work(struct work_struct *w)
  506. {
  507. struct cros_ec_codec_priv *priv =
  508. container_of(w, struct cros_ec_codec_priv, wov_copy_work.work);
  509. int ret;
  510. mutex_lock(&priv->wov_dma_lock);
  511. if (!priv->wov_substream) {
  512. dev_warn(priv->dev, "no pcm substream\n");
  513. goto leave;
  514. }
  515. if (ec_codec_capable(priv, EC_CODEC_CAP_WOV_AUDIO_SHM))
  516. ret = wov_read_audio_shm(priv);
  517. else
  518. ret = wov_read_audio(priv);
  519. if (ret == -EAGAIN)
  520. schedule_delayed_work(&priv->wov_copy_work,
  521. msecs_to_jiffies(10));
  522. else if (ret)
  523. dev_err(priv->dev, "failed to read audio data\n");
  524. leave:
  525. mutex_unlock(&priv->wov_dma_lock);
  526. }
  527. static int wov_enable_get(struct snd_kcontrol *kcontrol,
  528. struct snd_ctl_elem_value *ucontrol)
  529. {
  530. struct snd_soc_component *c = snd_soc_kcontrol_component(kcontrol);
  531. struct cros_ec_codec_priv *priv = snd_soc_component_get_drvdata(c);
  532. ucontrol->value.integer.value[0] = priv->wov_enabled;
  533. return 0;
  534. }
  535. static int wov_enable_put(struct snd_kcontrol *kcontrol,
  536. struct snd_ctl_elem_value *ucontrol)
  537. {
  538. struct snd_soc_component *c = snd_soc_kcontrol_component(kcontrol);
  539. struct cros_ec_codec_priv *priv = snd_soc_component_get_drvdata(c);
  540. int enabled = ucontrol->value.integer.value[0];
  541. struct ec_param_ec_codec_wov p;
  542. int ret;
  543. if (priv->wov_enabled != enabled) {
  544. if (enabled)
  545. p.cmd = EC_CODEC_WOV_ENABLE;
  546. else
  547. p.cmd = EC_CODEC_WOV_DISABLE;
  548. ret = send_ec_host_command(priv->ec_device, EC_CMD_EC_CODEC_WOV,
  549. (uint8_t *)&p, sizeof(p), NULL, 0);
  550. if (ret) {
  551. dev_err(priv->dev, "failed to %s wov\n",
  552. enabled ? "enable" : "disable");
  553. return ret;
  554. }
  555. priv->wov_enabled = enabled;
  556. }
  557. return 0;
  558. }
  559. static int wov_set_lang_shm(struct cros_ec_codec_priv *priv,
  560. uint8_t *buf, size_t size, uint8_t *digest)
  561. {
  562. struct ec_param_ec_codec_wov p;
  563. struct ec_param_ec_codec_wov_set_lang_shm *pp = &p.set_lang_shm_param;
  564. int ret;
  565. if (size > priv->wov_lang_shm_len) {
  566. dev_err(priv->dev, "no enough SHM size: %d\n",
  567. priv->wov_lang_shm_len);
  568. return -EIO;
  569. }
  570. switch (priv->wov_lang_shm_type) {
  571. case EC_CODEC_SHM_TYPE_EC_RAM:
  572. memcpy_toio((void __force __iomem *)priv->wov_lang_shm_p,
  573. buf, size);
  574. memset_io((void __force __iomem *)priv->wov_lang_shm_p + size,
  575. 0, priv->wov_lang_shm_len - size);
  576. break;
  577. case EC_CODEC_SHM_TYPE_SYSTEM_RAM:
  578. memcpy(priv->wov_lang_shm_p, buf, size);
  579. memset(priv->wov_lang_shm_p + size, 0,
  580. priv->wov_lang_shm_len - size);
  581. /* make sure write to memory before calling host command */
  582. wmb();
  583. break;
  584. }
  585. p.cmd = EC_CODEC_WOV_SET_LANG_SHM;
  586. memcpy(pp->hash, digest, SHA256_DIGEST_SIZE);
  587. pp->total_len = size;
  588. ret = send_ec_host_command(priv->ec_device, EC_CMD_EC_CODEC_WOV,
  589. (uint8_t *)&p, sizeof(p), NULL, 0);
  590. if (ret) {
  591. dev_err(priv->dev, "failed to EC_CODEC_WOV_SET_LANG_SHM\n");
  592. return ret;
  593. }
  594. return 0;
  595. }
  596. static int wov_set_lang(struct cros_ec_codec_priv *priv,
  597. uint8_t *buf, size_t size, uint8_t *digest)
  598. {
  599. struct ec_param_ec_codec_wov p;
  600. struct ec_param_ec_codec_wov_set_lang *pp = &p.set_lang_param;
  601. size_t i, req;
  602. int ret;
  603. for (i = 0; i < size; i += req) {
  604. req = min(size - i, ARRAY_SIZE(pp->buf));
  605. p.cmd = EC_CODEC_WOV_SET_LANG;
  606. memcpy(pp->hash, digest, SHA256_DIGEST_SIZE);
  607. pp->total_len = size;
  608. pp->offset = i;
  609. memcpy(pp->buf, buf + i, req);
  610. pp->len = req;
  611. ret = send_ec_host_command(priv->ec_device, EC_CMD_EC_CODEC_WOV,
  612. (uint8_t *)&p, sizeof(p), NULL, 0);
  613. if (ret) {
  614. dev_err(priv->dev, "failed to EC_CODEC_WOV_SET_LANG\n");
  615. return ret;
  616. }
  617. }
  618. return 0;
  619. }
  620. static int wov_hotword_model_put(struct snd_kcontrol *kcontrol,
  621. const unsigned int __user *bytes,
  622. unsigned int size)
  623. {
  624. struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
  625. struct cros_ec_codec_priv *priv =
  626. snd_soc_component_get_drvdata(component);
  627. struct ec_param_ec_codec_wov p;
  628. struct ec_response_ec_codec_wov_get_lang r;
  629. uint8_t digest[SHA256_DIGEST_SIZE];
  630. uint8_t *buf;
  631. int ret;
  632. /* Skips the TLV header. */
  633. bytes += 2;
  634. size -= 8;
  635. dev_dbg(priv->dev, "%s: size=%d\n", __func__, size);
  636. buf = memdup_user(bytes, size);
  637. if (IS_ERR(buf))
  638. return PTR_ERR(buf);
  639. sha256(buf, size, digest);
  640. dev_dbg(priv->dev, "hash=%*phN\n", SHA256_DIGEST_SIZE, digest);
  641. p.cmd = EC_CODEC_WOV_GET_LANG;
  642. ret = send_ec_host_command(priv->ec_device, EC_CMD_EC_CODEC_WOV,
  643. (uint8_t *)&p, sizeof(p),
  644. (uint8_t *)&r, sizeof(r));
  645. if (ret)
  646. goto leave;
  647. if (memcmp(digest, r.hash, SHA256_DIGEST_SIZE) == 0) {
  648. dev_dbg(priv->dev, "not updated");
  649. goto leave;
  650. }
  651. if (ec_codec_capable(priv, EC_CODEC_CAP_WOV_LANG_SHM))
  652. ret = wov_set_lang_shm(priv, buf, size, digest);
  653. else
  654. ret = wov_set_lang(priv, buf, size, digest);
  655. leave:
  656. kfree(buf);
  657. return ret;
  658. }
  659. static struct snd_kcontrol_new wov_controls[] = {
  660. SOC_SINGLE_BOOL_EXT("Wake-on-Voice Switch", 0,
  661. wov_enable_get, wov_enable_put),
  662. SND_SOC_BYTES_TLV("Hotword Model", 0x11000, NULL,
  663. wov_hotword_model_put),
  664. };
  665. static struct snd_soc_dai_driver wov_dai_driver = {
  666. .name = "Wake on Voice",
  667. .capture = {
  668. .stream_name = "WoV Capture",
  669. .channels_min = 1,
  670. .channels_max = 1,
  671. .rates = SNDRV_PCM_RATE_16000,
  672. .formats = SNDRV_PCM_FMTBIT_S16_LE,
  673. },
  674. };
  675. static int wov_host_event(struct notifier_block *nb,
  676. unsigned long queued_during_suspend, void *notify)
  677. {
  678. struct cros_ec_codec_priv *priv =
  679. container_of(nb, struct cros_ec_codec_priv, wov_notifier);
  680. u32 host_event;
  681. dev_dbg(priv->dev, "%s\n", __func__);
  682. host_event = cros_ec_get_host_event(priv->ec_device);
  683. if (host_event & EC_HOST_EVENT_MASK(EC_HOST_EVENT_WOV)) {
  684. schedule_delayed_work(&priv->wov_copy_work, 0);
  685. return NOTIFY_OK;
  686. } else {
  687. return NOTIFY_DONE;
  688. }
  689. }
  690. static int wov_probe(struct snd_soc_component *component)
  691. {
  692. struct cros_ec_codec_priv *priv =
  693. snd_soc_component_get_drvdata(component);
  694. int ret;
  695. mutex_init(&priv->wov_dma_lock);
  696. INIT_DELAYED_WORK(&priv->wov_copy_work, wov_copy_work);
  697. priv->wov_notifier.notifier_call = wov_host_event;
  698. ret = blocking_notifier_chain_register(
  699. &priv->ec_device->event_notifier, &priv->wov_notifier);
  700. if (ret)
  701. return ret;
  702. if (ec_codec_capable(priv, EC_CODEC_CAP_WOV_LANG_SHM)) {
  703. priv->wov_lang_shm_p = wov_map_shm(priv,
  704. EC_CODEC_SHM_ID_WOV_LANG,
  705. &priv->wov_lang_shm_len,
  706. &priv->wov_lang_shm_type);
  707. if (!priv->wov_lang_shm_p)
  708. return -EFAULT;
  709. }
  710. if (ec_codec_capable(priv, EC_CODEC_CAP_WOV_AUDIO_SHM)) {
  711. priv->wov_audio_shm_p = wov_map_shm(priv,
  712. EC_CODEC_SHM_ID_WOV_AUDIO,
  713. &priv->wov_audio_shm_len,
  714. &priv->wov_audio_shm_type);
  715. if (!priv->wov_audio_shm_p)
  716. return -EFAULT;
  717. }
  718. return dmic_probe(component);
  719. }
  720. static void wov_remove(struct snd_soc_component *component)
  721. {
  722. struct cros_ec_codec_priv *priv =
  723. snd_soc_component_get_drvdata(component);
  724. blocking_notifier_chain_unregister(
  725. &priv->ec_device->event_notifier, &priv->wov_notifier);
  726. }
  727. static int wov_pcm_open(struct snd_soc_component *component,
  728. struct snd_pcm_substream *substream)
  729. {
  730. static const struct snd_pcm_hardware hw_param = {
  731. .info = SNDRV_PCM_INFO_MMAP |
  732. SNDRV_PCM_INFO_INTERLEAVED |
  733. SNDRV_PCM_INFO_MMAP_VALID,
  734. .formats = SNDRV_PCM_FMTBIT_S16_LE,
  735. .rates = SNDRV_PCM_RATE_16000,
  736. .channels_min = 1,
  737. .channels_max = 1,
  738. .period_bytes_min = PAGE_SIZE,
  739. .period_bytes_max = 0x20000 / 8,
  740. .periods_min = 8,
  741. .periods_max = 8,
  742. .buffer_bytes_max = 0x20000,
  743. };
  744. return snd_soc_set_runtime_hwparams(substream, &hw_param);
  745. }
  746. static int wov_pcm_hw_params(struct snd_soc_component *component,
  747. struct snd_pcm_substream *substream,
  748. struct snd_pcm_hw_params *hw_params)
  749. {
  750. struct cros_ec_codec_priv *priv =
  751. snd_soc_component_get_drvdata(component);
  752. mutex_lock(&priv->wov_dma_lock);
  753. priv->wov_substream = substream;
  754. priv->wov_rp = priv->wov_wp = 0;
  755. priv->wov_dma_offset = 0;
  756. priv->wov_burst_read = true;
  757. mutex_unlock(&priv->wov_dma_lock);
  758. return 0;
  759. }
  760. static int wov_pcm_hw_free(struct snd_soc_component *component,
  761. struct snd_pcm_substream *substream)
  762. {
  763. struct cros_ec_codec_priv *priv =
  764. snd_soc_component_get_drvdata(component);
  765. mutex_lock(&priv->wov_dma_lock);
  766. wov_queue_dequeue(priv, wov_queue_size(priv));
  767. priv->wov_substream = NULL;
  768. mutex_unlock(&priv->wov_dma_lock);
  769. cancel_delayed_work_sync(&priv->wov_copy_work);
  770. return 0;
  771. }
  772. static snd_pcm_uframes_t wov_pcm_pointer(struct snd_soc_component *component,
  773. struct snd_pcm_substream *substream)
  774. {
  775. struct snd_pcm_runtime *runtime = substream->runtime;
  776. struct cros_ec_codec_priv *priv =
  777. snd_soc_component_get_drvdata(component);
  778. return bytes_to_frames(runtime, priv->wov_dma_offset);
  779. }
  780. static int wov_pcm_new(struct snd_soc_component *component,
  781. struct snd_soc_pcm_runtime *rtd)
  782. {
  783. snd_pcm_set_managed_buffer_all(rtd->pcm, SNDRV_DMA_TYPE_VMALLOC,
  784. NULL, 0, 0);
  785. return 0;
  786. }
  787. static const struct snd_soc_component_driver wov_component_driver = {
  788. .probe = wov_probe,
  789. .remove = wov_remove,
  790. .controls = wov_controls,
  791. .num_controls = ARRAY_SIZE(wov_controls),
  792. .open = wov_pcm_open,
  793. .hw_params = wov_pcm_hw_params,
  794. .hw_free = wov_pcm_hw_free,
  795. .pointer = wov_pcm_pointer,
  796. .pcm_construct = wov_pcm_new,
  797. };
  798. static int cros_ec_codec_platform_probe(struct platform_device *pdev)
  799. {
  800. struct device *dev = &pdev->dev;
  801. struct cros_ec_device *ec_device = dev_get_drvdata(pdev->dev.parent);
  802. struct cros_ec_codec_priv *priv;
  803. struct ec_param_ec_codec p;
  804. struct ec_response_ec_codec_get_capabilities r;
  805. int ret;
  806. #ifdef CONFIG_OF
  807. struct device_node *node;
  808. struct resource res;
  809. u64 ec_shm_size;
  810. const __be32 *regaddr_p;
  811. #endif
  812. priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
  813. if (!priv)
  814. return -ENOMEM;
  815. #ifdef CONFIG_OF
  816. regaddr_p = of_get_address(dev->of_node, 0, &ec_shm_size, NULL);
  817. if (regaddr_p) {
  818. priv->ec_shm_addr = of_read_number(regaddr_p, 2);
  819. priv->ec_shm_len = ec_shm_size;
  820. dev_dbg(dev, "ec_shm_addr=%#llx len=%#x\n",
  821. priv->ec_shm_addr, priv->ec_shm_len);
  822. }
  823. node = of_parse_phandle(dev->of_node, "memory-region", 0);
  824. if (node) {
  825. ret = of_address_to_resource(node, 0, &res);
  826. if (!ret) {
  827. priv->ap_shm_phys_addr = res.start;
  828. priv->ap_shm_len = resource_size(&res);
  829. priv->ap_shm_addr =
  830. (uint64_t)(uintptr_t)devm_ioremap_wc(
  831. dev, priv->ap_shm_phys_addr,
  832. priv->ap_shm_len);
  833. priv->ap_shm_last_alloc = priv->ap_shm_phys_addr;
  834. dev_dbg(dev, "ap_shm_phys_addr=%#llx len=%#x\n",
  835. priv->ap_shm_phys_addr, priv->ap_shm_len);
  836. }
  837. of_node_put(node);
  838. }
  839. #endif
  840. priv->dev = dev;
  841. priv->ec_device = ec_device;
  842. atomic_set(&priv->dmic_probed, 0);
  843. p.cmd = EC_CODEC_GET_CAPABILITIES;
  844. ret = send_ec_host_command(priv->ec_device, EC_CMD_EC_CODEC,
  845. (uint8_t *)&p, sizeof(p),
  846. (uint8_t *)&r, sizeof(r));
  847. if (ret) {
  848. dev_err(dev, "failed to EC_CODEC_GET_CAPABILITIES\n");
  849. return ret;
  850. }
  851. priv->ec_capabilities = r.capabilities;
  852. /* Reset EC codec i2s rx. */
  853. p.cmd = EC_CODEC_I2S_RX_RESET;
  854. ret = send_ec_host_command(priv->ec_device, EC_CMD_EC_CODEC_I2S_RX,
  855. (uint8_t *)&p, sizeof(p), NULL, 0);
  856. if (ret == -ENOPROTOOPT) {
  857. dev_info(dev,
  858. "Missing reset command. Please update EC firmware.\n");
  859. } else if (ret) {
  860. dev_err(dev, "failed to EC_CODEC_I2S_RESET: %d\n", ret);
  861. return ret;
  862. }
  863. platform_set_drvdata(pdev, priv);
  864. ret = devm_snd_soc_register_component(dev, &i2s_rx_component_driver,
  865. &i2s_rx_dai_driver, 1);
  866. if (ret)
  867. return ret;
  868. return devm_snd_soc_register_component(dev, &wov_component_driver,
  869. &wov_dai_driver, 1);
  870. }
  871. #ifdef CONFIG_OF
  872. static const struct of_device_id cros_ec_codec_of_match[] = {
  873. { .compatible = "google,cros-ec-codec" },
  874. {},
  875. };
  876. MODULE_DEVICE_TABLE(of, cros_ec_codec_of_match);
  877. #endif
  878. #ifdef CONFIG_ACPI
  879. static const struct acpi_device_id cros_ec_codec_acpi_id[] = {
  880. { "GOOG0013", 0 },
  881. { }
  882. };
  883. MODULE_DEVICE_TABLE(acpi, cros_ec_codec_acpi_id);
  884. #endif
  885. static struct platform_driver cros_ec_codec_platform_driver = {
  886. .driver = {
  887. .name = "cros-ec-codec",
  888. .of_match_table = of_match_ptr(cros_ec_codec_of_match),
  889. .acpi_match_table = ACPI_PTR(cros_ec_codec_acpi_id),
  890. },
  891. .probe = cros_ec_codec_platform_probe,
  892. };
  893. module_platform_driver(cros_ec_codec_platform_driver);
  894. MODULE_LICENSE("GPL v2");
  895. MODULE_DESCRIPTION("ChromeOS EC codec driver");
  896. MODULE_AUTHOR("Cheng-Yi Chiang <[email protected]>");
  897. MODULE_ALIAS("platform:cros-ec-codec");