atiixp_modem.c 33 KB

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  1. // SPDX-License-Identifier: GPL-2.0-or-later
  2. /*
  3. * ALSA driver for ATI IXP 150/200/250 AC97 modem controllers
  4. *
  5. * Copyright (c) 2004 Takashi Iwai <[email protected]>
  6. */
  7. #include <linux/io.h>
  8. #include <linux/delay.h>
  9. #include <linux/interrupt.h>
  10. #include <linux/init.h>
  11. #include <linux/pci.h>
  12. #include <linux/slab.h>
  13. #include <linux/module.h>
  14. #include <linux/mutex.h>
  15. #include <sound/core.h>
  16. #include <sound/pcm.h>
  17. #include <sound/pcm_params.h>
  18. #include <sound/info.h>
  19. #include <sound/ac97_codec.h>
  20. #include <sound/initval.h>
  21. MODULE_AUTHOR("Takashi Iwai <[email protected]>");
  22. MODULE_DESCRIPTION("ATI IXP MC97 controller");
  23. MODULE_LICENSE("GPL");
  24. static int index = -2; /* Exclude the first card */
  25. static char *id = SNDRV_DEFAULT_STR1; /* ID for this card */
  26. static int ac97_clock = 48000;
  27. module_param(index, int, 0444);
  28. MODULE_PARM_DESC(index, "Index value for ATI IXP controller.");
  29. module_param(id, charp, 0444);
  30. MODULE_PARM_DESC(id, "ID string for ATI IXP controller.");
  31. module_param(ac97_clock, int, 0444);
  32. MODULE_PARM_DESC(ac97_clock, "AC'97 codec clock (default 48000Hz).");
  33. /* just for backward compatibility */
  34. static bool enable;
  35. module_param(enable, bool, 0444);
  36. /*
  37. */
  38. #define ATI_REG_ISR 0x00 /* interrupt source */
  39. #define ATI_REG_ISR_MODEM_IN_XRUN (1U<<0)
  40. #define ATI_REG_ISR_MODEM_IN_STATUS (1U<<1)
  41. #define ATI_REG_ISR_MODEM_OUT1_XRUN (1U<<2)
  42. #define ATI_REG_ISR_MODEM_OUT1_STATUS (1U<<3)
  43. #define ATI_REG_ISR_MODEM_OUT2_XRUN (1U<<4)
  44. #define ATI_REG_ISR_MODEM_OUT2_STATUS (1U<<5)
  45. #define ATI_REG_ISR_MODEM_OUT3_XRUN (1U<<6)
  46. #define ATI_REG_ISR_MODEM_OUT3_STATUS (1U<<7)
  47. #define ATI_REG_ISR_PHYS_INTR (1U<<8)
  48. #define ATI_REG_ISR_PHYS_MISMATCH (1U<<9)
  49. #define ATI_REG_ISR_CODEC0_NOT_READY (1U<<10)
  50. #define ATI_REG_ISR_CODEC1_NOT_READY (1U<<11)
  51. #define ATI_REG_ISR_CODEC2_NOT_READY (1U<<12)
  52. #define ATI_REG_ISR_NEW_FRAME (1U<<13)
  53. #define ATI_REG_ISR_MODEM_GPIO_DATA (1U<<14)
  54. #define ATI_REG_IER 0x04 /* interrupt enable */
  55. #define ATI_REG_IER_MODEM_IN_XRUN_EN (1U<<0)
  56. #define ATI_REG_IER_MODEM_STATUS_EN (1U<<1)
  57. #define ATI_REG_IER_MODEM_OUT1_XRUN_EN (1U<<2)
  58. #define ATI_REG_IER_MODEM_OUT2_XRUN_EN (1U<<4)
  59. #define ATI_REG_IER_MODEM_OUT3_XRUN_EN (1U<<6)
  60. #define ATI_REG_IER_PHYS_INTR_EN (1U<<8)
  61. #define ATI_REG_IER_PHYS_MISMATCH_EN (1U<<9)
  62. #define ATI_REG_IER_CODEC0_INTR_EN (1U<<10)
  63. #define ATI_REG_IER_CODEC1_INTR_EN (1U<<11)
  64. #define ATI_REG_IER_CODEC2_INTR_EN (1U<<12)
  65. #define ATI_REG_IER_NEW_FRAME_EN (1U<<13) /* (RO */
  66. #define ATI_REG_IER_MODEM_GPIO_DATA_EN (1U<<14) /* (WO) modem is running */
  67. #define ATI_REG_IER_MODEM_SET_BUS_BUSY (1U<<15)
  68. #define ATI_REG_CMD 0x08 /* command */
  69. #define ATI_REG_CMD_POWERDOWN (1U<<0)
  70. #define ATI_REG_CMD_MODEM_RECEIVE_EN (1U<<1) /* modem only */
  71. #define ATI_REG_CMD_MODEM_SEND1_EN (1U<<2) /* modem only */
  72. #define ATI_REG_CMD_MODEM_SEND2_EN (1U<<3) /* modem only */
  73. #define ATI_REG_CMD_MODEM_SEND3_EN (1U<<4) /* modem only */
  74. #define ATI_REG_CMD_MODEM_STATUS_MEM (1U<<5) /* modem only */
  75. #define ATI_REG_CMD_MODEM_IN_DMA_EN (1U<<8) /* modem only */
  76. #define ATI_REG_CMD_MODEM_OUT_DMA1_EN (1U<<9) /* modem only */
  77. #define ATI_REG_CMD_MODEM_OUT_DMA2_EN (1U<<10) /* modem only */
  78. #define ATI_REG_CMD_MODEM_OUT_DMA3_EN (1U<<11) /* modem only */
  79. #define ATI_REG_CMD_AUDIO_PRESENT (1U<<20)
  80. #define ATI_REG_CMD_MODEM_GPIO_THRU_DMA (1U<<22) /* modem only */
  81. #define ATI_REG_CMD_LOOPBACK_EN (1U<<23)
  82. #define ATI_REG_CMD_PACKED_DIS (1U<<24)
  83. #define ATI_REG_CMD_BURST_EN (1U<<25)
  84. #define ATI_REG_CMD_PANIC_EN (1U<<26)
  85. #define ATI_REG_CMD_MODEM_PRESENT (1U<<27)
  86. #define ATI_REG_CMD_ACLINK_ACTIVE (1U<<28)
  87. #define ATI_REG_CMD_AC_SOFT_RESET (1U<<29)
  88. #define ATI_REG_CMD_AC_SYNC (1U<<30)
  89. #define ATI_REG_CMD_AC_RESET (1U<<31)
  90. #define ATI_REG_PHYS_OUT_ADDR 0x0c
  91. #define ATI_REG_PHYS_OUT_CODEC_MASK (3U<<0)
  92. #define ATI_REG_PHYS_OUT_RW (1U<<2)
  93. #define ATI_REG_PHYS_OUT_ADDR_EN (1U<<8)
  94. #define ATI_REG_PHYS_OUT_ADDR_SHIFT 9
  95. #define ATI_REG_PHYS_OUT_DATA_SHIFT 16
  96. #define ATI_REG_PHYS_IN_ADDR 0x10
  97. #define ATI_REG_PHYS_IN_READ_FLAG (1U<<8)
  98. #define ATI_REG_PHYS_IN_ADDR_SHIFT 9
  99. #define ATI_REG_PHYS_IN_DATA_SHIFT 16
  100. #define ATI_REG_SLOTREQ 0x14
  101. #define ATI_REG_COUNTER 0x18
  102. #define ATI_REG_COUNTER_SLOT (3U<<0) /* slot # */
  103. #define ATI_REG_COUNTER_BITCLOCK (31U<<8)
  104. #define ATI_REG_IN_FIFO_THRESHOLD 0x1c
  105. #define ATI_REG_MODEM_IN_DMA_LINKPTR 0x20
  106. #define ATI_REG_MODEM_IN_DMA_DT_START 0x24 /* RO */
  107. #define ATI_REG_MODEM_IN_DMA_DT_NEXT 0x28 /* RO */
  108. #define ATI_REG_MODEM_IN_DMA_DT_CUR 0x2c /* RO */
  109. #define ATI_REG_MODEM_IN_DMA_DT_SIZE 0x30
  110. #define ATI_REG_MODEM_OUT_FIFO 0x34 /* output threshold */
  111. #define ATI_REG_MODEM_OUT1_DMA_THRESHOLD_MASK (0xf<<16)
  112. #define ATI_REG_MODEM_OUT1_DMA_THRESHOLD_SHIFT 16
  113. #define ATI_REG_MODEM_OUT_DMA1_LINKPTR 0x38
  114. #define ATI_REG_MODEM_OUT_DMA2_LINKPTR 0x3c
  115. #define ATI_REG_MODEM_OUT_DMA3_LINKPTR 0x40
  116. #define ATI_REG_MODEM_OUT_DMA1_DT_START 0x44
  117. #define ATI_REG_MODEM_OUT_DMA1_DT_NEXT 0x48
  118. #define ATI_REG_MODEM_OUT_DMA1_DT_CUR 0x4c
  119. #define ATI_REG_MODEM_OUT_DMA2_DT_START 0x50
  120. #define ATI_REG_MODEM_OUT_DMA2_DT_NEXT 0x54
  121. #define ATI_REG_MODEM_OUT_DMA2_DT_CUR 0x58
  122. #define ATI_REG_MODEM_OUT_DMA3_DT_START 0x5c
  123. #define ATI_REG_MODEM_OUT_DMA3_DT_NEXT 0x60
  124. #define ATI_REG_MODEM_OUT_DMA3_DT_CUR 0x64
  125. #define ATI_REG_MODEM_OUT_DMA12_DT_SIZE 0x68
  126. #define ATI_REG_MODEM_OUT_DMA3_DT_SIZE 0x6c
  127. #define ATI_REG_MODEM_OUT_FIFO_USED 0x70
  128. #define ATI_REG_MODEM_OUT_GPIO 0x74
  129. #define ATI_REG_MODEM_OUT_GPIO_EN 1
  130. #define ATI_REG_MODEM_OUT_GPIO_DATA_SHIFT 5
  131. #define ATI_REG_MODEM_IN_GPIO 0x78
  132. #define ATI_REG_MODEM_MIRROR 0x7c
  133. #define ATI_REG_AUDIO_MIRROR 0x80
  134. #define ATI_REG_MODEM_FIFO_FLUSH 0x88
  135. #define ATI_REG_MODEM_FIFO_OUT1_FLUSH (1U<<0)
  136. #define ATI_REG_MODEM_FIFO_OUT2_FLUSH (1U<<1)
  137. #define ATI_REG_MODEM_FIFO_OUT3_FLUSH (1U<<2)
  138. #define ATI_REG_MODEM_FIFO_IN_FLUSH (1U<<3)
  139. /* LINKPTR */
  140. #define ATI_REG_LINKPTR_EN (1U<<0)
  141. #define ATI_MAX_DESCRIPTORS 256 /* max number of descriptor packets */
  142. struct atiixp_modem;
  143. /*
  144. * DMA packate descriptor
  145. */
  146. struct atiixp_dma_desc {
  147. __le32 addr; /* DMA buffer address */
  148. u16 status; /* status bits */
  149. u16 size; /* size of the packet in dwords */
  150. __le32 next; /* address of the next packet descriptor */
  151. };
  152. /*
  153. * stream enum
  154. */
  155. enum { ATI_DMA_PLAYBACK, ATI_DMA_CAPTURE, NUM_ATI_DMAS }; /* DMAs */
  156. enum { ATI_PCM_OUT, ATI_PCM_IN, NUM_ATI_PCMS }; /* AC97 pcm slots */
  157. enum { ATI_PCMDEV_ANALOG, NUM_ATI_PCMDEVS }; /* pcm devices */
  158. #define NUM_ATI_CODECS 3
  159. /*
  160. * constants and callbacks for each DMA type
  161. */
  162. struct atiixp_dma_ops {
  163. int type; /* ATI_DMA_XXX */
  164. unsigned int llp_offset; /* LINKPTR offset */
  165. unsigned int dt_cur; /* DT_CUR offset */
  166. /* called from open callback */
  167. void (*enable_dma)(struct atiixp_modem *chip, int on);
  168. /* called from trigger (START/STOP) */
  169. void (*enable_transfer)(struct atiixp_modem *chip, int on);
  170. /* called from trigger (STOP only) */
  171. void (*flush_dma)(struct atiixp_modem *chip);
  172. };
  173. /*
  174. * DMA stream
  175. */
  176. struct atiixp_dma {
  177. const struct atiixp_dma_ops *ops;
  178. struct snd_dma_buffer desc_buf;
  179. struct snd_pcm_substream *substream; /* assigned PCM substream */
  180. unsigned int buf_addr, buf_bytes; /* DMA buffer address, bytes */
  181. unsigned int period_bytes, periods;
  182. int opened;
  183. int running;
  184. int pcm_open_flag;
  185. int ac97_pcm_type; /* index # of ac97_pcm to access, -1 = not used */
  186. };
  187. /*
  188. * ATI IXP chip
  189. */
  190. struct atiixp_modem {
  191. struct snd_card *card;
  192. struct pci_dev *pci;
  193. struct resource *res; /* memory i/o */
  194. unsigned long addr;
  195. void __iomem *remap_addr;
  196. int irq;
  197. struct snd_ac97_bus *ac97_bus;
  198. struct snd_ac97 *ac97[NUM_ATI_CODECS];
  199. spinlock_t reg_lock;
  200. struct atiixp_dma dmas[NUM_ATI_DMAS];
  201. struct ac97_pcm *pcms[NUM_ATI_PCMS];
  202. struct snd_pcm *pcmdevs[NUM_ATI_PCMDEVS];
  203. int max_channels; /* max. channels for PCM out */
  204. unsigned int codec_not_ready_bits; /* for codec detection */
  205. int spdif_over_aclink; /* passed from the module option */
  206. struct mutex open_mutex; /* playback open mutex */
  207. };
  208. /*
  209. */
  210. static const struct pci_device_id snd_atiixp_ids[] = {
  211. { PCI_VDEVICE(ATI, 0x434d), 0 }, /* SB200 */
  212. { PCI_VDEVICE(ATI, 0x4378), 0 }, /* SB400 */
  213. { 0, }
  214. };
  215. MODULE_DEVICE_TABLE(pci, snd_atiixp_ids);
  216. /*
  217. * lowlevel functions
  218. */
  219. /*
  220. * update the bits of the given register.
  221. * return 1 if the bits changed.
  222. */
  223. static int snd_atiixp_update_bits(struct atiixp_modem *chip, unsigned int reg,
  224. unsigned int mask, unsigned int value)
  225. {
  226. void __iomem *addr = chip->remap_addr + reg;
  227. unsigned int data, old_data;
  228. old_data = data = readl(addr);
  229. data &= ~mask;
  230. data |= value;
  231. if (old_data == data)
  232. return 0;
  233. writel(data, addr);
  234. return 1;
  235. }
  236. /*
  237. * macros for easy use
  238. */
  239. #define atiixp_write(chip,reg,value) \
  240. writel(value, chip->remap_addr + ATI_REG_##reg)
  241. #define atiixp_read(chip,reg) \
  242. readl(chip->remap_addr + ATI_REG_##reg)
  243. #define atiixp_update(chip,reg,mask,val) \
  244. snd_atiixp_update_bits(chip, ATI_REG_##reg, mask, val)
  245. /*
  246. * handling DMA packets
  247. *
  248. * we allocate a linear buffer for the DMA, and split it to each packet.
  249. * in a future version, a scatter-gather buffer should be implemented.
  250. */
  251. #define ATI_DESC_LIST_SIZE \
  252. PAGE_ALIGN(ATI_MAX_DESCRIPTORS * sizeof(struct atiixp_dma_desc))
  253. /*
  254. * build packets ring for the given buffer size.
  255. *
  256. * IXP handles the buffer descriptors, which are connected as a linked
  257. * list. although we can change the list dynamically, in this version,
  258. * a static RING of buffer descriptors is used.
  259. *
  260. * the ring is built in this function, and is set up to the hardware.
  261. */
  262. static int atiixp_build_dma_packets(struct atiixp_modem *chip,
  263. struct atiixp_dma *dma,
  264. struct snd_pcm_substream *substream,
  265. unsigned int periods,
  266. unsigned int period_bytes)
  267. {
  268. unsigned int i;
  269. u32 addr, desc_addr;
  270. unsigned long flags;
  271. if (periods > ATI_MAX_DESCRIPTORS)
  272. return -ENOMEM;
  273. if (dma->desc_buf.area == NULL) {
  274. if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, &chip->pci->dev,
  275. ATI_DESC_LIST_SIZE, &dma->desc_buf) < 0)
  276. return -ENOMEM;
  277. dma->period_bytes = dma->periods = 0; /* clear */
  278. }
  279. if (dma->periods == periods && dma->period_bytes == period_bytes)
  280. return 0;
  281. /* reset DMA before changing the descriptor table */
  282. spin_lock_irqsave(&chip->reg_lock, flags);
  283. writel(0, chip->remap_addr + dma->ops->llp_offset);
  284. dma->ops->enable_dma(chip, 0);
  285. dma->ops->enable_dma(chip, 1);
  286. spin_unlock_irqrestore(&chip->reg_lock, flags);
  287. /* fill the entries */
  288. addr = (u32)substream->runtime->dma_addr;
  289. desc_addr = (u32)dma->desc_buf.addr;
  290. for (i = 0; i < periods; i++) {
  291. struct atiixp_dma_desc *desc;
  292. desc = &((struct atiixp_dma_desc *)dma->desc_buf.area)[i];
  293. desc->addr = cpu_to_le32(addr);
  294. desc->status = 0;
  295. desc->size = period_bytes >> 2; /* in dwords */
  296. desc_addr += sizeof(struct atiixp_dma_desc);
  297. if (i == periods - 1)
  298. desc->next = cpu_to_le32((u32)dma->desc_buf.addr);
  299. else
  300. desc->next = cpu_to_le32(desc_addr);
  301. addr += period_bytes;
  302. }
  303. writel((u32)dma->desc_buf.addr | ATI_REG_LINKPTR_EN,
  304. chip->remap_addr + dma->ops->llp_offset);
  305. dma->period_bytes = period_bytes;
  306. dma->periods = periods;
  307. return 0;
  308. }
  309. /*
  310. * remove the ring buffer and release it if assigned
  311. */
  312. static void atiixp_clear_dma_packets(struct atiixp_modem *chip,
  313. struct atiixp_dma *dma,
  314. struct snd_pcm_substream *substream)
  315. {
  316. if (dma->desc_buf.area) {
  317. writel(0, chip->remap_addr + dma->ops->llp_offset);
  318. snd_dma_free_pages(&dma->desc_buf);
  319. dma->desc_buf.area = NULL;
  320. }
  321. }
  322. /*
  323. * AC97 interface
  324. */
  325. static int snd_atiixp_acquire_codec(struct atiixp_modem *chip)
  326. {
  327. int timeout = 1000;
  328. while (atiixp_read(chip, PHYS_OUT_ADDR) & ATI_REG_PHYS_OUT_ADDR_EN) {
  329. if (! timeout--) {
  330. dev_warn(chip->card->dev, "codec acquire timeout\n");
  331. return -EBUSY;
  332. }
  333. udelay(1);
  334. }
  335. return 0;
  336. }
  337. static unsigned short snd_atiixp_codec_read(struct atiixp_modem *chip,
  338. unsigned short codec,
  339. unsigned short reg)
  340. {
  341. unsigned int data;
  342. int timeout;
  343. if (snd_atiixp_acquire_codec(chip) < 0)
  344. return 0xffff;
  345. data = (reg << ATI_REG_PHYS_OUT_ADDR_SHIFT) |
  346. ATI_REG_PHYS_OUT_ADDR_EN |
  347. ATI_REG_PHYS_OUT_RW |
  348. codec;
  349. atiixp_write(chip, PHYS_OUT_ADDR, data);
  350. if (snd_atiixp_acquire_codec(chip) < 0)
  351. return 0xffff;
  352. timeout = 1000;
  353. do {
  354. data = atiixp_read(chip, PHYS_IN_ADDR);
  355. if (data & ATI_REG_PHYS_IN_READ_FLAG)
  356. return data >> ATI_REG_PHYS_IN_DATA_SHIFT;
  357. udelay(1);
  358. } while (--timeout);
  359. /* time out may happen during reset */
  360. if (reg < 0x7c)
  361. dev_warn(chip->card->dev, "codec read timeout (reg %x)\n", reg);
  362. return 0xffff;
  363. }
  364. static void snd_atiixp_codec_write(struct atiixp_modem *chip,
  365. unsigned short codec,
  366. unsigned short reg, unsigned short val)
  367. {
  368. unsigned int data;
  369. if (snd_atiixp_acquire_codec(chip) < 0)
  370. return;
  371. data = ((unsigned int)val << ATI_REG_PHYS_OUT_DATA_SHIFT) |
  372. ((unsigned int)reg << ATI_REG_PHYS_OUT_ADDR_SHIFT) |
  373. ATI_REG_PHYS_OUT_ADDR_EN | codec;
  374. atiixp_write(chip, PHYS_OUT_ADDR, data);
  375. }
  376. static unsigned short snd_atiixp_ac97_read(struct snd_ac97 *ac97,
  377. unsigned short reg)
  378. {
  379. struct atiixp_modem *chip = ac97->private_data;
  380. return snd_atiixp_codec_read(chip, ac97->num, reg);
  381. }
  382. static void snd_atiixp_ac97_write(struct snd_ac97 *ac97, unsigned short reg,
  383. unsigned short val)
  384. {
  385. struct atiixp_modem *chip = ac97->private_data;
  386. if (reg == AC97_GPIO_STATUS) {
  387. atiixp_write(chip, MODEM_OUT_GPIO,
  388. (val << ATI_REG_MODEM_OUT_GPIO_DATA_SHIFT) | ATI_REG_MODEM_OUT_GPIO_EN);
  389. return;
  390. }
  391. snd_atiixp_codec_write(chip, ac97->num, reg, val);
  392. }
  393. /*
  394. * reset AC link
  395. */
  396. static int snd_atiixp_aclink_reset(struct atiixp_modem *chip)
  397. {
  398. int timeout;
  399. /* reset powerdoewn */
  400. if (atiixp_update(chip, CMD, ATI_REG_CMD_POWERDOWN, 0))
  401. udelay(10);
  402. /* perform a software reset */
  403. atiixp_update(chip, CMD, ATI_REG_CMD_AC_SOFT_RESET, ATI_REG_CMD_AC_SOFT_RESET);
  404. atiixp_read(chip, CMD);
  405. udelay(10);
  406. atiixp_update(chip, CMD, ATI_REG_CMD_AC_SOFT_RESET, 0);
  407. timeout = 10;
  408. while (! (atiixp_read(chip, CMD) & ATI_REG_CMD_ACLINK_ACTIVE)) {
  409. /* do a hard reset */
  410. atiixp_update(chip, CMD, ATI_REG_CMD_AC_SYNC|ATI_REG_CMD_AC_RESET,
  411. ATI_REG_CMD_AC_SYNC);
  412. atiixp_read(chip, CMD);
  413. msleep(1);
  414. atiixp_update(chip, CMD, ATI_REG_CMD_AC_RESET, ATI_REG_CMD_AC_RESET);
  415. if (!--timeout) {
  416. dev_err(chip->card->dev, "codec reset timeout\n");
  417. break;
  418. }
  419. }
  420. /* deassert RESET and assert SYNC to make sure */
  421. atiixp_update(chip, CMD, ATI_REG_CMD_AC_SYNC|ATI_REG_CMD_AC_RESET,
  422. ATI_REG_CMD_AC_SYNC|ATI_REG_CMD_AC_RESET);
  423. return 0;
  424. }
  425. #ifdef CONFIG_PM_SLEEP
  426. static int snd_atiixp_aclink_down(struct atiixp_modem *chip)
  427. {
  428. // if (atiixp_read(chip, MODEM_MIRROR) & 0x1) /* modem running, too? */
  429. // return -EBUSY;
  430. atiixp_update(chip, CMD,
  431. ATI_REG_CMD_POWERDOWN | ATI_REG_CMD_AC_RESET,
  432. ATI_REG_CMD_POWERDOWN);
  433. return 0;
  434. }
  435. #endif
  436. /*
  437. * auto-detection of codecs
  438. *
  439. * the IXP chip can generate interrupts for the non-existing codecs.
  440. * NEW_FRAME interrupt is used to make sure that the interrupt is generated
  441. * even if all three codecs are connected.
  442. */
  443. #define ALL_CODEC_NOT_READY \
  444. (ATI_REG_ISR_CODEC0_NOT_READY |\
  445. ATI_REG_ISR_CODEC1_NOT_READY |\
  446. ATI_REG_ISR_CODEC2_NOT_READY)
  447. #define CODEC_CHECK_BITS (ALL_CODEC_NOT_READY|ATI_REG_ISR_NEW_FRAME)
  448. static int snd_atiixp_codec_detect(struct atiixp_modem *chip)
  449. {
  450. int timeout;
  451. chip->codec_not_ready_bits = 0;
  452. atiixp_write(chip, IER, CODEC_CHECK_BITS);
  453. /* wait for the interrupts */
  454. timeout = 50;
  455. while (timeout-- > 0) {
  456. msleep(1);
  457. if (chip->codec_not_ready_bits)
  458. break;
  459. }
  460. atiixp_write(chip, IER, 0); /* disable irqs */
  461. if ((chip->codec_not_ready_bits & ALL_CODEC_NOT_READY) == ALL_CODEC_NOT_READY) {
  462. dev_err(chip->card->dev, "no codec detected!\n");
  463. return -ENXIO;
  464. }
  465. return 0;
  466. }
  467. /*
  468. * enable DMA and irqs
  469. */
  470. static int snd_atiixp_chip_start(struct atiixp_modem *chip)
  471. {
  472. unsigned int reg;
  473. /* set up spdif, enable burst mode */
  474. reg = atiixp_read(chip, CMD);
  475. reg |= ATI_REG_CMD_BURST_EN;
  476. if(!(reg & ATI_REG_CMD_MODEM_PRESENT))
  477. reg |= ATI_REG_CMD_MODEM_PRESENT;
  478. atiixp_write(chip, CMD, reg);
  479. /* clear all interrupt source */
  480. atiixp_write(chip, ISR, 0xffffffff);
  481. /* enable irqs */
  482. atiixp_write(chip, IER,
  483. ATI_REG_IER_MODEM_STATUS_EN |
  484. ATI_REG_IER_MODEM_IN_XRUN_EN |
  485. ATI_REG_IER_MODEM_OUT1_XRUN_EN);
  486. return 0;
  487. }
  488. /*
  489. * disable DMA and IRQs
  490. */
  491. static int snd_atiixp_chip_stop(struct atiixp_modem *chip)
  492. {
  493. /* clear interrupt source */
  494. atiixp_write(chip, ISR, atiixp_read(chip, ISR));
  495. /* disable irqs */
  496. atiixp_write(chip, IER, 0);
  497. return 0;
  498. }
  499. /*
  500. * PCM section
  501. */
  502. /*
  503. * pointer callback simplly reads XXX_DMA_DT_CUR register as the current
  504. * position. when SG-buffer is implemented, the offset must be calculated
  505. * correctly...
  506. */
  507. static snd_pcm_uframes_t snd_atiixp_pcm_pointer(struct snd_pcm_substream *substream)
  508. {
  509. struct atiixp_modem *chip = snd_pcm_substream_chip(substream);
  510. struct snd_pcm_runtime *runtime = substream->runtime;
  511. struct atiixp_dma *dma = runtime->private_data;
  512. unsigned int curptr;
  513. int timeout = 1000;
  514. while (timeout--) {
  515. curptr = readl(chip->remap_addr + dma->ops->dt_cur);
  516. if (curptr < dma->buf_addr)
  517. continue;
  518. curptr -= dma->buf_addr;
  519. if (curptr >= dma->buf_bytes)
  520. continue;
  521. return bytes_to_frames(runtime, curptr);
  522. }
  523. dev_dbg(chip->card->dev, "invalid DMA pointer read 0x%x (buf=%x)\n",
  524. readl(chip->remap_addr + dma->ops->dt_cur), dma->buf_addr);
  525. return 0;
  526. }
  527. /*
  528. * XRUN detected, and stop the PCM substream
  529. */
  530. static void snd_atiixp_xrun_dma(struct atiixp_modem *chip,
  531. struct atiixp_dma *dma)
  532. {
  533. if (! dma->substream || ! dma->running)
  534. return;
  535. dev_dbg(chip->card->dev, "XRUN detected (DMA %d)\n", dma->ops->type);
  536. snd_pcm_stop_xrun(dma->substream);
  537. }
  538. /*
  539. * the period ack. update the substream.
  540. */
  541. static void snd_atiixp_update_dma(struct atiixp_modem *chip,
  542. struct atiixp_dma *dma)
  543. {
  544. if (! dma->substream || ! dma->running)
  545. return;
  546. snd_pcm_period_elapsed(dma->substream);
  547. }
  548. /* set BUS_BUSY interrupt bit if any DMA is running */
  549. /* call with spinlock held */
  550. static void snd_atiixp_check_bus_busy(struct atiixp_modem *chip)
  551. {
  552. unsigned int bus_busy;
  553. if (atiixp_read(chip, CMD) & (ATI_REG_CMD_MODEM_SEND1_EN |
  554. ATI_REG_CMD_MODEM_RECEIVE_EN))
  555. bus_busy = ATI_REG_IER_MODEM_SET_BUS_BUSY;
  556. else
  557. bus_busy = 0;
  558. atiixp_update(chip, IER, ATI_REG_IER_MODEM_SET_BUS_BUSY, bus_busy);
  559. }
  560. /* common trigger callback
  561. * calling the lowlevel callbacks in it
  562. */
  563. static int snd_atiixp_pcm_trigger(struct snd_pcm_substream *substream, int cmd)
  564. {
  565. struct atiixp_modem *chip = snd_pcm_substream_chip(substream);
  566. struct atiixp_dma *dma = substream->runtime->private_data;
  567. int err = 0;
  568. if (snd_BUG_ON(!dma->ops->enable_transfer ||
  569. !dma->ops->flush_dma))
  570. return -EINVAL;
  571. spin_lock(&chip->reg_lock);
  572. switch(cmd) {
  573. case SNDRV_PCM_TRIGGER_START:
  574. dma->ops->enable_transfer(chip, 1);
  575. dma->running = 1;
  576. break;
  577. case SNDRV_PCM_TRIGGER_STOP:
  578. dma->ops->enable_transfer(chip, 0);
  579. dma->running = 0;
  580. break;
  581. default:
  582. err = -EINVAL;
  583. break;
  584. }
  585. if (! err) {
  586. snd_atiixp_check_bus_busy(chip);
  587. if (cmd == SNDRV_PCM_TRIGGER_STOP) {
  588. dma->ops->flush_dma(chip);
  589. snd_atiixp_check_bus_busy(chip);
  590. }
  591. }
  592. spin_unlock(&chip->reg_lock);
  593. return err;
  594. }
  595. /*
  596. * lowlevel callbacks for each DMA type
  597. *
  598. * every callback is supposed to be called in chip->reg_lock spinlock
  599. */
  600. /* flush FIFO of analog OUT DMA */
  601. static void atiixp_out_flush_dma(struct atiixp_modem *chip)
  602. {
  603. atiixp_write(chip, MODEM_FIFO_FLUSH, ATI_REG_MODEM_FIFO_OUT1_FLUSH);
  604. }
  605. /* enable/disable analog OUT DMA */
  606. static void atiixp_out_enable_dma(struct atiixp_modem *chip, int on)
  607. {
  608. unsigned int data;
  609. data = atiixp_read(chip, CMD);
  610. if (on) {
  611. if (data & ATI_REG_CMD_MODEM_OUT_DMA1_EN)
  612. return;
  613. atiixp_out_flush_dma(chip);
  614. data |= ATI_REG_CMD_MODEM_OUT_DMA1_EN;
  615. } else
  616. data &= ~ATI_REG_CMD_MODEM_OUT_DMA1_EN;
  617. atiixp_write(chip, CMD, data);
  618. }
  619. /* start/stop transfer over OUT DMA */
  620. static void atiixp_out_enable_transfer(struct atiixp_modem *chip, int on)
  621. {
  622. atiixp_update(chip, CMD, ATI_REG_CMD_MODEM_SEND1_EN,
  623. on ? ATI_REG_CMD_MODEM_SEND1_EN : 0);
  624. }
  625. /* enable/disable analog IN DMA */
  626. static void atiixp_in_enable_dma(struct atiixp_modem *chip, int on)
  627. {
  628. atiixp_update(chip, CMD, ATI_REG_CMD_MODEM_IN_DMA_EN,
  629. on ? ATI_REG_CMD_MODEM_IN_DMA_EN : 0);
  630. }
  631. /* start/stop analog IN DMA */
  632. static void atiixp_in_enable_transfer(struct atiixp_modem *chip, int on)
  633. {
  634. if (on) {
  635. unsigned int data = atiixp_read(chip, CMD);
  636. if (! (data & ATI_REG_CMD_MODEM_RECEIVE_EN)) {
  637. data |= ATI_REG_CMD_MODEM_RECEIVE_EN;
  638. atiixp_write(chip, CMD, data);
  639. }
  640. } else
  641. atiixp_update(chip, CMD, ATI_REG_CMD_MODEM_RECEIVE_EN, 0);
  642. }
  643. /* flush FIFO of analog IN DMA */
  644. static void atiixp_in_flush_dma(struct atiixp_modem *chip)
  645. {
  646. atiixp_write(chip, MODEM_FIFO_FLUSH, ATI_REG_MODEM_FIFO_IN_FLUSH);
  647. }
  648. /* set up slots and formats for analog OUT */
  649. static int snd_atiixp_playback_prepare(struct snd_pcm_substream *substream)
  650. {
  651. struct atiixp_modem *chip = snd_pcm_substream_chip(substream);
  652. unsigned int data;
  653. spin_lock_irq(&chip->reg_lock);
  654. /* set output threshold */
  655. data = atiixp_read(chip, MODEM_OUT_FIFO);
  656. data &= ~ATI_REG_MODEM_OUT1_DMA_THRESHOLD_MASK;
  657. data |= 0x04 << ATI_REG_MODEM_OUT1_DMA_THRESHOLD_SHIFT;
  658. atiixp_write(chip, MODEM_OUT_FIFO, data);
  659. spin_unlock_irq(&chip->reg_lock);
  660. return 0;
  661. }
  662. /* set up slots and formats for analog IN */
  663. static int snd_atiixp_capture_prepare(struct snd_pcm_substream *substream)
  664. {
  665. return 0;
  666. }
  667. /*
  668. * hw_params - allocate the buffer and set up buffer descriptors
  669. */
  670. static int snd_atiixp_pcm_hw_params(struct snd_pcm_substream *substream,
  671. struct snd_pcm_hw_params *hw_params)
  672. {
  673. struct atiixp_modem *chip = snd_pcm_substream_chip(substream);
  674. struct atiixp_dma *dma = substream->runtime->private_data;
  675. int err;
  676. int i;
  677. dma->buf_addr = substream->runtime->dma_addr;
  678. dma->buf_bytes = params_buffer_bytes(hw_params);
  679. err = atiixp_build_dma_packets(chip, dma, substream,
  680. params_periods(hw_params),
  681. params_period_bytes(hw_params));
  682. if (err < 0)
  683. return err;
  684. /* set up modem rate */
  685. for (i = 0; i < NUM_ATI_CODECS; i++) {
  686. if (! chip->ac97[i])
  687. continue;
  688. snd_ac97_write(chip->ac97[i], AC97_LINE1_RATE, params_rate(hw_params));
  689. snd_ac97_write(chip->ac97[i], AC97_LINE1_LEVEL, 0);
  690. }
  691. return err;
  692. }
  693. static int snd_atiixp_pcm_hw_free(struct snd_pcm_substream *substream)
  694. {
  695. struct atiixp_modem *chip = snd_pcm_substream_chip(substream);
  696. struct atiixp_dma *dma = substream->runtime->private_data;
  697. atiixp_clear_dma_packets(chip, dma, substream);
  698. return 0;
  699. }
  700. /*
  701. * pcm hardware definition, identical for all DMA types
  702. */
  703. static const struct snd_pcm_hardware snd_atiixp_pcm_hw =
  704. {
  705. .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
  706. SNDRV_PCM_INFO_BLOCK_TRANSFER |
  707. SNDRV_PCM_INFO_MMAP_VALID),
  708. .formats = SNDRV_PCM_FMTBIT_S16_LE,
  709. .rates = (SNDRV_PCM_RATE_8000 |
  710. SNDRV_PCM_RATE_16000 |
  711. SNDRV_PCM_RATE_KNOT),
  712. .rate_min = 8000,
  713. .rate_max = 16000,
  714. .channels_min = 2,
  715. .channels_max = 2,
  716. .buffer_bytes_max = 256 * 1024,
  717. .period_bytes_min = 32,
  718. .period_bytes_max = 128 * 1024,
  719. .periods_min = 2,
  720. .periods_max = ATI_MAX_DESCRIPTORS,
  721. };
  722. static int snd_atiixp_pcm_open(struct snd_pcm_substream *substream,
  723. struct atiixp_dma *dma, int pcm_type)
  724. {
  725. struct atiixp_modem *chip = snd_pcm_substream_chip(substream);
  726. struct snd_pcm_runtime *runtime = substream->runtime;
  727. int err;
  728. static const unsigned int rates[] = { 8000, 9600, 12000, 16000 };
  729. static const struct snd_pcm_hw_constraint_list hw_constraints_rates = {
  730. .count = ARRAY_SIZE(rates),
  731. .list = rates,
  732. .mask = 0,
  733. };
  734. if (snd_BUG_ON(!dma->ops || !dma->ops->enable_dma))
  735. return -EINVAL;
  736. if (dma->opened)
  737. return -EBUSY;
  738. dma->substream = substream;
  739. runtime->hw = snd_atiixp_pcm_hw;
  740. dma->ac97_pcm_type = pcm_type;
  741. err = snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
  742. &hw_constraints_rates);
  743. if (err < 0)
  744. return err;
  745. err = snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS);
  746. if (err < 0)
  747. return err;
  748. runtime->private_data = dma;
  749. /* enable DMA bits */
  750. spin_lock_irq(&chip->reg_lock);
  751. dma->ops->enable_dma(chip, 1);
  752. spin_unlock_irq(&chip->reg_lock);
  753. dma->opened = 1;
  754. return 0;
  755. }
  756. static int snd_atiixp_pcm_close(struct snd_pcm_substream *substream,
  757. struct atiixp_dma *dma)
  758. {
  759. struct atiixp_modem *chip = snd_pcm_substream_chip(substream);
  760. /* disable DMA bits */
  761. if (snd_BUG_ON(!dma->ops || !dma->ops->enable_dma))
  762. return -EINVAL;
  763. spin_lock_irq(&chip->reg_lock);
  764. dma->ops->enable_dma(chip, 0);
  765. spin_unlock_irq(&chip->reg_lock);
  766. dma->substream = NULL;
  767. dma->opened = 0;
  768. return 0;
  769. }
  770. /*
  771. */
  772. static int snd_atiixp_playback_open(struct snd_pcm_substream *substream)
  773. {
  774. struct atiixp_modem *chip = snd_pcm_substream_chip(substream);
  775. int err;
  776. mutex_lock(&chip->open_mutex);
  777. err = snd_atiixp_pcm_open(substream, &chip->dmas[ATI_DMA_PLAYBACK], 0);
  778. mutex_unlock(&chip->open_mutex);
  779. if (err < 0)
  780. return err;
  781. return 0;
  782. }
  783. static int snd_atiixp_playback_close(struct snd_pcm_substream *substream)
  784. {
  785. struct atiixp_modem *chip = snd_pcm_substream_chip(substream);
  786. int err;
  787. mutex_lock(&chip->open_mutex);
  788. err = snd_atiixp_pcm_close(substream, &chip->dmas[ATI_DMA_PLAYBACK]);
  789. mutex_unlock(&chip->open_mutex);
  790. return err;
  791. }
  792. static int snd_atiixp_capture_open(struct snd_pcm_substream *substream)
  793. {
  794. struct atiixp_modem *chip = snd_pcm_substream_chip(substream);
  795. return snd_atiixp_pcm_open(substream, &chip->dmas[ATI_DMA_CAPTURE], 1);
  796. }
  797. static int snd_atiixp_capture_close(struct snd_pcm_substream *substream)
  798. {
  799. struct atiixp_modem *chip = snd_pcm_substream_chip(substream);
  800. return snd_atiixp_pcm_close(substream, &chip->dmas[ATI_DMA_CAPTURE]);
  801. }
  802. /* AC97 playback */
  803. static const struct snd_pcm_ops snd_atiixp_playback_ops = {
  804. .open = snd_atiixp_playback_open,
  805. .close = snd_atiixp_playback_close,
  806. .hw_params = snd_atiixp_pcm_hw_params,
  807. .hw_free = snd_atiixp_pcm_hw_free,
  808. .prepare = snd_atiixp_playback_prepare,
  809. .trigger = snd_atiixp_pcm_trigger,
  810. .pointer = snd_atiixp_pcm_pointer,
  811. };
  812. /* AC97 capture */
  813. static const struct snd_pcm_ops snd_atiixp_capture_ops = {
  814. .open = snd_atiixp_capture_open,
  815. .close = snd_atiixp_capture_close,
  816. .hw_params = snd_atiixp_pcm_hw_params,
  817. .hw_free = snd_atiixp_pcm_hw_free,
  818. .prepare = snd_atiixp_capture_prepare,
  819. .trigger = snd_atiixp_pcm_trigger,
  820. .pointer = snd_atiixp_pcm_pointer,
  821. };
  822. static const struct atiixp_dma_ops snd_atiixp_playback_dma_ops = {
  823. .type = ATI_DMA_PLAYBACK,
  824. .llp_offset = ATI_REG_MODEM_OUT_DMA1_LINKPTR,
  825. .dt_cur = ATI_REG_MODEM_OUT_DMA1_DT_CUR,
  826. .enable_dma = atiixp_out_enable_dma,
  827. .enable_transfer = atiixp_out_enable_transfer,
  828. .flush_dma = atiixp_out_flush_dma,
  829. };
  830. static const struct atiixp_dma_ops snd_atiixp_capture_dma_ops = {
  831. .type = ATI_DMA_CAPTURE,
  832. .llp_offset = ATI_REG_MODEM_IN_DMA_LINKPTR,
  833. .dt_cur = ATI_REG_MODEM_IN_DMA_DT_CUR,
  834. .enable_dma = atiixp_in_enable_dma,
  835. .enable_transfer = atiixp_in_enable_transfer,
  836. .flush_dma = atiixp_in_flush_dma,
  837. };
  838. static int snd_atiixp_pcm_new(struct atiixp_modem *chip)
  839. {
  840. struct snd_pcm *pcm;
  841. int err;
  842. /* initialize constants */
  843. chip->dmas[ATI_DMA_PLAYBACK].ops = &snd_atiixp_playback_dma_ops;
  844. chip->dmas[ATI_DMA_CAPTURE].ops = &snd_atiixp_capture_dma_ops;
  845. /* PCM #0: analog I/O */
  846. err = snd_pcm_new(chip->card, "ATI IXP MC97", ATI_PCMDEV_ANALOG, 1, 1, &pcm);
  847. if (err < 0)
  848. return err;
  849. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_atiixp_playback_ops);
  850. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_atiixp_capture_ops);
  851. pcm->dev_class = SNDRV_PCM_CLASS_MODEM;
  852. pcm->private_data = chip;
  853. strcpy(pcm->name, "ATI IXP MC97");
  854. chip->pcmdevs[ATI_PCMDEV_ANALOG] = pcm;
  855. snd_pcm_set_managed_buffer_all(pcm, SNDRV_DMA_TYPE_DEV,
  856. &chip->pci->dev, 64*1024, 128*1024);
  857. return 0;
  858. }
  859. /*
  860. * interrupt handler
  861. */
  862. static irqreturn_t snd_atiixp_interrupt(int irq, void *dev_id)
  863. {
  864. struct atiixp_modem *chip = dev_id;
  865. unsigned int status;
  866. status = atiixp_read(chip, ISR);
  867. if (! status)
  868. return IRQ_NONE;
  869. /* process audio DMA */
  870. if (status & ATI_REG_ISR_MODEM_OUT1_XRUN)
  871. snd_atiixp_xrun_dma(chip, &chip->dmas[ATI_DMA_PLAYBACK]);
  872. else if (status & ATI_REG_ISR_MODEM_OUT1_STATUS)
  873. snd_atiixp_update_dma(chip, &chip->dmas[ATI_DMA_PLAYBACK]);
  874. if (status & ATI_REG_ISR_MODEM_IN_XRUN)
  875. snd_atiixp_xrun_dma(chip, &chip->dmas[ATI_DMA_CAPTURE]);
  876. else if (status & ATI_REG_ISR_MODEM_IN_STATUS)
  877. snd_atiixp_update_dma(chip, &chip->dmas[ATI_DMA_CAPTURE]);
  878. /* for codec detection */
  879. if (status & CODEC_CHECK_BITS) {
  880. unsigned int detected;
  881. detected = status & CODEC_CHECK_BITS;
  882. spin_lock(&chip->reg_lock);
  883. chip->codec_not_ready_bits |= detected;
  884. atiixp_update(chip, IER, detected, 0); /* disable the detected irqs */
  885. spin_unlock(&chip->reg_lock);
  886. }
  887. /* ack */
  888. atiixp_write(chip, ISR, status);
  889. return IRQ_HANDLED;
  890. }
  891. /*
  892. * ac97 mixer section
  893. */
  894. static int snd_atiixp_mixer_new(struct atiixp_modem *chip, int clock)
  895. {
  896. struct snd_ac97_bus *pbus;
  897. struct snd_ac97_template ac97;
  898. int i, err;
  899. int codec_count;
  900. static const struct snd_ac97_bus_ops ops = {
  901. .write = snd_atiixp_ac97_write,
  902. .read = snd_atiixp_ac97_read,
  903. };
  904. static const unsigned int codec_skip[NUM_ATI_CODECS] = {
  905. ATI_REG_ISR_CODEC0_NOT_READY,
  906. ATI_REG_ISR_CODEC1_NOT_READY,
  907. ATI_REG_ISR_CODEC2_NOT_READY,
  908. };
  909. if (snd_atiixp_codec_detect(chip) < 0)
  910. return -ENXIO;
  911. err = snd_ac97_bus(chip->card, 0, &ops, chip, &pbus);
  912. if (err < 0)
  913. return err;
  914. pbus->clock = clock;
  915. chip->ac97_bus = pbus;
  916. codec_count = 0;
  917. for (i = 0; i < NUM_ATI_CODECS; i++) {
  918. if (chip->codec_not_ready_bits & codec_skip[i])
  919. continue;
  920. memset(&ac97, 0, sizeof(ac97));
  921. ac97.private_data = chip;
  922. ac97.pci = chip->pci;
  923. ac97.num = i;
  924. ac97.scaps = AC97_SCAP_SKIP_AUDIO | AC97_SCAP_POWER_SAVE;
  925. err = snd_ac97_mixer(pbus, &ac97, &chip->ac97[i]);
  926. if (err < 0) {
  927. chip->ac97[i] = NULL; /* to be sure */
  928. dev_dbg(chip->card->dev,
  929. "codec %d not available for modem\n", i);
  930. continue;
  931. }
  932. codec_count++;
  933. }
  934. if (! codec_count) {
  935. dev_err(chip->card->dev, "no codec available\n");
  936. return -ENODEV;
  937. }
  938. /* snd_ac97_tune_hardware(chip->ac97, ac97_quirks); */
  939. return 0;
  940. }
  941. #ifdef CONFIG_PM_SLEEP
  942. /*
  943. * power management
  944. */
  945. static int snd_atiixp_suspend(struct device *dev)
  946. {
  947. struct snd_card *card = dev_get_drvdata(dev);
  948. struct atiixp_modem *chip = card->private_data;
  949. int i;
  950. snd_power_change_state(card, SNDRV_CTL_POWER_D3hot);
  951. for (i = 0; i < NUM_ATI_CODECS; i++)
  952. snd_ac97_suspend(chip->ac97[i]);
  953. snd_atiixp_aclink_down(chip);
  954. snd_atiixp_chip_stop(chip);
  955. return 0;
  956. }
  957. static int snd_atiixp_resume(struct device *dev)
  958. {
  959. struct snd_card *card = dev_get_drvdata(dev);
  960. struct atiixp_modem *chip = card->private_data;
  961. int i;
  962. snd_atiixp_aclink_reset(chip);
  963. snd_atiixp_chip_start(chip);
  964. for (i = 0; i < NUM_ATI_CODECS; i++)
  965. snd_ac97_resume(chip->ac97[i]);
  966. snd_power_change_state(card, SNDRV_CTL_POWER_D0);
  967. return 0;
  968. }
  969. static SIMPLE_DEV_PM_OPS(snd_atiixp_pm, snd_atiixp_suspend, snd_atiixp_resume);
  970. #define SND_ATIIXP_PM_OPS &snd_atiixp_pm
  971. #else
  972. #define SND_ATIIXP_PM_OPS NULL
  973. #endif /* CONFIG_PM_SLEEP */
  974. /*
  975. * proc interface for register dump
  976. */
  977. static void snd_atiixp_proc_read(struct snd_info_entry *entry,
  978. struct snd_info_buffer *buffer)
  979. {
  980. struct atiixp_modem *chip = entry->private_data;
  981. int i;
  982. for (i = 0; i < 256; i += 4)
  983. snd_iprintf(buffer, "%02x: %08x\n", i, readl(chip->remap_addr + i));
  984. }
  985. static void snd_atiixp_proc_init(struct atiixp_modem *chip)
  986. {
  987. snd_card_ro_proc_new(chip->card, "atiixp-modem", chip,
  988. snd_atiixp_proc_read);
  989. }
  990. /*
  991. * destructor
  992. */
  993. static void snd_atiixp_free(struct snd_card *card)
  994. {
  995. snd_atiixp_chip_stop(card->private_data);
  996. }
  997. /*
  998. * constructor for chip instance
  999. */
  1000. static int snd_atiixp_init(struct snd_card *card, struct pci_dev *pci)
  1001. {
  1002. struct atiixp_modem *chip = card->private_data;
  1003. int err;
  1004. err = pcim_enable_device(pci);
  1005. if (err < 0)
  1006. return err;
  1007. spin_lock_init(&chip->reg_lock);
  1008. mutex_init(&chip->open_mutex);
  1009. chip->card = card;
  1010. chip->pci = pci;
  1011. chip->irq = -1;
  1012. err = pcim_iomap_regions(pci, 1 << 0, "ATI IXP MC97");
  1013. if (err < 0)
  1014. return err;
  1015. chip->addr = pci_resource_start(pci, 0);
  1016. chip->remap_addr = pcim_iomap_table(pci)[0];
  1017. if (devm_request_irq(&pci->dev, pci->irq, snd_atiixp_interrupt,
  1018. IRQF_SHARED, KBUILD_MODNAME, chip)) {
  1019. dev_err(card->dev, "unable to grab IRQ %d\n", pci->irq);
  1020. return -EBUSY;
  1021. }
  1022. chip->irq = pci->irq;
  1023. card->sync_irq = chip->irq;
  1024. card->private_free = snd_atiixp_free;
  1025. pci_set_master(pci);
  1026. return 0;
  1027. }
  1028. static int __snd_atiixp_probe(struct pci_dev *pci,
  1029. const struct pci_device_id *pci_id)
  1030. {
  1031. struct snd_card *card;
  1032. struct atiixp_modem *chip;
  1033. int err;
  1034. err = snd_devm_card_new(&pci->dev, index, id, THIS_MODULE,
  1035. sizeof(*chip), &card);
  1036. if (err < 0)
  1037. return err;
  1038. chip = card->private_data;
  1039. strcpy(card->driver, "ATIIXP-MODEM");
  1040. strcpy(card->shortname, "ATI IXP Modem");
  1041. err = snd_atiixp_init(card, pci);
  1042. if (err < 0)
  1043. return err;
  1044. err = snd_atiixp_aclink_reset(chip);
  1045. if (err < 0)
  1046. return err;
  1047. err = snd_atiixp_mixer_new(chip, ac97_clock);
  1048. if (err < 0)
  1049. return err;
  1050. err = snd_atiixp_pcm_new(chip);
  1051. if (err < 0)
  1052. return err;
  1053. snd_atiixp_proc_init(chip);
  1054. snd_atiixp_chip_start(chip);
  1055. sprintf(card->longname, "%s rev %x at 0x%lx, irq %i",
  1056. card->shortname, pci->revision, chip->addr, chip->irq);
  1057. err = snd_card_register(card);
  1058. if (err < 0)
  1059. return err;
  1060. pci_set_drvdata(pci, card);
  1061. return 0;
  1062. }
  1063. static int snd_atiixp_probe(struct pci_dev *pci,
  1064. const struct pci_device_id *pci_id)
  1065. {
  1066. return snd_card_free_on_error(&pci->dev, __snd_atiixp_probe(pci, pci_id));
  1067. }
  1068. static struct pci_driver atiixp_modem_driver = {
  1069. .name = KBUILD_MODNAME,
  1070. .id_table = snd_atiixp_ids,
  1071. .probe = snd_atiixp_probe,
  1072. .driver = {
  1073. .pm = SND_ATIIXP_PM_OPS,
  1074. },
  1075. };
  1076. module_pci_driver(atiixp_modem_driver);