chip.c 41 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Copyright (C) 1992, 1998-2006 Linus Torvalds, Ingo Molnar
  4. * Copyright (C) 2005-2006, Thomas Gleixner, Russell King
  5. *
  6. * This file contains the core interrupt handling code, for irq-chip based
  7. * architectures. Detailed information is available in
  8. * Documentation/core-api/genericirq.rst
  9. */
  10. #include <linux/irq.h>
  11. #include <linux/msi.h>
  12. #include <linux/module.h>
  13. #include <linux/interrupt.h>
  14. #include <linux/kernel_stat.h>
  15. #include <linux/irqdomain.h>
  16. #include <linux/wakeup_reason.h>
  17. #include <trace/events/irq.h>
  18. #include "internals.h"
  19. static irqreturn_t bad_chained_irq(int irq, void *dev_id)
  20. {
  21. WARN_ONCE(1, "Chained irq %d should not call an action\n", irq);
  22. return IRQ_NONE;
  23. }
  24. /*
  25. * Chained handlers should never call action on their IRQ. This default
  26. * action will emit warning if such thing happens.
  27. */
  28. struct irqaction chained_action = {
  29. .handler = bad_chained_irq,
  30. };
  31. /**
  32. * irq_set_chip - set the irq chip for an irq
  33. * @irq: irq number
  34. * @chip: pointer to irq chip description structure
  35. */
  36. int irq_set_chip(unsigned int irq, const struct irq_chip *chip)
  37. {
  38. unsigned long flags;
  39. struct irq_desc *desc = irq_get_desc_lock(irq, &flags, 0);
  40. if (!desc)
  41. return -EINVAL;
  42. desc->irq_data.chip = (struct irq_chip *)(chip ?: &no_irq_chip);
  43. irq_put_desc_unlock(desc, flags);
  44. /*
  45. * For !CONFIG_SPARSE_IRQ make the irq show up in
  46. * allocated_irqs.
  47. */
  48. irq_mark_irq(irq);
  49. return 0;
  50. }
  51. EXPORT_SYMBOL(irq_set_chip);
  52. /**
  53. * irq_set_irq_type - set the irq trigger type for an irq
  54. * @irq: irq number
  55. * @type: IRQ_TYPE_{LEVEL,EDGE}_* value - see include/linux/irq.h
  56. */
  57. int irq_set_irq_type(unsigned int irq, unsigned int type)
  58. {
  59. unsigned long flags;
  60. struct irq_desc *desc = irq_get_desc_buslock(irq, &flags, IRQ_GET_DESC_CHECK_GLOBAL);
  61. int ret = 0;
  62. if (!desc)
  63. return -EINVAL;
  64. ret = __irq_set_trigger(desc, type);
  65. irq_put_desc_busunlock(desc, flags);
  66. return ret;
  67. }
  68. EXPORT_SYMBOL(irq_set_irq_type);
  69. /**
  70. * irq_set_handler_data - set irq handler data for an irq
  71. * @irq: Interrupt number
  72. * @data: Pointer to interrupt specific data
  73. *
  74. * Set the hardware irq controller data for an irq
  75. */
  76. int irq_set_handler_data(unsigned int irq, void *data)
  77. {
  78. unsigned long flags;
  79. struct irq_desc *desc = irq_get_desc_lock(irq, &flags, 0);
  80. if (!desc)
  81. return -EINVAL;
  82. desc->irq_common_data.handler_data = data;
  83. irq_put_desc_unlock(desc, flags);
  84. return 0;
  85. }
  86. EXPORT_SYMBOL(irq_set_handler_data);
  87. /**
  88. * irq_set_msi_desc_off - set MSI descriptor data for an irq at offset
  89. * @irq_base: Interrupt number base
  90. * @irq_offset: Interrupt number offset
  91. * @entry: Pointer to MSI descriptor data
  92. *
  93. * Set the MSI descriptor entry for an irq at offset
  94. */
  95. int irq_set_msi_desc_off(unsigned int irq_base, unsigned int irq_offset,
  96. struct msi_desc *entry)
  97. {
  98. unsigned long flags;
  99. struct irq_desc *desc = irq_get_desc_lock(irq_base + irq_offset, &flags, IRQ_GET_DESC_CHECK_GLOBAL);
  100. if (!desc)
  101. return -EINVAL;
  102. desc->irq_common_data.msi_desc = entry;
  103. if (entry && !irq_offset)
  104. entry->irq = irq_base;
  105. irq_put_desc_unlock(desc, flags);
  106. return 0;
  107. }
  108. /**
  109. * irq_set_msi_desc - set MSI descriptor data for an irq
  110. * @irq: Interrupt number
  111. * @entry: Pointer to MSI descriptor data
  112. *
  113. * Set the MSI descriptor entry for an irq
  114. */
  115. int irq_set_msi_desc(unsigned int irq, struct msi_desc *entry)
  116. {
  117. return irq_set_msi_desc_off(irq, 0, entry);
  118. }
  119. /**
  120. * irq_set_chip_data - set irq chip data for an irq
  121. * @irq: Interrupt number
  122. * @data: Pointer to chip specific data
  123. *
  124. * Set the hardware irq chip data for an irq
  125. */
  126. int irq_set_chip_data(unsigned int irq, void *data)
  127. {
  128. unsigned long flags;
  129. struct irq_desc *desc = irq_get_desc_lock(irq, &flags, 0);
  130. if (!desc)
  131. return -EINVAL;
  132. desc->irq_data.chip_data = data;
  133. irq_put_desc_unlock(desc, flags);
  134. return 0;
  135. }
  136. EXPORT_SYMBOL(irq_set_chip_data);
  137. struct irq_data *irq_get_irq_data(unsigned int irq)
  138. {
  139. struct irq_desc *desc = irq_to_desc(irq);
  140. return desc ? &desc->irq_data : NULL;
  141. }
  142. EXPORT_SYMBOL_GPL(irq_get_irq_data);
  143. static void irq_state_clr_disabled(struct irq_desc *desc)
  144. {
  145. irqd_clear(&desc->irq_data, IRQD_IRQ_DISABLED);
  146. }
  147. static void irq_state_clr_masked(struct irq_desc *desc)
  148. {
  149. irqd_clear(&desc->irq_data, IRQD_IRQ_MASKED);
  150. }
  151. static void irq_state_clr_started(struct irq_desc *desc)
  152. {
  153. irqd_clear(&desc->irq_data, IRQD_IRQ_STARTED);
  154. }
  155. static void irq_state_set_started(struct irq_desc *desc)
  156. {
  157. irqd_set(&desc->irq_data, IRQD_IRQ_STARTED);
  158. }
  159. enum {
  160. IRQ_STARTUP_NORMAL,
  161. IRQ_STARTUP_MANAGED,
  162. IRQ_STARTUP_ABORT,
  163. };
  164. #ifdef CONFIG_SMP
  165. static int
  166. __irq_startup_managed(struct irq_desc *desc, const struct cpumask *aff,
  167. bool force)
  168. {
  169. struct irq_data *d = irq_desc_get_irq_data(desc);
  170. if (!irqd_affinity_is_managed(d))
  171. return IRQ_STARTUP_NORMAL;
  172. irqd_clr_managed_shutdown(d);
  173. if (cpumask_any_and(aff, cpu_online_mask) >= nr_cpu_ids) {
  174. /*
  175. * Catch code which fiddles with enable_irq() on a managed
  176. * and potentially shutdown IRQ. Chained interrupt
  177. * installment or irq auto probing should not happen on
  178. * managed irqs either.
  179. */
  180. if (WARN_ON_ONCE(force))
  181. return IRQ_STARTUP_ABORT;
  182. /*
  183. * The interrupt was requested, but there is no online CPU
  184. * in it's affinity mask. Put it into managed shutdown
  185. * state and let the cpu hotplug mechanism start it up once
  186. * a CPU in the mask becomes available.
  187. */
  188. return IRQ_STARTUP_ABORT;
  189. }
  190. /*
  191. * Managed interrupts have reserved resources, so this should not
  192. * happen.
  193. */
  194. if (WARN_ON(irq_domain_activate_irq(d, false)))
  195. return IRQ_STARTUP_ABORT;
  196. return IRQ_STARTUP_MANAGED;
  197. }
  198. #else
  199. static __always_inline int
  200. __irq_startup_managed(struct irq_desc *desc, const struct cpumask *aff,
  201. bool force)
  202. {
  203. return IRQ_STARTUP_NORMAL;
  204. }
  205. #endif
  206. static int __irq_startup(struct irq_desc *desc)
  207. {
  208. struct irq_data *d = irq_desc_get_irq_data(desc);
  209. int ret = 0;
  210. /* Warn if this interrupt is not activated but try nevertheless */
  211. WARN_ON_ONCE(!irqd_is_activated(d));
  212. if (d->chip->irq_startup) {
  213. ret = d->chip->irq_startup(d);
  214. irq_state_clr_disabled(desc);
  215. irq_state_clr_masked(desc);
  216. } else {
  217. irq_enable(desc);
  218. }
  219. irq_state_set_started(desc);
  220. return ret;
  221. }
  222. int irq_startup(struct irq_desc *desc, bool resend, bool force)
  223. {
  224. struct irq_data *d = irq_desc_get_irq_data(desc);
  225. const struct cpumask *aff = irq_data_get_affinity_mask(d);
  226. int ret = 0;
  227. desc->depth = 0;
  228. if (irqd_is_started(d)) {
  229. irq_enable(desc);
  230. } else {
  231. switch (__irq_startup_managed(desc, aff, force)) {
  232. case IRQ_STARTUP_NORMAL:
  233. if (d->chip->flags & IRQCHIP_AFFINITY_PRE_STARTUP)
  234. irq_setup_affinity(desc);
  235. ret = __irq_startup(desc);
  236. if (!(d->chip->flags & IRQCHIP_AFFINITY_PRE_STARTUP))
  237. irq_setup_affinity(desc);
  238. break;
  239. case IRQ_STARTUP_MANAGED:
  240. irq_do_set_affinity(d, aff, false);
  241. ret = __irq_startup(desc);
  242. break;
  243. case IRQ_STARTUP_ABORT:
  244. irqd_set_managed_shutdown(d);
  245. return 0;
  246. }
  247. }
  248. if (resend)
  249. check_irq_resend(desc, false);
  250. return ret;
  251. }
  252. int irq_activate(struct irq_desc *desc)
  253. {
  254. struct irq_data *d = irq_desc_get_irq_data(desc);
  255. if (!irqd_affinity_is_managed(d))
  256. return irq_domain_activate_irq(d, false);
  257. return 0;
  258. }
  259. int irq_activate_and_startup(struct irq_desc *desc, bool resend)
  260. {
  261. if (WARN_ON(irq_activate(desc)))
  262. return 0;
  263. return irq_startup(desc, resend, IRQ_START_FORCE);
  264. }
  265. static void __irq_disable(struct irq_desc *desc, bool mask);
  266. void irq_shutdown(struct irq_desc *desc)
  267. {
  268. if (irqd_is_started(&desc->irq_data)) {
  269. desc->depth = 1;
  270. if (desc->irq_data.chip->irq_shutdown) {
  271. desc->irq_data.chip->irq_shutdown(&desc->irq_data);
  272. irq_state_set_disabled(desc);
  273. irq_state_set_masked(desc);
  274. } else {
  275. __irq_disable(desc, true);
  276. }
  277. irq_state_clr_started(desc);
  278. }
  279. }
  280. void irq_shutdown_and_deactivate(struct irq_desc *desc)
  281. {
  282. irq_shutdown(desc);
  283. /*
  284. * This must be called even if the interrupt was never started up,
  285. * because the activation can happen before the interrupt is
  286. * available for request/startup. It has it's own state tracking so
  287. * it's safe to call it unconditionally.
  288. */
  289. irq_domain_deactivate_irq(&desc->irq_data);
  290. }
  291. void irq_enable(struct irq_desc *desc)
  292. {
  293. if (!irqd_irq_disabled(&desc->irq_data)) {
  294. unmask_irq(desc);
  295. } else {
  296. irq_state_clr_disabled(desc);
  297. if (desc->irq_data.chip->irq_enable) {
  298. desc->irq_data.chip->irq_enable(&desc->irq_data);
  299. irq_state_clr_masked(desc);
  300. } else {
  301. unmask_irq(desc);
  302. }
  303. }
  304. }
  305. static void __irq_disable(struct irq_desc *desc, bool mask)
  306. {
  307. if (irqd_irq_disabled(&desc->irq_data)) {
  308. if (mask)
  309. mask_irq(desc);
  310. } else {
  311. irq_state_set_disabled(desc);
  312. if (desc->irq_data.chip->irq_disable) {
  313. desc->irq_data.chip->irq_disable(&desc->irq_data);
  314. irq_state_set_masked(desc);
  315. } else if (mask) {
  316. mask_irq(desc);
  317. }
  318. }
  319. }
  320. /**
  321. * irq_disable - Mark interrupt disabled
  322. * @desc: irq descriptor which should be disabled
  323. *
  324. * If the chip does not implement the irq_disable callback, we
  325. * use a lazy disable approach. That means we mark the interrupt
  326. * disabled, but leave the hardware unmasked. That's an
  327. * optimization because we avoid the hardware access for the
  328. * common case where no interrupt happens after we marked it
  329. * disabled. If an interrupt happens, then the interrupt flow
  330. * handler masks the line at the hardware level and marks it
  331. * pending.
  332. *
  333. * If the interrupt chip does not implement the irq_disable callback,
  334. * a driver can disable the lazy approach for a particular irq line by
  335. * calling 'irq_set_status_flags(irq, IRQ_DISABLE_UNLAZY)'. This can
  336. * be used for devices which cannot disable the interrupt at the
  337. * device level under certain circumstances and have to use
  338. * disable_irq[_nosync] instead.
  339. */
  340. void irq_disable(struct irq_desc *desc)
  341. {
  342. __irq_disable(desc, irq_settings_disable_unlazy(desc));
  343. }
  344. void irq_percpu_enable(struct irq_desc *desc, unsigned int cpu)
  345. {
  346. if (desc->irq_data.chip->irq_enable)
  347. desc->irq_data.chip->irq_enable(&desc->irq_data);
  348. else
  349. desc->irq_data.chip->irq_unmask(&desc->irq_data);
  350. cpumask_set_cpu(cpu, desc->percpu_enabled);
  351. }
  352. void irq_percpu_disable(struct irq_desc *desc, unsigned int cpu)
  353. {
  354. if (desc->irq_data.chip->irq_disable)
  355. desc->irq_data.chip->irq_disable(&desc->irq_data);
  356. else
  357. desc->irq_data.chip->irq_mask(&desc->irq_data);
  358. cpumask_clear_cpu(cpu, desc->percpu_enabled);
  359. }
  360. static inline void mask_ack_irq(struct irq_desc *desc)
  361. {
  362. if (desc->irq_data.chip->irq_mask_ack) {
  363. desc->irq_data.chip->irq_mask_ack(&desc->irq_data);
  364. irq_state_set_masked(desc);
  365. } else {
  366. mask_irq(desc);
  367. if (desc->irq_data.chip->irq_ack)
  368. desc->irq_data.chip->irq_ack(&desc->irq_data);
  369. }
  370. }
  371. void mask_irq(struct irq_desc *desc)
  372. {
  373. if (irqd_irq_masked(&desc->irq_data))
  374. return;
  375. if (desc->irq_data.chip->irq_mask) {
  376. desc->irq_data.chip->irq_mask(&desc->irq_data);
  377. irq_state_set_masked(desc);
  378. }
  379. }
  380. void unmask_irq(struct irq_desc *desc)
  381. {
  382. if (!irqd_irq_masked(&desc->irq_data))
  383. return;
  384. if (desc->irq_data.chip->irq_unmask) {
  385. desc->irq_data.chip->irq_unmask(&desc->irq_data);
  386. irq_state_clr_masked(desc);
  387. }
  388. }
  389. void unmask_threaded_irq(struct irq_desc *desc)
  390. {
  391. struct irq_chip *chip = desc->irq_data.chip;
  392. if (chip->flags & IRQCHIP_EOI_THREADED)
  393. chip->irq_eoi(&desc->irq_data);
  394. unmask_irq(desc);
  395. }
  396. /*
  397. * handle_nested_irq - Handle a nested irq from a irq thread
  398. * @irq: the interrupt number
  399. *
  400. * Handle interrupts which are nested into a threaded interrupt
  401. * handler. The handler function is called inside the calling
  402. * threads context.
  403. */
  404. void handle_nested_irq(unsigned int irq)
  405. {
  406. struct irq_desc *desc = irq_to_desc(irq);
  407. struct irqaction *action;
  408. irqreturn_t action_ret;
  409. might_sleep();
  410. raw_spin_lock_irq(&desc->lock);
  411. desc->istate &= ~(IRQS_REPLAY | IRQS_WAITING);
  412. action = desc->action;
  413. if (unlikely(!action || irqd_irq_disabled(&desc->irq_data))) {
  414. desc->istate |= IRQS_PENDING;
  415. goto out_unlock;
  416. }
  417. kstat_incr_irqs_this_cpu(desc);
  418. irqd_set(&desc->irq_data, IRQD_IRQ_INPROGRESS);
  419. raw_spin_unlock_irq(&desc->lock);
  420. action_ret = IRQ_NONE;
  421. for_each_action_of_desc(desc, action)
  422. action_ret |= action->thread_fn(action->irq, action->dev_id);
  423. if (!irq_settings_no_debug(desc))
  424. note_interrupt(desc, action_ret);
  425. raw_spin_lock_irq(&desc->lock);
  426. irqd_clear(&desc->irq_data, IRQD_IRQ_INPROGRESS);
  427. out_unlock:
  428. raw_spin_unlock_irq(&desc->lock);
  429. }
  430. EXPORT_SYMBOL_GPL(handle_nested_irq);
  431. static bool irq_check_poll(struct irq_desc *desc)
  432. {
  433. if (!(desc->istate & IRQS_POLL_INPROGRESS))
  434. return false;
  435. return irq_wait_for_poll(desc);
  436. }
  437. static bool irq_may_run(struct irq_desc *desc)
  438. {
  439. unsigned int mask = IRQD_IRQ_INPROGRESS | IRQD_WAKEUP_ARMED;
  440. /*
  441. * If the interrupt is not in progress and is not an armed
  442. * wakeup interrupt, proceed.
  443. */
  444. if (!irqd_has_set(&desc->irq_data, mask)) {
  445. #ifdef CONFIG_PM_SLEEP
  446. if (unlikely(desc->no_suspend_depth &&
  447. irqd_is_wakeup_set(&desc->irq_data))) {
  448. unsigned int irq = irq_desc_get_irq(desc);
  449. const char *name = "(unnamed)";
  450. if (desc->action && desc->action->name)
  451. name = desc->action->name;
  452. log_abnormal_wakeup_reason("misconfigured IRQ %u %s",
  453. irq, name);
  454. }
  455. #endif
  456. return true;
  457. }
  458. /*
  459. * If the interrupt is an armed wakeup source, mark it pending
  460. * and suspended, disable it and notify the pm core about the
  461. * event.
  462. */
  463. if (irq_pm_check_wakeup(desc))
  464. return false;
  465. /*
  466. * Handle a potential concurrent poll on a different core.
  467. */
  468. return irq_check_poll(desc);
  469. }
  470. /**
  471. * handle_simple_irq - Simple and software-decoded IRQs.
  472. * @desc: the interrupt description structure for this irq
  473. *
  474. * Simple interrupts are either sent from a demultiplexing interrupt
  475. * handler or come from hardware, where no interrupt hardware control
  476. * is necessary.
  477. *
  478. * Note: The caller is expected to handle the ack, clear, mask and
  479. * unmask issues if necessary.
  480. */
  481. void handle_simple_irq(struct irq_desc *desc)
  482. {
  483. raw_spin_lock(&desc->lock);
  484. if (!irq_may_run(desc))
  485. goto out_unlock;
  486. desc->istate &= ~(IRQS_REPLAY | IRQS_WAITING);
  487. if (unlikely(!desc->action || irqd_irq_disabled(&desc->irq_data))) {
  488. desc->istate |= IRQS_PENDING;
  489. goto out_unlock;
  490. }
  491. kstat_incr_irqs_this_cpu(desc);
  492. handle_irq_event(desc);
  493. out_unlock:
  494. raw_spin_unlock(&desc->lock);
  495. }
  496. EXPORT_SYMBOL_GPL(handle_simple_irq);
  497. /**
  498. * handle_untracked_irq - Simple and software-decoded IRQs.
  499. * @desc: the interrupt description structure for this irq
  500. *
  501. * Untracked interrupts are sent from a demultiplexing interrupt
  502. * handler when the demultiplexer does not know which device it its
  503. * multiplexed irq domain generated the interrupt. IRQ's handled
  504. * through here are not subjected to stats tracking, randomness, or
  505. * spurious interrupt detection.
  506. *
  507. * Note: Like handle_simple_irq, the caller is expected to handle
  508. * the ack, clear, mask and unmask issues if necessary.
  509. */
  510. void handle_untracked_irq(struct irq_desc *desc)
  511. {
  512. raw_spin_lock(&desc->lock);
  513. if (!irq_may_run(desc))
  514. goto out_unlock;
  515. desc->istate &= ~(IRQS_REPLAY | IRQS_WAITING);
  516. if (unlikely(!desc->action || irqd_irq_disabled(&desc->irq_data))) {
  517. desc->istate |= IRQS_PENDING;
  518. goto out_unlock;
  519. }
  520. desc->istate &= ~IRQS_PENDING;
  521. irqd_set(&desc->irq_data, IRQD_IRQ_INPROGRESS);
  522. raw_spin_unlock(&desc->lock);
  523. __handle_irq_event_percpu(desc);
  524. raw_spin_lock(&desc->lock);
  525. irqd_clear(&desc->irq_data, IRQD_IRQ_INPROGRESS);
  526. out_unlock:
  527. raw_spin_unlock(&desc->lock);
  528. }
  529. EXPORT_SYMBOL_GPL(handle_untracked_irq);
  530. /*
  531. * Called unconditionally from handle_level_irq() and only for oneshot
  532. * interrupts from handle_fasteoi_irq()
  533. */
  534. static void cond_unmask_irq(struct irq_desc *desc)
  535. {
  536. /*
  537. * We need to unmask in the following cases:
  538. * - Standard level irq (IRQF_ONESHOT is not set)
  539. * - Oneshot irq which did not wake the thread (caused by a
  540. * spurious interrupt or a primary handler handling it
  541. * completely).
  542. */
  543. if (!irqd_irq_disabled(&desc->irq_data) &&
  544. irqd_irq_masked(&desc->irq_data) && !desc->threads_oneshot)
  545. unmask_irq(desc);
  546. }
  547. /**
  548. * handle_level_irq - Level type irq handler
  549. * @desc: the interrupt description structure for this irq
  550. *
  551. * Level type interrupts are active as long as the hardware line has
  552. * the active level. This may require to mask the interrupt and unmask
  553. * it after the associated handler has acknowledged the device, so the
  554. * interrupt line is back to inactive.
  555. */
  556. void handle_level_irq(struct irq_desc *desc)
  557. {
  558. raw_spin_lock(&desc->lock);
  559. mask_ack_irq(desc);
  560. if (!irq_may_run(desc))
  561. goto out_unlock;
  562. desc->istate &= ~(IRQS_REPLAY | IRQS_WAITING);
  563. /*
  564. * If its disabled or no action available
  565. * keep it masked and get out of here
  566. */
  567. if (unlikely(!desc->action || irqd_irq_disabled(&desc->irq_data))) {
  568. desc->istate |= IRQS_PENDING;
  569. goto out_unlock;
  570. }
  571. kstat_incr_irqs_this_cpu(desc);
  572. handle_irq_event(desc);
  573. cond_unmask_irq(desc);
  574. out_unlock:
  575. raw_spin_unlock(&desc->lock);
  576. }
  577. EXPORT_SYMBOL_GPL(handle_level_irq);
  578. static void cond_unmask_eoi_irq(struct irq_desc *desc, struct irq_chip *chip)
  579. {
  580. if (!(desc->istate & IRQS_ONESHOT)) {
  581. chip->irq_eoi(&desc->irq_data);
  582. return;
  583. }
  584. /*
  585. * We need to unmask in the following cases:
  586. * - Oneshot irq which did not wake the thread (caused by a
  587. * spurious interrupt or a primary handler handling it
  588. * completely).
  589. */
  590. if (!irqd_irq_disabled(&desc->irq_data) &&
  591. irqd_irq_masked(&desc->irq_data) && !desc->threads_oneshot) {
  592. chip->irq_eoi(&desc->irq_data);
  593. unmask_irq(desc);
  594. } else if (!(chip->flags & IRQCHIP_EOI_THREADED)) {
  595. chip->irq_eoi(&desc->irq_data);
  596. }
  597. }
  598. /**
  599. * handle_fasteoi_irq - irq handler for transparent controllers
  600. * @desc: the interrupt description structure for this irq
  601. *
  602. * Only a single callback will be issued to the chip: an ->eoi()
  603. * call when the interrupt has been serviced. This enables support
  604. * for modern forms of interrupt handlers, which handle the flow
  605. * details in hardware, transparently.
  606. */
  607. void handle_fasteoi_irq(struct irq_desc *desc)
  608. {
  609. struct irq_chip *chip = desc->irq_data.chip;
  610. raw_spin_lock(&desc->lock);
  611. if (!irq_may_run(desc))
  612. goto out;
  613. desc->istate &= ~(IRQS_REPLAY | IRQS_WAITING);
  614. /*
  615. * If its disabled or no action available
  616. * then mask it and get out of here:
  617. */
  618. if (unlikely(!desc->action || irqd_irq_disabled(&desc->irq_data))) {
  619. desc->istate |= IRQS_PENDING;
  620. mask_irq(desc);
  621. goto out;
  622. }
  623. kstat_incr_irqs_this_cpu(desc);
  624. if (desc->istate & IRQS_ONESHOT)
  625. mask_irq(desc);
  626. handle_irq_event(desc);
  627. cond_unmask_eoi_irq(desc, chip);
  628. raw_spin_unlock(&desc->lock);
  629. return;
  630. out:
  631. if (!(chip->flags & IRQCHIP_EOI_IF_HANDLED))
  632. chip->irq_eoi(&desc->irq_data);
  633. raw_spin_unlock(&desc->lock);
  634. }
  635. EXPORT_SYMBOL_GPL(handle_fasteoi_irq);
  636. /**
  637. * handle_fasteoi_nmi - irq handler for NMI interrupt lines
  638. * @desc: the interrupt description structure for this irq
  639. *
  640. * A simple NMI-safe handler, considering the restrictions
  641. * from request_nmi.
  642. *
  643. * Only a single callback will be issued to the chip: an ->eoi()
  644. * call when the interrupt has been serviced. This enables support
  645. * for modern forms of interrupt handlers, which handle the flow
  646. * details in hardware, transparently.
  647. */
  648. void handle_fasteoi_nmi(struct irq_desc *desc)
  649. {
  650. struct irq_chip *chip = irq_desc_get_chip(desc);
  651. struct irqaction *action = desc->action;
  652. unsigned int irq = irq_desc_get_irq(desc);
  653. irqreturn_t res;
  654. __kstat_incr_irqs_this_cpu(desc);
  655. trace_irq_handler_entry(irq, action);
  656. /*
  657. * NMIs cannot be shared, there is only one action.
  658. */
  659. res = action->handler(irq, action->dev_id);
  660. trace_irq_handler_exit(irq, action, res);
  661. if (chip->irq_eoi)
  662. chip->irq_eoi(&desc->irq_data);
  663. }
  664. EXPORT_SYMBOL_GPL(handle_fasteoi_nmi);
  665. /**
  666. * handle_edge_irq - edge type IRQ handler
  667. * @desc: the interrupt description structure for this irq
  668. *
  669. * Interrupt occurs on the falling and/or rising edge of a hardware
  670. * signal. The occurrence is latched into the irq controller hardware
  671. * and must be acked in order to be reenabled. After the ack another
  672. * interrupt can happen on the same source even before the first one
  673. * is handled by the associated event handler. If this happens it
  674. * might be necessary to disable (mask) the interrupt depending on the
  675. * controller hardware. This requires to reenable the interrupt inside
  676. * of the loop which handles the interrupts which have arrived while
  677. * the handler was running. If all pending interrupts are handled, the
  678. * loop is left.
  679. */
  680. void handle_edge_irq(struct irq_desc *desc)
  681. {
  682. raw_spin_lock(&desc->lock);
  683. desc->istate &= ~(IRQS_REPLAY | IRQS_WAITING);
  684. if (!irq_may_run(desc)) {
  685. desc->istate |= IRQS_PENDING;
  686. mask_ack_irq(desc);
  687. goto out_unlock;
  688. }
  689. /*
  690. * If its disabled or no action available then mask it and get
  691. * out of here.
  692. */
  693. if (irqd_irq_disabled(&desc->irq_data) || !desc->action) {
  694. desc->istate |= IRQS_PENDING;
  695. mask_ack_irq(desc);
  696. goto out_unlock;
  697. }
  698. kstat_incr_irqs_this_cpu(desc);
  699. /* Start handling the irq */
  700. desc->irq_data.chip->irq_ack(&desc->irq_data);
  701. do {
  702. if (unlikely(!desc->action)) {
  703. mask_irq(desc);
  704. goto out_unlock;
  705. }
  706. /*
  707. * When another irq arrived while we were handling
  708. * one, we could have masked the irq.
  709. * Reenable it, if it was not disabled in meantime.
  710. */
  711. if (unlikely(desc->istate & IRQS_PENDING)) {
  712. if (!irqd_irq_disabled(&desc->irq_data) &&
  713. irqd_irq_masked(&desc->irq_data))
  714. unmask_irq(desc);
  715. }
  716. handle_irq_event(desc);
  717. } while ((desc->istate & IRQS_PENDING) &&
  718. !irqd_irq_disabled(&desc->irq_data));
  719. out_unlock:
  720. raw_spin_unlock(&desc->lock);
  721. }
  722. EXPORT_SYMBOL(handle_edge_irq);
  723. #ifdef CONFIG_IRQ_EDGE_EOI_HANDLER
  724. /**
  725. * handle_edge_eoi_irq - edge eoi type IRQ handler
  726. * @desc: the interrupt description structure for this irq
  727. *
  728. * Similar as the above handle_edge_irq, but using eoi and w/o the
  729. * mask/unmask logic.
  730. */
  731. void handle_edge_eoi_irq(struct irq_desc *desc)
  732. {
  733. struct irq_chip *chip = irq_desc_get_chip(desc);
  734. raw_spin_lock(&desc->lock);
  735. desc->istate &= ~(IRQS_REPLAY | IRQS_WAITING);
  736. if (!irq_may_run(desc)) {
  737. desc->istate |= IRQS_PENDING;
  738. goto out_eoi;
  739. }
  740. /*
  741. * If its disabled or no action available then mask it and get
  742. * out of here.
  743. */
  744. if (irqd_irq_disabled(&desc->irq_data) || !desc->action) {
  745. desc->istate |= IRQS_PENDING;
  746. goto out_eoi;
  747. }
  748. kstat_incr_irqs_this_cpu(desc);
  749. do {
  750. if (unlikely(!desc->action))
  751. goto out_eoi;
  752. handle_irq_event(desc);
  753. } while ((desc->istate & IRQS_PENDING) &&
  754. !irqd_irq_disabled(&desc->irq_data));
  755. out_eoi:
  756. chip->irq_eoi(&desc->irq_data);
  757. raw_spin_unlock(&desc->lock);
  758. }
  759. #endif
  760. /**
  761. * handle_percpu_irq - Per CPU local irq handler
  762. * @desc: the interrupt description structure for this irq
  763. *
  764. * Per CPU interrupts on SMP machines without locking requirements
  765. */
  766. void handle_percpu_irq(struct irq_desc *desc)
  767. {
  768. struct irq_chip *chip = irq_desc_get_chip(desc);
  769. /*
  770. * PER CPU interrupts are not serialized. Do not touch
  771. * desc->tot_count.
  772. */
  773. __kstat_incr_irqs_this_cpu(desc);
  774. if (chip->irq_ack)
  775. chip->irq_ack(&desc->irq_data);
  776. handle_irq_event_percpu(desc);
  777. if (chip->irq_eoi)
  778. chip->irq_eoi(&desc->irq_data);
  779. }
  780. /**
  781. * handle_percpu_devid_irq - Per CPU local irq handler with per cpu dev ids
  782. * @desc: the interrupt description structure for this irq
  783. *
  784. * Per CPU interrupts on SMP machines without locking requirements. Same as
  785. * handle_percpu_irq() above but with the following extras:
  786. *
  787. * action->percpu_dev_id is a pointer to percpu variables which
  788. * contain the real device id for the cpu on which this handler is
  789. * called
  790. */
  791. void handle_percpu_devid_irq(struct irq_desc *desc)
  792. {
  793. struct irq_chip *chip = irq_desc_get_chip(desc);
  794. struct irqaction *action = desc->action;
  795. unsigned int irq = irq_desc_get_irq(desc);
  796. irqreturn_t res;
  797. /*
  798. * PER CPU interrupts are not serialized. Do not touch
  799. * desc->tot_count.
  800. */
  801. __kstat_incr_irqs_this_cpu(desc);
  802. if (chip->irq_ack)
  803. chip->irq_ack(&desc->irq_data);
  804. if (likely(action)) {
  805. trace_irq_handler_entry(irq, action);
  806. res = action->handler(irq, raw_cpu_ptr(action->percpu_dev_id));
  807. trace_irq_handler_exit(irq, action, res);
  808. } else {
  809. unsigned int cpu = smp_processor_id();
  810. bool enabled = cpumask_test_cpu(cpu, desc->percpu_enabled);
  811. if (enabled)
  812. irq_percpu_disable(desc, cpu);
  813. pr_err_once("Spurious%s percpu IRQ%u on CPU%u\n",
  814. enabled ? " and unmasked" : "", irq, cpu);
  815. }
  816. if (chip->irq_eoi)
  817. chip->irq_eoi(&desc->irq_data);
  818. }
  819. /**
  820. * handle_percpu_devid_fasteoi_nmi - Per CPU local NMI handler with per cpu
  821. * dev ids
  822. * @desc: the interrupt description structure for this irq
  823. *
  824. * Similar to handle_fasteoi_nmi, but handling the dev_id cookie
  825. * as a percpu pointer.
  826. */
  827. void handle_percpu_devid_fasteoi_nmi(struct irq_desc *desc)
  828. {
  829. struct irq_chip *chip = irq_desc_get_chip(desc);
  830. struct irqaction *action = desc->action;
  831. unsigned int irq = irq_desc_get_irq(desc);
  832. irqreturn_t res;
  833. __kstat_incr_irqs_this_cpu(desc);
  834. trace_irq_handler_entry(irq, action);
  835. res = action->handler(irq, raw_cpu_ptr(action->percpu_dev_id));
  836. trace_irq_handler_exit(irq, action, res);
  837. if (chip->irq_eoi)
  838. chip->irq_eoi(&desc->irq_data);
  839. }
  840. static void
  841. __irq_do_set_handler(struct irq_desc *desc, irq_flow_handler_t handle,
  842. int is_chained, const char *name)
  843. {
  844. if (!handle) {
  845. handle = handle_bad_irq;
  846. } else {
  847. struct irq_data *irq_data = &desc->irq_data;
  848. #ifdef CONFIG_IRQ_DOMAIN_HIERARCHY
  849. /*
  850. * With hierarchical domains we might run into a
  851. * situation where the outermost chip is not yet set
  852. * up, but the inner chips are there. Instead of
  853. * bailing we install the handler, but obviously we
  854. * cannot enable/startup the interrupt at this point.
  855. */
  856. while (irq_data) {
  857. if (irq_data->chip != &no_irq_chip)
  858. break;
  859. /*
  860. * Bail out if the outer chip is not set up
  861. * and the interrupt supposed to be started
  862. * right away.
  863. */
  864. if (WARN_ON(is_chained))
  865. return;
  866. /* Try the parent */
  867. irq_data = irq_data->parent_data;
  868. }
  869. #endif
  870. if (WARN_ON(!irq_data || irq_data->chip == &no_irq_chip))
  871. return;
  872. }
  873. /* Uninstall? */
  874. if (handle == handle_bad_irq) {
  875. if (desc->irq_data.chip != &no_irq_chip)
  876. mask_ack_irq(desc);
  877. irq_state_set_disabled(desc);
  878. if (is_chained) {
  879. desc->action = NULL;
  880. WARN_ON(irq_chip_pm_put(irq_desc_get_irq_data(desc)));
  881. }
  882. desc->depth = 1;
  883. }
  884. desc->handle_irq = handle;
  885. desc->name = name;
  886. if (handle != handle_bad_irq && is_chained) {
  887. unsigned int type = irqd_get_trigger_type(&desc->irq_data);
  888. /*
  889. * We're about to start this interrupt immediately,
  890. * hence the need to set the trigger configuration.
  891. * But the .set_type callback may have overridden the
  892. * flow handler, ignoring that we're dealing with a
  893. * chained interrupt. Reset it immediately because we
  894. * do know better.
  895. */
  896. if (type != IRQ_TYPE_NONE) {
  897. __irq_set_trigger(desc, type);
  898. desc->handle_irq = handle;
  899. }
  900. irq_settings_set_noprobe(desc);
  901. irq_settings_set_norequest(desc);
  902. irq_settings_set_nothread(desc);
  903. desc->action = &chained_action;
  904. WARN_ON(irq_chip_pm_get(irq_desc_get_irq_data(desc)));
  905. irq_activate_and_startup(desc, IRQ_RESEND);
  906. }
  907. }
  908. void
  909. __irq_set_handler(unsigned int irq, irq_flow_handler_t handle, int is_chained,
  910. const char *name)
  911. {
  912. unsigned long flags;
  913. struct irq_desc *desc = irq_get_desc_buslock(irq, &flags, 0);
  914. if (!desc)
  915. return;
  916. __irq_do_set_handler(desc, handle, is_chained, name);
  917. irq_put_desc_busunlock(desc, flags);
  918. }
  919. EXPORT_SYMBOL_GPL(__irq_set_handler);
  920. void
  921. irq_set_chained_handler_and_data(unsigned int irq, irq_flow_handler_t handle,
  922. void *data)
  923. {
  924. unsigned long flags;
  925. struct irq_desc *desc = irq_get_desc_buslock(irq, &flags, 0);
  926. if (!desc)
  927. return;
  928. desc->irq_common_data.handler_data = data;
  929. __irq_do_set_handler(desc, handle, 1, NULL);
  930. irq_put_desc_busunlock(desc, flags);
  931. }
  932. EXPORT_SYMBOL_GPL(irq_set_chained_handler_and_data);
  933. void
  934. irq_set_chip_and_handler_name(unsigned int irq, const struct irq_chip *chip,
  935. irq_flow_handler_t handle, const char *name)
  936. {
  937. irq_set_chip(irq, chip);
  938. __irq_set_handler(irq, handle, 0, name);
  939. }
  940. EXPORT_SYMBOL_GPL(irq_set_chip_and_handler_name);
  941. void irq_modify_status(unsigned int irq, unsigned long clr, unsigned long set)
  942. {
  943. unsigned long flags, trigger, tmp;
  944. struct irq_desc *desc = irq_get_desc_lock(irq, &flags, 0);
  945. if (!desc)
  946. return;
  947. /*
  948. * Warn when a driver sets the no autoenable flag on an already
  949. * active interrupt.
  950. */
  951. WARN_ON_ONCE(!desc->depth && (set & _IRQ_NOAUTOEN));
  952. irq_settings_clr_and_set(desc, clr, set);
  953. trigger = irqd_get_trigger_type(&desc->irq_data);
  954. irqd_clear(&desc->irq_data, IRQD_NO_BALANCING | IRQD_PER_CPU |
  955. IRQD_TRIGGER_MASK | IRQD_LEVEL | IRQD_MOVE_PCNTXT);
  956. if (irq_settings_has_no_balance_set(desc))
  957. irqd_set(&desc->irq_data, IRQD_NO_BALANCING);
  958. if (irq_settings_is_per_cpu(desc))
  959. irqd_set(&desc->irq_data, IRQD_PER_CPU);
  960. if (irq_settings_can_move_pcntxt(desc))
  961. irqd_set(&desc->irq_data, IRQD_MOVE_PCNTXT);
  962. if (irq_settings_is_level(desc))
  963. irqd_set(&desc->irq_data, IRQD_LEVEL);
  964. tmp = irq_settings_get_trigger_mask(desc);
  965. if (tmp != IRQ_TYPE_NONE)
  966. trigger = tmp;
  967. irqd_set(&desc->irq_data, trigger);
  968. irq_put_desc_unlock(desc, flags);
  969. }
  970. EXPORT_SYMBOL_GPL(irq_modify_status);
  971. #ifdef CONFIG_DEPRECATED_IRQ_CPU_ONOFFLINE
  972. /**
  973. * irq_cpu_online - Invoke all irq_cpu_online functions.
  974. *
  975. * Iterate through all irqs and invoke the chip.irq_cpu_online()
  976. * for each.
  977. */
  978. void irq_cpu_online(void)
  979. {
  980. struct irq_desc *desc;
  981. struct irq_chip *chip;
  982. unsigned long flags;
  983. unsigned int irq;
  984. for_each_active_irq(irq) {
  985. desc = irq_to_desc(irq);
  986. if (!desc)
  987. continue;
  988. raw_spin_lock_irqsave(&desc->lock, flags);
  989. chip = irq_data_get_irq_chip(&desc->irq_data);
  990. if (chip && chip->irq_cpu_online &&
  991. (!(chip->flags & IRQCHIP_ONOFFLINE_ENABLED) ||
  992. !irqd_irq_disabled(&desc->irq_data)))
  993. chip->irq_cpu_online(&desc->irq_data);
  994. raw_spin_unlock_irqrestore(&desc->lock, flags);
  995. }
  996. }
  997. /**
  998. * irq_cpu_offline - Invoke all irq_cpu_offline functions.
  999. *
  1000. * Iterate through all irqs and invoke the chip.irq_cpu_offline()
  1001. * for each.
  1002. */
  1003. void irq_cpu_offline(void)
  1004. {
  1005. struct irq_desc *desc;
  1006. struct irq_chip *chip;
  1007. unsigned long flags;
  1008. unsigned int irq;
  1009. for_each_active_irq(irq) {
  1010. desc = irq_to_desc(irq);
  1011. if (!desc)
  1012. continue;
  1013. raw_spin_lock_irqsave(&desc->lock, flags);
  1014. chip = irq_data_get_irq_chip(&desc->irq_data);
  1015. if (chip && chip->irq_cpu_offline &&
  1016. (!(chip->flags & IRQCHIP_ONOFFLINE_ENABLED) ||
  1017. !irqd_irq_disabled(&desc->irq_data)))
  1018. chip->irq_cpu_offline(&desc->irq_data);
  1019. raw_spin_unlock_irqrestore(&desc->lock, flags);
  1020. }
  1021. }
  1022. #endif
  1023. #ifdef CONFIG_IRQ_DOMAIN_HIERARCHY
  1024. #ifdef CONFIG_IRQ_FASTEOI_HIERARCHY_HANDLERS
  1025. /**
  1026. * handle_fasteoi_ack_irq - irq handler for edge hierarchy
  1027. * stacked on transparent controllers
  1028. *
  1029. * @desc: the interrupt description structure for this irq
  1030. *
  1031. * Like handle_fasteoi_irq(), but for use with hierarchy where
  1032. * the irq_chip also needs to have its ->irq_ack() function
  1033. * called.
  1034. */
  1035. void handle_fasteoi_ack_irq(struct irq_desc *desc)
  1036. {
  1037. struct irq_chip *chip = desc->irq_data.chip;
  1038. raw_spin_lock(&desc->lock);
  1039. if (!irq_may_run(desc))
  1040. goto out;
  1041. desc->istate &= ~(IRQS_REPLAY | IRQS_WAITING);
  1042. /*
  1043. * If its disabled or no action available
  1044. * then mask it and get out of here:
  1045. */
  1046. if (unlikely(!desc->action || irqd_irq_disabled(&desc->irq_data))) {
  1047. desc->istate |= IRQS_PENDING;
  1048. mask_irq(desc);
  1049. goto out;
  1050. }
  1051. kstat_incr_irqs_this_cpu(desc);
  1052. if (desc->istate & IRQS_ONESHOT)
  1053. mask_irq(desc);
  1054. /* Start handling the irq */
  1055. desc->irq_data.chip->irq_ack(&desc->irq_data);
  1056. handle_irq_event(desc);
  1057. cond_unmask_eoi_irq(desc, chip);
  1058. raw_spin_unlock(&desc->lock);
  1059. return;
  1060. out:
  1061. if (!(chip->flags & IRQCHIP_EOI_IF_HANDLED))
  1062. chip->irq_eoi(&desc->irq_data);
  1063. raw_spin_unlock(&desc->lock);
  1064. }
  1065. EXPORT_SYMBOL_GPL(handle_fasteoi_ack_irq);
  1066. /**
  1067. * handle_fasteoi_mask_irq - irq handler for level hierarchy
  1068. * stacked on transparent controllers
  1069. *
  1070. * @desc: the interrupt description structure for this irq
  1071. *
  1072. * Like handle_fasteoi_irq(), but for use with hierarchy where
  1073. * the irq_chip also needs to have its ->irq_mask_ack() function
  1074. * called.
  1075. */
  1076. void handle_fasteoi_mask_irq(struct irq_desc *desc)
  1077. {
  1078. struct irq_chip *chip = desc->irq_data.chip;
  1079. raw_spin_lock(&desc->lock);
  1080. mask_ack_irq(desc);
  1081. if (!irq_may_run(desc))
  1082. goto out;
  1083. desc->istate &= ~(IRQS_REPLAY | IRQS_WAITING);
  1084. /*
  1085. * If its disabled or no action available
  1086. * then mask it and get out of here:
  1087. */
  1088. if (unlikely(!desc->action || irqd_irq_disabled(&desc->irq_data))) {
  1089. desc->istate |= IRQS_PENDING;
  1090. mask_irq(desc);
  1091. goto out;
  1092. }
  1093. kstat_incr_irqs_this_cpu(desc);
  1094. if (desc->istate & IRQS_ONESHOT)
  1095. mask_irq(desc);
  1096. handle_irq_event(desc);
  1097. cond_unmask_eoi_irq(desc, chip);
  1098. raw_spin_unlock(&desc->lock);
  1099. return;
  1100. out:
  1101. if (!(chip->flags & IRQCHIP_EOI_IF_HANDLED))
  1102. chip->irq_eoi(&desc->irq_data);
  1103. raw_spin_unlock(&desc->lock);
  1104. }
  1105. EXPORT_SYMBOL_GPL(handle_fasteoi_mask_irq);
  1106. #endif /* CONFIG_IRQ_FASTEOI_HIERARCHY_HANDLERS */
  1107. /**
  1108. * irq_chip_set_parent_state - set the state of a parent interrupt.
  1109. *
  1110. * @data: Pointer to interrupt specific data
  1111. * @which: State to be restored (one of IRQCHIP_STATE_*)
  1112. * @val: Value corresponding to @which
  1113. *
  1114. * Conditional success, if the underlying irqchip does not implement it.
  1115. */
  1116. int irq_chip_set_parent_state(struct irq_data *data,
  1117. enum irqchip_irq_state which,
  1118. bool val)
  1119. {
  1120. data = data->parent_data;
  1121. if (!data || !data->chip->irq_set_irqchip_state)
  1122. return 0;
  1123. return data->chip->irq_set_irqchip_state(data, which, val);
  1124. }
  1125. EXPORT_SYMBOL_GPL(irq_chip_set_parent_state);
  1126. /**
  1127. * irq_chip_get_parent_state - get the state of a parent interrupt.
  1128. *
  1129. * @data: Pointer to interrupt specific data
  1130. * @which: one of IRQCHIP_STATE_* the caller wants to know
  1131. * @state: a pointer to a boolean where the state is to be stored
  1132. *
  1133. * Conditional success, if the underlying irqchip does not implement it.
  1134. */
  1135. int irq_chip_get_parent_state(struct irq_data *data,
  1136. enum irqchip_irq_state which,
  1137. bool *state)
  1138. {
  1139. data = data->parent_data;
  1140. if (!data || !data->chip->irq_get_irqchip_state)
  1141. return 0;
  1142. return data->chip->irq_get_irqchip_state(data, which, state);
  1143. }
  1144. EXPORT_SYMBOL_GPL(irq_chip_get_parent_state);
  1145. /**
  1146. * irq_chip_enable_parent - Enable the parent interrupt (defaults to unmask if
  1147. * NULL)
  1148. * @data: Pointer to interrupt specific data
  1149. */
  1150. void irq_chip_enable_parent(struct irq_data *data)
  1151. {
  1152. data = data->parent_data;
  1153. if (data->chip->irq_enable)
  1154. data->chip->irq_enable(data);
  1155. else
  1156. data->chip->irq_unmask(data);
  1157. }
  1158. EXPORT_SYMBOL_GPL(irq_chip_enable_parent);
  1159. /**
  1160. * irq_chip_disable_parent - Disable the parent interrupt (defaults to mask if
  1161. * NULL)
  1162. * @data: Pointer to interrupt specific data
  1163. */
  1164. void irq_chip_disable_parent(struct irq_data *data)
  1165. {
  1166. data = data->parent_data;
  1167. if (data->chip->irq_disable)
  1168. data->chip->irq_disable(data);
  1169. else
  1170. data->chip->irq_mask(data);
  1171. }
  1172. EXPORT_SYMBOL_GPL(irq_chip_disable_parent);
  1173. /**
  1174. * irq_chip_ack_parent - Acknowledge the parent interrupt
  1175. * @data: Pointer to interrupt specific data
  1176. */
  1177. void irq_chip_ack_parent(struct irq_data *data)
  1178. {
  1179. data = data->parent_data;
  1180. data->chip->irq_ack(data);
  1181. }
  1182. EXPORT_SYMBOL_GPL(irq_chip_ack_parent);
  1183. /**
  1184. * irq_chip_mask_parent - Mask the parent interrupt
  1185. * @data: Pointer to interrupt specific data
  1186. */
  1187. void irq_chip_mask_parent(struct irq_data *data)
  1188. {
  1189. data = data->parent_data;
  1190. data->chip->irq_mask(data);
  1191. }
  1192. EXPORT_SYMBOL_GPL(irq_chip_mask_parent);
  1193. /**
  1194. * irq_chip_mask_ack_parent - Mask and acknowledge the parent interrupt
  1195. * @data: Pointer to interrupt specific data
  1196. */
  1197. void irq_chip_mask_ack_parent(struct irq_data *data)
  1198. {
  1199. data = data->parent_data;
  1200. data->chip->irq_mask_ack(data);
  1201. }
  1202. EXPORT_SYMBOL_GPL(irq_chip_mask_ack_parent);
  1203. /**
  1204. * irq_chip_unmask_parent - Unmask the parent interrupt
  1205. * @data: Pointer to interrupt specific data
  1206. */
  1207. void irq_chip_unmask_parent(struct irq_data *data)
  1208. {
  1209. data = data->parent_data;
  1210. data->chip->irq_unmask(data);
  1211. }
  1212. EXPORT_SYMBOL_GPL(irq_chip_unmask_parent);
  1213. /**
  1214. * irq_chip_eoi_parent - Invoke EOI on the parent interrupt
  1215. * @data: Pointer to interrupt specific data
  1216. */
  1217. void irq_chip_eoi_parent(struct irq_data *data)
  1218. {
  1219. data = data->parent_data;
  1220. data->chip->irq_eoi(data);
  1221. }
  1222. EXPORT_SYMBOL_GPL(irq_chip_eoi_parent);
  1223. /**
  1224. * irq_chip_set_affinity_parent - Set affinity on the parent interrupt
  1225. * @data: Pointer to interrupt specific data
  1226. * @dest: The affinity mask to set
  1227. * @force: Flag to enforce setting (disable online checks)
  1228. *
  1229. * Conditional, as the underlying parent chip might not implement it.
  1230. */
  1231. int irq_chip_set_affinity_parent(struct irq_data *data,
  1232. const struct cpumask *dest, bool force)
  1233. {
  1234. data = data->parent_data;
  1235. if (data->chip->irq_set_affinity)
  1236. return data->chip->irq_set_affinity(data, dest, force);
  1237. return -ENOSYS;
  1238. }
  1239. EXPORT_SYMBOL_GPL(irq_chip_set_affinity_parent);
  1240. /**
  1241. * irq_chip_set_type_parent - Set IRQ type on the parent interrupt
  1242. * @data: Pointer to interrupt specific data
  1243. * @type: IRQ_TYPE_{LEVEL,EDGE}_* value - see include/linux/irq.h
  1244. *
  1245. * Conditional, as the underlying parent chip might not implement it.
  1246. */
  1247. int irq_chip_set_type_parent(struct irq_data *data, unsigned int type)
  1248. {
  1249. data = data->parent_data;
  1250. if (data->chip->irq_set_type)
  1251. return data->chip->irq_set_type(data, type);
  1252. return -ENOSYS;
  1253. }
  1254. EXPORT_SYMBOL_GPL(irq_chip_set_type_parent);
  1255. /**
  1256. * irq_chip_retrigger_hierarchy - Retrigger an interrupt in hardware
  1257. * @data: Pointer to interrupt specific data
  1258. *
  1259. * Iterate through the domain hierarchy of the interrupt and check
  1260. * whether a hw retrigger function exists. If yes, invoke it.
  1261. */
  1262. int irq_chip_retrigger_hierarchy(struct irq_data *data)
  1263. {
  1264. for (data = data->parent_data; data; data = data->parent_data)
  1265. if (data->chip && data->chip->irq_retrigger)
  1266. return data->chip->irq_retrigger(data);
  1267. return 0;
  1268. }
  1269. EXPORT_SYMBOL_GPL(irq_chip_retrigger_hierarchy);
  1270. /**
  1271. * irq_chip_set_vcpu_affinity_parent - Set vcpu affinity on the parent interrupt
  1272. * @data: Pointer to interrupt specific data
  1273. * @vcpu_info: The vcpu affinity information
  1274. */
  1275. int irq_chip_set_vcpu_affinity_parent(struct irq_data *data, void *vcpu_info)
  1276. {
  1277. data = data->parent_data;
  1278. if (data->chip->irq_set_vcpu_affinity)
  1279. return data->chip->irq_set_vcpu_affinity(data, vcpu_info);
  1280. return -ENOSYS;
  1281. }
  1282. EXPORT_SYMBOL_GPL(irq_chip_set_vcpu_affinity_parent);
  1283. /**
  1284. * irq_chip_set_wake_parent - Set/reset wake-up on the parent interrupt
  1285. * @data: Pointer to interrupt specific data
  1286. * @on: Whether to set or reset the wake-up capability of this irq
  1287. *
  1288. * Conditional, as the underlying parent chip might not implement it.
  1289. */
  1290. int irq_chip_set_wake_parent(struct irq_data *data, unsigned int on)
  1291. {
  1292. data = data->parent_data;
  1293. if (data->chip->flags & IRQCHIP_SKIP_SET_WAKE)
  1294. return 0;
  1295. if (data->chip->irq_set_wake)
  1296. return data->chip->irq_set_wake(data, on);
  1297. return -ENOSYS;
  1298. }
  1299. EXPORT_SYMBOL_GPL(irq_chip_set_wake_parent);
  1300. /**
  1301. * irq_chip_request_resources_parent - Request resources on the parent interrupt
  1302. * @data: Pointer to interrupt specific data
  1303. */
  1304. int irq_chip_request_resources_parent(struct irq_data *data)
  1305. {
  1306. data = data->parent_data;
  1307. if (data->chip->irq_request_resources)
  1308. return data->chip->irq_request_resources(data);
  1309. /* no error on missing optional irq_chip::irq_request_resources */
  1310. return 0;
  1311. }
  1312. EXPORT_SYMBOL_GPL(irq_chip_request_resources_parent);
  1313. /**
  1314. * irq_chip_release_resources_parent - Release resources on the parent interrupt
  1315. * @data: Pointer to interrupt specific data
  1316. */
  1317. void irq_chip_release_resources_parent(struct irq_data *data)
  1318. {
  1319. data = data->parent_data;
  1320. if (data->chip->irq_release_resources)
  1321. data->chip->irq_release_resources(data);
  1322. }
  1323. EXPORT_SYMBOL_GPL(irq_chip_release_resources_parent);
  1324. #endif
  1325. /**
  1326. * irq_chip_compose_msi_msg - Compose msi message for a irq chip
  1327. * @data: Pointer to interrupt specific data
  1328. * @msg: Pointer to the MSI message
  1329. *
  1330. * For hierarchical domains we find the first chip in the hierarchy
  1331. * which implements the irq_compose_msi_msg callback. For non
  1332. * hierarchical we use the top level chip.
  1333. */
  1334. int irq_chip_compose_msi_msg(struct irq_data *data, struct msi_msg *msg)
  1335. {
  1336. struct irq_data *pos;
  1337. for (pos = NULL; !pos && data; data = irqd_get_parent_data(data)) {
  1338. if (data->chip && data->chip->irq_compose_msi_msg)
  1339. pos = data;
  1340. }
  1341. if (!pos)
  1342. return -ENOSYS;
  1343. pos->chip->irq_compose_msi_msg(pos, msg);
  1344. return 0;
  1345. }
  1346. static struct device *irq_get_parent_device(struct irq_data *data)
  1347. {
  1348. if (data->domain)
  1349. return data->domain->dev;
  1350. return NULL;
  1351. }
  1352. /**
  1353. * irq_chip_pm_get - Enable power for an IRQ chip
  1354. * @data: Pointer to interrupt specific data
  1355. *
  1356. * Enable the power to the IRQ chip referenced by the interrupt data
  1357. * structure.
  1358. */
  1359. int irq_chip_pm_get(struct irq_data *data)
  1360. {
  1361. struct device *dev = irq_get_parent_device(data);
  1362. int retval = 0;
  1363. if (IS_ENABLED(CONFIG_PM) && dev)
  1364. retval = pm_runtime_resume_and_get(dev);
  1365. return retval;
  1366. }
  1367. /**
  1368. * irq_chip_pm_put - Disable power for an IRQ chip
  1369. * @data: Pointer to interrupt specific data
  1370. *
  1371. * Disable the power to the IRQ chip referenced by the interrupt data
  1372. * structure, belongs. Note that power will only be disabled, once this
  1373. * function has been called for all IRQs that have called irq_chip_pm_get().
  1374. */
  1375. int irq_chip_pm_put(struct irq_data *data)
  1376. {
  1377. struct device *dev = irq_get_parent_device(data);
  1378. int retval = 0;
  1379. if (IS_ENABLED(CONFIG_PM) && dev)
  1380. retval = pm_runtime_put(dev);
  1381. return (retval < 0) ? retval : 0;
  1382. }