mpfs.h 1.0 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051
  1. /* SPDX-License-Identifier: GPL-2.0 */
  2. /*
  3. *
  4. * Microchip PolarFire SoC (MPFS)
  5. *
  6. * Copyright (c) 2020 Microchip Corporation. All rights reserved.
  7. *
  8. * Author: Conor Dooley <[email protected]>
  9. *
  10. */
  11. #ifndef __SOC_MPFS_H__
  12. #define __SOC_MPFS_H__
  13. #include <linux/types.h>
  14. #include <linux/of_device.h>
  15. struct mpfs_sys_controller;
  16. struct mpfs_mss_msg {
  17. u8 cmd_opcode;
  18. u16 cmd_data_size;
  19. struct mpfs_mss_response *response;
  20. u8 *cmd_data;
  21. u16 mbox_offset;
  22. u16 resp_offset;
  23. };
  24. struct mpfs_mss_response {
  25. u32 resp_status;
  26. u32 *resp_msg;
  27. u16 resp_size;
  28. };
  29. #if IS_ENABLED(CONFIG_POLARFIRE_SOC_SYS_CTRL)
  30. int mpfs_blocking_transaction(struct mpfs_sys_controller *mpfs_client, struct mpfs_mss_msg *msg);
  31. struct mpfs_sys_controller *mpfs_sys_controller_get(struct device *dev);
  32. #endif /* if IS_ENABLED(CONFIG_POLARFIRE_SOC_SYS_CTRL) */
  33. #if IS_ENABLED(CONFIG_MCHP_CLK_MPFS)
  34. u32 mpfs_reset_read(struct device *dev);
  35. void mpfs_reset_write(struct device *dev, u32 val);
  36. #endif /* if IS_ENABLED(CONFIG_MCHP_CLK_MPFS) */
  37. #endif /* __SOC_MPFS_H__ */