gpu_scheduler.h 18 KB

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  1. /*
  2. * Copyright 2015 Advanced Micro Devices, Inc.
  3. *
  4. * Permission is hereby granted, free of charge, to any person obtaining a
  5. * copy of this software and associated documentation files (the "Software"),
  6. * to deal in the Software without restriction, including without limitation
  7. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  8. * and/or sell copies of the Software, and to permit persons to whom the
  9. * Software is furnished to do so, subject to the following conditions:
  10. *
  11. * The above copyright notice and this permission notice shall be included in
  12. * all copies or substantial portions of the Software.
  13. *
  14. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  17. * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18. * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19. * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20. * OTHER DEALINGS IN THE SOFTWARE.
  21. *
  22. */
  23. #ifndef _DRM_GPU_SCHEDULER_H_
  24. #define _DRM_GPU_SCHEDULER_H_
  25. #include <drm/spsc_queue.h>
  26. #include <linux/dma-fence.h>
  27. #include <linux/completion.h>
  28. #include <linux/xarray.h>
  29. #include <linux/workqueue.h>
  30. #define MAX_WAIT_SCHED_ENTITY_Q_EMPTY msecs_to_jiffies(1000)
  31. /**
  32. * DRM_SCHED_FENCE_DONT_PIPELINE - Prefent dependency pipelining
  33. *
  34. * Setting this flag on a scheduler fence prevents pipelining of jobs depending
  35. * on this fence. In other words we always insert a full CPU round trip before
  36. * dependen jobs are pushed to the hw queue.
  37. */
  38. #define DRM_SCHED_FENCE_DONT_PIPELINE DMA_FENCE_FLAG_USER_BITS
  39. struct drm_gem_object;
  40. struct drm_gpu_scheduler;
  41. struct drm_sched_rq;
  42. /* These are often used as an (initial) index
  43. * to an array, and as such should start at 0.
  44. */
  45. enum drm_sched_priority {
  46. DRM_SCHED_PRIORITY_MIN,
  47. DRM_SCHED_PRIORITY_NORMAL,
  48. DRM_SCHED_PRIORITY_HIGH,
  49. DRM_SCHED_PRIORITY_KERNEL,
  50. DRM_SCHED_PRIORITY_COUNT
  51. };
  52. /**
  53. * struct drm_sched_entity - A wrapper around a job queue (typically
  54. * attached to the DRM file_priv).
  55. *
  56. * Entities will emit jobs in order to their corresponding hardware
  57. * ring, and the scheduler will alternate between entities based on
  58. * scheduling policy.
  59. */
  60. struct drm_sched_entity {
  61. /**
  62. * @list:
  63. *
  64. * Used to append this struct to the list of entities in the runqueue
  65. * @rq under &drm_sched_rq.entities.
  66. *
  67. * Protected by &drm_sched_rq.lock of @rq.
  68. */
  69. struct list_head list;
  70. /**
  71. * @rq:
  72. *
  73. * Runqueue on which this entity is currently scheduled.
  74. *
  75. * FIXME: Locking is very unclear for this. Writers are protected by
  76. * @rq_lock, but readers are generally lockless and seem to just race
  77. * with not even a READ_ONCE.
  78. */
  79. struct drm_sched_rq *rq;
  80. /**
  81. * @sched_list:
  82. *
  83. * A list of schedulers (struct drm_gpu_scheduler). Jobs from this entity can
  84. * be scheduled on any scheduler on this list.
  85. *
  86. * This can be modified by calling drm_sched_entity_modify_sched().
  87. * Locking is entirely up to the driver, see the above function for more
  88. * details.
  89. *
  90. * This will be set to NULL if &num_sched_list equals 1 and @rq has been
  91. * set already.
  92. *
  93. * FIXME: This means priority changes through
  94. * drm_sched_entity_set_priority() will be lost henceforth in this case.
  95. */
  96. struct drm_gpu_scheduler **sched_list;
  97. /**
  98. * @num_sched_list:
  99. *
  100. * Number of drm_gpu_schedulers in the @sched_list.
  101. */
  102. unsigned int num_sched_list;
  103. /**
  104. * @priority:
  105. *
  106. * Priority of the entity. This can be modified by calling
  107. * drm_sched_entity_set_priority(). Protected by &rq_lock.
  108. */
  109. enum drm_sched_priority priority;
  110. /**
  111. * @rq_lock:
  112. *
  113. * Lock to modify the runqueue to which this entity belongs.
  114. */
  115. spinlock_t rq_lock;
  116. /**
  117. * @job_queue: the list of jobs of this entity.
  118. */
  119. struct spsc_queue job_queue;
  120. /**
  121. * @fence_seq:
  122. *
  123. * A linearly increasing seqno incremented with each new
  124. * &drm_sched_fence which is part of the entity.
  125. *
  126. * FIXME: Callers of drm_sched_job_arm() need to ensure correct locking,
  127. * this doesn't need to be atomic.
  128. */
  129. atomic_t fence_seq;
  130. /**
  131. * @fence_context:
  132. *
  133. * A unique context for all the fences which belong to this entity. The
  134. * &drm_sched_fence.scheduled uses the fence_context but
  135. * &drm_sched_fence.finished uses fence_context + 1.
  136. */
  137. uint64_t fence_context;
  138. /**
  139. * @dependency:
  140. *
  141. * The dependency fence of the job which is on the top of the job queue.
  142. */
  143. struct dma_fence *dependency;
  144. /**
  145. * @cb:
  146. *
  147. * Callback for the dependency fence above.
  148. */
  149. struct dma_fence_cb cb;
  150. /**
  151. * @guilty:
  152. *
  153. * Points to entities' guilty.
  154. */
  155. atomic_t *guilty;
  156. /**
  157. * @last_scheduled:
  158. *
  159. * Points to the finished fence of the last scheduled job. Only written
  160. * by the scheduler thread, can be accessed locklessly from
  161. * drm_sched_job_arm() iff the queue is empty.
  162. */
  163. struct dma_fence *last_scheduled;
  164. /**
  165. * @last_user: last group leader pushing a job into the entity.
  166. */
  167. struct task_struct *last_user;
  168. /**
  169. * @stopped:
  170. *
  171. * Marks the enity as removed from rq and destined for
  172. * termination. This is set by calling drm_sched_entity_flush() and by
  173. * drm_sched_fini().
  174. */
  175. bool stopped;
  176. /**
  177. * @entity_idle:
  178. *
  179. * Signals when entity is not in use, used to sequence entity cleanup in
  180. * drm_sched_entity_fini().
  181. */
  182. struct completion entity_idle;
  183. };
  184. /**
  185. * struct drm_sched_rq - queue of entities to be scheduled.
  186. *
  187. * @lock: to modify the entities list.
  188. * @sched: the scheduler to which this rq belongs to.
  189. * @entities: list of the entities to be scheduled.
  190. * @current_entity: the entity which is to be scheduled.
  191. *
  192. * Run queue is a set of entities scheduling command submissions for
  193. * one specific ring. It implements the scheduling policy that selects
  194. * the next entity to emit commands from.
  195. */
  196. struct drm_sched_rq {
  197. spinlock_t lock;
  198. struct drm_gpu_scheduler *sched;
  199. struct list_head entities;
  200. struct drm_sched_entity *current_entity;
  201. };
  202. /**
  203. * struct drm_sched_fence - fences corresponding to the scheduling of a job.
  204. */
  205. struct drm_sched_fence {
  206. /**
  207. * @scheduled: this fence is what will be signaled by the scheduler
  208. * when the job is scheduled.
  209. */
  210. struct dma_fence scheduled;
  211. /**
  212. * @finished: this fence is what will be signaled by the scheduler
  213. * when the job is completed.
  214. *
  215. * When setting up an out fence for the job, you should use
  216. * this, since it's available immediately upon
  217. * drm_sched_job_init(), and the fence returned by the driver
  218. * from run_job() won't be created until the dependencies have
  219. * resolved.
  220. */
  221. struct dma_fence finished;
  222. /**
  223. * @parent: the fence returned by &drm_sched_backend_ops.run_job
  224. * when scheduling the job on hardware. We signal the
  225. * &drm_sched_fence.finished fence once parent is signalled.
  226. */
  227. struct dma_fence *parent;
  228. /**
  229. * @sched: the scheduler instance to which the job having this struct
  230. * belongs to.
  231. */
  232. struct drm_gpu_scheduler *sched;
  233. /**
  234. * @lock: the lock used by the scheduled and the finished fences.
  235. */
  236. spinlock_t lock;
  237. /**
  238. * @owner: job owner for debugging
  239. */
  240. void *owner;
  241. };
  242. struct drm_sched_fence *to_drm_sched_fence(struct dma_fence *f);
  243. /**
  244. * struct drm_sched_job - A job to be run by an entity.
  245. *
  246. * @queue_node: used to append this struct to the queue of jobs in an entity.
  247. * @list: a job participates in a "pending" and "done" lists.
  248. * @sched: the scheduler instance on which this job is scheduled.
  249. * @s_fence: contains the fences for the scheduling of job.
  250. * @finish_cb: the callback for the finished fence.
  251. * @work: Helper to reschdeule job kill to different context.
  252. * @id: a unique id assigned to each job scheduled on the scheduler.
  253. * @karma: increment on every hang caused by this job. If this exceeds the hang
  254. * limit of the scheduler then the job is marked guilty and will not
  255. * be scheduled further.
  256. * @s_priority: the priority of the job.
  257. * @entity: the entity to which this job belongs.
  258. * @cb: the callback for the parent fence in s_fence.
  259. *
  260. * A job is created by the driver using drm_sched_job_init(), and
  261. * should call drm_sched_entity_push_job() once it wants the scheduler
  262. * to schedule the job.
  263. */
  264. struct drm_sched_job {
  265. struct spsc_node queue_node;
  266. struct list_head list;
  267. struct drm_gpu_scheduler *sched;
  268. struct drm_sched_fence *s_fence;
  269. /*
  270. * work is used only after finish_cb has been used and will not be
  271. * accessed anymore.
  272. */
  273. union {
  274. struct dma_fence_cb finish_cb;
  275. struct work_struct work;
  276. };
  277. uint64_t id;
  278. atomic_t karma;
  279. enum drm_sched_priority s_priority;
  280. struct drm_sched_entity *entity;
  281. struct dma_fence_cb cb;
  282. /**
  283. * @dependencies:
  284. *
  285. * Contains the dependencies as struct dma_fence for this job, see
  286. * drm_sched_job_add_dependency() and
  287. * drm_sched_job_add_implicit_dependencies().
  288. */
  289. struct xarray dependencies;
  290. /** @last_dependency: tracks @dependencies as they signal */
  291. unsigned long last_dependency;
  292. };
  293. static inline bool drm_sched_invalidate_job(struct drm_sched_job *s_job,
  294. int threshold)
  295. {
  296. return s_job && atomic_inc_return(&s_job->karma) > threshold;
  297. }
  298. enum drm_gpu_sched_stat {
  299. DRM_GPU_SCHED_STAT_NONE, /* Reserve 0 */
  300. DRM_GPU_SCHED_STAT_NOMINAL,
  301. DRM_GPU_SCHED_STAT_ENODEV,
  302. };
  303. /**
  304. * struct drm_sched_backend_ops - Define the backend operations
  305. * called by the scheduler
  306. *
  307. * These functions should be implemented in the driver side.
  308. */
  309. struct drm_sched_backend_ops {
  310. /**
  311. * @dependency:
  312. *
  313. * Called when the scheduler is considering scheduling this job next, to
  314. * get another struct dma_fence for this job to block on. Once it
  315. * returns NULL, run_job() may be called.
  316. *
  317. * If a driver exclusively uses drm_sched_job_add_dependency() and
  318. * drm_sched_job_add_implicit_dependencies() this can be ommitted and
  319. * left as NULL.
  320. */
  321. struct dma_fence *(*dependency)(struct drm_sched_job *sched_job,
  322. struct drm_sched_entity *s_entity);
  323. /**
  324. * @run_job: Called to execute the job once all of the dependencies
  325. * have been resolved. This may be called multiple times, if
  326. * timedout_job() has happened and drm_sched_job_recovery()
  327. * decides to try it again.
  328. */
  329. struct dma_fence *(*run_job)(struct drm_sched_job *sched_job);
  330. /**
  331. * @timedout_job: Called when a job has taken too long to execute,
  332. * to trigger GPU recovery.
  333. *
  334. * This method is called in a workqueue context.
  335. *
  336. * Drivers typically issue a reset to recover from GPU hangs, and this
  337. * procedure usually follows the following workflow:
  338. *
  339. * 1. Stop the scheduler using drm_sched_stop(). This will park the
  340. * scheduler thread and cancel the timeout work, guaranteeing that
  341. * nothing is queued while we reset the hardware queue
  342. * 2. Try to gracefully stop non-faulty jobs (optional)
  343. * 3. Issue a GPU reset (driver-specific)
  344. * 4. Re-submit jobs using drm_sched_resubmit_jobs()
  345. * 5. Restart the scheduler using drm_sched_start(). At that point, new
  346. * jobs can be queued, and the scheduler thread is unblocked
  347. *
  348. * Note that some GPUs have distinct hardware queues but need to reset
  349. * the GPU globally, which requires extra synchronization between the
  350. * timeout handler of the different &drm_gpu_scheduler. One way to
  351. * achieve this synchronization is to create an ordered workqueue
  352. * (using alloc_ordered_workqueue()) at the driver level, and pass this
  353. * queue to drm_sched_init(), to guarantee that timeout handlers are
  354. * executed sequentially. The above workflow needs to be slightly
  355. * adjusted in that case:
  356. *
  357. * 1. Stop all schedulers impacted by the reset using drm_sched_stop()
  358. * 2. Try to gracefully stop non-faulty jobs on all queues impacted by
  359. * the reset (optional)
  360. * 3. Issue a GPU reset on all faulty queues (driver-specific)
  361. * 4. Re-submit jobs on all schedulers impacted by the reset using
  362. * drm_sched_resubmit_jobs()
  363. * 5. Restart all schedulers that were stopped in step #1 using
  364. * drm_sched_start()
  365. *
  366. * Return DRM_GPU_SCHED_STAT_NOMINAL, when all is normal,
  367. * and the underlying driver has started or completed recovery.
  368. *
  369. * Return DRM_GPU_SCHED_STAT_ENODEV, if the device is no longer
  370. * available, i.e. has been unplugged.
  371. */
  372. enum drm_gpu_sched_stat (*timedout_job)(struct drm_sched_job *sched_job);
  373. /**
  374. * @free_job: Called once the job's finished fence has been signaled
  375. * and it's time to clean it up.
  376. */
  377. void (*free_job)(struct drm_sched_job *sched_job);
  378. };
  379. /**
  380. * struct drm_gpu_scheduler - scheduler instance-specific data
  381. *
  382. * @ops: backend operations provided by the driver.
  383. * @hw_submission_limit: the max size of the hardware queue.
  384. * @timeout: the time after which a job is removed from the scheduler.
  385. * @name: name of the ring for which this scheduler is being used.
  386. * @sched_rq: priority wise array of run queues.
  387. * @wake_up_worker: the wait queue on which the scheduler sleeps until a job
  388. * is ready to be scheduled.
  389. * @job_scheduled: once @drm_sched_entity_do_release is called the scheduler
  390. * waits on this wait queue until all the scheduled jobs are
  391. * finished.
  392. * @hw_rq_count: the number of jobs currently in the hardware queue.
  393. * @job_id_count: used to assign unique id to the each job.
  394. * @timeout_wq: workqueue used to queue @work_tdr
  395. * @work_tdr: schedules a delayed call to @drm_sched_job_timedout after the
  396. * timeout interval is over.
  397. * @thread: the kthread on which the scheduler which run.
  398. * @pending_list: the list of jobs which are currently in the job queue.
  399. * @job_list_lock: lock to protect the pending_list.
  400. * @hang_limit: once the hangs by a job crosses this limit then it is marked
  401. * guilty and it will no longer be considered for scheduling.
  402. * @score: score to help loadbalancer pick a idle sched
  403. * @_score: score used when the driver doesn't provide one
  404. * @ready: marks if the underlying HW is ready to work
  405. * @free_guilty: A hit to time out handler to free the guilty job.
  406. * @dev: system &struct device
  407. *
  408. * One scheduler is implemented for each hardware ring.
  409. */
  410. struct drm_gpu_scheduler {
  411. const struct drm_sched_backend_ops *ops;
  412. uint32_t hw_submission_limit;
  413. long timeout;
  414. const char *name;
  415. struct drm_sched_rq sched_rq[DRM_SCHED_PRIORITY_COUNT];
  416. wait_queue_head_t wake_up_worker;
  417. wait_queue_head_t job_scheduled;
  418. atomic_t hw_rq_count;
  419. atomic64_t job_id_count;
  420. struct workqueue_struct *timeout_wq;
  421. struct delayed_work work_tdr;
  422. struct task_struct *thread;
  423. struct list_head pending_list;
  424. spinlock_t job_list_lock;
  425. int hang_limit;
  426. atomic_t *score;
  427. atomic_t _score;
  428. bool ready;
  429. bool free_guilty;
  430. struct device *dev;
  431. };
  432. int drm_sched_init(struct drm_gpu_scheduler *sched,
  433. const struct drm_sched_backend_ops *ops,
  434. uint32_t hw_submission, unsigned hang_limit,
  435. long timeout, struct workqueue_struct *timeout_wq,
  436. atomic_t *score, const char *name, struct device *dev);
  437. void drm_sched_fini(struct drm_gpu_scheduler *sched);
  438. int drm_sched_job_init(struct drm_sched_job *job,
  439. struct drm_sched_entity *entity,
  440. void *owner);
  441. void drm_sched_job_arm(struct drm_sched_job *job);
  442. int drm_sched_job_add_dependency(struct drm_sched_job *job,
  443. struct dma_fence *fence);
  444. int drm_sched_job_add_implicit_dependencies(struct drm_sched_job *job,
  445. struct drm_gem_object *obj,
  446. bool write);
  447. void drm_sched_entity_modify_sched(struct drm_sched_entity *entity,
  448. struct drm_gpu_scheduler **sched_list,
  449. unsigned int num_sched_list);
  450. void drm_sched_job_cleanup(struct drm_sched_job *job);
  451. void drm_sched_wakeup(struct drm_gpu_scheduler *sched);
  452. void drm_sched_stop(struct drm_gpu_scheduler *sched, struct drm_sched_job *bad);
  453. void drm_sched_start(struct drm_gpu_scheduler *sched, bool full_recovery);
  454. void drm_sched_resubmit_jobs(struct drm_gpu_scheduler *sched);
  455. void drm_sched_resubmit_jobs_ext(struct drm_gpu_scheduler *sched, int max);
  456. void drm_sched_increase_karma(struct drm_sched_job *bad);
  457. void drm_sched_reset_karma(struct drm_sched_job *bad);
  458. void drm_sched_increase_karma_ext(struct drm_sched_job *bad, int type);
  459. bool drm_sched_dependency_optimized(struct dma_fence* fence,
  460. struct drm_sched_entity *entity);
  461. void drm_sched_fault(struct drm_gpu_scheduler *sched);
  462. void drm_sched_job_kickout(struct drm_sched_job *s_job);
  463. void drm_sched_rq_add_entity(struct drm_sched_rq *rq,
  464. struct drm_sched_entity *entity);
  465. void drm_sched_rq_remove_entity(struct drm_sched_rq *rq,
  466. struct drm_sched_entity *entity);
  467. int drm_sched_entity_init(struct drm_sched_entity *entity,
  468. enum drm_sched_priority priority,
  469. struct drm_gpu_scheduler **sched_list,
  470. unsigned int num_sched_list,
  471. atomic_t *guilty);
  472. long drm_sched_entity_flush(struct drm_sched_entity *entity, long timeout);
  473. void drm_sched_entity_fini(struct drm_sched_entity *entity);
  474. void drm_sched_entity_destroy(struct drm_sched_entity *entity);
  475. void drm_sched_entity_select_rq(struct drm_sched_entity *entity);
  476. struct drm_sched_job *drm_sched_entity_pop_job(struct drm_sched_entity *entity);
  477. void drm_sched_entity_push_job(struct drm_sched_job *sched_job);
  478. void drm_sched_entity_set_priority(struct drm_sched_entity *entity,
  479. enum drm_sched_priority priority);
  480. bool drm_sched_entity_is_ready(struct drm_sched_entity *entity);
  481. struct drm_sched_fence *drm_sched_fence_alloc(
  482. struct drm_sched_entity *s_entity, void *owner);
  483. void drm_sched_fence_init(struct drm_sched_fence *fence,
  484. struct drm_sched_entity *entity);
  485. void drm_sched_fence_free(struct drm_sched_fence *fence);
  486. void drm_sched_fence_scheduled(struct drm_sched_fence *fence);
  487. void drm_sched_fence_finished(struct drm_sched_fence *fence);
  488. unsigned long drm_sched_suspend_timeout(struct drm_gpu_scheduler *sched);
  489. void drm_sched_resume_timeout(struct drm_gpu_scheduler *sched,
  490. unsigned long remaining);
  491. struct drm_gpu_scheduler *
  492. drm_sched_pick_best(struct drm_gpu_scheduler **sched_list,
  493. unsigned int num_sched_list);
  494. #endif