conf_space.c 11 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * PCI Backend - Functions for creating a virtual configuration space for
  4. * exported PCI Devices.
  5. * It's dangerous to allow PCI Driver Domains to change their
  6. * device's resources (memory, i/o ports, interrupts). We need to
  7. * restrict changes to certain PCI Configuration registers:
  8. * BARs, INTERRUPT_PIN, most registers in the header...
  9. *
  10. * Author: Ryan Wilson <[email protected]>
  11. */
  12. #define dev_fmt(fmt) DRV_NAME ": " fmt
  13. #include <linux/kernel.h>
  14. #include <linux/moduleparam.h>
  15. #include <linux/pci.h>
  16. #include "pciback.h"
  17. #include "conf_space.h"
  18. #include "conf_space_quirks.h"
  19. bool xen_pcibk_permissive;
  20. module_param_named(permissive, xen_pcibk_permissive, bool, 0644);
  21. /* This is where xen_pcibk_read_config_byte, xen_pcibk_read_config_word,
  22. * xen_pcibk_write_config_word, and xen_pcibk_write_config_byte are created. */
  23. #define DEFINE_PCI_CONFIG(op, size, type) \
  24. int xen_pcibk_##op##_config_##size \
  25. (struct pci_dev *dev, int offset, type value, void *data) \
  26. { \
  27. return pci_##op##_config_##size(dev, offset, value); \
  28. }
  29. DEFINE_PCI_CONFIG(read, byte, u8 *)
  30. DEFINE_PCI_CONFIG(read, word, u16 *)
  31. DEFINE_PCI_CONFIG(read, dword, u32 *)
  32. DEFINE_PCI_CONFIG(write, byte, u8)
  33. DEFINE_PCI_CONFIG(write, word, u16)
  34. DEFINE_PCI_CONFIG(write, dword, u32)
  35. static int conf_space_read(struct pci_dev *dev,
  36. const struct config_field_entry *entry,
  37. int offset, u32 *value)
  38. {
  39. int ret = 0;
  40. const struct config_field *field = entry->field;
  41. *value = 0;
  42. switch (field->size) {
  43. case 1:
  44. if (field->u.b.read)
  45. ret = field->u.b.read(dev, offset, (u8 *) value,
  46. entry->data);
  47. break;
  48. case 2:
  49. if (field->u.w.read)
  50. ret = field->u.w.read(dev, offset, (u16 *) value,
  51. entry->data);
  52. break;
  53. case 4:
  54. if (field->u.dw.read)
  55. ret = field->u.dw.read(dev, offset, value, entry->data);
  56. break;
  57. }
  58. return ret;
  59. }
  60. static int conf_space_write(struct pci_dev *dev,
  61. const struct config_field_entry *entry,
  62. int offset, u32 value)
  63. {
  64. int ret = 0;
  65. const struct config_field *field = entry->field;
  66. switch (field->size) {
  67. case 1:
  68. if (field->u.b.write)
  69. ret = field->u.b.write(dev, offset, (u8) value,
  70. entry->data);
  71. break;
  72. case 2:
  73. if (field->u.w.write)
  74. ret = field->u.w.write(dev, offset, (u16) value,
  75. entry->data);
  76. break;
  77. case 4:
  78. if (field->u.dw.write)
  79. ret = field->u.dw.write(dev, offset, value,
  80. entry->data);
  81. break;
  82. }
  83. return ret;
  84. }
  85. static inline u32 get_mask(int size)
  86. {
  87. if (size == 1)
  88. return 0xff;
  89. else if (size == 2)
  90. return 0xffff;
  91. else
  92. return 0xffffffff;
  93. }
  94. static inline int valid_request(int offset, int size)
  95. {
  96. /* Validate request (no un-aligned requests) */
  97. if ((size == 1 || size == 2 || size == 4) && (offset % size) == 0)
  98. return 1;
  99. return 0;
  100. }
  101. static inline u32 merge_value(u32 val, u32 new_val, u32 new_val_mask,
  102. int offset)
  103. {
  104. if (offset >= 0) {
  105. new_val_mask <<= (offset * 8);
  106. new_val <<= (offset * 8);
  107. } else {
  108. new_val_mask >>= (offset * -8);
  109. new_val >>= (offset * -8);
  110. }
  111. val = (val & ~new_val_mask) | (new_val & new_val_mask);
  112. return val;
  113. }
  114. static int xen_pcibios_err_to_errno(int err)
  115. {
  116. switch (err) {
  117. case PCIBIOS_SUCCESSFUL:
  118. return XEN_PCI_ERR_success;
  119. case PCIBIOS_DEVICE_NOT_FOUND:
  120. return XEN_PCI_ERR_dev_not_found;
  121. case PCIBIOS_BAD_REGISTER_NUMBER:
  122. return XEN_PCI_ERR_invalid_offset;
  123. case PCIBIOS_FUNC_NOT_SUPPORTED:
  124. return XEN_PCI_ERR_not_implemented;
  125. case PCIBIOS_SET_FAILED:
  126. return XEN_PCI_ERR_access_denied;
  127. }
  128. return err;
  129. }
  130. int xen_pcibk_config_read(struct pci_dev *dev, int offset, int size,
  131. u32 *ret_val)
  132. {
  133. int err = 0;
  134. struct xen_pcibk_dev_data *dev_data = pci_get_drvdata(dev);
  135. const struct config_field_entry *cfg_entry;
  136. const struct config_field *field;
  137. int field_start, field_end;
  138. /* if read fails for any reason, return 0
  139. * (as if device didn't respond) */
  140. u32 value = 0, tmp_val;
  141. dev_dbg(&dev->dev, "read %d bytes at 0x%x\n", size, offset);
  142. if (!valid_request(offset, size)) {
  143. err = XEN_PCI_ERR_invalid_offset;
  144. goto out;
  145. }
  146. /* Get the real value first, then modify as appropriate */
  147. switch (size) {
  148. case 1:
  149. err = pci_read_config_byte(dev, offset, (u8 *) &value);
  150. break;
  151. case 2:
  152. err = pci_read_config_word(dev, offset, (u16 *) &value);
  153. break;
  154. case 4:
  155. err = pci_read_config_dword(dev, offset, &value);
  156. break;
  157. }
  158. list_for_each_entry(cfg_entry, &dev_data->config_fields, list) {
  159. field = cfg_entry->field;
  160. field_start = OFFSET(cfg_entry);
  161. field_end = OFFSET(cfg_entry) + field->size;
  162. if (offset + size > field_start && field_end > offset) {
  163. err = conf_space_read(dev, cfg_entry, field_start,
  164. &tmp_val);
  165. if (err)
  166. goto out;
  167. value = merge_value(value, tmp_val,
  168. get_mask(field->size),
  169. field_start - offset);
  170. }
  171. }
  172. out:
  173. dev_dbg(&dev->dev, "read %d bytes at 0x%x = %x\n", size, offset, value);
  174. *ret_val = value;
  175. return xen_pcibios_err_to_errno(err);
  176. }
  177. int xen_pcibk_config_write(struct pci_dev *dev, int offset, int size, u32 value)
  178. {
  179. int err = 0, handled = 0;
  180. struct xen_pcibk_dev_data *dev_data = pci_get_drvdata(dev);
  181. const struct config_field_entry *cfg_entry;
  182. const struct config_field *field;
  183. u32 tmp_val;
  184. int field_start, field_end;
  185. dev_dbg(&dev->dev, "write request %d bytes at 0x%x = %x\n",
  186. size, offset, value);
  187. if (!valid_request(offset, size))
  188. return XEN_PCI_ERR_invalid_offset;
  189. list_for_each_entry(cfg_entry, &dev_data->config_fields, list) {
  190. field = cfg_entry->field;
  191. field_start = OFFSET(cfg_entry);
  192. field_end = OFFSET(cfg_entry) + field->size;
  193. if (offset + size > field_start && field_end > offset) {
  194. err = conf_space_read(dev, cfg_entry, field_start,
  195. &tmp_val);
  196. if (err)
  197. break;
  198. tmp_val = merge_value(tmp_val, value, get_mask(size),
  199. offset - field_start);
  200. err = conf_space_write(dev, cfg_entry, field_start,
  201. tmp_val);
  202. /* handled is set true here, but not every byte
  203. * may have been written! Properly detecting if
  204. * every byte is handled is unnecessary as the
  205. * flag is used to detect devices that need
  206. * special helpers to work correctly.
  207. */
  208. handled = 1;
  209. }
  210. }
  211. if (!handled && !err) {
  212. /* By default, anything not specificially handled above is
  213. * read-only. The permissive flag changes this behavior so
  214. * that anything not specifically handled above is writable.
  215. * This means that some fields may still be read-only because
  216. * they have entries in the config_field list that intercept
  217. * the write and do nothing. */
  218. if (dev_data->permissive || xen_pcibk_permissive) {
  219. switch (size) {
  220. case 1:
  221. err = pci_write_config_byte(dev, offset,
  222. (u8) value);
  223. break;
  224. case 2:
  225. err = pci_write_config_word(dev, offset,
  226. (u16) value);
  227. break;
  228. case 4:
  229. err = pci_write_config_dword(dev, offset,
  230. (u32) value);
  231. break;
  232. }
  233. } else if (!dev_data->warned_on_write) {
  234. dev_data->warned_on_write = 1;
  235. dev_warn(&dev->dev, "Driver tried to write to a "
  236. "read-only configuration space field at offset"
  237. " 0x%x, size %d. This may be harmless, but if "
  238. "you have problems with your device:\n"
  239. "1) see permissive attribute in sysfs\n"
  240. "2) report problems to the xen-devel "
  241. "mailing list along with details of your "
  242. "device obtained from lspci.\n", offset, size);
  243. }
  244. }
  245. return xen_pcibios_err_to_errno(err);
  246. }
  247. int xen_pcibk_get_interrupt_type(struct pci_dev *dev)
  248. {
  249. int err;
  250. u16 val;
  251. int ret = 0;
  252. /*
  253. * Do not trust dev->msi(x)_enabled here, as enabling could be done
  254. * bypassing the pci_*msi* functions, by the qemu.
  255. */
  256. if (dev->msi_cap) {
  257. err = pci_read_config_word(dev,
  258. dev->msi_cap + PCI_MSI_FLAGS,
  259. &val);
  260. if (err)
  261. return err;
  262. if (val & PCI_MSI_FLAGS_ENABLE)
  263. ret |= INTERRUPT_TYPE_MSI;
  264. }
  265. if (dev->msix_cap) {
  266. err = pci_read_config_word(dev,
  267. dev->msix_cap + PCI_MSIX_FLAGS,
  268. &val);
  269. if (err)
  270. return err;
  271. if (val & PCI_MSIX_FLAGS_ENABLE)
  272. ret |= INTERRUPT_TYPE_MSIX;
  273. }
  274. /*
  275. * PCIe spec says device cannot use INTx if MSI/MSI-X is enabled,
  276. * so check for INTx only when both are disabled.
  277. */
  278. if (!ret) {
  279. err = pci_read_config_word(dev, PCI_COMMAND, &val);
  280. if (err)
  281. return err;
  282. if (!(val & PCI_COMMAND_INTX_DISABLE))
  283. ret |= INTERRUPT_TYPE_INTX;
  284. }
  285. return ret ?: INTERRUPT_TYPE_NONE;
  286. }
  287. void xen_pcibk_config_free_dyn_fields(struct pci_dev *dev)
  288. {
  289. struct xen_pcibk_dev_data *dev_data = pci_get_drvdata(dev);
  290. struct config_field_entry *cfg_entry, *t;
  291. const struct config_field *field;
  292. dev_dbg(&dev->dev, "free-ing dynamically allocated virtual "
  293. "configuration space fields\n");
  294. if (!dev_data)
  295. return;
  296. list_for_each_entry_safe(cfg_entry, t, &dev_data->config_fields, list) {
  297. field = cfg_entry->field;
  298. if (field->clean) {
  299. field->clean((struct config_field *)field);
  300. kfree(cfg_entry->data);
  301. list_del(&cfg_entry->list);
  302. kfree(cfg_entry);
  303. }
  304. }
  305. }
  306. void xen_pcibk_config_reset_dev(struct pci_dev *dev)
  307. {
  308. struct xen_pcibk_dev_data *dev_data = pci_get_drvdata(dev);
  309. const struct config_field_entry *cfg_entry;
  310. const struct config_field *field;
  311. dev_dbg(&dev->dev, "resetting virtual configuration space\n");
  312. if (!dev_data)
  313. return;
  314. list_for_each_entry(cfg_entry, &dev_data->config_fields, list) {
  315. field = cfg_entry->field;
  316. if (field->reset)
  317. field->reset(dev, OFFSET(cfg_entry), cfg_entry->data);
  318. }
  319. }
  320. void xen_pcibk_config_free_dev(struct pci_dev *dev)
  321. {
  322. struct xen_pcibk_dev_data *dev_data = pci_get_drvdata(dev);
  323. struct config_field_entry *cfg_entry, *t;
  324. const struct config_field *field;
  325. dev_dbg(&dev->dev, "free-ing virtual configuration space fields\n");
  326. if (!dev_data)
  327. return;
  328. list_for_each_entry_safe(cfg_entry, t, &dev_data->config_fields, list) {
  329. list_del(&cfg_entry->list);
  330. field = cfg_entry->field;
  331. if (field->release)
  332. field->release(dev, OFFSET(cfg_entry), cfg_entry->data);
  333. kfree(cfg_entry);
  334. }
  335. }
  336. int xen_pcibk_config_add_field_offset(struct pci_dev *dev,
  337. const struct config_field *field,
  338. unsigned int base_offset)
  339. {
  340. int err = 0;
  341. struct xen_pcibk_dev_data *dev_data = pci_get_drvdata(dev);
  342. struct config_field_entry *cfg_entry;
  343. void *tmp;
  344. cfg_entry = kmalloc(sizeof(*cfg_entry), GFP_KERNEL);
  345. if (!cfg_entry) {
  346. err = -ENOMEM;
  347. goto out;
  348. }
  349. cfg_entry->data = NULL;
  350. cfg_entry->field = field;
  351. cfg_entry->base_offset = base_offset;
  352. /* silently ignore duplicate fields */
  353. err = xen_pcibk_field_is_dup(dev, OFFSET(cfg_entry));
  354. if (err)
  355. goto out;
  356. if (field->init) {
  357. tmp = field->init(dev, OFFSET(cfg_entry));
  358. if (IS_ERR(tmp)) {
  359. err = PTR_ERR(tmp);
  360. goto out;
  361. }
  362. cfg_entry->data = tmp;
  363. }
  364. dev_dbg(&dev->dev, "added config field at offset 0x%02x\n",
  365. OFFSET(cfg_entry));
  366. list_add_tail(&cfg_entry->list, &dev_data->config_fields);
  367. out:
  368. if (err)
  369. kfree(cfg_entry);
  370. return err;
  371. }
  372. /* This sets up the device's virtual configuration space to keep track of
  373. * certain registers (like the base address registers (BARs) so that we can
  374. * keep the client from manipulating them directly.
  375. */
  376. int xen_pcibk_config_init_dev(struct pci_dev *dev)
  377. {
  378. int err = 0;
  379. struct xen_pcibk_dev_data *dev_data = pci_get_drvdata(dev);
  380. dev_dbg(&dev->dev, "initializing virtual configuration space\n");
  381. INIT_LIST_HEAD(&dev_data->config_fields);
  382. err = xen_pcibk_config_header_add_fields(dev);
  383. if (err)
  384. goto out;
  385. err = xen_pcibk_config_capability_add_fields(dev);
  386. if (err)
  387. goto out;
  388. err = xen_pcibk_config_quirks_init(dev);
  389. out:
  390. return err;
  391. }
  392. int xen_pcibk_config_init(void)
  393. {
  394. return xen_pcibk_config_capability_init();
  395. }