sun3x_esp.c 6.3 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /* sun3x_esp.c: ESP front-end for Sun3x systems.
  3. *
  4. * Copyright (C) 2007,2008 Thomas Bogendoerfer ([email protected])
  5. */
  6. #include <linux/kernel.h>
  7. #include <linux/gfp.h>
  8. #include <linux/types.h>
  9. #include <linux/delay.h>
  10. #include <linux/module.h>
  11. #include <linux/init.h>
  12. #include <linux/platform_device.h>
  13. #include <linux/dma-mapping.h>
  14. #include <linux/interrupt.h>
  15. #include <linux/io.h>
  16. #include <asm/sun3x.h>
  17. #include <asm/dma.h>
  18. #include <asm/dvma.h>
  19. /* DMA controller reg offsets */
  20. #define DMA_CSR 0x00UL /* rw DMA control/status register 0x00 */
  21. #define DMA_ADDR 0x04UL /* rw DMA transfer address register 0x04 */
  22. #define DMA_COUNT 0x08UL /* rw DMA transfer count register 0x08 */
  23. #define DMA_TEST 0x0cUL /* rw DMA test/debug register 0x0c */
  24. #include <scsi/scsi_host.h>
  25. #include "esp_scsi.h"
  26. #define DRV_MODULE_NAME "sun3x_esp"
  27. #define PFX DRV_MODULE_NAME ": "
  28. #define DRV_VERSION "1.000"
  29. #define DRV_MODULE_RELDATE "Nov 1, 2007"
  30. /*
  31. * m68k always assumes readl/writel operate on little endian
  32. * mmio space; this is wrong at least for Sun3x, so we
  33. * need to workaround this until a proper way is found
  34. */
  35. #if 0
  36. #define dma_read32(REG) \
  37. readl(esp->dma_regs + (REG))
  38. #define dma_write32(VAL, REG) \
  39. writel((VAL), esp->dma_regs + (REG))
  40. #else
  41. #define dma_read32(REG) \
  42. *(volatile u32 *)(esp->dma_regs + (REG))
  43. #define dma_write32(VAL, REG) \
  44. do { *(volatile u32 *)(esp->dma_regs + (REG)) = (VAL); } while (0)
  45. #endif
  46. static void sun3x_esp_write8(struct esp *esp, u8 val, unsigned long reg)
  47. {
  48. writeb(val, esp->regs + (reg * 4UL));
  49. }
  50. static u8 sun3x_esp_read8(struct esp *esp, unsigned long reg)
  51. {
  52. return readb(esp->regs + (reg * 4UL));
  53. }
  54. static int sun3x_esp_irq_pending(struct esp *esp)
  55. {
  56. if (dma_read32(DMA_CSR) & (DMA_HNDL_INTR | DMA_HNDL_ERROR))
  57. return 1;
  58. return 0;
  59. }
  60. static void sun3x_esp_reset_dma(struct esp *esp)
  61. {
  62. u32 val;
  63. val = dma_read32(DMA_CSR);
  64. dma_write32(val | DMA_RST_SCSI, DMA_CSR);
  65. dma_write32(val & ~DMA_RST_SCSI, DMA_CSR);
  66. /* Enable interrupts. */
  67. val = dma_read32(DMA_CSR);
  68. dma_write32(val | DMA_INT_ENAB, DMA_CSR);
  69. }
  70. static void sun3x_esp_dma_drain(struct esp *esp)
  71. {
  72. u32 csr;
  73. int lim;
  74. csr = dma_read32(DMA_CSR);
  75. if (!(csr & DMA_FIFO_ISDRAIN))
  76. return;
  77. dma_write32(csr | DMA_FIFO_STDRAIN, DMA_CSR);
  78. lim = 1000;
  79. while (dma_read32(DMA_CSR) & DMA_FIFO_ISDRAIN) {
  80. if (--lim == 0) {
  81. printk(KERN_ALERT PFX "esp%d: DMA will not drain!\n",
  82. esp->host->unique_id);
  83. break;
  84. }
  85. udelay(1);
  86. }
  87. }
  88. static void sun3x_esp_dma_invalidate(struct esp *esp)
  89. {
  90. u32 val;
  91. int lim;
  92. lim = 1000;
  93. while ((val = dma_read32(DMA_CSR)) & DMA_PEND_READ) {
  94. if (--lim == 0) {
  95. printk(KERN_ALERT PFX "esp%d: DMA will not "
  96. "invalidate!\n", esp->host->unique_id);
  97. break;
  98. }
  99. udelay(1);
  100. }
  101. val &= ~(DMA_ENABLE | DMA_ST_WRITE | DMA_BCNT_ENAB);
  102. val |= DMA_FIFO_INV;
  103. dma_write32(val, DMA_CSR);
  104. val &= ~DMA_FIFO_INV;
  105. dma_write32(val, DMA_CSR);
  106. }
  107. static void sun3x_esp_send_dma_cmd(struct esp *esp, u32 addr, u32 esp_count,
  108. u32 dma_count, int write, u8 cmd)
  109. {
  110. u32 csr;
  111. BUG_ON(!(cmd & ESP_CMD_DMA));
  112. sun3x_esp_write8(esp, (esp_count >> 0) & 0xff, ESP_TCLOW);
  113. sun3x_esp_write8(esp, (esp_count >> 8) & 0xff, ESP_TCMED);
  114. csr = dma_read32(DMA_CSR);
  115. csr |= DMA_ENABLE;
  116. if (write)
  117. csr |= DMA_ST_WRITE;
  118. else
  119. csr &= ~DMA_ST_WRITE;
  120. dma_write32(csr, DMA_CSR);
  121. dma_write32(addr, DMA_ADDR);
  122. scsi_esp_cmd(esp, cmd);
  123. }
  124. static int sun3x_esp_dma_error(struct esp *esp)
  125. {
  126. u32 csr = dma_read32(DMA_CSR);
  127. if (csr & DMA_HNDL_ERROR)
  128. return 1;
  129. return 0;
  130. }
  131. static const struct esp_driver_ops sun3x_esp_ops = {
  132. .esp_write8 = sun3x_esp_write8,
  133. .esp_read8 = sun3x_esp_read8,
  134. .irq_pending = sun3x_esp_irq_pending,
  135. .reset_dma = sun3x_esp_reset_dma,
  136. .dma_drain = sun3x_esp_dma_drain,
  137. .dma_invalidate = sun3x_esp_dma_invalidate,
  138. .send_dma_cmd = sun3x_esp_send_dma_cmd,
  139. .dma_error = sun3x_esp_dma_error,
  140. };
  141. static int esp_sun3x_probe(struct platform_device *dev)
  142. {
  143. struct scsi_host_template *tpnt = &scsi_esp_template;
  144. struct Scsi_Host *host;
  145. struct esp *esp;
  146. struct resource *res;
  147. int err = -ENOMEM;
  148. host = scsi_host_alloc(tpnt, sizeof(struct esp));
  149. if (!host)
  150. goto fail;
  151. host->max_id = 8;
  152. esp = shost_priv(host);
  153. esp->host = host;
  154. esp->dev = &dev->dev;
  155. esp->ops = &sun3x_esp_ops;
  156. res = platform_get_resource(dev, IORESOURCE_MEM, 0);
  157. if (!res || !res->start)
  158. goto fail_unlink;
  159. esp->regs = ioremap(res->start, 0x20);
  160. if (!esp->regs)
  161. goto fail_unmap_regs;
  162. res = platform_get_resource(dev, IORESOURCE_MEM, 1);
  163. if (!res || !res->start)
  164. goto fail_unmap_regs;
  165. esp->dma_regs = ioremap(res->start, 0x10);
  166. esp->command_block = dma_alloc_coherent(esp->dev, 16,
  167. &esp->command_block_dma,
  168. GFP_KERNEL);
  169. if (!esp->command_block)
  170. goto fail_unmap_regs_dma;
  171. host->irq = err = platform_get_irq(dev, 0);
  172. if (err < 0)
  173. goto fail_unmap_command_block;
  174. err = request_irq(host->irq, scsi_esp_intr, IRQF_SHARED,
  175. "SUN3X ESP", esp);
  176. if (err < 0)
  177. goto fail_unmap_command_block;
  178. esp->scsi_id = 7;
  179. esp->host->this_id = esp->scsi_id;
  180. esp->scsi_id_mask = (1 << esp->scsi_id);
  181. esp->cfreq = 20000000;
  182. dev_set_drvdata(&dev->dev, esp);
  183. err = scsi_esp_register(esp);
  184. if (err)
  185. goto fail_free_irq;
  186. return 0;
  187. fail_free_irq:
  188. free_irq(host->irq, esp);
  189. fail_unmap_command_block:
  190. dma_free_coherent(esp->dev, 16,
  191. esp->command_block,
  192. esp->command_block_dma);
  193. fail_unmap_regs_dma:
  194. iounmap(esp->dma_regs);
  195. fail_unmap_regs:
  196. iounmap(esp->regs);
  197. fail_unlink:
  198. scsi_host_put(host);
  199. fail:
  200. return err;
  201. }
  202. static int esp_sun3x_remove(struct platform_device *dev)
  203. {
  204. struct esp *esp = dev_get_drvdata(&dev->dev);
  205. unsigned int irq = esp->host->irq;
  206. u32 val;
  207. scsi_esp_unregister(esp);
  208. /* Disable interrupts. */
  209. val = dma_read32(DMA_CSR);
  210. dma_write32(val & ~DMA_INT_ENAB, DMA_CSR);
  211. free_irq(irq, esp);
  212. dma_free_coherent(esp->dev, 16,
  213. esp->command_block,
  214. esp->command_block_dma);
  215. scsi_host_put(esp->host);
  216. return 0;
  217. }
  218. static struct platform_driver esp_sun3x_driver = {
  219. .probe = esp_sun3x_probe,
  220. .remove = esp_sun3x_remove,
  221. .driver = {
  222. .name = "sun3x_esp",
  223. },
  224. };
  225. module_platform_driver(esp_sun3x_driver);
  226. MODULE_DESCRIPTION("Sun3x ESP SCSI driver");
  227. MODULE_AUTHOR("Thomas Bogendoerfer ([email protected])");
  228. MODULE_LICENSE("GPL");
  229. MODULE_VERSION(DRV_VERSION);
  230. MODULE_ALIAS("platform:sun3x_esp");