megaraid_sas_fp.c 42 KB

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  1. // SPDX-License-Identifier: GPL-2.0-or-later
  2. /*
  3. * Linux MegaRAID driver for SAS based RAID controllers
  4. *
  5. * Copyright (c) 2009-2013 LSI Corporation
  6. * Copyright (c) 2013-2016 Avago Technologies
  7. * Copyright (c) 2016-2018 Broadcom Inc.
  8. *
  9. * FILE: megaraid_sas_fp.c
  10. *
  11. * Authors: Broadcom Inc.
  12. * Sumant Patro
  13. * Varad Talamacki
  14. * Manoj Jose
  15. * Kashyap Desai <[email protected]>
  16. * Sumit Saxena <[email protected]>
  17. *
  18. * Send feedback to: [email protected]
  19. */
  20. #include <linux/kernel.h>
  21. #include <linux/types.h>
  22. #include <linux/pci.h>
  23. #include <linux/list.h>
  24. #include <linux/moduleparam.h>
  25. #include <linux/module.h>
  26. #include <linux/spinlock.h>
  27. #include <linux/interrupt.h>
  28. #include <linux/delay.h>
  29. #include <linux/uio.h>
  30. #include <linux/uaccess.h>
  31. #include <linux/fs.h>
  32. #include <linux/compat.h>
  33. #include <linux/blkdev.h>
  34. #include <linux/poll.h>
  35. #include <linux/irq_poll.h>
  36. #include <scsi/scsi.h>
  37. #include <scsi/scsi_cmnd.h>
  38. #include <scsi/scsi_device.h>
  39. #include <scsi/scsi_host.h>
  40. #include "megaraid_sas_fusion.h"
  41. #include "megaraid_sas.h"
  42. #include <asm/div64.h>
  43. #define LB_PENDING_CMDS_DEFAULT 4
  44. static unsigned int lb_pending_cmds = LB_PENDING_CMDS_DEFAULT;
  45. module_param(lb_pending_cmds, int, 0444);
  46. MODULE_PARM_DESC(lb_pending_cmds, "Change raid-1 load balancing outstanding "
  47. "threshold. Valid Values are 1-128. Default: 4");
  48. #define ABS_DIFF(a, b) (((a) > (b)) ? ((a) - (b)) : ((b) - (a)))
  49. #define MR_LD_STATE_OPTIMAL 3
  50. #define SPAN_ROW_SIZE(map, ld, index_) (MR_LdSpanPtrGet(ld, index_, map)->spanRowSize)
  51. #define SPAN_ROW_DATA_SIZE(map_, ld, index_) (MR_LdSpanPtrGet(ld, index_, map)->spanRowDataSize)
  52. #define SPAN_INVALID 0xff
  53. /* Prototypes */
  54. static void mr_update_span_set(struct MR_DRV_RAID_MAP_ALL *map,
  55. PLD_SPAN_INFO ldSpanInfo);
  56. static u8 mr_spanset_get_phy_params(struct megasas_instance *instance, u32 ld,
  57. u64 stripRow, u16 stripRef, struct IO_REQUEST_INFO *io_info,
  58. struct RAID_CONTEXT *pRAID_Context, struct MR_DRV_RAID_MAP_ALL *map);
  59. static u64 get_row_from_strip(struct megasas_instance *instance, u32 ld,
  60. u64 strip, struct MR_DRV_RAID_MAP_ALL *map);
  61. u32 mega_mod64(u64 dividend, u32 divisor)
  62. {
  63. u64 d;
  64. u32 remainder;
  65. if (!divisor)
  66. printk(KERN_ERR "megasas : DIVISOR is zero, in div fn\n");
  67. d = dividend;
  68. remainder = do_div(d, divisor);
  69. return remainder;
  70. }
  71. /**
  72. * mega_div64_32 - Do a 64-bit division
  73. * @dividend: Dividend
  74. * @divisor: Divisor
  75. *
  76. * @return quotient
  77. **/
  78. static u64 mega_div64_32(uint64_t dividend, uint32_t divisor)
  79. {
  80. u64 d = dividend;
  81. if (!divisor)
  82. printk(KERN_ERR "megasas : DIVISOR is zero in mod fn\n");
  83. do_div(d, divisor);
  84. return d;
  85. }
  86. struct MR_LD_RAID *MR_LdRaidGet(u32 ld, struct MR_DRV_RAID_MAP_ALL *map)
  87. {
  88. return &map->raidMap.ldSpanMap[ld].ldRaid;
  89. }
  90. static struct MR_SPAN_BLOCK_INFO *MR_LdSpanInfoGet(u32 ld,
  91. struct MR_DRV_RAID_MAP_ALL
  92. *map)
  93. {
  94. return &map->raidMap.ldSpanMap[ld].spanBlock[0];
  95. }
  96. static u8 MR_LdDataArmGet(u32 ld, u32 armIdx, struct MR_DRV_RAID_MAP_ALL *map)
  97. {
  98. return map->raidMap.ldSpanMap[ld].dataArmMap[armIdx];
  99. }
  100. u16 MR_ArPdGet(u32 ar, u32 arm, struct MR_DRV_RAID_MAP_ALL *map)
  101. {
  102. return le16_to_cpu(map->raidMap.arMapInfo[ar].pd[arm]);
  103. }
  104. u16 MR_LdSpanArrayGet(u32 ld, u32 span, struct MR_DRV_RAID_MAP_ALL *map)
  105. {
  106. return le16_to_cpu(map->raidMap.ldSpanMap[ld].spanBlock[span].span.arrayRef);
  107. }
  108. __le16 MR_PdDevHandleGet(u32 pd, struct MR_DRV_RAID_MAP_ALL *map)
  109. {
  110. return map->raidMap.devHndlInfo[pd].curDevHdl;
  111. }
  112. static u8 MR_PdInterfaceTypeGet(u32 pd, struct MR_DRV_RAID_MAP_ALL *map)
  113. {
  114. return map->raidMap.devHndlInfo[pd].interfaceType;
  115. }
  116. u16 MR_GetLDTgtId(u32 ld, struct MR_DRV_RAID_MAP_ALL *map)
  117. {
  118. return le16_to_cpu(map->raidMap.ldSpanMap[ld].ldRaid.targetId);
  119. }
  120. u16 MR_TargetIdToLdGet(u32 ldTgtId, struct MR_DRV_RAID_MAP_ALL *map)
  121. {
  122. return map->raidMap.ldTgtIdToLd[ldTgtId];
  123. }
  124. static struct MR_LD_SPAN *MR_LdSpanPtrGet(u32 ld, u32 span,
  125. struct MR_DRV_RAID_MAP_ALL *map)
  126. {
  127. return &map->raidMap.ldSpanMap[ld].spanBlock[span].span;
  128. }
  129. /*
  130. * This function will Populate Driver Map using firmware raid map
  131. */
  132. static int MR_PopulateDrvRaidMap(struct megasas_instance *instance, u64 map_id)
  133. {
  134. struct fusion_context *fusion = instance->ctrl_context;
  135. struct MR_FW_RAID_MAP_ALL *fw_map_old = NULL;
  136. struct MR_FW_RAID_MAP *pFwRaidMap = NULL;
  137. int i, j;
  138. u16 ld_count;
  139. struct MR_FW_RAID_MAP_DYNAMIC *fw_map_dyn;
  140. struct MR_FW_RAID_MAP_EXT *fw_map_ext;
  141. struct MR_RAID_MAP_DESC_TABLE *desc_table;
  142. struct MR_DRV_RAID_MAP_ALL *drv_map =
  143. fusion->ld_drv_map[(map_id & 1)];
  144. struct MR_DRV_RAID_MAP *pDrvRaidMap = &drv_map->raidMap;
  145. void *raid_map_data = NULL;
  146. memset(drv_map, 0, fusion->drv_map_sz);
  147. memset(pDrvRaidMap->ldTgtIdToLd,
  148. 0xff, (sizeof(u16) * MAX_LOGICAL_DRIVES_DYN));
  149. if (instance->max_raid_mapsize) {
  150. fw_map_dyn = fusion->ld_map[(map_id & 1)];
  151. desc_table =
  152. (struct MR_RAID_MAP_DESC_TABLE *)((void *)fw_map_dyn + le32_to_cpu(fw_map_dyn->desc_table_offset));
  153. if (desc_table != fw_map_dyn->raid_map_desc_table)
  154. dev_dbg(&instance->pdev->dev, "offsets of desc table are not matching desc %p original %p\n",
  155. desc_table, fw_map_dyn->raid_map_desc_table);
  156. ld_count = (u16)le16_to_cpu(fw_map_dyn->ld_count);
  157. pDrvRaidMap->ldCount = (__le16)cpu_to_le16(ld_count);
  158. pDrvRaidMap->fpPdIoTimeoutSec =
  159. fw_map_dyn->fp_pd_io_timeout_sec;
  160. pDrvRaidMap->totalSize =
  161. cpu_to_le32(sizeof(struct MR_DRV_RAID_MAP_ALL));
  162. /* point to actual data starting point*/
  163. raid_map_data = (void *)fw_map_dyn +
  164. le32_to_cpu(fw_map_dyn->desc_table_offset) +
  165. le32_to_cpu(fw_map_dyn->desc_table_size);
  166. for (i = 0; i < le32_to_cpu(fw_map_dyn->desc_table_num_elements); ++i) {
  167. switch (le32_to_cpu(desc_table->raid_map_desc_type)) {
  168. case RAID_MAP_DESC_TYPE_DEVHDL_INFO:
  169. fw_map_dyn->dev_hndl_info =
  170. (struct MR_DEV_HANDLE_INFO *)(raid_map_data + le32_to_cpu(desc_table->raid_map_desc_offset));
  171. memcpy(pDrvRaidMap->devHndlInfo,
  172. fw_map_dyn->dev_hndl_info,
  173. sizeof(struct MR_DEV_HANDLE_INFO) *
  174. le32_to_cpu(desc_table->raid_map_desc_elements));
  175. break;
  176. case RAID_MAP_DESC_TYPE_TGTID_INFO:
  177. fw_map_dyn->ld_tgt_id_to_ld =
  178. (u16 *)(raid_map_data +
  179. le32_to_cpu(desc_table->raid_map_desc_offset));
  180. for (j = 0; j < le32_to_cpu(desc_table->raid_map_desc_elements); j++) {
  181. pDrvRaidMap->ldTgtIdToLd[j] =
  182. le16_to_cpu(fw_map_dyn->ld_tgt_id_to_ld[j]);
  183. }
  184. break;
  185. case RAID_MAP_DESC_TYPE_ARRAY_INFO:
  186. fw_map_dyn->ar_map_info =
  187. (struct MR_ARRAY_INFO *)
  188. (raid_map_data + le32_to_cpu(desc_table->raid_map_desc_offset));
  189. memcpy(pDrvRaidMap->arMapInfo,
  190. fw_map_dyn->ar_map_info,
  191. sizeof(struct MR_ARRAY_INFO) *
  192. le32_to_cpu(desc_table->raid_map_desc_elements));
  193. break;
  194. case RAID_MAP_DESC_TYPE_SPAN_INFO:
  195. fw_map_dyn->ld_span_map =
  196. (struct MR_LD_SPAN_MAP *)
  197. (raid_map_data +
  198. le32_to_cpu(desc_table->raid_map_desc_offset));
  199. memcpy(pDrvRaidMap->ldSpanMap,
  200. fw_map_dyn->ld_span_map,
  201. sizeof(struct MR_LD_SPAN_MAP) *
  202. le32_to_cpu(desc_table->raid_map_desc_elements));
  203. break;
  204. default:
  205. dev_dbg(&instance->pdev->dev, "wrong number of desctableElements %d\n",
  206. fw_map_dyn->desc_table_num_elements);
  207. }
  208. ++desc_table;
  209. }
  210. } else if (instance->supportmax256vd) {
  211. fw_map_ext =
  212. (struct MR_FW_RAID_MAP_EXT *)fusion->ld_map[(map_id & 1)];
  213. ld_count = (u16)le16_to_cpu(fw_map_ext->ldCount);
  214. if (ld_count > MAX_LOGICAL_DRIVES_EXT) {
  215. dev_dbg(&instance->pdev->dev, "megaraid_sas: LD count exposed in RAID map in not valid\n");
  216. return 1;
  217. }
  218. pDrvRaidMap->ldCount = (__le16)cpu_to_le16(ld_count);
  219. pDrvRaidMap->fpPdIoTimeoutSec = fw_map_ext->fpPdIoTimeoutSec;
  220. for (i = 0; i < (MAX_LOGICAL_DRIVES_EXT); i++)
  221. pDrvRaidMap->ldTgtIdToLd[i] =
  222. (u16)fw_map_ext->ldTgtIdToLd[i];
  223. memcpy(pDrvRaidMap->ldSpanMap, fw_map_ext->ldSpanMap,
  224. sizeof(struct MR_LD_SPAN_MAP) * ld_count);
  225. memcpy(pDrvRaidMap->arMapInfo, fw_map_ext->arMapInfo,
  226. sizeof(struct MR_ARRAY_INFO) * MAX_API_ARRAYS_EXT);
  227. memcpy(pDrvRaidMap->devHndlInfo, fw_map_ext->devHndlInfo,
  228. sizeof(struct MR_DEV_HANDLE_INFO) *
  229. MAX_RAIDMAP_PHYSICAL_DEVICES);
  230. /* New Raid map will not set totalSize, so keep expected value
  231. * for legacy code in ValidateMapInfo
  232. */
  233. pDrvRaidMap->totalSize =
  234. cpu_to_le32(sizeof(struct MR_FW_RAID_MAP_EXT));
  235. } else {
  236. fw_map_old = (struct MR_FW_RAID_MAP_ALL *)
  237. fusion->ld_map[(map_id & 1)];
  238. pFwRaidMap = &fw_map_old->raidMap;
  239. ld_count = (u16)le32_to_cpu(pFwRaidMap->ldCount);
  240. if (ld_count > MAX_LOGICAL_DRIVES) {
  241. dev_dbg(&instance->pdev->dev,
  242. "LD count exposed in RAID map in not valid\n");
  243. return 1;
  244. }
  245. pDrvRaidMap->totalSize = pFwRaidMap->totalSize;
  246. pDrvRaidMap->ldCount = (__le16)cpu_to_le16(ld_count);
  247. pDrvRaidMap->fpPdIoTimeoutSec = pFwRaidMap->fpPdIoTimeoutSec;
  248. for (i = 0; i < MAX_RAIDMAP_LOGICAL_DRIVES + MAX_RAIDMAP_VIEWS; i++)
  249. pDrvRaidMap->ldTgtIdToLd[i] =
  250. (u8)pFwRaidMap->ldTgtIdToLd[i];
  251. for (i = 0; i < ld_count; i++) {
  252. pDrvRaidMap->ldSpanMap[i] = pFwRaidMap->ldSpanMap[i];
  253. }
  254. memcpy(pDrvRaidMap->arMapInfo, pFwRaidMap->arMapInfo,
  255. sizeof(struct MR_ARRAY_INFO) * MAX_RAIDMAP_ARRAYS);
  256. memcpy(pDrvRaidMap->devHndlInfo, pFwRaidMap->devHndlInfo,
  257. sizeof(struct MR_DEV_HANDLE_INFO) *
  258. MAX_RAIDMAP_PHYSICAL_DEVICES);
  259. }
  260. return 0;
  261. }
  262. /*
  263. * This function will validate Map info data provided by FW
  264. */
  265. u8 MR_ValidateMapInfo(struct megasas_instance *instance, u64 map_id)
  266. {
  267. struct fusion_context *fusion;
  268. struct MR_DRV_RAID_MAP_ALL *drv_map;
  269. struct MR_DRV_RAID_MAP *pDrvRaidMap;
  270. struct LD_LOAD_BALANCE_INFO *lbInfo;
  271. PLD_SPAN_INFO ldSpanInfo;
  272. struct MR_LD_RAID *raid;
  273. u16 num_lds, i;
  274. u16 ld;
  275. u32 expected_size;
  276. if (MR_PopulateDrvRaidMap(instance, map_id))
  277. return 0;
  278. fusion = instance->ctrl_context;
  279. drv_map = fusion->ld_drv_map[(map_id & 1)];
  280. pDrvRaidMap = &drv_map->raidMap;
  281. lbInfo = fusion->load_balance_info;
  282. ldSpanInfo = fusion->log_to_span;
  283. if (instance->max_raid_mapsize)
  284. expected_size = sizeof(struct MR_DRV_RAID_MAP_ALL);
  285. else if (instance->supportmax256vd)
  286. expected_size = sizeof(struct MR_FW_RAID_MAP_EXT);
  287. else
  288. expected_size = struct_size((struct MR_FW_RAID_MAP *)0,
  289. ldSpanMap,
  290. le16_to_cpu(pDrvRaidMap->ldCount));
  291. if (le32_to_cpu(pDrvRaidMap->totalSize) != expected_size) {
  292. dev_dbg(&instance->pdev->dev, "megasas: map info structure size 0x%x",
  293. le32_to_cpu(pDrvRaidMap->totalSize));
  294. dev_dbg(&instance->pdev->dev, "is not matching expected size 0x%x\n",
  295. (unsigned int)expected_size);
  296. dev_err(&instance->pdev->dev, "megasas: span map %x, pDrvRaidMap->totalSize : %x\n",
  297. (unsigned int)sizeof(struct MR_LD_SPAN_MAP),
  298. le32_to_cpu(pDrvRaidMap->totalSize));
  299. return 0;
  300. }
  301. if (instance->UnevenSpanSupport)
  302. mr_update_span_set(drv_map, ldSpanInfo);
  303. if (lbInfo)
  304. mr_update_load_balance_params(drv_map, lbInfo);
  305. num_lds = le16_to_cpu(drv_map->raidMap.ldCount);
  306. memcpy(instance->ld_ids_prev,
  307. instance->ld_ids_from_raidmap,
  308. sizeof(instance->ld_ids_from_raidmap));
  309. memset(instance->ld_ids_from_raidmap, 0xff, MEGASAS_MAX_LD_IDS);
  310. /*Convert Raid capability values to CPU arch */
  311. for (i = 0; (num_lds > 0) && (i < MAX_LOGICAL_DRIVES_EXT); i++) {
  312. ld = MR_TargetIdToLdGet(i, drv_map);
  313. /* For non existing VDs, iterate to next VD*/
  314. if (ld >= MEGASAS_MAX_SUPPORTED_LD_IDS)
  315. continue;
  316. raid = MR_LdRaidGet(ld, drv_map);
  317. le32_to_cpus((u32 *)&raid->capability);
  318. instance->ld_ids_from_raidmap[i] = i;
  319. num_lds--;
  320. }
  321. return 1;
  322. }
  323. static u32 MR_GetSpanBlock(u32 ld, u64 row, u64 *span_blk,
  324. struct MR_DRV_RAID_MAP_ALL *map)
  325. {
  326. struct MR_SPAN_BLOCK_INFO *pSpanBlock = MR_LdSpanInfoGet(ld, map);
  327. struct MR_QUAD_ELEMENT *quad;
  328. struct MR_LD_RAID *raid = MR_LdRaidGet(ld, map);
  329. u32 span, j;
  330. for (span = 0; span < raid->spanDepth; span++, pSpanBlock++) {
  331. for (j = 0; j < le32_to_cpu(pSpanBlock->block_span_info.noElements); j++) {
  332. quad = &pSpanBlock->block_span_info.quad[j];
  333. if (le32_to_cpu(quad->diff) == 0)
  334. return SPAN_INVALID;
  335. if (le64_to_cpu(quad->logStart) <= row && row <=
  336. le64_to_cpu(quad->logEnd) && (mega_mod64(row - le64_to_cpu(quad->logStart),
  337. le32_to_cpu(quad->diff))) == 0) {
  338. if (span_blk != NULL) {
  339. u64 blk;
  340. blk = mega_div64_32((row-le64_to_cpu(quad->logStart)), le32_to_cpu(quad->diff));
  341. blk = (blk + le64_to_cpu(quad->offsetInSpan)) << raid->stripeShift;
  342. *span_blk = blk;
  343. }
  344. return span;
  345. }
  346. }
  347. }
  348. return SPAN_INVALID;
  349. }
  350. /*
  351. ******************************************************************************
  352. *
  353. * This routine calculates the Span block for given row using spanset.
  354. *
  355. * Inputs :
  356. * instance - HBA instance
  357. * ld - Logical drive number
  358. * row - Row number
  359. * map - LD map
  360. *
  361. * Outputs :
  362. *
  363. * span - Span number
  364. * block - Absolute Block number in the physical disk
  365. * div_error - Devide error code.
  366. */
  367. static u32 mr_spanset_get_span_block(struct megasas_instance *instance,
  368. u32 ld, u64 row, u64 *span_blk, struct MR_DRV_RAID_MAP_ALL *map)
  369. {
  370. struct fusion_context *fusion = instance->ctrl_context;
  371. struct MR_LD_RAID *raid = MR_LdRaidGet(ld, map);
  372. LD_SPAN_SET *span_set;
  373. struct MR_QUAD_ELEMENT *quad;
  374. u32 span, info;
  375. PLD_SPAN_INFO ldSpanInfo = fusion->log_to_span;
  376. for (info = 0; info < MAX_QUAD_DEPTH; info++) {
  377. span_set = &(ldSpanInfo[ld].span_set[info]);
  378. if (span_set->span_row_data_width == 0)
  379. break;
  380. if (row > span_set->data_row_end)
  381. continue;
  382. for (span = 0; span < raid->spanDepth; span++)
  383. if (le32_to_cpu(map->raidMap.ldSpanMap[ld].spanBlock[span].
  384. block_span_info.noElements) >= info+1) {
  385. quad = &map->raidMap.ldSpanMap[ld].
  386. spanBlock[span].
  387. block_span_info.quad[info];
  388. if (le32_to_cpu(quad->diff) == 0)
  389. return SPAN_INVALID;
  390. if (le64_to_cpu(quad->logStart) <= row &&
  391. row <= le64_to_cpu(quad->logEnd) &&
  392. (mega_mod64(row - le64_to_cpu(quad->logStart),
  393. le32_to_cpu(quad->diff))) == 0) {
  394. if (span_blk != NULL) {
  395. u64 blk;
  396. blk = mega_div64_32
  397. ((row - le64_to_cpu(quad->logStart)),
  398. le32_to_cpu(quad->diff));
  399. blk = (blk + le64_to_cpu(quad->offsetInSpan))
  400. << raid->stripeShift;
  401. *span_blk = blk;
  402. }
  403. return span;
  404. }
  405. }
  406. }
  407. return SPAN_INVALID;
  408. }
  409. /*
  410. ******************************************************************************
  411. *
  412. * This routine calculates the row for given strip using spanset.
  413. *
  414. * Inputs :
  415. * instance - HBA instance
  416. * ld - Logical drive number
  417. * Strip - Strip
  418. * map - LD map
  419. *
  420. * Outputs :
  421. *
  422. * row - row associated with strip
  423. */
  424. static u64 get_row_from_strip(struct megasas_instance *instance,
  425. u32 ld, u64 strip, struct MR_DRV_RAID_MAP_ALL *map)
  426. {
  427. struct fusion_context *fusion = instance->ctrl_context;
  428. struct MR_LD_RAID *raid = MR_LdRaidGet(ld, map);
  429. LD_SPAN_SET *span_set;
  430. PLD_SPAN_INFO ldSpanInfo = fusion->log_to_span;
  431. u32 info, strip_offset, span, span_offset;
  432. u64 span_set_Strip, span_set_Row, retval;
  433. for (info = 0; info < MAX_QUAD_DEPTH; info++) {
  434. span_set = &(ldSpanInfo[ld].span_set[info]);
  435. if (span_set->span_row_data_width == 0)
  436. break;
  437. if (strip > span_set->data_strip_end)
  438. continue;
  439. span_set_Strip = strip - span_set->data_strip_start;
  440. strip_offset = mega_mod64(span_set_Strip,
  441. span_set->span_row_data_width);
  442. span_set_Row = mega_div64_32(span_set_Strip,
  443. span_set->span_row_data_width) * span_set->diff;
  444. for (span = 0, span_offset = 0; span < raid->spanDepth; span++)
  445. if (le32_to_cpu(map->raidMap.ldSpanMap[ld].spanBlock[span].
  446. block_span_info.noElements) >= info+1) {
  447. if (strip_offset >=
  448. span_set->strip_offset[span])
  449. span_offset++;
  450. else
  451. break;
  452. }
  453. retval = (span_set->data_row_start + span_set_Row +
  454. (span_offset - 1));
  455. return retval;
  456. }
  457. return -1LLU;
  458. }
  459. /*
  460. ******************************************************************************
  461. *
  462. * This routine calculates the Start Strip for given row using spanset.
  463. *
  464. * Inputs :
  465. * instance - HBA instance
  466. * ld - Logical drive number
  467. * row - Row number
  468. * map - LD map
  469. *
  470. * Outputs :
  471. *
  472. * Strip - Start strip associated with row
  473. */
  474. static u64 get_strip_from_row(struct megasas_instance *instance,
  475. u32 ld, u64 row, struct MR_DRV_RAID_MAP_ALL *map)
  476. {
  477. struct fusion_context *fusion = instance->ctrl_context;
  478. struct MR_LD_RAID *raid = MR_LdRaidGet(ld, map);
  479. LD_SPAN_SET *span_set;
  480. struct MR_QUAD_ELEMENT *quad;
  481. PLD_SPAN_INFO ldSpanInfo = fusion->log_to_span;
  482. u32 span, info;
  483. u64 strip;
  484. for (info = 0; info < MAX_QUAD_DEPTH; info++) {
  485. span_set = &(ldSpanInfo[ld].span_set[info]);
  486. if (span_set->span_row_data_width == 0)
  487. break;
  488. if (row > span_set->data_row_end)
  489. continue;
  490. for (span = 0; span < raid->spanDepth; span++)
  491. if (le32_to_cpu(map->raidMap.ldSpanMap[ld].spanBlock[span].
  492. block_span_info.noElements) >= info+1) {
  493. quad = &map->raidMap.ldSpanMap[ld].
  494. spanBlock[span].block_span_info.quad[info];
  495. if (le64_to_cpu(quad->logStart) <= row &&
  496. row <= le64_to_cpu(quad->logEnd) &&
  497. mega_mod64((row - le64_to_cpu(quad->logStart)),
  498. le32_to_cpu(quad->diff)) == 0) {
  499. strip = mega_div64_32
  500. (((row - span_set->data_row_start)
  501. - le64_to_cpu(quad->logStart)),
  502. le32_to_cpu(quad->diff));
  503. strip *= span_set->span_row_data_width;
  504. strip += span_set->data_strip_start;
  505. strip += span_set->strip_offset[span];
  506. return strip;
  507. }
  508. }
  509. }
  510. dev_err(&instance->pdev->dev, "get_strip_from_row"
  511. "returns invalid strip for ld=%x, row=%lx\n",
  512. ld, (long unsigned int)row);
  513. return -1;
  514. }
  515. /*
  516. ******************************************************************************
  517. *
  518. * This routine calculates the Physical Arm for given strip using spanset.
  519. *
  520. * Inputs :
  521. * instance - HBA instance
  522. * ld - Logical drive number
  523. * strip - Strip
  524. * map - LD map
  525. *
  526. * Outputs :
  527. *
  528. * Phys Arm - Phys Arm associated with strip
  529. */
  530. static u32 get_arm_from_strip(struct megasas_instance *instance,
  531. u32 ld, u64 strip, struct MR_DRV_RAID_MAP_ALL *map)
  532. {
  533. struct fusion_context *fusion = instance->ctrl_context;
  534. struct MR_LD_RAID *raid = MR_LdRaidGet(ld, map);
  535. LD_SPAN_SET *span_set;
  536. PLD_SPAN_INFO ldSpanInfo = fusion->log_to_span;
  537. u32 info, strip_offset, span, span_offset, retval;
  538. for (info = 0 ; info < MAX_QUAD_DEPTH; info++) {
  539. span_set = &(ldSpanInfo[ld].span_set[info]);
  540. if (span_set->span_row_data_width == 0)
  541. break;
  542. if (strip > span_set->data_strip_end)
  543. continue;
  544. strip_offset = (uint)mega_mod64
  545. ((strip - span_set->data_strip_start),
  546. span_set->span_row_data_width);
  547. for (span = 0, span_offset = 0; span < raid->spanDepth; span++)
  548. if (le32_to_cpu(map->raidMap.ldSpanMap[ld].spanBlock[span].
  549. block_span_info.noElements) >= info+1) {
  550. if (strip_offset >=
  551. span_set->strip_offset[span])
  552. span_offset =
  553. span_set->strip_offset[span];
  554. else
  555. break;
  556. }
  557. retval = (strip_offset - span_offset);
  558. return retval;
  559. }
  560. dev_err(&instance->pdev->dev, "get_arm_from_strip"
  561. "returns invalid arm for ld=%x strip=%lx\n",
  562. ld, (long unsigned int)strip);
  563. return -1;
  564. }
  565. /* This Function will return Phys arm */
  566. static u8 get_arm(struct megasas_instance *instance, u32 ld, u8 span, u64 stripe,
  567. struct MR_DRV_RAID_MAP_ALL *map)
  568. {
  569. struct MR_LD_RAID *raid = MR_LdRaidGet(ld, map);
  570. /* Need to check correct default value */
  571. u32 arm = 0;
  572. switch (raid->level) {
  573. case 0:
  574. case 5:
  575. case 6:
  576. arm = mega_mod64(stripe, SPAN_ROW_SIZE(map, ld, span));
  577. break;
  578. case 1:
  579. /* start with logical arm */
  580. arm = get_arm_from_strip(instance, ld, stripe, map);
  581. if (arm != -1U)
  582. arm *= 2;
  583. break;
  584. }
  585. return arm;
  586. }
  587. /*
  588. ******************************************************************************
  589. *
  590. * This routine calculates the arm, span and block for the specified stripe and
  591. * reference in stripe using spanset
  592. *
  593. * Inputs :
  594. *
  595. * ld - Logical drive number
  596. * stripRow - Stripe number
  597. * stripRef - Reference in stripe
  598. *
  599. * Outputs :
  600. *
  601. * span - Span number
  602. * block - Absolute Block number in the physical disk
  603. */
  604. static u8 mr_spanset_get_phy_params(struct megasas_instance *instance, u32 ld,
  605. u64 stripRow, u16 stripRef, struct IO_REQUEST_INFO *io_info,
  606. struct RAID_CONTEXT *pRAID_Context,
  607. struct MR_DRV_RAID_MAP_ALL *map)
  608. {
  609. struct MR_LD_RAID *raid = MR_LdRaidGet(ld, map);
  610. u32 pd, arRef, r1_alt_pd;
  611. u8 physArm, span;
  612. u64 row;
  613. u8 retval = true;
  614. u64 *pdBlock = &io_info->pdBlock;
  615. __le16 *pDevHandle = &io_info->devHandle;
  616. u8 *pPdInterface = &io_info->pd_interface;
  617. u32 logArm, rowMod, armQ, arm;
  618. *pDevHandle = cpu_to_le16(MR_DEVHANDLE_INVALID);
  619. /*Get row and span from io_info for Uneven Span IO.*/
  620. row = io_info->start_row;
  621. span = io_info->start_span;
  622. if (raid->level == 6) {
  623. logArm = get_arm_from_strip(instance, ld, stripRow, map);
  624. if (logArm == -1U)
  625. return false;
  626. rowMod = mega_mod64(row, SPAN_ROW_SIZE(map, ld, span));
  627. armQ = SPAN_ROW_SIZE(map, ld, span) - 1 - rowMod;
  628. arm = armQ + 1 + logArm;
  629. if (arm >= SPAN_ROW_SIZE(map, ld, span))
  630. arm -= SPAN_ROW_SIZE(map, ld, span);
  631. physArm = (u8)arm;
  632. } else
  633. /* Calculate the arm */
  634. physArm = get_arm(instance, ld, span, stripRow, map);
  635. if (physArm == 0xFF)
  636. return false;
  637. arRef = MR_LdSpanArrayGet(ld, span, map);
  638. pd = MR_ArPdGet(arRef, physArm, map);
  639. if (pd != MR_PD_INVALID) {
  640. *pDevHandle = MR_PdDevHandleGet(pd, map);
  641. *pPdInterface = MR_PdInterfaceTypeGet(pd, map);
  642. /* get second pd also for raid 1/10 fast path writes*/
  643. if ((instance->adapter_type >= VENTURA_SERIES) &&
  644. (raid->level == 1) &&
  645. !io_info->isRead) {
  646. r1_alt_pd = MR_ArPdGet(arRef, physArm + 1, map);
  647. if (r1_alt_pd != MR_PD_INVALID)
  648. io_info->r1_alt_dev_handle =
  649. MR_PdDevHandleGet(r1_alt_pd, map);
  650. }
  651. } else {
  652. if ((raid->level >= 5) &&
  653. ((instance->adapter_type == THUNDERBOLT_SERIES) ||
  654. ((instance->adapter_type == INVADER_SERIES) &&
  655. (raid->regTypeReqOnRead != REGION_TYPE_UNUSED))))
  656. pRAID_Context->reg_lock_flags = REGION_TYPE_EXCLUSIVE;
  657. else if (raid->level == 1) {
  658. physArm = physArm + 1;
  659. pd = MR_ArPdGet(arRef, physArm, map);
  660. if (pd != MR_PD_INVALID) {
  661. *pDevHandle = MR_PdDevHandleGet(pd, map);
  662. *pPdInterface = MR_PdInterfaceTypeGet(pd, map);
  663. }
  664. }
  665. }
  666. *pdBlock += stripRef + le64_to_cpu(MR_LdSpanPtrGet(ld, span, map)->startBlk);
  667. if (instance->adapter_type >= VENTURA_SERIES) {
  668. ((struct RAID_CONTEXT_G35 *)pRAID_Context)->span_arm =
  669. (span << RAID_CTX_SPANARM_SPAN_SHIFT) | physArm;
  670. io_info->span_arm =
  671. (span << RAID_CTX_SPANARM_SPAN_SHIFT) | physArm;
  672. } else {
  673. pRAID_Context->span_arm =
  674. (span << RAID_CTX_SPANARM_SPAN_SHIFT) | physArm;
  675. io_info->span_arm = pRAID_Context->span_arm;
  676. }
  677. io_info->pd_after_lb = pd;
  678. return retval;
  679. }
  680. /*
  681. ******************************************************************************
  682. *
  683. * This routine calculates the arm, span and block for the specified stripe and
  684. * reference in stripe.
  685. *
  686. * Inputs :
  687. *
  688. * ld - Logical drive number
  689. * stripRow - Stripe number
  690. * stripRef - Reference in stripe
  691. *
  692. * Outputs :
  693. *
  694. * span - Span number
  695. * block - Absolute Block number in the physical disk
  696. */
  697. static u8 MR_GetPhyParams(struct megasas_instance *instance, u32 ld, u64 stripRow,
  698. u16 stripRef, struct IO_REQUEST_INFO *io_info,
  699. struct RAID_CONTEXT *pRAID_Context,
  700. struct MR_DRV_RAID_MAP_ALL *map)
  701. {
  702. struct MR_LD_RAID *raid = MR_LdRaidGet(ld, map);
  703. u32 pd, arRef, r1_alt_pd;
  704. u8 physArm, span;
  705. u64 row;
  706. u8 retval = true;
  707. u64 *pdBlock = &io_info->pdBlock;
  708. __le16 *pDevHandle = &io_info->devHandle;
  709. u8 *pPdInterface = &io_info->pd_interface;
  710. *pDevHandle = cpu_to_le16(MR_DEVHANDLE_INVALID);
  711. row = mega_div64_32(stripRow, raid->rowDataSize);
  712. if (raid->level == 6) {
  713. /* logical arm within row */
  714. u32 logArm = mega_mod64(stripRow, raid->rowDataSize);
  715. u32 rowMod, armQ, arm;
  716. if (raid->rowSize == 0)
  717. return false;
  718. /* get logical row mod */
  719. rowMod = mega_mod64(row, raid->rowSize);
  720. armQ = raid->rowSize-1-rowMod; /* index of Q drive */
  721. arm = armQ+1+logArm; /* data always logically follows Q */
  722. if (arm >= raid->rowSize) /* handle wrap condition */
  723. arm -= raid->rowSize;
  724. physArm = (u8)arm;
  725. } else {
  726. if (raid->modFactor == 0)
  727. return false;
  728. physArm = MR_LdDataArmGet(ld, mega_mod64(stripRow,
  729. raid->modFactor),
  730. map);
  731. }
  732. if (raid->spanDepth == 1) {
  733. span = 0;
  734. *pdBlock = row << raid->stripeShift;
  735. } else {
  736. span = (u8)MR_GetSpanBlock(ld, row, pdBlock, map);
  737. if (span == SPAN_INVALID)
  738. return false;
  739. }
  740. /* Get the array on which this span is present */
  741. arRef = MR_LdSpanArrayGet(ld, span, map);
  742. pd = MR_ArPdGet(arRef, physArm, map); /* Get the pd */
  743. if (pd != MR_PD_INVALID) {
  744. /* Get dev handle from Pd. */
  745. *pDevHandle = MR_PdDevHandleGet(pd, map);
  746. *pPdInterface = MR_PdInterfaceTypeGet(pd, map);
  747. /* get second pd also for raid 1/10 fast path writes*/
  748. if ((instance->adapter_type >= VENTURA_SERIES) &&
  749. (raid->level == 1) &&
  750. !io_info->isRead) {
  751. r1_alt_pd = MR_ArPdGet(arRef, physArm + 1, map);
  752. if (r1_alt_pd != MR_PD_INVALID)
  753. io_info->r1_alt_dev_handle =
  754. MR_PdDevHandleGet(r1_alt_pd, map);
  755. }
  756. } else {
  757. if ((raid->level >= 5) &&
  758. ((instance->adapter_type == THUNDERBOLT_SERIES) ||
  759. ((instance->adapter_type == INVADER_SERIES) &&
  760. (raid->regTypeReqOnRead != REGION_TYPE_UNUSED))))
  761. pRAID_Context->reg_lock_flags = REGION_TYPE_EXCLUSIVE;
  762. else if (raid->level == 1) {
  763. /* Get alternate Pd. */
  764. physArm = physArm + 1;
  765. pd = MR_ArPdGet(arRef, physArm, map);
  766. if (pd != MR_PD_INVALID) {
  767. /* Get dev handle from Pd */
  768. *pDevHandle = MR_PdDevHandleGet(pd, map);
  769. *pPdInterface = MR_PdInterfaceTypeGet(pd, map);
  770. }
  771. }
  772. }
  773. *pdBlock += stripRef + le64_to_cpu(MR_LdSpanPtrGet(ld, span, map)->startBlk);
  774. if (instance->adapter_type >= VENTURA_SERIES) {
  775. ((struct RAID_CONTEXT_G35 *)pRAID_Context)->span_arm =
  776. (span << RAID_CTX_SPANARM_SPAN_SHIFT) | physArm;
  777. io_info->span_arm =
  778. (span << RAID_CTX_SPANARM_SPAN_SHIFT) | physArm;
  779. } else {
  780. pRAID_Context->span_arm =
  781. (span << RAID_CTX_SPANARM_SPAN_SHIFT) | physArm;
  782. io_info->span_arm = pRAID_Context->span_arm;
  783. }
  784. io_info->pd_after_lb = pd;
  785. return retval;
  786. }
  787. /*
  788. * mr_get_phy_params_r56_rmw - Calculate parameters for R56 CTIO write operation
  789. * @instance: Adapter soft state
  790. * @ld: LD index
  791. * @stripNo: Strip Number
  792. * @io_info: IO info structure pointer
  793. * pRAID_Context: RAID context pointer
  794. * map: RAID map pointer
  795. *
  796. * This routine calculates the logical arm, data Arm, row number and parity arm
  797. * for R56 CTIO write operation.
  798. */
  799. static void mr_get_phy_params_r56_rmw(struct megasas_instance *instance,
  800. u32 ld, u64 stripNo,
  801. struct IO_REQUEST_INFO *io_info,
  802. struct RAID_CONTEXT_G35 *pRAID_Context,
  803. struct MR_DRV_RAID_MAP_ALL *map)
  804. {
  805. struct MR_LD_RAID *raid = MR_LdRaidGet(ld, map);
  806. u8 span, dataArms, arms, dataArm, logArm;
  807. s8 rightmostParityArm, PParityArm;
  808. u64 rowNum;
  809. u64 *pdBlock = &io_info->pdBlock;
  810. dataArms = raid->rowDataSize;
  811. arms = raid->rowSize;
  812. rowNum = mega_div64_32(stripNo, dataArms);
  813. /* parity disk arm, first arm is 0 */
  814. rightmostParityArm = (arms - 1) - mega_mod64(rowNum, arms);
  815. /* logical arm within row */
  816. logArm = mega_mod64(stripNo, dataArms);
  817. /* physical arm for data */
  818. dataArm = mega_mod64((rightmostParityArm + 1 + logArm), arms);
  819. if (raid->spanDepth == 1) {
  820. span = 0;
  821. } else {
  822. span = (u8)MR_GetSpanBlock(ld, rowNum, pdBlock, map);
  823. if (span == SPAN_INVALID)
  824. return;
  825. }
  826. if (raid->level == 6) {
  827. /* P Parity arm, note this can go negative adjust if negative */
  828. PParityArm = (arms - 2) - mega_mod64(rowNum, arms);
  829. if (PParityArm < 0)
  830. PParityArm += arms;
  831. /* rightmostParityArm is P-Parity for RAID 5 and Q-Parity for RAID */
  832. pRAID_Context->flow_specific.r56_arm_map = rightmostParityArm;
  833. pRAID_Context->flow_specific.r56_arm_map |=
  834. (u16)(PParityArm << RAID_CTX_R56_P_ARM_SHIFT);
  835. } else {
  836. pRAID_Context->flow_specific.r56_arm_map |=
  837. (u16)(rightmostParityArm << RAID_CTX_R56_P_ARM_SHIFT);
  838. }
  839. pRAID_Context->reg_lock_row_lba = cpu_to_le64(rowNum);
  840. pRAID_Context->flow_specific.r56_arm_map |=
  841. (u16)(logArm << RAID_CTX_R56_LOG_ARM_SHIFT);
  842. cpu_to_le16s(&pRAID_Context->flow_specific.r56_arm_map);
  843. pRAID_Context->span_arm = (span << RAID_CTX_SPANARM_SPAN_SHIFT) | dataArm;
  844. pRAID_Context->raid_flags = (MR_RAID_FLAGS_IO_SUB_TYPE_R56_DIV_OFFLOAD <<
  845. MR_RAID_CTX_RAID_FLAGS_IO_SUB_TYPE_SHIFT);
  846. return;
  847. }
  848. /*
  849. ******************************************************************************
  850. *
  851. * MR_BuildRaidContext function
  852. *
  853. * This function will initiate command processing. The start/end row and strip
  854. * information is calculated then the lock is acquired.
  855. * This function will return 0 if region lock was acquired OR return num strips
  856. */
  857. u8
  858. MR_BuildRaidContext(struct megasas_instance *instance,
  859. struct IO_REQUEST_INFO *io_info,
  860. struct RAID_CONTEXT *pRAID_Context,
  861. struct MR_DRV_RAID_MAP_ALL *map, u8 **raidLUN)
  862. {
  863. struct fusion_context *fusion;
  864. struct MR_LD_RAID *raid;
  865. u32 stripSize, stripe_mask;
  866. u64 endLba, endStrip, endRow, start_row, start_strip;
  867. u64 regStart;
  868. u32 regSize;
  869. u8 num_strips, numRows;
  870. u16 ref_in_start_stripe, ref_in_end_stripe;
  871. u64 ldStartBlock;
  872. u32 numBlocks, ldTgtId;
  873. u8 isRead;
  874. u8 retval = 0;
  875. u8 startlba_span = SPAN_INVALID;
  876. u64 *pdBlock = &io_info->pdBlock;
  877. u16 ld;
  878. ldStartBlock = io_info->ldStartBlock;
  879. numBlocks = io_info->numBlocks;
  880. ldTgtId = io_info->ldTgtId;
  881. isRead = io_info->isRead;
  882. io_info->IoforUnevenSpan = 0;
  883. io_info->start_span = SPAN_INVALID;
  884. fusion = instance->ctrl_context;
  885. ld = MR_TargetIdToLdGet(ldTgtId, map);
  886. raid = MR_LdRaidGet(ld, map);
  887. /*check read ahead bit*/
  888. io_info->ra_capable = raid->capability.ra_capable;
  889. /*
  890. * if rowDataSize @RAID map and spanRowDataSize @SPAN INFO are zero
  891. * return FALSE
  892. */
  893. if (raid->rowDataSize == 0) {
  894. if (MR_LdSpanPtrGet(ld, 0, map)->spanRowDataSize == 0)
  895. return false;
  896. else if (instance->UnevenSpanSupport) {
  897. io_info->IoforUnevenSpan = 1;
  898. } else {
  899. dev_info(&instance->pdev->dev,
  900. "raid->rowDataSize is 0, but has SPAN[0]"
  901. "rowDataSize = 0x%0x,"
  902. "but there is _NO_ UnevenSpanSupport\n",
  903. MR_LdSpanPtrGet(ld, 0, map)->spanRowDataSize);
  904. return false;
  905. }
  906. }
  907. stripSize = 1 << raid->stripeShift;
  908. stripe_mask = stripSize-1;
  909. io_info->data_arms = raid->rowDataSize;
  910. /*
  911. * calculate starting row and stripe, and number of strips and rows
  912. */
  913. start_strip = ldStartBlock >> raid->stripeShift;
  914. ref_in_start_stripe = (u16)(ldStartBlock & stripe_mask);
  915. endLba = ldStartBlock + numBlocks - 1;
  916. ref_in_end_stripe = (u16)(endLba & stripe_mask);
  917. endStrip = endLba >> raid->stripeShift;
  918. num_strips = (u8)(endStrip - start_strip + 1); /* End strip */
  919. if (io_info->IoforUnevenSpan) {
  920. start_row = get_row_from_strip(instance, ld, start_strip, map);
  921. endRow = get_row_from_strip(instance, ld, endStrip, map);
  922. if (start_row == -1ULL || endRow == -1ULL) {
  923. dev_info(&instance->pdev->dev, "return from %s %d."
  924. "Send IO w/o region lock.\n",
  925. __func__, __LINE__);
  926. return false;
  927. }
  928. if (raid->spanDepth == 1) {
  929. startlba_span = 0;
  930. *pdBlock = start_row << raid->stripeShift;
  931. } else
  932. startlba_span = (u8)mr_spanset_get_span_block(instance,
  933. ld, start_row, pdBlock, map);
  934. if (startlba_span == SPAN_INVALID) {
  935. dev_info(&instance->pdev->dev, "return from %s %d"
  936. "for row 0x%llx,start strip %llx"
  937. "endSrip %llx\n", __func__, __LINE__,
  938. (unsigned long long)start_row,
  939. (unsigned long long)start_strip,
  940. (unsigned long long)endStrip);
  941. return false;
  942. }
  943. io_info->start_span = startlba_span;
  944. io_info->start_row = start_row;
  945. } else {
  946. start_row = mega_div64_32(start_strip, raid->rowDataSize);
  947. endRow = mega_div64_32(endStrip, raid->rowDataSize);
  948. }
  949. numRows = (u8)(endRow - start_row + 1);
  950. /*
  951. * calculate region info.
  952. */
  953. /* assume region is at the start of the first row */
  954. regStart = start_row << raid->stripeShift;
  955. /* assume this IO needs the full row - we'll adjust if not true */
  956. regSize = stripSize;
  957. io_info->do_fp_rlbypass = raid->capability.fpBypassRegionLock;
  958. /* Check if we can send this I/O via FastPath */
  959. if (raid->capability.fpCapable) {
  960. if (isRead)
  961. io_info->fpOkForIo = (raid->capability.fpReadCapable &&
  962. ((num_strips == 1) ||
  963. raid->capability.
  964. fpReadAcrossStripe));
  965. else
  966. io_info->fpOkForIo = (raid->capability.fpWriteCapable &&
  967. ((num_strips == 1) ||
  968. raid->capability.
  969. fpWriteAcrossStripe));
  970. } else
  971. io_info->fpOkForIo = false;
  972. if (numRows == 1) {
  973. /* single-strip IOs can always lock only the data needed */
  974. if (num_strips == 1) {
  975. regStart += ref_in_start_stripe;
  976. regSize = numBlocks;
  977. }
  978. /* multi-strip IOs always need to full stripe locked */
  979. } else if (io_info->IoforUnevenSpan == 0) {
  980. /*
  981. * For Even span region lock optimization.
  982. * If the start strip is the last in the start row
  983. */
  984. if (start_strip == (start_row + 1) * raid->rowDataSize - 1) {
  985. regStart += ref_in_start_stripe;
  986. /* initialize count to sectors from startref to end
  987. of strip */
  988. regSize = stripSize - ref_in_start_stripe;
  989. }
  990. /* add complete rows in the middle of the transfer */
  991. if (numRows > 2)
  992. regSize += (numRows-2) << raid->stripeShift;
  993. /* if IO ends within first strip of last row*/
  994. if (endStrip == endRow*raid->rowDataSize)
  995. regSize += ref_in_end_stripe+1;
  996. else
  997. regSize += stripSize;
  998. } else {
  999. /*
  1000. * For Uneven span region lock optimization.
  1001. * If the start strip is the last in the start row
  1002. */
  1003. if (start_strip == (get_strip_from_row(instance, ld, start_row, map) +
  1004. SPAN_ROW_DATA_SIZE(map, ld, startlba_span) - 1)) {
  1005. regStart += ref_in_start_stripe;
  1006. /* initialize count to sectors from
  1007. * startRef to end of strip
  1008. */
  1009. regSize = stripSize - ref_in_start_stripe;
  1010. }
  1011. /* Add complete rows in the middle of the transfer*/
  1012. if (numRows > 2)
  1013. /* Add complete rows in the middle of the transfer*/
  1014. regSize += (numRows-2) << raid->stripeShift;
  1015. /* if IO ends within first strip of last row */
  1016. if (endStrip == get_strip_from_row(instance, ld, endRow, map))
  1017. regSize += ref_in_end_stripe + 1;
  1018. else
  1019. regSize += stripSize;
  1020. }
  1021. pRAID_Context->timeout_value =
  1022. cpu_to_le16(raid->fpIoTimeoutForLd ?
  1023. raid->fpIoTimeoutForLd :
  1024. map->raidMap.fpPdIoTimeoutSec);
  1025. if (instance->adapter_type == INVADER_SERIES)
  1026. pRAID_Context->reg_lock_flags = (isRead) ?
  1027. raid->regTypeReqOnRead : raid->regTypeReqOnWrite;
  1028. else if (instance->adapter_type == THUNDERBOLT_SERIES)
  1029. pRAID_Context->reg_lock_flags = (isRead) ?
  1030. REGION_TYPE_SHARED_READ : raid->regTypeReqOnWrite;
  1031. pRAID_Context->virtual_disk_tgt_id = raid->targetId;
  1032. pRAID_Context->reg_lock_row_lba = cpu_to_le64(regStart);
  1033. pRAID_Context->reg_lock_length = cpu_to_le32(regSize);
  1034. pRAID_Context->config_seq_num = raid->seqNum;
  1035. /* save pointer to raid->LUN array */
  1036. *raidLUN = raid->LUN;
  1037. /* Aero R5/6 Division Offload for WRITE */
  1038. if (fusion->r56_div_offload && (raid->level >= 5) && !isRead) {
  1039. mr_get_phy_params_r56_rmw(instance, ld, start_strip, io_info,
  1040. (struct RAID_CONTEXT_G35 *)pRAID_Context,
  1041. map);
  1042. return true;
  1043. }
  1044. /*Get Phy Params only if FP capable, or else leave it to MR firmware
  1045. to do the calculation.*/
  1046. if (io_info->fpOkForIo) {
  1047. retval = io_info->IoforUnevenSpan ?
  1048. mr_spanset_get_phy_params(instance, ld,
  1049. start_strip, ref_in_start_stripe,
  1050. io_info, pRAID_Context, map) :
  1051. MR_GetPhyParams(instance, ld, start_strip,
  1052. ref_in_start_stripe, io_info,
  1053. pRAID_Context, map);
  1054. /* If IO on an invalid Pd, then FP is not possible.*/
  1055. if (io_info->devHandle == MR_DEVHANDLE_INVALID)
  1056. io_info->fpOkForIo = false;
  1057. return retval;
  1058. } else if (isRead) {
  1059. uint stripIdx;
  1060. for (stripIdx = 0; stripIdx < num_strips; stripIdx++) {
  1061. retval = io_info->IoforUnevenSpan ?
  1062. mr_spanset_get_phy_params(instance, ld,
  1063. start_strip + stripIdx,
  1064. ref_in_start_stripe, io_info,
  1065. pRAID_Context, map) :
  1066. MR_GetPhyParams(instance, ld,
  1067. start_strip + stripIdx, ref_in_start_stripe,
  1068. io_info, pRAID_Context, map);
  1069. if (!retval)
  1070. return true;
  1071. }
  1072. }
  1073. return true;
  1074. }
  1075. /*
  1076. ******************************************************************************
  1077. *
  1078. * This routine pepare spanset info from Valid Raid map and store it into
  1079. * local copy of ldSpanInfo per instance data structure.
  1080. *
  1081. * Inputs :
  1082. * map - LD map
  1083. * ldSpanInfo - ldSpanInfo per HBA instance
  1084. *
  1085. */
  1086. void mr_update_span_set(struct MR_DRV_RAID_MAP_ALL *map,
  1087. PLD_SPAN_INFO ldSpanInfo)
  1088. {
  1089. u8 span, count;
  1090. u32 element, span_row_width;
  1091. u64 span_row;
  1092. struct MR_LD_RAID *raid;
  1093. LD_SPAN_SET *span_set, *span_set_prev;
  1094. struct MR_QUAD_ELEMENT *quad;
  1095. int ldCount;
  1096. u16 ld;
  1097. for (ldCount = 0; ldCount < MAX_LOGICAL_DRIVES_EXT; ldCount++) {
  1098. ld = MR_TargetIdToLdGet(ldCount, map);
  1099. if (ld >= (MAX_LOGICAL_DRIVES_EXT - 1))
  1100. continue;
  1101. raid = MR_LdRaidGet(ld, map);
  1102. for (element = 0; element < MAX_QUAD_DEPTH; element++) {
  1103. for (span = 0; span < raid->spanDepth; span++) {
  1104. if (le32_to_cpu(map->raidMap.ldSpanMap[ld].spanBlock[span].
  1105. block_span_info.noElements) <
  1106. element + 1)
  1107. continue;
  1108. span_set = &(ldSpanInfo[ld].span_set[element]);
  1109. quad = &map->raidMap.ldSpanMap[ld].
  1110. spanBlock[span].block_span_info.
  1111. quad[element];
  1112. span_set->diff = le32_to_cpu(quad->diff);
  1113. for (count = 0, span_row_width = 0;
  1114. count < raid->spanDepth; count++) {
  1115. if (le32_to_cpu(map->raidMap.ldSpanMap[ld].
  1116. spanBlock[count].
  1117. block_span_info.
  1118. noElements) >= element + 1) {
  1119. span_set->strip_offset[count] =
  1120. span_row_width;
  1121. span_row_width +=
  1122. MR_LdSpanPtrGet
  1123. (ld, count, map)->spanRowDataSize;
  1124. }
  1125. }
  1126. span_set->span_row_data_width = span_row_width;
  1127. span_row = mega_div64_32(((le64_to_cpu(quad->logEnd) -
  1128. le64_to_cpu(quad->logStart)) + le32_to_cpu(quad->diff)),
  1129. le32_to_cpu(quad->diff));
  1130. if (element == 0) {
  1131. span_set->log_start_lba = 0;
  1132. span_set->log_end_lba =
  1133. ((span_row << raid->stripeShift)
  1134. * span_row_width) - 1;
  1135. span_set->span_row_start = 0;
  1136. span_set->span_row_end = span_row - 1;
  1137. span_set->data_strip_start = 0;
  1138. span_set->data_strip_end =
  1139. (span_row * span_row_width) - 1;
  1140. span_set->data_row_start = 0;
  1141. span_set->data_row_end =
  1142. (span_row * le32_to_cpu(quad->diff)) - 1;
  1143. } else {
  1144. span_set_prev = &(ldSpanInfo[ld].
  1145. span_set[element - 1]);
  1146. span_set->log_start_lba =
  1147. span_set_prev->log_end_lba + 1;
  1148. span_set->log_end_lba =
  1149. span_set->log_start_lba +
  1150. ((span_row << raid->stripeShift)
  1151. * span_row_width) - 1;
  1152. span_set->span_row_start =
  1153. span_set_prev->span_row_end + 1;
  1154. span_set->span_row_end =
  1155. span_set->span_row_start + span_row - 1;
  1156. span_set->data_strip_start =
  1157. span_set_prev->data_strip_end + 1;
  1158. span_set->data_strip_end =
  1159. span_set->data_strip_start +
  1160. (span_row * span_row_width) - 1;
  1161. span_set->data_row_start =
  1162. span_set_prev->data_row_end + 1;
  1163. span_set->data_row_end =
  1164. span_set->data_row_start +
  1165. (span_row * le32_to_cpu(quad->diff)) - 1;
  1166. }
  1167. break;
  1168. }
  1169. if (span == raid->spanDepth)
  1170. break;
  1171. }
  1172. }
  1173. }
  1174. void mr_update_load_balance_params(struct MR_DRV_RAID_MAP_ALL *drv_map,
  1175. struct LD_LOAD_BALANCE_INFO *lbInfo)
  1176. {
  1177. int ldCount;
  1178. u16 ld;
  1179. struct MR_LD_RAID *raid;
  1180. if (lb_pending_cmds > 128 || lb_pending_cmds < 1)
  1181. lb_pending_cmds = LB_PENDING_CMDS_DEFAULT;
  1182. for (ldCount = 0; ldCount < MAX_LOGICAL_DRIVES_EXT; ldCount++) {
  1183. ld = MR_TargetIdToLdGet(ldCount, drv_map);
  1184. if (ld >= MAX_LOGICAL_DRIVES_EXT - 1) {
  1185. lbInfo[ldCount].loadBalanceFlag = 0;
  1186. continue;
  1187. }
  1188. raid = MR_LdRaidGet(ld, drv_map);
  1189. if ((raid->level != 1) ||
  1190. (raid->ldState != MR_LD_STATE_OPTIMAL)) {
  1191. lbInfo[ldCount].loadBalanceFlag = 0;
  1192. continue;
  1193. }
  1194. lbInfo[ldCount].loadBalanceFlag = 1;
  1195. }
  1196. }
  1197. static u8 megasas_get_best_arm_pd(struct megasas_instance *instance,
  1198. struct LD_LOAD_BALANCE_INFO *lbInfo,
  1199. struct IO_REQUEST_INFO *io_info,
  1200. struct MR_DRV_RAID_MAP_ALL *drv_map)
  1201. {
  1202. struct MR_LD_RAID *raid;
  1203. u16 pd1_dev_handle;
  1204. u16 pend0, pend1, ld;
  1205. u64 diff0, diff1;
  1206. u8 bestArm, pd0, pd1, span, arm;
  1207. u32 arRef, span_row_size;
  1208. u64 block = io_info->ldStartBlock;
  1209. u32 count = io_info->numBlocks;
  1210. span = ((io_info->span_arm & RAID_CTX_SPANARM_SPAN_MASK)
  1211. >> RAID_CTX_SPANARM_SPAN_SHIFT);
  1212. arm = (io_info->span_arm & RAID_CTX_SPANARM_ARM_MASK);
  1213. ld = MR_TargetIdToLdGet(io_info->ldTgtId, drv_map);
  1214. raid = MR_LdRaidGet(ld, drv_map);
  1215. span_row_size = instance->UnevenSpanSupport ?
  1216. SPAN_ROW_SIZE(drv_map, ld, span) : raid->rowSize;
  1217. arRef = MR_LdSpanArrayGet(ld, span, drv_map);
  1218. pd0 = MR_ArPdGet(arRef, arm, drv_map);
  1219. pd1 = MR_ArPdGet(arRef, (arm + 1) >= span_row_size ?
  1220. (arm + 1 - span_row_size) : arm + 1, drv_map);
  1221. /* Get PD1 Dev Handle */
  1222. pd1_dev_handle = MR_PdDevHandleGet(pd1, drv_map);
  1223. if (pd1_dev_handle == MR_DEVHANDLE_INVALID) {
  1224. bestArm = arm;
  1225. } else {
  1226. /* get the pending cmds for the data and mirror arms */
  1227. pend0 = atomic_read(&lbInfo->scsi_pending_cmds[pd0]);
  1228. pend1 = atomic_read(&lbInfo->scsi_pending_cmds[pd1]);
  1229. /* Determine the disk whose head is nearer to the req. block */
  1230. diff0 = ABS_DIFF(block, lbInfo->last_accessed_block[pd0]);
  1231. diff1 = ABS_DIFF(block, lbInfo->last_accessed_block[pd1]);
  1232. bestArm = (diff0 <= diff1 ? arm : arm ^ 1);
  1233. /* Make balance count from 16 to 4 to
  1234. * keep driver in sync with Firmware
  1235. */
  1236. if ((bestArm == arm && pend0 > pend1 + lb_pending_cmds) ||
  1237. (bestArm != arm && pend1 > pend0 + lb_pending_cmds))
  1238. bestArm ^= 1;
  1239. /* Update the last accessed block on the correct pd */
  1240. io_info->span_arm =
  1241. (span << RAID_CTX_SPANARM_SPAN_SHIFT) | bestArm;
  1242. io_info->pd_after_lb = (bestArm == arm) ? pd0 : pd1;
  1243. }
  1244. lbInfo->last_accessed_block[io_info->pd_after_lb] = block + count - 1;
  1245. return io_info->pd_after_lb;
  1246. }
  1247. __le16 get_updated_dev_handle(struct megasas_instance *instance,
  1248. struct LD_LOAD_BALANCE_INFO *lbInfo,
  1249. struct IO_REQUEST_INFO *io_info,
  1250. struct MR_DRV_RAID_MAP_ALL *drv_map)
  1251. {
  1252. u8 arm_pd;
  1253. __le16 devHandle;
  1254. /* get best new arm (PD ID) */
  1255. arm_pd = megasas_get_best_arm_pd(instance, lbInfo, io_info, drv_map);
  1256. devHandle = MR_PdDevHandleGet(arm_pd, drv_map);
  1257. io_info->pd_interface = MR_PdInterfaceTypeGet(arm_pd, drv_map);
  1258. atomic_inc(&lbInfo->scsi_pending_cmds[arm_pd]);
  1259. return devHandle;
  1260. }