mac53c94.c 15 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * SCSI low-level driver for the 53c94 SCSI bus adaptor found
  4. * on Power Macintosh computers, controlling the external SCSI chain.
  5. * We assume the 53c94 is connected to a DBDMA (descriptor-based DMA)
  6. * controller.
  7. *
  8. * Paul Mackerras, August 1996.
  9. * Copyright (C) 1996 Paul Mackerras.
  10. */
  11. #include <linux/kernel.h>
  12. #include <linux/delay.h>
  13. #include <linux/types.h>
  14. #include <linux/string.h>
  15. #include <linux/slab.h>
  16. #include <linux/blkdev.h>
  17. #include <linux/proc_fs.h>
  18. #include <linux/stat.h>
  19. #include <linux/spinlock.h>
  20. #include <linux/interrupt.h>
  21. #include <linux/module.h>
  22. #include <linux/pci.h>
  23. #include <linux/pgtable.h>
  24. #include <asm/dbdma.h>
  25. #include <asm/io.h>
  26. #include <asm/prom.h>
  27. #include <asm/macio.h>
  28. #include <scsi/scsi.h>
  29. #include <scsi/scsi_cmnd.h>
  30. #include <scsi/scsi_device.h>
  31. #include <scsi/scsi_host.h>
  32. #include "mac53c94.h"
  33. enum fsc_phase {
  34. idle,
  35. selecting,
  36. dataing,
  37. completing,
  38. busfreeing,
  39. };
  40. struct fsc_state {
  41. struct mac53c94_regs __iomem *regs;
  42. int intr;
  43. struct dbdma_regs __iomem *dma;
  44. int dmaintr;
  45. int clk_freq;
  46. struct Scsi_Host *host;
  47. struct scsi_cmnd *request_q;
  48. struct scsi_cmnd *request_qtail;
  49. struct scsi_cmnd *current_req; /* req we're currently working on */
  50. enum fsc_phase phase; /* what we're currently trying to do */
  51. struct dbdma_cmd *dma_cmds; /* space for dbdma commands, aligned */
  52. void *dma_cmd_space;
  53. struct pci_dev *pdev;
  54. dma_addr_t dma_addr;
  55. struct macio_dev *mdev;
  56. };
  57. static void mac53c94_init(struct fsc_state *);
  58. static void mac53c94_start(struct fsc_state *);
  59. static void mac53c94_interrupt(int, void *);
  60. static irqreturn_t do_mac53c94_interrupt(int, void *);
  61. static void cmd_done(struct fsc_state *, int result);
  62. static void set_dma_cmds(struct fsc_state *, struct scsi_cmnd *);
  63. static int mac53c94_queue_lck(struct scsi_cmnd *cmd)
  64. {
  65. struct fsc_state *state;
  66. #if 0
  67. if (cmd->sc_data_direction == DMA_TO_DEVICE) {
  68. int i;
  69. printk(KERN_DEBUG "mac53c94_queue %p: command is", cmd);
  70. for (i = 0; i < cmd->cmd_len; ++i)
  71. printk(KERN_CONT " %.2x", cmd->cmnd[i]);
  72. printk(KERN_CONT "\n");
  73. printk(KERN_DEBUG "use_sg=%d request_bufflen=%d request_buffer=%p\n",
  74. scsi_sg_count(cmd), scsi_bufflen(cmd), scsi_sglist(cmd));
  75. }
  76. #endif
  77. cmd->host_scribble = NULL;
  78. state = (struct fsc_state *) cmd->device->host->hostdata;
  79. if (state->request_q == NULL)
  80. state->request_q = cmd;
  81. else
  82. state->request_qtail->host_scribble = (void *) cmd;
  83. state->request_qtail = cmd;
  84. if (state->phase == idle)
  85. mac53c94_start(state);
  86. return 0;
  87. }
  88. static DEF_SCSI_QCMD(mac53c94_queue)
  89. static int mac53c94_host_reset(struct scsi_cmnd *cmd)
  90. {
  91. struct fsc_state *state = (struct fsc_state *) cmd->device->host->hostdata;
  92. struct mac53c94_regs __iomem *regs = state->regs;
  93. struct dbdma_regs __iomem *dma = state->dma;
  94. unsigned long flags;
  95. spin_lock_irqsave(cmd->device->host->host_lock, flags);
  96. writel((RUN|PAUSE|FLUSH|WAKE) << 16, &dma->control);
  97. writeb(CMD_SCSI_RESET, &regs->command); /* assert RST */
  98. udelay(100); /* leave it on for a while (>= 25us) */
  99. writeb(CMD_RESET, &regs->command);
  100. udelay(20);
  101. mac53c94_init(state);
  102. writeb(CMD_NOP, &regs->command);
  103. spin_unlock_irqrestore(cmd->device->host->host_lock, flags);
  104. return SUCCESS;
  105. }
  106. static void mac53c94_init(struct fsc_state *state)
  107. {
  108. struct mac53c94_regs __iomem *regs = state->regs;
  109. struct dbdma_regs __iomem *dma = state->dma;
  110. writeb(state->host->this_id | CF1_PAR_ENABLE, &regs->config1);
  111. writeb(TIMO_VAL(250), &regs->sel_timeout); /* 250ms */
  112. writeb(CLKF_VAL(state->clk_freq), &regs->clk_factor);
  113. writeb(CF2_FEATURE_EN, &regs->config2);
  114. writeb(0, &regs->config3);
  115. writeb(0, &regs->sync_period);
  116. writeb(0, &regs->sync_offset);
  117. (void)readb(&regs->interrupt);
  118. writel((RUN|PAUSE|FLUSH|WAKE) << 16, &dma->control);
  119. }
  120. /*
  121. * Start the next command for a 53C94.
  122. * Should be called with interrupts disabled.
  123. */
  124. static void mac53c94_start(struct fsc_state *state)
  125. {
  126. struct scsi_cmnd *cmd;
  127. struct mac53c94_regs __iomem *regs = state->regs;
  128. int i;
  129. if (state->phase != idle || state->current_req != NULL)
  130. panic("inappropriate mac53c94_start (state=%p)", state);
  131. if (state->request_q == NULL)
  132. return;
  133. state->current_req = cmd = state->request_q;
  134. state->request_q = (struct scsi_cmnd *) cmd->host_scribble;
  135. /* Off we go */
  136. writeb(0, &regs->count_lo);
  137. writeb(0, &regs->count_mid);
  138. writeb(0, &regs->count_hi);
  139. writeb(CMD_NOP + CMD_DMA_MODE, &regs->command);
  140. udelay(1);
  141. writeb(CMD_FLUSH, &regs->command);
  142. udelay(1);
  143. writeb(cmd->device->id, &regs->dest_id);
  144. writeb(0, &regs->sync_period);
  145. writeb(0, &regs->sync_offset);
  146. /* load the command into the FIFO */
  147. for (i = 0; i < cmd->cmd_len; ++i)
  148. writeb(cmd->cmnd[i], &regs->fifo);
  149. /* do select without ATN XXX */
  150. writeb(CMD_SELECT, &regs->command);
  151. state->phase = selecting;
  152. set_dma_cmds(state, cmd);
  153. }
  154. static irqreturn_t do_mac53c94_interrupt(int irq, void *dev_id)
  155. {
  156. unsigned long flags;
  157. struct Scsi_Host *dev = ((struct fsc_state *) dev_id)->current_req->device->host;
  158. spin_lock_irqsave(dev->host_lock, flags);
  159. mac53c94_interrupt(irq, dev_id);
  160. spin_unlock_irqrestore(dev->host_lock, flags);
  161. return IRQ_HANDLED;
  162. }
  163. static void mac53c94_interrupt(int irq, void *dev_id)
  164. {
  165. struct fsc_state *state = (struct fsc_state *) dev_id;
  166. struct mac53c94_regs __iomem *regs = state->regs;
  167. struct dbdma_regs __iomem *dma = state->dma;
  168. struct scsi_cmnd *const cmd = state->current_req;
  169. struct mac53c94_cmd_priv *const mcmd = mac53c94_priv(cmd);
  170. int nb, stat, seq, intr;
  171. static int mac53c94_errors;
  172. /*
  173. * Apparently, reading the interrupt register unlatches
  174. * the status and sequence step registers.
  175. */
  176. seq = readb(&regs->seqstep);
  177. stat = readb(&regs->status);
  178. intr = readb(&regs->interrupt);
  179. #if 0
  180. printk(KERN_DEBUG "mac53c94_intr, intr=%x stat=%x seq=%x phase=%d\n",
  181. intr, stat, seq, state->phase);
  182. #endif
  183. if (intr & INTR_RESET) {
  184. /* SCSI bus was reset */
  185. printk(KERN_INFO "external SCSI bus reset detected\n");
  186. writeb(CMD_NOP, &regs->command);
  187. writel(RUN << 16, &dma->control); /* stop dma */
  188. cmd_done(state, DID_RESET << 16);
  189. return;
  190. }
  191. if (intr & INTR_ILL_CMD) {
  192. printk(KERN_ERR "53c94: invalid cmd, intr=%x stat=%x seq=%x phase=%d\n",
  193. intr, stat, seq, state->phase);
  194. cmd_done(state, DID_ERROR << 16);
  195. return;
  196. }
  197. if (stat & STAT_ERROR) {
  198. #if 0
  199. /* XXX these seem to be harmless? */
  200. printk("53c94: bad error, intr=%x stat=%x seq=%x phase=%d\n",
  201. intr, stat, seq, state->phase);
  202. #endif
  203. ++mac53c94_errors;
  204. writeb(CMD_NOP + CMD_DMA_MODE, &regs->command);
  205. }
  206. if (!cmd) {
  207. printk(KERN_DEBUG "53c94: interrupt with no command active?\n");
  208. return;
  209. }
  210. if (stat & STAT_PARITY) {
  211. printk(KERN_ERR "mac53c94: parity error\n");
  212. cmd_done(state, DID_PARITY << 16);
  213. return;
  214. }
  215. switch (state->phase) {
  216. case selecting:
  217. if (intr & INTR_DISCONNECT) {
  218. /* selection timed out */
  219. cmd_done(state, DID_BAD_TARGET << 16);
  220. return;
  221. }
  222. if (intr != INTR_BUS_SERV + INTR_DONE) {
  223. printk(KERN_DEBUG "got intr %x during selection\n", intr);
  224. cmd_done(state, DID_ERROR << 16);
  225. return;
  226. }
  227. if ((seq & SS_MASK) != SS_DONE) {
  228. printk(KERN_DEBUG "seq step %x after command\n", seq);
  229. cmd_done(state, DID_ERROR << 16);
  230. return;
  231. }
  232. writeb(CMD_NOP, &regs->command);
  233. /* set DMA controller going if any data to transfer */
  234. if ((stat & (STAT_MSG|STAT_CD)) == 0
  235. && (scsi_sg_count(cmd) > 0 || scsi_bufflen(cmd))) {
  236. nb = mcmd->this_residual;
  237. if (nb > 0xfff0)
  238. nb = 0xfff0;
  239. mcmd->this_residual -= nb;
  240. writeb(nb, &regs->count_lo);
  241. writeb(nb >> 8, &regs->count_mid);
  242. writeb(CMD_DMA_MODE + CMD_NOP, &regs->command);
  243. writel(virt_to_phys(state->dma_cmds), &dma->cmdptr);
  244. writel((RUN << 16) | RUN, &dma->control);
  245. writeb(CMD_DMA_MODE + CMD_XFER_DATA, &regs->command);
  246. state->phase = dataing;
  247. break;
  248. } else if ((stat & STAT_PHASE) == STAT_CD + STAT_IO) {
  249. /* up to status phase already */
  250. writeb(CMD_I_COMPLETE, &regs->command);
  251. state->phase = completing;
  252. } else {
  253. printk(KERN_DEBUG "in unexpected phase %x after cmd\n",
  254. stat & STAT_PHASE);
  255. cmd_done(state, DID_ERROR << 16);
  256. return;
  257. }
  258. break;
  259. case dataing:
  260. if (intr != INTR_BUS_SERV) {
  261. printk(KERN_DEBUG "got intr %x before status\n", intr);
  262. cmd_done(state, DID_ERROR << 16);
  263. return;
  264. }
  265. if (mcmd->this_residual != 0
  266. && (stat & (STAT_MSG|STAT_CD)) == 0) {
  267. /* Set up the count regs to transfer more */
  268. nb = mcmd->this_residual;
  269. if (nb > 0xfff0)
  270. nb = 0xfff0;
  271. mcmd->this_residual -= nb;
  272. writeb(nb, &regs->count_lo);
  273. writeb(nb >> 8, &regs->count_mid);
  274. writeb(CMD_DMA_MODE + CMD_NOP, &regs->command);
  275. writeb(CMD_DMA_MODE + CMD_XFER_DATA, &regs->command);
  276. break;
  277. }
  278. if ((stat & STAT_PHASE) != STAT_CD + STAT_IO) {
  279. printk(KERN_DEBUG "intr %x before data xfer complete\n", intr);
  280. }
  281. writel(RUN << 16, &dma->control); /* stop dma */
  282. scsi_dma_unmap(cmd);
  283. /* should check dma status */
  284. writeb(CMD_I_COMPLETE, &regs->command);
  285. state->phase = completing;
  286. break;
  287. case completing:
  288. if (intr != INTR_DONE) {
  289. printk(KERN_DEBUG "got intr %x on completion\n", intr);
  290. cmd_done(state, DID_ERROR << 16);
  291. return;
  292. }
  293. mcmd->status = readb(&regs->fifo);
  294. mcmd->message = readb(&regs->fifo);
  295. writeb(CMD_ACCEPT_MSG, &regs->command);
  296. state->phase = busfreeing;
  297. break;
  298. case busfreeing:
  299. if (intr != INTR_DISCONNECT) {
  300. printk(KERN_DEBUG "got intr %x when expected disconnect\n", intr);
  301. }
  302. cmd_done(state, (DID_OK << 16) + (mcmd->message << 8) + mcmd->status);
  303. break;
  304. default:
  305. printk(KERN_DEBUG "don't know about phase %d\n", state->phase);
  306. }
  307. }
  308. static void cmd_done(struct fsc_state *state, int result)
  309. {
  310. struct scsi_cmnd *cmd;
  311. cmd = state->current_req;
  312. if (cmd) {
  313. cmd->result = result;
  314. scsi_done(cmd);
  315. state->current_req = NULL;
  316. }
  317. state->phase = idle;
  318. mac53c94_start(state);
  319. }
  320. /*
  321. * Set up DMA commands for transferring data.
  322. */
  323. static void set_dma_cmds(struct fsc_state *state, struct scsi_cmnd *cmd)
  324. {
  325. int i, dma_cmd, total, nseg;
  326. struct scatterlist *scl;
  327. struct dbdma_cmd *dcmds;
  328. dma_addr_t dma_addr;
  329. u32 dma_len;
  330. nseg = scsi_dma_map(cmd);
  331. BUG_ON(nseg < 0);
  332. if (!nseg)
  333. return;
  334. dma_cmd = cmd->sc_data_direction == DMA_TO_DEVICE ?
  335. OUTPUT_MORE : INPUT_MORE;
  336. dcmds = state->dma_cmds;
  337. total = 0;
  338. scsi_for_each_sg(cmd, scl, nseg, i) {
  339. dma_addr = sg_dma_address(scl);
  340. dma_len = sg_dma_len(scl);
  341. if (dma_len > 0xffff)
  342. panic("mac53c94: scatterlist element >= 64k");
  343. total += dma_len;
  344. dcmds->req_count = cpu_to_le16(dma_len);
  345. dcmds->command = cpu_to_le16(dma_cmd);
  346. dcmds->phy_addr = cpu_to_le32(dma_addr);
  347. dcmds->xfer_status = 0;
  348. ++dcmds;
  349. }
  350. dma_cmd += OUTPUT_LAST - OUTPUT_MORE;
  351. dcmds[-1].command = cpu_to_le16(dma_cmd);
  352. dcmds->command = cpu_to_le16(DBDMA_STOP);
  353. mac53c94_priv(cmd)->this_residual = total;
  354. }
  355. static struct scsi_host_template mac53c94_template = {
  356. .proc_name = "53c94",
  357. .name = "53C94",
  358. .queuecommand = mac53c94_queue,
  359. .eh_host_reset_handler = mac53c94_host_reset,
  360. .can_queue = 1,
  361. .this_id = 7,
  362. .sg_tablesize = SG_ALL,
  363. .max_segment_size = 65535,
  364. .cmd_size = sizeof(struct mac53c94_cmd_priv),
  365. };
  366. static int mac53c94_probe(struct macio_dev *mdev, const struct of_device_id *match)
  367. {
  368. struct device_node *node = macio_get_of_node(mdev);
  369. struct pci_dev *pdev = macio_get_pci_dev(mdev);
  370. struct fsc_state *state;
  371. struct Scsi_Host *host;
  372. void *dma_cmd_space;
  373. const unsigned char *clkprop;
  374. int proplen, rc = -ENODEV;
  375. if (macio_resource_count(mdev) != 2 || macio_irq_count(mdev) != 2) {
  376. printk(KERN_ERR "mac53c94: expected 2 addrs and intrs"
  377. " (got %d/%d)\n",
  378. macio_resource_count(mdev), macio_irq_count(mdev));
  379. return -ENODEV;
  380. }
  381. if (macio_request_resources(mdev, "mac53c94") != 0) {
  382. printk(KERN_ERR "mac53c94: unable to request memory resources");
  383. return -EBUSY;
  384. }
  385. host = scsi_host_alloc(&mac53c94_template, sizeof(struct fsc_state));
  386. if (host == NULL) {
  387. printk(KERN_ERR "mac53c94: couldn't register host");
  388. rc = -ENOMEM;
  389. goto out_release;
  390. }
  391. state = (struct fsc_state *) host->hostdata;
  392. macio_set_drvdata(mdev, state);
  393. state->host = host;
  394. state->pdev = pdev;
  395. state->mdev = mdev;
  396. state->regs = (struct mac53c94_regs __iomem *)
  397. ioremap(macio_resource_start(mdev, 0), 0x1000);
  398. state->intr = macio_irq(mdev, 0);
  399. state->dma = (struct dbdma_regs __iomem *)
  400. ioremap(macio_resource_start(mdev, 1), 0x1000);
  401. state->dmaintr = macio_irq(mdev, 1);
  402. if (state->regs == NULL || state->dma == NULL) {
  403. printk(KERN_ERR "mac53c94: ioremap failed for %pOF\n", node);
  404. goto out_free;
  405. }
  406. clkprop = of_get_property(node, "clock-frequency", &proplen);
  407. if (clkprop == NULL || proplen != sizeof(int)) {
  408. printk(KERN_ERR "%pOF: can't get clock frequency, "
  409. "assuming 25MHz\n", node);
  410. state->clk_freq = 25000000;
  411. } else
  412. state->clk_freq = *(int *)clkprop;
  413. /* Space for dma command list: +1 for stop command,
  414. * +1 to allow for aligning.
  415. * XXX FIXME: Use DMA consistent routines
  416. */
  417. dma_cmd_space = kmalloc_array(host->sg_tablesize + 2,
  418. sizeof(struct dbdma_cmd),
  419. GFP_KERNEL);
  420. if (!dma_cmd_space) {
  421. printk(KERN_ERR "mac53c94: couldn't allocate dma "
  422. "command space for %pOF\n", node);
  423. rc = -ENOMEM;
  424. goto out_free;
  425. }
  426. state->dma_cmds = (struct dbdma_cmd *)DBDMA_ALIGN(dma_cmd_space);
  427. memset(state->dma_cmds, 0, (host->sg_tablesize + 1)
  428. * sizeof(struct dbdma_cmd));
  429. state->dma_cmd_space = dma_cmd_space;
  430. mac53c94_init(state);
  431. if (request_irq(state->intr, do_mac53c94_interrupt, 0, "53C94",state)) {
  432. printk(KERN_ERR "mac53C94: can't get irq %d for %pOF\n",
  433. state->intr, node);
  434. goto out_free_dma;
  435. }
  436. rc = scsi_add_host(host, &mdev->ofdev.dev);
  437. if (rc != 0)
  438. goto out_release_irq;
  439. scsi_scan_host(host);
  440. return 0;
  441. out_release_irq:
  442. free_irq(state->intr, state);
  443. out_free_dma:
  444. kfree(state->dma_cmd_space);
  445. out_free:
  446. if (state->dma != NULL)
  447. iounmap(state->dma);
  448. if (state->regs != NULL)
  449. iounmap(state->regs);
  450. scsi_host_put(host);
  451. out_release:
  452. macio_release_resources(mdev);
  453. return rc;
  454. }
  455. static int mac53c94_remove(struct macio_dev *mdev)
  456. {
  457. struct fsc_state *fp = (struct fsc_state *)macio_get_drvdata(mdev);
  458. struct Scsi_Host *host = fp->host;
  459. scsi_remove_host(host);
  460. free_irq(fp->intr, fp);
  461. if (fp->regs)
  462. iounmap(fp->regs);
  463. if (fp->dma)
  464. iounmap(fp->dma);
  465. kfree(fp->dma_cmd_space);
  466. scsi_host_put(host);
  467. macio_release_resources(mdev);
  468. return 0;
  469. }
  470. static struct of_device_id mac53c94_match[] =
  471. {
  472. {
  473. .name = "53c94",
  474. },
  475. {},
  476. };
  477. MODULE_DEVICE_TABLE (of, mac53c94_match);
  478. static struct macio_driver mac53c94_driver =
  479. {
  480. .driver = {
  481. .name = "mac53c94",
  482. .owner = THIS_MODULE,
  483. .of_match_table = mac53c94_match,
  484. },
  485. .probe = mac53c94_probe,
  486. .remove = mac53c94_remove,
  487. };
  488. static int __init init_mac53c94(void)
  489. {
  490. return macio_register_driver(&mac53c94_driver);
  491. }
  492. static void __exit exit_mac53c94(void)
  493. {
  494. return macio_unregister_driver(&mac53c94_driver);
  495. }
  496. module_init(init_mac53c94);
  497. module_exit(exit_mac53c94);
  498. MODULE_DESCRIPTION("PowerMac 53c94 SCSI driver");
  499. MODULE_AUTHOR("Paul Mackerras <[email protected]>");
  500. MODULE_LICENSE("GPL");