NCR5380.c 70 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * NCR 5380 generic driver routines. These should make it *trivial*
  4. * to implement 5380 SCSI drivers under Linux with a non-trantor
  5. * architecture.
  6. *
  7. * Note that these routines also work with NR53c400 family chips.
  8. *
  9. * Copyright 1993, Drew Eckhardt
  10. * Visionary Computing
  11. * (Unix and Linux consulting and custom programming)
  12. * [email protected]
  13. * +1 (303) 666-5836
  14. *
  15. * For more information, please consult
  16. *
  17. * NCR 5380 Family
  18. * SCSI Protocol Controller
  19. * Databook
  20. *
  21. * NCR Microelectronics
  22. * 1635 Aeroplaza Drive
  23. * Colorado Springs, CO 80916
  24. * 1+ (719) 578-3400
  25. * 1+ (800) 334-5454
  26. */
  27. /*
  28. * With contributions from Ray Van Tassle, Ingmar Baumgart,
  29. * Ronald van Cuijlenborg, Alan Cox and others.
  30. */
  31. /* Ported to Atari by Roman Hodek and others. */
  32. /* Adapted for the Sun 3 by Sam Creasey. */
  33. /*
  34. * Design
  35. *
  36. * This is a generic 5380 driver. To use it on a different platform,
  37. * one simply writes appropriate system specific macros (ie, data
  38. * transfer - some PC's will use the I/O bus, 68K's must use
  39. * memory mapped) and drops this file in their 'C' wrapper.
  40. *
  41. * As far as command queueing, two queues are maintained for
  42. * each 5380 in the system - commands that haven't been issued yet,
  43. * and commands that are currently executing. This means that an
  44. * unlimited number of commands may be queued, letting
  45. * more commands propagate from the higher driver levels giving higher
  46. * throughput. Note that both I_T_L and I_T_L_Q nexuses are supported,
  47. * allowing multiple commands to propagate all the way to a SCSI-II device
  48. * while a command is already executing.
  49. *
  50. *
  51. * Issues specific to the NCR5380 :
  52. *
  53. * When used in a PIO or pseudo-dma mode, the NCR5380 is a braindead
  54. * piece of hardware that requires you to sit in a loop polling for
  55. * the REQ signal as long as you are connected. Some devices are
  56. * brain dead (ie, many TEXEL CD ROM drives) and won't disconnect
  57. * while doing long seek operations. [...] These
  58. * broken devices are the exception rather than the rule and I'd rather
  59. * spend my time optimizing for the normal case.
  60. *
  61. * Architecture :
  62. *
  63. * At the heart of the design is a coroutine, NCR5380_main,
  64. * which is started from a workqueue for each NCR5380 host in the
  65. * system. It attempts to establish I_T_L or I_T_L_Q nexuses by
  66. * removing the commands from the issue queue and calling
  67. * NCR5380_select() if a nexus is not established.
  68. *
  69. * Once a nexus is established, the NCR5380_information_transfer()
  70. * phase goes through the various phases as instructed by the target.
  71. * if the target goes into MSG IN and sends a DISCONNECT message,
  72. * the command structure is placed into the per instance disconnected
  73. * queue, and NCR5380_main tries to find more work. If the target is
  74. * idle for too long, the system will try to sleep.
  75. *
  76. * If a command has disconnected, eventually an interrupt will trigger,
  77. * calling NCR5380_intr() which will in turn call NCR5380_reselect
  78. * to reestablish a nexus. This will run main if necessary.
  79. *
  80. * On command termination, the done function will be called as
  81. * appropriate.
  82. *
  83. * The command data pointer is initialized after the command is connected
  84. * in NCR5380_select, and set as appropriate in NCR5380_information_transfer.
  85. * Note that in violation of the standard, an implicit SAVE POINTERS operation
  86. * is done, since some BROKEN disks fail to issue an explicit SAVE POINTERS.
  87. */
  88. /*
  89. * Using this file :
  90. * This file a skeleton Linux SCSI driver for the NCR 5380 series
  91. * of chips. To use it, you write an architecture specific functions
  92. * and macros and include this file in your driver.
  93. *
  94. * These macros MUST be defined :
  95. *
  96. * NCR5380_read(register) - read from the specified register
  97. *
  98. * NCR5380_write(register, value) - write to the specific register
  99. *
  100. * NCR5380_implementation_fields - additional fields needed for this
  101. * specific implementation of the NCR5380
  102. *
  103. * Either real DMA *or* pseudo DMA may be implemented
  104. *
  105. * NCR5380_dma_xfer_len - determine size of DMA/PDMA transfer
  106. * NCR5380_dma_send_setup - execute DMA/PDMA from memory to 5380
  107. * NCR5380_dma_recv_setup - execute DMA/PDMA from 5380 to memory
  108. * NCR5380_dma_residual - residual byte count
  109. *
  110. * The generic driver is initialized by calling NCR5380_init(instance),
  111. * after setting the appropriate host specific fields and ID.
  112. */
  113. #ifndef NCR5380_io_delay
  114. #define NCR5380_io_delay(x)
  115. #endif
  116. #ifndef NCR5380_acquire_dma_irq
  117. #define NCR5380_acquire_dma_irq(x) (1)
  118. #endif
  119. #ifndef NCR5380_release_dma_irq
  120. #define NCR5380_release_dma_irq(x)
  121. #endif
  122. static unsigned int disconnect_mask = ~0;
  123. module_param(disconnect_mask, int, 0444);
  124. static int do_abort(struct Scsi_Host *, unsigned int);
  125. static void do_reset(struct Scsi_Host *);
  126. static void bus_reset_cleanup(struct Scsi_Host *);
  127. /**
  128. * initialize_SCp - init the scsi pointer field
  129. * @cmd: command block to set up
  130. *
  131. * Set up the internal fields in the SCSI command.
  132. */
  133. static inline void initialize_SCp(struct scsi_cmnd *cmd)
  134. {
  135. struct NCR5380_cmd *ncmd = NCR5380_to_ncmd(cmd);
  136. if (scsi_bufflen(cmd)) {
  137. ncmd->buffer = scsi_sglist(cmd);
  138. ncmd->ptr = sg_virt(ncmd->buffer);
  139. ncmd->this_residual = ncmd->buffer->length;
  140. } else {
  141. ncmd->buffer = NULL;
  142. ncmd->ptr = NULL;
  143. ncmd->this_residual = 0;
  144. }
  145. ncmd->status = 0;
  146. ncmd->message = 0;
  147. }
  148. static inline void advance_sg_buffer(struct NCR5380_cmd *ncmd)
  149. {
  150. struct scatterlist *s = ncmd->buffer;
  151. if (!ncmd->this_residual && s && !sg_is_last(s)) {
  152. ncmd->buffer = sg_next(s);
  153. ncmd->ptr = sg_virt(ncmd->buffer);
  154. ncmd->this_residual = ncmd->buffer->length;
  155. }
  156. }
  157. static inline void set_resid_from_SCp(struct scsi_cmnd *cmd)
  158. {
  159. struct NCR5380_cmd *ncmd = NCR5380_to_ncmd(cmd);
  160. int resid = ncmd->this_residual;
  161. struct scatterlist *s = ncmd->buffer;
  162. if (s)
  163. while (!sg_is_last(s)) {
  164. s = sg_next(s);
  165. resid += s->length;
  166. }
  167. scsi_set_resid(cmd, resid);
  168. }
  169. /**
  170. * NCR5380_poll_politely2 - wait for two chip register values
  171. * @hostdata: host private data
  172. * @reg1: 5380 register to poll
  173. * @bit1: Bitmask to check
  174. * @val1: Expected value
  175. * @reg2: Second 5380 register to poll
  176. * @bit2: Second bitmask to check
  177. * @val2: Second expected value
  178. * @wait: Time-out in jiffies, 0 if sleeping is not allowed
  179. *
  180. * Polls the chip in a reasonably efficient manner waiting for an
  181. * event to occur. After a short quick poll we begin to yield the CPU
  182. * (if possible). In irq contexts the time-out is arbitrarily limited.
  183. * Callers may hold locks as long as they are held in irq mode.
  184. *
  185. * Returns 0 if either or both event(s) occurred otherwise -ETIMEDOUT.
  186. */
  187. static int NCR5380_poll_politely2(struct NCR5380_hostdata *hostdata,
  188. unsigned int reg1, u8 bit1, u8 val1,
  189. unsigned int reg2, u8 bit2, u8 val2,
  190. unsigned long wait)
  191. {
  192. unsigned long n = hostdata->poll_loops;
  193. unsigned long deadline = jiffies + wait;
  194. do {
  195. if ((NCR5380_read(reg1) & bit1) == val1)
  196. return 0;
  197. if ((NCR5380_read(reg2) & bit2) == val2)
  198. return 0;
  199. cpu_relax();
  200. } while (n--);
  201. if (!wait)
  202. return -ETIMEDOUT;
  203. /* Repeatedly sleep for 1 ms until deadline */
  204. while (time_is_after_jiffies(deadline)) {
  205. schedule_timeout_uninterruptible(1);
  206. if ((NCR5380_read(reg1) & bit1) == val1)
  207. return 0;
  208. if ((NCR5380_read(reg2) & bit2) == val2)
  209. return 0;
  210. }
  211. return -ETIMEDOUT;
  212. }
  213. #if NDEBUG
  214. static struct {
  215. unsigned char mask;
  216. const char *name;
  217. } signals[] = {
  218. {SR_DBP, "PARITY"},
  219. {SR_RST, "RST"},
  220. {SR_BSY, "BSY"},
  221. {SR_REQ, "REQ"},
  222. {SR_MSG, "MSG"},
  223. {SR_CD, "CD"},
  224. {SR_IO, "IO"},
  225. {SR_SEL, "SEL"},
  226. {0, NULL}
  227. },
  228. basrs[] = {
  229. {BASR_END_DMA_TRANSFER, "END OF DMA"},
  230. {BASR_DRQ, "DRQ"},
  231. {BASR_PARITY_ERROR, "PARITY ERROR"},
  232. {BASR_IRQ, "IRQ"},
  233. {BASR_PHASE_MATCH, "PHASE MATCH"},
  234. {BASR_BUSY_ERROR, "BUSY ERROR"},
  235. {BASR_ATN, "ATN"},
  236. {BASR_ACK, "ACK"},
  237. {0, NULL}
  238. },
  239. icrs[] = {
  240. {ICR_ASSERT_RST, "ASSERT RST"},
  241. {ICR_ARBITRATION_PROGRESS, "ARB. IN PROGRESS"},
  242. {ICR_ARBITRATION_LOST, "LOST ARB."},
  243. {ICR_ASSERT_ACK, "ASSERT ACK"},
  244. {ICR_ASSERT_BSY, "ASSERT BSY"},
  245. {ICR_ASSERT_SEL, "ASSERT SEL"},
  246. {ICR_ASSERT_ATN, "ASSERT ATN"},
  247. {ICR_ASSERT_DATA, "ASSERT DATA"},
  248. {0, NULL}
  249. },
  250. mrs[] = {
  251. {MR_BLOCK_DMA_MODE, "BLOCK DMA MODE"},
  252. {MR_TARGET, "TARGET"},
  253. {MR_ENABLE_PAR_CHECK, "PARITY CHECK"},
  254. {MR_ENABLE_PAR_INTR, "PARITY INTR"},
  255. {MR_ENABLE_EOP_INTR, "EOP INTR"},
  256. {MR_MONITOR_BSY, "MONITOR BSY"},
  257. {MR_DMA_MODE, "DMA MODE"},
  258. {MR_ARBITRATE, "ARBITRATE"},
  259. {0, NULL}
  260. };
  261. /**
  262. * NCR5380_print - print scsi bus signals
  263. * @instance: adapter state to dump
  264. *
  265. * Print the SCSI bus signals for debugging purposes
  266. */
  267. static void NCR5380_print(struct Scsi_Host *instance)
  268. {
  269. struct NCR5380_hostdata *hostdata = shost_priv(instance);
  270. unsigned char status, basr, mr, icr, i;
  271. status = NCR5380_read(STATUS_REG);
  272. mr = NCR5380_read(MODE_REG);
  273. icr = NCR5380_read(INITIATOR_COMMAND_REG);
  274. basr = NCR5380_read(BUS_AND_STATUS_REG);
  275. printk(KERN_DEBUG "SR = 0x%02x : ", status);
  276. for (i = 0; signals[i].mask; ++i)
  277. if (status & signals[i].mask)
  278. printk(KERN_CONT "%s, ", signals[i].name);
  279. printk(KERN_CONT "\nBASR = 0x%02x : ", basr);
  280. for (i = 0; basrs[i].mask; ++i)
  281. if (basr & basrs[i].mask)
  282. printk(KERN_CONT "%s, ", basrs[i].name);
  283. printk(KERN_CONT "\nICR = 0x%02x : ", icr);
  284. for (i = 0; icrs[i].mask; ++i)
  285. if (icr & icrs[i].mask)
  286. printk(KERN_CONT "%s, ", icrs[i].name);
  287. printk(KERN_CONT "\nMR = 0x%02x : ", mr);
  288. for (i = 0; mrs[i].mask; ++i)
  289. if (mr & mrs[i].mask)
  290. printk(KERN_CONT "%s, ", mrs[i].name);
  291. printk(KERN_CONT "\n");
  292. }
  293. static struct {
  294. unsigned char value;
  295. const char *name;
  296. } phases[] = {
  297. {PHASE_DATAOUT, "DATAOUT"},
  298. {PHASE_DATAIN, "DATAIN"},
  299. {PHASE_CMDOUT, "CMDOUT"},
  300. {PHASE_STATIN, "STATIN"},
  301. {PHASE_MSGOUT, "MSGOUT"},
  302. {PHASE_MSGIN, "MSGIN"},
  303. {PHASE_UNKNOWN, "UNKNOWN"}
  304. };
  305. /**
  306. * NCR5380_print_phase - show SCSI phase
  307. * @instance: adapter to dump
  308. *
  309. * Print the current SCSI phase for debugging purposes
  310. */
  311. static void NCR5380_print_phase(struct Scsi_Host *instance)
  312. {
  313. struct NCR5380_hostdata *hostdata = shost_priv(instance);
  314. unsigned char status;
  315. int i;
  316. status = NCR5380_read(STATUS_REG);
  317. if (!(status & SR_REQ))
  318. shost_printk(KERN_DEBUG, instance, "REQ not asserted, phase unknown.\n");
  319. else {
  320. for (i = 0; (phases[i].value != PHASE_UNKNOWN) &&
  321. (phases[i].value != (status & PHASE_MASK)); ++i)
  322. ;
  323. shost_printk(KERN_DEBUG, instance, "phase %s\n", phases[i].name);
  324. }
  325. }
  326. #endif
  327. /**
  328. * NCR5380_info - report driver and host information
  329. * @instance: relevant scsi host instance
  330. *
  331. * For use as the host template info() handler.
  332. */
  333. static const char *NCR5380_info(struct Scsi_Host *instance)
  334. {
  335. struct NCR5380_hostdata *hostdata = shost_priv(instance);
  336. return hostdata->info;
  337. }
  338. /**
  339. * NCR5380_init - initialise an NCR5380
  340. * @instance: adapter to configure
  341. * @flags: control flags
  342. *
  343. * Initializes *instance and corresponding 5380 chip,
  344. * with flags OR'd into the initial flags value.
  345. *
  346. * Notes : I assume that the host, hostno, and id bits have been
  347. * set correctly. I don't care about the irq and other fields.
  348. *
  349. * Returns 0 for success
  350. */
  351. static int NCR5380_init(struct Scsi_Host *instance, int flags)
  352. {
  353. struct NCR5380_hostdata *hostdata = shost_priv(instance);
  354. int i;
  355. unsigned long deadline;
  356. unsigned long accesses_per_ms;
  357. instance->max_lun = 7;
  358. hostdata->host = instance;
  359. hostdata->id_mask = 1 << instance->this_id;
  360. hostdata->id_higher_mask = 0;
  361. for (i = hostdata->id_mask; i <= 0x80; i <<= 1)
  362. if (i > hostdata->id_mask)
  363. hostdata->id_higher_mask |= i;
  364. for (i = 0; i < 8; ++i)
  365. hostdata->busy[i] = 0;
  366. hostdata->dma_len = 0;
  367. spin_lock_init(&hostdata->lock);
  368. hostdata->connected = NULL;
  369. hostdata->sensing = NULL;
  370. INIT_LIST_HEAD(&hostdata->autosense);
  371. INIT_LIST_HEAD(&hostdata->unissued);
  372. INIT_LIST_HEAD(&hostdata->disconnected);
  373. hostdata->flags = flags;
  374. INIT_WORK(&hostdata->main_task, NCR5380_main);
  375. hostdata->work_q = alloc_workqueue("ncr5380_%d",
  376. WQ_UNBOUND | WQ_MEM_RECLAIM,
  377. 1, instance->host_no);
  378. if (!hostdata->work_q)
  379. return -ENOMEM;
  380. snprintf(hostdata->info, sizeof(hostdata->info),
  381. "%s, irq %d, io_port 0x%lx, base 0x%lx, can_queue %d, cmd_per_lun %d, sg_tablesize %d, this_id %d, flags { %s%s%s}",
  382. instance->hostt->name, instance->irq, hostdata->io_port,
  383. hostdata->base, instance->can_queue, instance->cmd_per_lun,
  384. instance->sg_tablesize, instance->this_id,
  385. hostdata->flags & FLAG_DMA_FIXUP ? "DMA_FIXUP " : "",
  386. hostdata->flags & FLAG_NO_PSEUDO_DMA ? "NO_PSEUDO_DMA " : "",
  387. hostdata->flags & FLAG_TOSHIBA_DELAY ? "TOSHIBA_DELAY " : "");
  388. NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
  389. NCR5380_write(MODE_REG, MR_BASE);
  390. NCR5380_write(TARGET_COMMAND_REG, 0);
  391. NCR5380_write(SELECT_ENABLE_REG, 0);
  392. /* Calibrate register polling loop */
  393. i = 0;
  394. deadline = jiffies + 1;
  395. do {
  396. cpu_relax();
  397. } while (time_is_after_jiffies(deadline));
  398. deadline += msecs_to_jiffies(256);
  399. do {
  400. NCR5380_read(STATUS_REG);
  401. ++i;
  402. cpu_relax();
  403. } while (time_is_after_jiffies(deadline));
  404. accesses_per_ms = i / 256;
  405. hostdata->poll_loops = NCR5380_REG_POLL_TIME * accesses_per_ms / 2;
  406. return 0;
  407. }
  408. /**
  409. * NCR5380_maybe_reset_bus - Detect and correct bus wedge problems.
  410. * @instance: adapter to check
  411. *
  412. * If the system crashed, it may have crashed with a connected target and
  413. * the SCSI bus busy. Check for BUS FREE phase. If not, try to abort the
  414. * currently established nexus, which we know nothing about. Failing that
  415. * do a bus reset.
  416. *
  417. * Note that a bus reset will cause the chip to assert IRQ.
  418. *
  419. * Returns 0 if successful, otherwise -ENXIO.
  420. */
  421. static int NCR5380_maybe_reset_bus(struct Scsi_Host *instance)
  422. {
  423. struct NCR5380_hostdata *hostdata = shost_priv(instance);
  424. int pass;
  425. for (pass = 1; (NCR5380_read(STATUS_REG) & SR_BSY) && pass <= 6; ++pass) {
  426. switch (pass) {
  427. case 1:
  428. case 3:
  429. case 5:
  430. shost_printk(KERN_ERR, instance, "SCSI bus busy, waiting up to five seconds\n");
  431. NCR5380_poll_politely(hostdata,
  432. STATUS_REG, SR_BSY, 0, 5 * HZ);
  433. break;
  434. case 2:
  435. shost_printk(KERN_ERR, instance, "bus busy, attempting abort\n");
  436. do_abort(instance, 1);
  437. break;
  438. case 4:
  439. shost_printk(KERN_ERR, instance, "bus busy, attempting reset\n");
  440. do_reset(instance);
  441. /* Wait after a reset; the SCSI standard calls for
  442. * 250ms, we wait 500ms to be on the safe side.
  443. * But some Toshiba CD-ROMs need ten times that.
  444. */
  445. if (hostdata->flags & FLAG_TOSHIBA_DELAY)
  446. msleep(2500);
  447. else
  448. msleep(500);
  449. break;
  450. case 6:
  451. shost_printk(KERN_ERR, instance, "bus locked solid\n");
  452. return -ENXIO;
  453. }
  454. }
  455. return 0;
  456. }
  457. /**
  458. * NCR5380_exit - remove an NCR5380
  459. * @instance: adapter to remove
  460. *
  461. * Assumes that no more work can be queued (e.g. by NCR5380_intr).
  462. */
  463. static void NCR5380_exit(struct Scsi_Host *instance)
  464. {
  465. struct NCR5380_hostdata *hostdata = shost_priv(instance);
  466. cancel_work_sync(&hostdata->main_task);
  467. destroy_workqueue(hostdata->work_q);
  468. }
  469. /**
  470. * complete_cmd - finish processing a command and return it to the SCSI ML
  471. * @instance: the host instance
  472. * @cmd: command to complete
  473. */
  474. static void complete_cmd(struct Scsi_Host *instance,
  475. struct scsi_cmnd *cmd)
  476. {
  477. struct NCR5380_hostdata *hostdata = shost_priv(instance);
  478. dsprintk(NDEBUG_QUEUES, instance, "complete_cmd: cmd %p\n", cmd);
  479. if (hostdata->sensing == cmd) {
  480. /* Autosense processing ends here */
  481. if (get_status_byte(cmd) != SAM_STAT_GOOD) {
  482. scsi_eh_restore_cmnd(cmd, &hostdata->ses);
  483. } else {
  484. scsi_eh_restore_cmnd(cmd, &hostdata->ses);
  485. set_status_byte(cmd, SAM_STAT_CHECK_CONDITION);
  486. }
  487. hostdata->sensing = NULL;
  488. }
  489. scsi_done(cmd);
  490. }
  491. /**
  492. * NCR5380_queue_command - queue a command
  493. * @instance: the relevant SCSI adapter
  494. * @cmd: SCSI command
  495. *
  496. * cmd is added to the per-instance issue queue, with minor
  497. * twiddling done to the host specific fields of cmd. If the
  498. * main coroutine is not running, it is restarted.
  499. */
  500. static int NCR5380_queue_command(struct Scsi_Host *instance,
  501. struct scsi_cmnd *cmd)
  502. {
  503. struct NCR5380_hostdata *hostdata = shost_priv(instance);
  504. struct NCR5380_cmd *ncmd = NCR5380_to_ncmd(cmd);
  505. unsigned long flags;
  506. #if (NDEBUG & NDEBUG_NO_WRITE)
  507. switch (cmd->cmnd[0]) {
  508. case WRITE_6:
  509. case WRITE_10:
  510. shost_printk(KERN_DEBUG, instance, "WRITE attempted with NDEBUG_NO_WRITE set\n");
  511. cmd->result = (DID_ERROR << 16);
  512. scsi_done(cmd);
  513. return 0;
  514. }
  515. #endif /* (NDEBUG & NDEBUG_NO_WRITE) */
  516. cmd->result = 0;
  517. spin_lock_irqsave(&hostdata->lock, flags);
  518. if (!NCR5380_acquire_dma_irq(instance)) {
  519. spin_unlock_irqrestore(&hostdata->lock, flags);
  520. return SCSI_MLQUEUE_HOST_BUSY;
  521. }
  522. /*
  523. * Insert the cmd into the issue queue. Note that REQUEST SENSE
  524. * commands are added to the head of the queue since any command will
  525. * clear the contingent allegiance condition that exists and the
  526. * sense data is only guaranteed to be valid while the condition exists.
  527. */
  528. if (cmd->cmnd[0] == REQUEST_SENSE)
  529. list_add(&ncmd->list, &hostdata->unissued);
  530. else
  531. list_add_tail(&ncmd->list, &hostdata->unissued);
  532. spin_unlock_irqrestore(&hostdata->lock, flags);
  533. dsprintk(NDEBUG_QUEUES, instance, "command %p added to %s of queue\n",
  534. cmd, (cmd->cmnd[0] == REQUEST_SENSE) ? "head" : "tail");
  535. /* Kick off command processing */
  536. queue_work(hostdata->work_q, &hostdata->main_task);
  537. return 0;
  538. }
  539. static inline void maybe_release_dma_irq(struct Scsi_Host *instance)
  540. {
  541. struct NCR5380_hostdata *hostdata = shost_priv(instance);
  542. /* Caller does the locking needed to set & test these data atomically */
  543. if (list_empty(&hostdata->disconnected) &&
  544. list_empty(&hostdata->unissued) &&
  545. list_empty(&hostdata->autosense) &&
  546. !hostdata->connected &&
  547. !hostdata->selecting) {
  548. NCR5380_release_dma_irq(instance);
  549. }
  550. }
  551. /**
  552. * dequeue_next_cmd - dequeue a command for processing
  553. * @instance: the scsi host instance
  554. *
  555. * Priority is given to commands on the autosense queue. These commands
  556. * need autosense because of a CHECK CONDITION result.
  557. *
  558. * Returns a command pointer if a command is found for a target that is
  559. * not already busy. Otherwise returns NULL.
  560. */
  561. static struct scsi_cmnd *dequeue_next_cmd(struct Scsi_Host *instance)
  562. {
  563. struct NCR5380_hostdata *hostdata = shost_priv(instance);
  564. struct NCR5380_cmd *ncmd;
  565. struct scsi_cmnd *cmd;
  566. if (hostdata->sensing || list_empty(&hostdata->autosense)) {
  567. list_for_each_entry(ncmd, &hostdata->unissued, list) {
  568. cmd = NCR5380_to_scmd(ncmd);
  569. dsprintk(NDEBUG_QUEUES, instance, "dequeue: cmd=%p target=%d busy=0x%02x lun=%llu\n",
  570. cmd, scmd_id(cmd), hostdata->busy[scmd_id(cmd)], cmd->device->lun);
  571. if (!(hostdata->busy[scmd_id(cmd)] & (1 << cmd->device->lun))) {
  572. list_del(&ncmd->list);
  573. dsprintk(NDEBUG_QUEUES, instance,
  574. "dequeue: removed %p from issue queue\n", cmd);
  575. return cmd;
  576. }
  577. }
  578. } else {
  579. /* Autosense processing begins here */
  580. ncmd = list_first_entry(&hostdata->autosense,
  581. struct NCR5380_cmd, list);
  582. list_del(&ncmd->list);
  583. cmd = NCR5380_to_scmd(ncmd);
  584. dsprintk(NDEBUG_QUEUES, instance,
  585. "dequeue: removed %p from autosense queue\n", cmd);
  586. scsi_eh_prep_cmnd(cmd, &hostdata->ses, NULL, 0, ~0);
  587. hostdata->sensing = cmd;
  588. return cmd;
  589. }
  590. return NULL;
  591. }
  592. static void requeue_cmd(struct Scsi_Host *instance, struct scsi_cmnd *cmd)
  593. {
  594. struct NCR5380_hostdata *hostdata = shost_priv(instance);
  595. struct NCR5380_cmd *ncmd = NCR5380_to_ncmd(cmd);
  596. if (hostdata->sensing == cmd) {
  597. scsi_eh_restore_cmnd(cmd, &hostdata->ses);
  598. list_add(&ncmd->list, &hostdata->autosense);
  599. hostdata->sensing = NULL;
  600. } else
  601. list_add(&ncmd->list, &hostdata->unissued);
  602. }
  603. /**
  604. * NCR5380_main - NCR state machines
  605. *
  606. * NCR5380_main is a coroutine that runs as long as more work can
  607. * be done on the NCR5380 host adapters in a system. Both
  608. * NCR5380_queue_command() and NCR5380_intr() will try to start it
  609. * in case it is not running.
  610. */
  611. static void NCR5380_main(struct work_struct *work)
  612. {
  613. struct NCR5380_hostdata *hostdata =
  614. container_of(work, struct NCR5380_hostdata, main_task);
  615. struct Scsi_Host *instance = hostdata->host;
  616. int done;
  617. do {
  618. done = 1;
  619. spin_lock_irq(&hostdata->lock);
  620. while (!hostdata->connected && !hostdata->selecting) {
  621. struct scsi_cmnd *cmd = dequeue_next_cmd(instance);
  622. if (!cmd)
  623. break;
  624. dsprintk(NDEBUG_MAIN, instance, "main: dequeued %p\n", cmd);
  625. /*
  626. * Attempt to establish an I_T_L nexus here.
  627. * On success, instance->hostdata->connected is set.
  628. * On failure, we must add the command back to the
  629. * issue queue so we can keep trying.
  630. */
  631. /*
  632. * REQUEST SENSE commands are issued without tagged
  633. * queueing, even on SCSI-II devices because the
  634. * contingent allegiance condition exists for the
  635. * entire unit.
  636. */
  637. if (!NCR5380_select(instance, cmd)) {
  638. dsprintk(NDEBUG_MAIN, instance, "main: select complete\n");
  639. } else {
  640. dsprintk(NDEBUG_MAIN | NDEBUG_QUEUES, instance,
  641. "main: select failed, returning %p to queue\n", cmd);
  642. requeue_cmd(instance, cmd);
  643. }
  644. }
  645. if (hostdata->connected && !hostdata->dma_len) {
  646. dsprintk(NDEBUG_MAIN, instance, "main: performing information transfer\n");
  647. NCR5380_information_transfer(instance);
  648. done = 0;
  649. }
  650. if (!hostdata->connected) {
  651. NCR5380_write(SELECT_ENABLE_REG, hostdata->id_mask);
  652. maybe_release_dma_irq(instance);
  653. }
  654. spin_unlock_irq(&hostdata->lock);
  655. if (!done)
  656. cond_resched();
  657. } while (!done);
  658. }
  659. /*
  660. * NCR5380_dma_complete - finish DMA transfer
  661. * @instance: the scsi host instance
  662. *
  663. * Called by the interrupt handler when DMA finishes or a phase
  664. * mismatch occurs (which would end the DMA transfer).
  665. */
  666. static void NCR5380_dma_complete(struct Scsi_Host *instance)
  667. {
  668. struct NCR5380_hostdata *hostdata = shost_priv(instance);
  669. struct NCR5380_cmd *ncmd = NCR5380_to_ncmd(hostdata->connected);
  670. int transferred;
  671. unsigned char **data;
  672. int *count;
  673. int saved_data = 0, overrun = 0;
  674. unsigned char p;
  675. if (hostdata->read_overruns) {
  676. p = ncmd->phase;
  677. if (p & SR_IO) {
  678. udelay(10);
  679. if ((NCR5380_read(BUS_AND_STATUS_REG) &
  680. (BASR_PHASE_MATCH | BASR_ACK)) ==
  681. (BASR_PHASE_MATCH | BASR_ACK)) {
  682. saved_data = NCR5380_read(INPUT_DATA_REG);
  683. overrun = 1;
  684. dsprintk(NDEBUG_DMA, instance, "read overrun handled\n");
  685. }
  686. }
  687. }
  688. #ifdef CONFIG_SUN3
  689. if (sun3scsi_dma_finish(hostdata->connected->sc_data_direction)) {
  690. pr_err("scsi%d: overrun in UDC counter -- not prepared to deal with this!\n",
  691. instance->host_no);
  692. BUG();
  693. }
  694. if ((NCR5380_read(BUS_AND_STATUS_REG) & (BASR_PHASE_MATCH | BASR_ACK)) ==
  695. (BASR_PHASE_MATCH | BASR_ACK)) {
  696. pr_err("scsi%d: BASR %02x\n", instance->host_no,
  697. NCR5380_read(BUS_AND_STATUS_REG));
  698. pr_err("scsi%d: bus stuck in data phase -- probably a single byte overrun!\n",
  699. instance->host_no);
  700. BUG();
  701. }
  702. #endif
  703. NCR5380_write(MODE_REG, MR_BASE);
  704. NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
  705. NCR5380_read(RESET_PARITY_INTERRUPT_REG);
  706. transferred = hostdata->dma_len - NCR5380_dma_residual(hostdata);
  707. hostdata->dma_len = 0;
  708. data = (unsigned char **)&ncmd->ptr;
  709. count = &ncmd->this_residual;
  710. *data += transferred;
  711. *count -= transferred;
  712. if (hostdata->read_overruns) {
  713. int cnt, toPIO;
  714. if ((NCR5380_read(STATUS_REG) & PHASE_MASK) == p && (p & SR_IO)) {
  715. cnt = toPIO = hostdata->read_overruns;
  716. if (overrun) {
  717. dsprintk(NDEBUG_DMA, instance,
  718. "Got an input overrun, using saved byte\n");
  719. *(*data)++ = saved_data;
  720. (*count)--;
  721. cnt--;
  722. toPIO--;
  723. }
  724. if (toPIO > 0) {
  725. dsprintk(NDEBUG_DMA, instance,
  726. "Doing %d byte PIO to 0x%p\n", cnt, *data);
  727. NCR5380_transfer_pio(instance, &p, &cnt, data, 0);
  728. *count -= toPIO - cnt;
  729. }
  730. }
  731. }
  732. }
  733. /**
  734. * NCR5380_intr - generic NCR5380 irq handler
  735. * @irq: interrupt number
  736. * @dev_id: device info
  737. *
  738. * Handle interrupts, reestablishing I_T_L or I_T_L_Q nexuses
  739. * from the disconnected queue, and restarting NCR5380_main()
  740. * as required.
  741. *
  742. * The chip can assert IRQ in any of six different conditions. The IRQ flag
  743. * is then cleared by reading the Reset Parity/Interrupt Register (RPIR).
  744. * Three of these six conditions are latched in the Bus and Status Register:
  745. * - End of DMA (cleared by ending DMA Mode)
  746. * - Parity error (cleared by reading RPIR)
  747. * - Loss of BSY (cleared by reading RPIR)
  748. * Two conditions have flag bits that are not latched:
  749. * - Bus phase mismatch (non-maskable in DMA Mode, cleared by ending DMA Mode)
  750. * - Bus reset (non-maskable)
  751. * The remaining condition has no flag bit at all:
  752. * - Selection/reselection
  753. *
  754. * Hence, establishing the cause(s) of any interrupt is partly guesswork.
  755. * In "The DP8490 and DP5380 Comparison Guide", National Semiconductor
  756. * claimed that "the design of the [DP8490] interrupt logic ensures
  757. * interrupts will not be lost (they can be on the DP5380)."
  758. * The L5380/53C80 datasheet from LOGIC Devices has more details.
  759. *
  760. * Checking for bus reset by reading RST is futile because of interrupt
  761. * latency, but a bus reset will reset chip logic. Checking for parity error
  762. * is unnecessary because that interrupt is never enabled. A Loss of BSY
  763. * condition will clear DMA Mode. We can tell when this occurs because the
  764. * the Busy Monitor interrupt is enabled together with DMA Mode.
  765. */
  766. static irqreturn_t __maybe_unused NCR5380_intr(int irq, void *dev_id)
  767. {
  768. struct Scsi_Host *instance = dev_id;
  769. struct NCR5380_hostdata *hostdata = shost_priv(instance);
  770. int handled = 0;
  771. unsigned char basr;
  772. unsigned long flags;
  773. spin_lock_irqsave(&hostdata->lock, flags);
  774. basr = NCR5380_read(BUS_AND_STATUS_REG);
  775. if (basr & BASR_IRQ) {
  776. unsigned char mr = NCR5380_read(MODE_REG);
  777. unsigned char sr = NCR5380_read(STATUS_REG);
  778. dsprintk(NDEBUG_INTR, instance, "IRQ %d, BASR 0x%02x, SR 0x%02x, MR 0x%02x\n",
  779. irq, basr, sr, mr);
  780. if ((mr & MR_DMA_MODE) || (mr & MR_MONITOR_BSY)) {
  781. /* Probably End of DMA, Phase Mismatch or Loss of BSY.
  782. * We ack IRQ after clearing Mode Register. Workarounds
  783. * for End of DMA errata need to happen in DMA Mode.
  784. */
  785. dsprintk(NDEBUG_INTR, instance, "interrupt in DMA mode\n");
  786. if (hostdata->connected) {
  787. NCR5380_dma_complete(instance);
  788. queue_work(hostdata->work_q, &hostdata->main_task);
  789. } else {
  790. NCR5380_write(MODE_REG, MR_BASE);
  791. NCR5380_read(RESET_PARITY_INTERRUPT_REG);
  792. }
  793. } else if ((NCR5380_read(CURRENT_SCSI_DATA_REG) & hostdata->id_mask) &&
  794. (sr & (SR_SEL | SR_IO | SR_BSY | SR_RST)) == (SR_SEL | SR_IO)) {
  795. /* Probably reselected */
  796. NCR5380_write(SELECT_ENABLE_REG, 0);
  797. NCR5380_read(RESET_PARITY_INTERRUPT_REG);
  798. dsprintk(NDEBUG_INTR, instance, "interrupt with SEL and IO\n");
  799. if (!hostdata->connected) {
  800. NCR5380_reselect(instance);
  801. queue_work(hostdata->work_q, &hostdata->main_task);
  802. }
  803. if (!hostdata->connected)
  804. NCR5380_write(SELECT_ENABLE_REG, hostdata->id_mask);
  805. } else {
  806. /* Probably Bus Reset */
  807. NCR5380_read(RESET_PARITY_INTERRUPT_REG);
  808. if (sr & SR_RST) {
  809. /* Certainly Bus Reset */
  810. shost_printk(KERN_WARNING, instance,
  811. "bus reset interrupt\n");
  812. bus_reset_cleanup(instance);
  813. } else {
  814. dsprintk(NDEBUG_INTR, instance, "unknown interrupt\n");
  815. }
  816. #ifdef SUN3_SCSI_VME
  817. dregs->csr |= CSR_DMA_ENABLE;
  818. #endif
  819. }
  820. handled = 1;
  821. } else {
  822. dsprintk(NDEBUG_INTR, instance, "interrupt without IRQ bit\n");
  823. #ifdef SUN3_SCSI_VME
  824. dregs->csr |= CSR_DMA_ENABLE;
  825. #endif
  826. }
  827. spin_unlock_irqrestore(&hostdata->lock, flags);
  828. return IRQ_RETVAL(handled);
  829. }
  830. /**
  831. * NCR5380_select - attempt arbitration and selection for a given command
  832. * @instance: the Scsi_Host instance
  833. * @cmd: the scsi_cmnd to execute
  834. *
  835. * This routine establishes an I_T_L nexus for a SCSI command. This involves
  836. * ARBITRATION, SELECTION and MESSAGE OUT phases and an IDENTIFY message.
  837. *
  838. * Returns true if the operation should be retried.
  839. * Returns false if it should not be retried.
  840. *
  841. * Side effects :
  842. * If bus busy, arbitration failed, etc, NCR5380_select() will exit
  843. * with registers as they should have been on entry - ie
  844. * SELECT_ENABLE will be set appropriately, the NCR5380
  845. * will cease to drive any SCSI bus signals.
  846. *
  847. * If successful : the I_T_L nexus will be established, and
  848. * hostdata->connected will be set to cmd.
  849. * SELECT interrupt will be disabled.
  850. *
  851. * If failed (no target) : scsi_done() will be called, and the
  852. * cmd->result host byte set to DID_BAD_TARGET.
  853. */
  854. static bool NCR5380_select(struct Scsi_Host *instance, struct scsi_cmnd *cmd)
  855. __releases(&hostdata->lock) __acquires(&hostdata->lock)
  856. {
  857. struct NCR5380_hostdata *hostdata = shost_priv(instance);
  858. unsigned char tmp[3], phase;
  859. unsigned char *data;
  860. int len;
  861. int err;
  862. bool ret = true;
  863. bool can_disconnect = instance->irq != NO_IRQ &&
  864. cmd->cmnd[0] != REQUEST_SENSE &&
  865. (disconnect_mask & BIT(scmd_id(cmd)));
  866. NCR5380_dprint(NDEBUG_ARBITRATION, instance);
  867. dsprintk(NDEBUG_ARBITRATION, instance, "starting arbitration, id = %d\n",
  868. instance->this_id);
  869. /*
  870. * Arbitration and selection phases are slow and involve dropping the
  871. * lock, so we have to watch out for EH. An exception handler may
  872. * change 'selecting' to NULL. This function will then return false
  873. * so that the caller will forget about 'cmd'. (During information
  874. * transfer phases, EH may change 'connected' to NULL.)
  875. */
  876. hostdata->selecting = cmd;
  877. /*
  878. * Set the phase bits to 0, otherwise the NCR5380 won't drive the
  879. * data bus during SELECTION.
  880. */
  881. NCR5380_write(TARGET_COMMAND_REG, 0);
  882. /*
  883. * Start arbitration.
  884. */
  885. NCR5380_write(OUTPUT_DATA_REG, hostdata->id_mask);
  886. NCR5380_write(MODE_REG, MR_ARBITRATE);
  887. /* The chip now waits for BUS FREE phase. Then after the 800 ns
  888. * Bus Free Delay, arbitration will begin.
  889. */
  890. spin_unlock_irq(&hostdata->lock);
  891. err = NCR5380_poll_politely2(hostdata, MODE_REG, MR_ARBITRATE, 0,
  892. INITIATOR_COMMAND_REG, ICR_ARBITRATION_PROGRESS,
  893. ICR_ARBITRATION_PROGRESS, HZ);
  894. spin_lock_irq(&hostdata->lock);
  895. if (!(NCR5380_read(MODE_REG) & MR_ARBITRATE)) {
  896. /* Reselection interrupt */
  897. goto out;
  898. }
  899. if (!hostdata->selecting) {
  900. /* Command was aborted */
  901. NCR5380_write(MODE_REG, MR_BASE);
  902. return false;
  903. }
  904. if (err < 0) {
  905. NCR5380_write(MODE_REG, MR_BASE);
  906. shost_printk(KERN_ERR, instance,
  907. "select: arbitration timeout\n");
  908. goto out;
  909. }
  910. spin_unlock_irq(&hostdata->lock);
  911. /* The SCSI-2 arbitration delay is 2.4 us */
  912. udelay(3);
  913. /* Check for lost arbitration */
  914. if ((NCR5380_read(INITIATOR_COMMAND_REG) & ICR_ARBITRATION_LOST) ||
  915. (NCR5380_read(CURRENT_SCSI_DATA_REG) & hostdata->id_higher_mask) ||
  916. (NCR5380_read(INITIATOR_COMMAND_REG) & ICR_ARBITRATION_LOST)) {
  917. NCR5380_write(MODE_REG, MR_BASE);
  918. dsprintk(NDEBUG_ARBITRATION, instance, "lost arbitration, deasserting MR_ARBITRATE\n");
  919. spin_lock_irq(&hostdata->lock);
  920. goto out;
  921. }
  922. /* After/during arbitration, BSY should be asserted.
  923. * IBM DPES-31080 Version S31Q works now
  924. * Tnx to [email protected] for finding this! (Roman)
  925. */
  926. NCR5380_write(INITIATOR_COMMAND_REG,
  927. ICR_BASE | ICR_ASSERT_SEL | ICR_ASSERT_BSY);
  928. /*
  929. * Again, bus clear + bus settle time is 1.2us, however, this is
  930. * a minimum so we'll udelay ceil(1.2)
  931. */
  932. if (hostdata->flags & FLAG_TOSHIBA_DELAY)
  933. udelay(15);
  934. else
  935. udelay(2);
  936. spin_lock_irq(&hostdata->lock);
  937. /* NCR5380_reselect() clears MODE_REG after a reselection interrupt */
  938. if (!(NCR5380_read(MODE_REG) & MR_ARBITRATE))
  939. goto out;
  940. if (!hostdata->selecting) {
  941. NCR5380_write(MODE_REG, MR_BASE);
  942. NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
  943. return false;
  944. }
  945. dsprintk(NDEBUG_ARBITRATION, instance, "won arbitration\n");
  946. /*
  947. * Now that we have won arbitration, start Selection process, asserting
  948. * the host and target ID's on the SCSI bus.
  949. */
  950. NCR5380_write(OUTPUT_DATA_REG, hostdata->id_mask | (1 << scmd_id(cmd)));
  951. /*
  952. * Raise ATN while SEL is true before BSY goes false from arbitration,
  953. * since this is the only way to guarantee that we'll get a MESSAGE OUT
  954. * phase immediately after selection.
  955. */
  956. NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_BSY |
  957. ICR_ASSERT_DATA | ICR_ASSERT_ATN | ICR_ASSERT_SEL);
  958. NCR5380_write(MODE_REG, MR_BASE);
  959. /*
  960. * Reselect interrupts must be turned off prior to the dropping of BSY,
  961. * otherwise we will trigger an interrupt.
  962. */
  963. NCR5380_write(SELECT_ENABLE_REG, 0);
  964. spin_unlock_irq(&hostdata->lock);
  965. /*
  966. * The initiator shall then wait at least two deskew delays and release
  967. * the BSY signal.
  968. */
  969. udelay(1); /* wingel -- wait two bus deskew delay >2*45ns */
  970. /* Reset BSY */
  971. NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_DATA |
  972. ICR_ASSERT_ATN | ICR_ASSERT_SEL);
  973. /*
  974. * Something weird happens when we cease to drive BSY - looks
  975. * like the board/chip is letting us do another read before the
  976. * appropriate propagation delay has expired, and we're confusing
  977. * a BSY signal from ourselves as the target's response to SELECTION.
  978. *
  979. * A small delay (the 'C++' frontend breaks the pipeline with an
  980. * unnecessary jump, making it work on my 386-33/Trantor T128, the
  981. * tighter 'C' code breaks and requires this) solves the problem -
  982. * the 1 us delay is arbitrary, and only used because this delay will
  983. * be the same on other platforms and since it works here, it should
  984. * work there.
  985. *
  986. * wingel suggests that this could be due to failing to wait
  987. * one deskew delay.
  988. */
  989. udelay(1);
  990. dsprintk(NDEBUG_SELECTION, instance, "selecting target %d\n", scmd_id(cmd));
  991. /*
  992. * The SCSI specification calls for a 250 ms timeout for the actual
  993. * selection.
  994. */
  995. err = NCR5380_poll_politely(hostdata, STATUS_REG, SR_BSY, SR_BSY,
  996. msecs_to_jiffies(250));
  997. if ((NCR5380_read(STATUS_REG) & (SR_SEL | SR_IO)) == (SR_SEL | SR_IO)) {
  998. spin_lock_irq(&hostdata->lock);
  999. NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
  1000. NCR5380_reselect(instance);
  1001. shost_printk(KERN_ERR, instance, "reselection after won arbitration?\n");
  1002. goto out;
  1003. }
  1004. if (err < 0) {
  1005. spin_lock_irq(&hostdata->lock);
  1006. NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
  1007. /* Can't touch cmd if it has been reclaimed by the scsi ML */
  1008. if (!hostdata->selecting)
  1009. return false;
  1010. cmd->result = DID_BAD_TARGET << 16;
  1011. complete_cmd(instance, cmd);
  1012. dsprintk(NDEBUG_SELECTION, instance,
  1013. "target did not respond within 250ms\n");
  1014. ret = false;
  1015. goto out;
  1016. }
  1017. /*
  1018. * No less than two deskew delays after the initiator detects the
  1019. * BSY signal is true, it shall release the SEL signal and may
  1020. * change the DATA BUS. -wingel
  1021. */
  1022. udelay(1);
  1023. NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ATN);
  1024. /*
  1025. * Since we followed the SCSI spec, and raised ATN while SEL
  1026. * was true but before BSY was false during selection, the information
  1027. * transfer phase should be a MESSAGE OUT phase so that we can send the
  1028. * IDENTIFY message.
  1029. */
  1030. /* Wait for start of REQ/ACK handshake */
  1031. err = NCR5380_poll_politely(hostdata, STATUS_REG, SR_REQ, SR_REQ, HZ);
  1032. spin_lock_irq(&hostdata->lock);
  1033. if (err < 0) {
  1034. shost_printk(KERN_ERR, instance, "select: REQ timeout\n");
  1035. NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
  1036. goto out;
  1037. }
  1038. if (!hostdata->selecting) {
  1039. do_abort(instance, 0);
  1040. return false;
  1041. }
  1042. dsprintk(NDEBUG_SELECTION, instance, "target %d selected, going into MESSAGE OUT phase.\n",
  1043. scmd_id(cmd));
  1044. tmp[0] = IDENTIFY(can_disconnect, cmd->device->lun);
  1045. len = 1;
  1046. data = tmp;
  1047. phase = PHASE_MSGOUT;
  1048. NCR5380_transfer_pio(instance, &phase, &len, &data, 0);
  1049. if (len) {
  1050. NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
  1051. cmd->result = DID_ERROR << 16;
  1052. complete_cmd(instance, cmd);
  1053. dsprintk(NDEBUG_SELECTION, instance, "IDENTIFY message transfer failed\n");
  1054. ret = false;
  1055. goto out;
  1056. }
  1057. dsprintk(NDEBUG_SELECTION, instance, "nexus established.\n");
  1058. hostdata->connected = cmd;
  1059. hostdata->busy[cmd->device->id] |= 1 << cmd->device->lun;
  1060. #ifdef SUN3_SCSI_VME
  1061. dregs->csr |= CSR_INTR;
  1062. #endif
  1063. initialize_SCp(cmd);
  1064. ret = false;
  1065. out:
  1066. if (!hostdata->selecting)
  1067. return false;
  1068. hostdata->selecting = NULL;
  1069. return ret;
  1070. }
  1071. /*
  1072. * Function : int NCR5380_transfer_pio (struct Scsi_Host *instance,
  1073. * unsigned char *phase, int *count, unsigned char **data)
  1074. *
  1075. * Purpose : transfers data in given phase using polled I/O
  1076. *
  1077. * Inputs : instance - instance of driver, *phase - pointer to
  1078. * what phase is expected, *count - pointer to number of
  1079. * bytes to transfer, **data - pointer to data pointer,
  1080. * can_sleep - 1 or 0 when sleeping is permitted or not, respectively.
  1081. *
  1082. * Returns : -1 when different phase is entered without transferring
  1083. * maximum number of bytes, 0 if all bytes are transferred or exit
  1084. * is in same phase.
  1085. *
  1086. * Also, *phase, *count, *data are modified in place.
  1087. *
  1088. * XXX Note : handling for bus free may be useful.
  1089. */
  1090. /*
  1091. * Note : this code is not as quick as it could be, however it
  1092. * IS 100% reliable, and for the actual data transfer where speed
  1093. * counts, we will always do a pseudo DMA or DMA transfer.
  1094. */
  1095. static int NCR5380_transfer_pio(struct Scsi_Host *instance,
  1096. unsigned char *phase, int *count,
  1097. unsigned char **data, unsigned int can_sleep)
  1098. {
  1099. struct NCR5380_hostdata *hostdata = shost_priv(instance);
  1100. unsigned char p = *phase, tmp;
  1101. int c = *count;
  1102. unsigned char *d = *data;
  1103. /*
  1104. * The NCR5380 chip will only drive the SCSI bus when the
  1105. * phase specified in the appropriate bits of the TARGET COMMAND
  1106. * REGISTER match the STATUS REGISTER
  1107. */
  1108. NCR5380_write(TARGET_COMMAND_REG, PHASE_SR_TO_TCR(p));
  1109. do {
  1110. /*
  1111. * Wait for assertion of REQ, after which the phase bits will be
  1112. * valid
  1113. */
  1114. if (NCR5380_poll_politely(hostdata, STATUS_REG, SR_REQ, SR_REQ,
  1115. HZ * can_sleep) < 0)
  1116. break;
  1117. dsprintk(NDEBUG_HANDSHAKE, instance, "REQ asserted\n");
  1118. /* Check for phase mismatch */
  1119. if ((NCR5380_read(STATUS_REG) & PHASE_MASK) != p) {
  1120. dsprintk(NDEBUG_PIO, instance, "phase mismatch\n");
  1121. NCR5380_dprint_phase(NDEBUG_PIO, instance);
  1122. break;
  1123. }
  1124. /* Do actual transfer from SCSI bus to / from memory */
  1125. if (!(p & SR_IO))
  1126. NCR5380_write(OUTPUT_DATA_REG, *d);
  1127. else
  1128. *d = NCR5380_read(CURRENT_SCSI_DATA_REG);
  1129. ++d;
  1130. /*
  1131. * The SCSI standard suggests that in MSGOUT phase, the initiator
  1132. * should drop ATN on the last byte of the message phase
  1133. * after REQ has been asserted for the handshake but before
  1134. * the initiator raises ACK.
  1135. */
  1136. if (!(p & SR_IO)) {
  1137. if (!((p & SR_MSG) && c > 1)) {
  1138. NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_DATA);
  1139. NCR5380_dprint(NDEBUG_PIO, instance);
  1140. NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE |
  1141. ICR_ASSERT_DATA | ICR_ASSERT_ACK);
  1142. } else {
  1143. NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE |
  1144. ICR_ASSERT_DATA | ICR_ASSERT_ATN);
  1145. NCR5380_dprint(NDEBUG_PIO, instance);
  1146. NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE |
  1147. ICR_ASSERT_DATA | ICR_ASSERT_ATN | ICR_ASSERT_ACK);
  1148. }
  1149. } else {
  1150. NCR5380_dprint(NDEBUG_PIO, instance);
  1151. NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ACK);
  1152. }
  1153. if (NCR5380_poll_politely(hostdata,
  1154. STATUS_REG, SR_REQ, 0, 5 * HZ * can_sleep) < 0)
  1155. break;
  1156. dsprintk(NDEBUG_HANDSHAKE, instance, "REQ negated, handshake complete\n");
  1157. /*
  1158. * We have several special cases to consider during REQ/ACK handshaking :
  1159. * 1. We were in MSGOUT phase, and we are on the last byte of the
  1160. * message. ATN must be dropped as ACK is dropped.
  1161. *
  1162. * 2. We are in a MSGIN phase, and we are on the last byte of the
  1163. * message. We must exit with ACK asserted, so that the calling
  1164. * code may raise ATN before dropping ACK to reject the message.
  1165. *
  1166. * 3. ACK and ATN are clear and the target may proceed as normal.
  1167. */
  1168. if (!(p == PHASE_MSGIN && c == 1)) {
  1169. if (p == PHASE_MSGOUT && c > 1)
  1170. NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ATN);
  1171. else
  1172. NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
  1173. }
  1174. } while (--c);
  1175. dsprintk(NDEBUG_PIO, instance, "residual %d\n", c);
  1176. *count = c;
  1177. *data = d;
  1178. tmp = NCR5380_read(STATUS_REG);
  1179. /* The phase read from the bus is valid if either REQ is (already)
  1180. * asserted or if ACK hasn't been released yet. The latter applies if
  1181. * we're in MSG IN, DATA IN or STATUS and all bytes have been received.
  1182. */
  1183. if ((tmp & SR_REQ) || ((tmp & SR_IO) && c == 0))
  1184. *phase = tmp & PHASE_MASK;
  1185. else
  1186. *phase = PHASE_UNKNOWN;
  1187. if (!c || (*phase == p))
  1188. return 0;
  1189. else
  1190. return -1;
  1191. }
  1192. /**
  1193. * do_reset - issue a reset command
  1194. * @instance: adapter to reset
  1195. *
  1196. * Issue a reset sequence to the NCR5380 and try and get the bus
  1197. * back into sane shape.
  1198. *
  1199. * This clears the reset interrupt flag because there may be no handler for
  1200. * it. When the driver is initialized, the NCR5380_intr() handler has not yet
  1201. * been installed. And when in EH we may have released the ST DMA interrupt.
  1202. */
  1203. static void do_reset(struct Scsi_Host *instance)
  1204. {
  1205. struct NCR5380_hostdata __maybe_unused *hostdata = shost_priv(instance);
  1206. unsigned long flags;
  1207. local_irq_save(flags);
  1208. NCR5380_write(TARGET_COMMAND_REG,
  1209. PHASE_SR_TO_TCR(NCR5380_read(STATUS_REG) & PHASE_MASK));
  1210. NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_RST);
  1211. udelay(50);
  1212. NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
  1213. (void)NCR5380_read(RESET_PARITY_INTERRUPT_REG);
  1214. local_irq_restore(flags);
  1215. }
  1216. /**
  1217. * do_abort - abort the currently established nexus by going to
  1218. * MESSAGE OUT phase and sending an ABORT message.
  1219. * @instance: relevant scsi host instance
  1220. * @can_sleep: 1 or 0 when sleeping is permitted or not, respectively
  1221. *
  1222. * Returns 0 on success, negative error code on failure.
  1223. */
  1224. static int do_abort(struct Scsi_Host *instance, unsigned int can_sleep)
  1225. {
  1226. struct NCR5380_hostdata *hostdata = shost_priv(instance);
  1227. unsigned char *msgptr, phase, tmp;
  1228. int len;
  1229. int rc;
  1230. /* Request message out phase */
  1231. NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ATN);
  1232. /*
  1233. * Wait for the target to indicate a valid phase by asserting
  1234. * REQ. Once this happens, we'll have either a MSGOUT phase
  1235. * and can immediately send the ABORT message, or we'll have some
  1236. * other phase and will have to source/sink data.
  1237. *
  1238. * We really don't care what value was on the bus or what value
  1239. * the target sees, so we just handshake.
  1240. */
  1241. rc = NCR5380_poll_politely(hostdata, STATUS_REG, SR_REQ, SR_REQ,
  1242. 10 * HZ * can_sleep);
  1243. if (rc < 0)
  1244. goto out;
  1245. tmp = NCR5380_read(STATUS_REG) & PHASE_MASK;
  1246. NCR5380_write(TARGET_COMMAND_REG, PHASE_SR_TO_TCR(tmp));
  1247. if (tmp != PHASE_MSGOUT) {
  1248. NCR5380_write(INITIATOR_COMMAND_REG,
  1249. ICR_BASE | ICR_ASSERT_ATN | ICR_ASSERT_ACK);
  1250. rc = NCR5380_poll_politely(hostdata, STATUS_REG, SR_REQ, 0,
  1251. 3 * HZ * can_sleep);
  1252. if (rc < 0)
  1253. goto out;
  1254. NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ATN);
  1255. }
  1256. tmp = ABORT;
  1257. msgptr = &tmp;
  1258. len = 1;
  1259. phase = PHASE_MSGOUT;
  1260. NCR5380_transfer_pio(instance, &phase, &len, &msgptr, can_sleep);
  1261. if (len)
  1262. rc = -ENXIO;
  1263. /*
  1264. * If we got here, and the command completed successfully,
  1265. * we're about to go into bus free state.
  1266. */
  1267. out:
  1268. NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
  1269. return rc;
  1270. }
  1271. /*
  1272. * Function : int NCR5380_transfer_dma (struct Scsi_Host *instance,
  1273. * unsigned char *phase, int *count, unsigned char **data)
  1274. *
  1275. * Purpose : transfers data in given phase using either real
  1276. * or pseudo DMA.
  1277. *
  1278. * Inputs : instance - instance of driver, *phase - pointer to
  1279. * what phase is expected, *count - pointer to number of
  1280. * bytes to transfer, **data - pointer to data pointer.
  1281. *
  1282. * Returns : -1 when different phase is entered without transferring
  1283. * maximum number of bytes, 0 if all bytes or transferred or exit
  1284. * is in same phase.
  1285. *
  1286. * Also, *phase, *count, *data are modified in place.
  1287. */
  1288. static int NCR5380_transfer_dma(struct Scsi_Host *instance,
  1289. unsigned char *phase, int *count,
  1290. unsigned char **data)
  1291. {
  1292. struct NCR5380_hostdata *hostdata = shost_priv(instance);
  1293. int c = *count;
  1294. unsigned char p = *phase;
  1295. unsigned char *d = *data;
  1296. unsigned char tmp;
  1297. int result = 0;
  1298. if ((tmp = (NCR5380_read(STATUS_REG) & PHASE_MASK)) != p) {
  1299. *phase = tmp;
  1300. return -1;
  1301. }
  1302. NCR5380_to_ncmd(hostdata->connected)->phase = p;
  1303. if (p & SR_IO) {
  1304. if (hostdata->read_overruns)
  1305. c -= hostdata->read_overruns;
  1306. else if (hostdata->flags & FLAG_DMA_FIXUP)
  1307. --c;
  1308. }
  1309. dsprintk(NDEBUG_DMA, instance, "initializing DMA %s: length %d, address %p\n",
  1310. (p & SR_IO) ? "receive" : "send", c, d);
  1311. #ifdef CONFIG_SUN3
  1312. /* send start chain */
  1313. sun3scsi_dma_start(c, *data);
  1314. #endif
  1315. NCR5380_write(TARGET_COMMAND_REG, PHASE_SR_TO_TCR(p));
  1316. NCR5380_write(MODE_REG, MR_BASE | MR_DMA_MODE | MR_MONITOR_BSY |
  1317. MR_ENABLE_EOP_INTR);
  1318. if (!(hostdata->flags & FLAG_LATE_DMA_SETUP)) {
  1319. /* On the Medusa, it is a must to initialize the DMA before
  1320. * starting the NCR. This is also the cleaner way for the TT.
  1321. */
  1322. if (p & SR_IO)
  1323. result = NCR5380_dma_recv_setup(hostdata, d, c);
  1324. else
  1325. result = NCR5380_dma_send_setup(hostdata, d, c);
  1326. }
  1327. /*
  1328. * On the PAS16 at least I/O recovery delays are not needed here.
  1329. * Everyone else seems to want them.
  1330. */
  1331. if (p & SR_IO) {
  1332. NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
  1333. NCR5380_io_delay(1);
  1334. NCR5380_write(START_DMA_INITIATOR_RECEIVE_REG, 0);
  1335. } else {
  1336. NCR5380_io_delay(1);
  1337. NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_DATA);
  1338. NCR5380_io_delay(1);
  1339. NCR5380_write(START_DMA_SEND_REG, 0);
  1340. NCR5380_io_delay(1);
  1341. }
  1342. #ifdef CONFIG_SUN3
  1343. #ifdef SUN3_SCSI_VME
  1344. dregs->csr |= CSR_DMA_ENABLE;
  1345. #endif
  1346. sun3_dma_active = 1;
  1347. #endif
  1348. if (hostdata->flags & FLAG_LATE_DMA_SETUP) {
  1349. /* On the Falcon, the DMA setup must be done after the last
  1350. * NCR access, else the DMA setup gets trashed!
  1351. */
  1352. if (p & SR_IO)
  1353. result = NCR5380_dma_recv_setup(hostdata, d, c);
  1354. else
  1355. result = NCR5380_dma_send_setup(hostdata, d, c);
  1356. }
  1357. /* On failure, NCR5380_dma_xxxx_setup() returns a negative int. */
  1358. if (result < 0)
  1359. return result;
  1360. /* For real DMA, result is the byte count. DMA interrupt is expected. */
  1361. if (result > 0) {
  1362. hostdata->dma_len = result;
  1363. return 0;
  1364. }
  1365. /* The result is zero iff pseudo DMA send/receive was completed. */
  1366. hostdata->dma_len = c;
  1367. /*
  1368. * A note regarding the DMA errata workarounds for early NMOS silicon.
  1369. *
  1370. * For DMA sends, we want to wait until the last byte has been
  1371. * transferred out over the bus before we turn off DMA mode. Alas, there
  1372. * seems to be no terribly good way of doing this on a 5380 under all
  1373. * conditions. For non-scatter-gather operations, we can wait until REQ
  1374. * and ACK both go false, or until a phase mismatch occurs. Gather-sends
  1375. * are nastier, since the device will be expecting more data than we
  1376. * are prepared to send it, and REQ will remain asserted. On a 53C8[01] we
  1377. * could test Last Byte Sent to assure transfer (I imagine this is precisely
  1378. * why this signal was added to the newer chips) but on the older 538[01]
  1379. * this signal does not exist. The workaround for this lack is a watchdog;
  1380. * we bail out of the wait-loop after a modest amount of wait-time if
  1381. * the usual exit conditions are not met. Not a terribly clean or
  1382. * correct solution :-%
  1383. *
  1384. * DMA receive is equally tricky due to a nasty characteristic of the NCR5380.
  1385. * If the chip is in DMA receive mode, it will respond to a target's
  1386. * REQ by latching the SCSI data into the INPUT DATA register and asserting
  1387. * ACK, even if it has _already_ been notified by the DMA controller that
  1388. * the current DMA transfer has completed! If the NCR5380 is then taken
  1389. * out of DMA mode, this already-acknowledged byte is lost. This is
  1390. * not a problem for "one DMA transfer per READ command", because
  1391. * the situation will never arise... either all of the data is DMA'ed
  1392. * properly, or the target switches to MESSAGE IN phase to signal a
  1393. * disconnection (either operation bringing the DMA to a clean halt).
  1394. * However, in order to handle scatter-receive, we must work around the
  1395. * problem. The chosen fix is to DMA fewer bytes, then check for the
  1396. * condition before taking the NCR5380 out of DMA mode. One or two extra
  1397. * bytes are transferred via PIO as necessary to fill out the original
  1398. * request.
  1399. */
  1400. if (hostdata->flags & FLAG_DMA_FIXUP) {
  1401. if (p & SR_IO) {
  1402. /*
  1403. * The workaround was to transfer fewer bytes than we
  1404. * intended to with the pseudo-DMA read function, wait for
  1405. * the chip to latch the last byte, read it, and then disable
  1406. * pseudo-DMA mode.
  1407. *
  1408. * After REQ is asserted, the NCR5380 asserts DRQ and ACK.
  1409. * REQ is deasserted when ACK is asserted, and not reasserted
  1410. * until ACK goes false. Since the NCR5380 won't lower ACK
  1411. * until DACK is asserted, which won't happen unless we twiddle
  1412. * the DMA port or we take the NCR5380 out of DMA mode, we
  1413. * can guarantee that we won't handshake another extra
  1414. * byte.
  1415. */
  1416. if (NCR5380_poll_politely(hostdata, BUS_AND_STATUS_REG,
  1417. BASR_DRQ, BASR_DRQ, 0) < 0) {
  1418. result = -1;
  1419. shost_printk(KERN_ERR, instance, "PDMA read: DRQ timeout\n");
  1420. }
  1421. if (NCR5380_poll_politely(hostdata, STATUS_REG,
  1422. SR_REQ, 0, 0) < 0) {
  1423. result = -1;
  1424. shost_printk(KERN_ERR, instance, "PDMA read: !REQ timeout\n");
  1425. }
  1426. d[*count - 1] = NCR5380_read(INPUT_DATA_REG);
  1427. } else {
  1428. /*
  1429. * Wait for the last byte to be sent. If REQ is being asserted for
  1430. * the byte we're interested, we'll ACK it and it will go false.
  1431. */
  1432. if (NCR5380_poll_politely2(hostdata,
  1433. BUS_AND_STATUS_REG, BASR_DRQ, BASR_DRQ,
  1434. BUS_AND_STATUS_REG, BASR_PHASE_MATCH, 0, 0) < 0) {
  1435. result = -1;
  1436. shost_printk(KERN_ERR, instance, "PDMA write: DRQ and phase timeout\n");
  1437. }
  1438. }
  1439. }
  1440. NCR5380_dma_complete(instance);
  1441. return result;
  1442. }
  1443. /*
  1444. * Function : NCR5380_information_transfer (struct Scsi_Host *instance)
  1445. *
  1446. * Purpose : run through the various SCSI phases and do as the target
  1447. * directs us to. Operates on the currently connected command,
  1448. * instance->connected.
  1449. *
  1450. * Inputs : instance, instance for which we are doing commands
  1451. *
  1452. * Side effects : SCSI things happen, the disconnected queue will be
  1453. * modified if a command disconnects, *instance->connected will
  1454. * change.
  1455. *
  1456. * XXX Note : we need to watch for bus free or a reset condition here
  1457. * to recover from an unexpected bus free condition.
  1458. */
  1459. static void NCR5380_information_transfer(struct Scsi_Host *instance)
  1460. __releases(&hostdata->lock) __acquires(&hostdata->lock)
  1461. {
  1462. struct NCR5380_hostdata *hostdata = shost_priv(instance);
  1463. unsigned char msgout = NOP;
  1464. int sink = 0;
  1465. int len;
  1466. int transfersize;
  1467. unsigned char *data;
  1468. unsigned char phase, tmp, extended_msg[10], old_phase = 0xff;
  1469. struct scsi_cmnd *cmd;
  1470. #ifdef SUN3_SCSI_VME
  1471. dregs->csr |= CSR_INTR;
  1472. #endif
  1473. while ((cmd = hostdata->connected)) {
  1474. struct NCR5380_cmd *ncmd = NCR5380_to_ncmd(cmd);
  1475. tmp = NCR5380_read(STATUS_REG);
  1476. /* We only have a valid SCSI phase when REQ is asserted */
  1477. if (tmp & SR_REQ) {
  1478. phase = (tmp & PHASE_MASK);
  1479. if (phase != old_phase) {
  1480. old_phase = phase;
  1481. NCR5380_dprint_phase(NDEBUG_INFORMATION, instance);
  1482. }
  1483. #ifdef CONFIG_SUN3
  1484. if (phase == PHASE_CMDOUT &&
  1485. sun3_dma_setup_done != cmd) {
  1486. int count;
  1487. advance_sg_buffer(ncmd);
  1488. count = sun3scsi_dma_xfer_len(hostdata, cmd);
  1489. if (count > 0) {
  1490. if (cmd->sc_data_direction == DMA_TO_DEVICE)
  1491. sun3scsi_dma_send_setup(hostdata,
  1492. ncmd->ptr, count);
  1493. else
  1494. sun3scsi_dma_recv_setup(hostdata,
  1495. ncmd->ptr, count);
  1496. sun3_dma_setup_done = cmd;
  1497. }
  1498. #ifdef SUN3_SCSI_VME
  1499. dregs->csr |= CSR_INTR;
  1500. #endif
  1501. }
  1502. #endif /* CONFIG_SUN3 */
  1503. if (sink && (phase != PHASE_MSGOUT)) {
  1504. NCR5380_write(TARGET_COMMAND_REG, PHASE_SR_TO_TCR(tmp));
  1505. NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ATN |
  1506. ICR_ASSERT_ACK);
  1507. while (NCR5380_read(STATUS_REG) & SR_REQ)
  1508. ;
  1509. NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE |
  1510. ICR_ASSERT_ATN);
  1511. sink = 0;
  1512. continue;
  1513. }
  1514. switch (phase) {
  1515. case PHASE_DATAOUT:
  1516. #if (NDEBUG & NDEBUG_NO_DATAOUT)
  1517. shost_printk(KERN_DEBUG, instance, "NDEBUG_NO_DATAOUT set, attempted DATAOUT aborted\n");
  1518. sink = 1;
  1519. do_abort(instance, 0);
  1520. cmd->result = DID_ERROR << 16;
  1521. complete_cmd(instance, cmd);
  1522. hostdata->connected = NULL;
  1523. hostdata->busy[scmd_id(cmd)] &= ~(1 << cmd->device->lun);
  1524. return;
  1525. #endif
  1526. case PHASE_DATAIN:
  1527. /*
  1528. * If there is no room left in the current buffer in the
  1529. * scatter-gather list, move onto the next one.
  1530. */
  1531. advance_sg_buffer(ncmd);
  1532. dsprintk(NDEBUG_INFORMATION, instance,
  1533. "this residual %d, sg ents %d\n",
  1534. ncmd->this_residual,
  1535. sg_nents(ncmd->buffer));
  1536. /*
  1537. * The preferred transfer method is going to be
  1538. * PSEUDO-DMA for systems that are strictly PIO,
  1539. * since we can let the hardware do the handshaking.
  1540. *
  1541. * For this to work, we need to know the transfersize
  1542. * ahead of time, since the pseudo-DMA code will sit
  1543. * in an unconditional loop.
  1544. */
  1545. transfersize = 0;
  1546. if (!cmd->device->borken)
  1547. transfersize = NCR5380_dma_xfer_len(hostdata, cmd);
  1548. if (transfersize > 0) {
  1549. len = transfersize;
  1550. if (NCR5380_transfer_dma(instance, &phase,
  1551. &len, (unsigned char **)&ncmd->ptr)) {
  1552. /*
  1553. * If the watchdog timer fires, all future
  1554. * accesses to this device will use the
  1555. * polled-IO.
  1556. */
  1557. scmd_printk(KERN_INFO, cmd,
  1558. "switching to slow handshake\n");
  1559. cmd->device->borken = 1;
  1560. do_reset(instance);
  1561. bus_reset_cleanup(instance);
  1562. }
  1563. } else {
  1564. /* Transfer a small chunk so that the
  1565. * irq mode lock is not held too long.
  1566. */
  1567. transfersize = min(ncmd->this_residual,
  1568. NCR5380_PIO_CHUNK_SIZE);
  1569. len = transfersize;
  1570. NCR5380_transfer_pio(instance, &phase, &len,
  1571. (unsigned char **)&ncmd->ptr,
  1572. 0);
  1573. ncmd->this_residual -= transfersize - len;
  1574. }
  1575. #ifdef CONFIG_SUN3
  1576. if (sun3_dma_setup_done == cmd)
  1577. sun3_dma_setup_done = NULL;
  1578. #endif
  1579. return;
  1580. case PHASE_MSGIN:
  1581. len = 1;
  1582. data = &tmp;
  1583. NCR5380_transfer_pio(instance, &phase, &len, &data, 0);
  1584. ncmd->message = tmp;
  1585. switch (tmp) {
  1586. case ABORT:
  1587. set_host_byte(cmd, DID_ABORT);
  1588. fallthrough;
  1589. case COMMAND_COMPLETE:
  1590. /* Accept message by clearing ACK */
  1591. sink = 1;
  1592. NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
  1593. dsprintk(NDEBUG_QUEUES, instance,
  1594. "COMMAND COMPLETE %p target %d lun %llu\n",
  1595. cmd, scmd_id(cmd), cmd->device->lun);
  1596. hostdata->connected = NULL;
  1597. hostdata->busy[scmd_id(cmd)] &= ~(1 << cmd->device->lun);
  1598. set_status_byte(cmd, ncmd->status);
  1599. set_resid_from_SCp(cmd);
  1600. if (cmd->cmnd[0] == REQUEST_SENSE)
  1601. complete_cmd(instance, cmd);
  1602. else {
  1603. if (ncmd->status == SAM_STAT_CHECK_CONDITION ||
  1604. ncmd->status == SAM_STAT_COMMAND_TERMINATED) {
  1605. dsprintk(NDEBUG_QUEUES, instance, "autosense: adding cmd %p to tail of autosense queue\n",
  1606. cmd);
  1607. list_add_tail(&ncmd->list,
  1608. &hostdata->autosense);
  1609. } else
  1610. complete_cmd(instance, cmd);
  1611. }
  1612. /*
  1613. * Restore phase bits to 0 so an interrupted selection,
  1614. * arbitration can resume.
  1615. */
  1616. NCR5380_write(TARGET_COMMAND_REG, 0);
  1617. return;
  1618. case MESSAGE_REJECT:
  1619. /* Accept message by clearing ACK */
  1620. NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
  1621. switch (hostdata->last_message) {
  1622. case HEAD_OF_QUEUE_TAG:
  1623. case ORDERED_QUEUE_TAG:
  1624. case SIMPLE_QUEUE_TAG:
  1625. cmd->device->simple_tags = 0;
  1626. hostdata->busy[cmd->device->id] |= (1 << (cmd->device->lun & 0xFF));
  1627. break;
  1628. default:
  1629. break;
  1630. }
  1631. break;
  1632. case DISCONNECT:
  1633. /* Accept message by clearing ACK */
  1634. NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
  1635. hostdata->connected = NULL;
  1636. list_add(&ncmd->list, &hostdata->disconnected);
  1637. dsprintk(NDEBUG_INFORMATION | NDEBUG_QUEUES,
  1638. instance, "connected command %p for target %d lun %llu moved to disconnected queue\n",
  1639. cmd, scmd_id(cmd), cmd->device->lun);
  1640. /*
  1641. * Restore phase bits to 0 so an interrupted selection,
  1642. * arbitration can resume.
  1643. */
  1644. NCR5380_write(TARGET_COMMAND_REG, 0);
  1645. #ifdef SUN3_SCSI_VME
  1646. dregs->csr |= CSR_DMA_ENABLE;
  1647. #endif
  1648. return;
  1649. /*
  1650. * The SCSI data pointer is *IMPLICITLY* saved on a disconnect
  1651. * operation, in violation of the SCSI spec so we can safely
  1652. * ignore SAVE/RESTORE pointers calls.
  1653. *
  1654. * Unfortunately, some disks violate the SCSI spec and
  1655. * don't issue the required SAVE_POINTERS message before
  1656. * disconnecting, and we have to break spec to remain
  1657. * compatible.
  1658. */
  1659. case SAVE_POINTERS:
  1660. case RESTORE_POINTERS:
  1661. /* Accept message by clearing ACK */
  1662. NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
  1663. break;
  1664. case EXTENDED_MESSAGE:
  1665. /*
  1666. * Start the message buffer with the EXTENDED_MESSAGE
  1667. * byte, since spi_print_msg() wants the whole thing.
  1668. */
  1669. extended_msg[0] = EXTENDED_MESSAGE;
  1670. /* Accept first byte by clearing ACK */
  1671. NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
  1672. spin_unlock_irq(&hostdata->lock);
  1673. dsprintk(NDEBUG_EXTENDED, instance, "receiving extended message\n");
  1674. len = 2;
  1675. data = extended_msg + 1;
  1676. phase = PHASE_MSGIN;
  1677. NCR5380_transfer_pio(instance, &phase, &len, &data, 1);
  1678. dsprintk(NDEBUG_EXTENDED, instance, "length %d, code 0x%02x\n",
  1679. (int)extended_msg[1],
  1680. (int)extended_msg[2]);
  1681. if (!len && extended_msg[1] > 0 &&
  1682. extended_msg[1] <= sizeof(extended_msg) - 2) {
  1683. /* Accept third byte by clearing ACK */
  1684. NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
  1685. len = extended_msg[1] - 1;
  1686. data = extended_msg + 3;
  1687. phase = PHASE_MSGIN;
  1688. NCR5380_transfer_pio(instance, &phase, &len, &data, 1);
  1689. dsprintk(NDEBUG_EXTENDED, instance, "message received, residual %d\n",
  1690. len);
  1691. switch (extended_msg[2]) {
  1692. case EXTENDED_SDTR:
  1693. case EXTENDED_WDTR:
  1694. tmp = 0;
  1695. }
  1696. } else if (len) {
  1697. shost_printk(KERN_ERR, instance, "error receiving extended message\n");
  1698. tmp = 0;
  1699. } else {
  1700. shost_printk(KERN_NOTICE, instance, "extended message code %02x length %d is too long\n",
  1701. extended_msg[2], extended_msg[1]);
  1702. tmp = 0;
  1703. }
  1704. spin_lock_irq(&hostdata->lock);
  1705. if (!hostdata->connected)
  1706. return;
  1707. /* Reject message */
  1708. fallthrough;
  1709. default:
  1710. /*
  1711. * If we get something weird that we aren't expecting,
  1712. * log it.
  1713. */
  1714. if (tmp == EXTENDED_MESSAGE)
  1715. scmd_printk(KERN_INFO, cmd,
  1716. "rejecting unknown extended message code %02x, length %d\n",
  1717. extended_msg[2], extended_msg[1]);
  1718. else if (tmp)
  1719. scmd_printk(KERN_INFO, cmd,
  1720. "rejecting unknown message code %02x\n",
  1721. tmp);
  1722. msgout = MESSAGE_REJECT;
  1723. NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ATN);
  1724. break;
  1725. } /* switch (tmp) */
  1726. break;
  1727. case PHASE_MSGOUT:
  1728. len = 1;
  1729. data = &msgout;
  1730. hostdata->last_message = msgout;
  1731. NCR5380_transfer_pio(instance, &phase, &len, &data, 0);
  1732. if (msgout == ABORT) {
  1733. hostdata->connected = NULL;
  1734. hostdata->busy[scmd_id(cmd)] &= ~(1 << cmd->device->lun);
  1735. cmd->result = DID_ERROR << 16;
  1736. complete_cmd(instance, cmd);
  1737. return;
  1738. }
  1739. msgout = NOP;
  1740. break;
  1741. case PHASE_CMDOUT:
  1742. len = cmd->cmd_len;
  1743. data = cmd->cmnd;
  1744. /*
  1745. * XXX for performance reasons, on machines with a
  1746. * PSEUDO-DMA architecture we should probably
  1747. * use the dma transfer function.
  1748. */
  1749. NCR5380_transfer_pio(instance, &phase, &len, &data, 0);
  1750. break;
  1751. case PHASE_STATIN:
  1752. len = 1;
  1753. data = &tmp;
  1754. NCR5380_transfer_pio(instance, &phase, &len, &data, 0);
  1755. ncmd->status = tmp;
  1756. break;
  1757. default:
  1758. shost_printk(KERN_ERR, instance, "unknown phase\n");
  1759. NCR5380_dprint(NDEBUG_ANY, instance);
  1760. } /* switch(phase) */
  1761. } else {
  1762. spin_unlock_irq(&hostdata->lock);
  1763. NCR5380_poll_politely(hostdata, STATUS_REG, SR_REQ, SR_REQ, HZ);
  1764. spin_lock_irq(&hostdata->lock);
  1765. }
  1766. }
  1767. }
  1768. /*
  1769. * Function : void NCR5380_reselect (struct Scsi_Host *instance)
  1770. *
  1771. * Purpose : does reselection, initializing the instance->connected
  1772. * field to point to the scsi_cmnd for which the I_T_L or I_T_L_Q
  1773. * nexus has been reestablished,
  1774. *
  1775. * Inputs : instance - this instance of the NCR5380.
  1776. */
  1777. static void NCR5380_reselect(struct Scsi_Host *instance)
  1778. {
  1779. struct NCR5380_hostdata *hostdata = shost_priv(instance);
  1780. unsigned char target_mask;
  1781. unsigned char lun;
  1782. unsigned char msg[3];
  1783. struct NCR5380_cmd *ncmd;
  1784. struct scsi_cmnd *tmp;
  1785. /*
  1786. * Disable arbitration, etc. since the host adapter obviously
  1787. * lost, and tell an interrupted NCR5380_select() to restart.
  1788. */
  1789. NCR5380_write(MODE_REG, MR_BASE);
  1790. target_mask = NCR5380_read(CURRENT_SCSI_DATA_REG) & ~(hostdata->id_mask);
  1791. if (!target_mask || target_mask & (target_mask - 1)) {
  1792. shost_printk(KERN_WARNING, instance,
  1793. "reselect: bad target_mask 0x%02x\n", target_mask);
  1794. return;
  1795. }
  1796. /*
  1797. * At this point, we have detected that our SCSI ID is on the bus,
  1798. * SEL is true and BSY was false for at least one bus settle delay
  1799. * (400 ns).
  1800. *
  1801. * We must assert BSY ourselves, until the target drops the SEL
  1802. * signal.
  1803. */
  1804. NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_BSY);
  1805. if (NCR5380_poll_politely(hostdata,
  1806. STATUS_REG, SR_SEL, 0, 0) < 0) {
  1807. shost_printk(KERN_ERR, instance, "reselect: !SEL timeout\n");
  1808. NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
  1809. return;
  1810. }
  1811. NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
  1812. /*
  1813. * Wait for target to go into MSGIN.
  1814. */
  1815. if (NCR5380_poll_politely(hostdata,
  1816. STATUS_REG, SR_REQ, SR_REQ, 0) < 0) {
  1817. if ((NCR5380_read(STATUS_REG) & (SR_BSY | SR_SEL)) == 0)
  1818. /* BUS FREE phase */
  1819. return;
  1820. shost_printk(KERN_ERR, instance, "reselect: REQ timeout\n");
  1821. do_abort(instance, 0);
  1822. return;
  1823. }
  1824. #ifdef CONFIG_SUN3
  1825. /* acknowledge toggle to MSGIN */
  1826. NCR5380_write(TARGET_COMMAND_REG, PHASE_SR_TO_TCR(PHASE_MSGIN));
  1827. /* peek at the byte without really hitting the bus */
  1828. msg[0] = NCR5380_read(CURRENT_SCSI_DATA_REG);
  1829. #else
  1830. {
  1831. int len = 1;
  1832. unsigned char *data = msg;
  1833. unsigned char phase = PHASE_MSGIN;
  1834. NCR5380_transfer_pio(instance, &phase, &len, &data, 0);
  1835. if (len) {
  1836. do_abort(instance, 0);
  1837. return;
  1838. }
  1839. }
  1840. #endif /* CONFIG_SUN3 */
  1841. if (!(msg[0] & 0x80)) {
  1842. shost_printk(KERN_ERR, instance, "expecting IDENTIFY message, got ");
  1843. spi_print_msg(msg);
  1844. printk("\n");
  1845. do_abort(instance, 0);
  1846. return;
  1847. }
  1848. lun = msg[0] & 0x07;
  1849. /*
  1850. * We need to add code for SCSI-II to track which devices have
  1851. * I_T_L_Q nexuses established, and which have simple I_T_L
  1852. * nexuses so we can chose to do additional data transfer.
  1853. */
  1854. /*
  1855. * Find the command corresponding to the I_T_L or I_T_L_Q nexus we
  1856. * just reestablished, and remove it from the disconnected queue.
  1857. */
  1858. tmp = NULL;
  1859. list_for_each_entry(ncmd, &hostdata->disconnected, list) {
  1860. struct scsi_cmnd *cmd = NCR5380_to_scmd(ncmd);
  1861. if (target_mask == (1 << scmd_id(cmd)) &&
  1862. lun == (u8)cmd->device->lun) {
  1863. list_del(&ncmd->list);
  1864. tmp = cmd;
  1865. break;
  1866. }
  1867. }
  1868. if (tmp) {
  1869. dsprintk(NDEBUG_RESELECTION | NDEBUG_QUEUES, instance,
  1870. "reselect: removed %p from disconnected queue\n", tmp);
  1871. } else {
  1872. int target = ffs(target_mask) - 1;
  1873. shost_printk(KERN_ERR, instance, "target bitmask 0x%02x lun %d not in disconnected queue.\n",
  1874. target_mask, lun);
  1875. /*
  1876. * Since we have an established nexus that we can't do anything
  1877. * with, we must abort it.
  1878. */
  1879. if (do_abort(instance, 0) == 0)
  1880. hostdata->busy[target] &= ~(1 << lun);
  1881. return;
  1882. }
  1883. #ifdef CONFIG_SUN3
  1884. if (sun3_dma_setup_done != tmp) {
  1885. int count;
  1886. advance_sg_buffer(ncmd);
  1887. count = sun3scsi_dma_xfer_len(hostdata, tmp);
  1888. if (count > 0) {
  1889. if (tmp->sc_data_direction == DMA_TO_DEVICE)
  1890. sun3scsi_dma_send_setup(hostdata,
  1891. ncmd->ptr, count);
  1892. else
  1893. sun3scsi_dma_recv_setup(hostdata,
  1894. ncmd->ptr, count);
  1895. sun3_dma_setup_done = tmp;
  1896. }
  1897. }
  1898. NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ACK);
  1899. #endif /* CONFIG_SUN3 */
  1900. /* Accept message by clearing ACK */
  1901. NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
  1902. hostdata->connected = tmp;
  1903. dsprintk(NDEBUG_RESELECTION, instance, "nexus established, target %d, lun %llu\n",
  1904. scmd_id(tmp), tmp->device->lun);
  1905. }
  1906. /**
  1907. * list_find_cmd - test for presence of a command in a linked list
  1908. * @haystack: list of commands
  1909. * @needle: command to search for
  1910. */
  1911. static bool list_find_cmd(struct list_head *haystack,
  1912. struct scsi_cmnd *needle)
  1913. {
  1914. struct NCR5380_cmd *ncmd;
  1915. list_for_each_entry(ncmd, haystack, list)
  1916. if (NCR5380_to_scmd(ncmd) == needle)
  1917. return true;
  1918. return false;
  1919. }
  1920. /**
  1921. * list_remove_cmd - remove a command from linked list
  1922. * @haystack: list of commands
  1923. * @needle: command to remove
  1924. */
  1925. static bool list_del_cmd(struct list_head *haystack,
  1926. struct scsi_cmnd *needle)
  1927. {
  1928. if (list_find_cmd(haystack, needle)) {
  1929. struct NCR5380_cmd *ncmd = NCR5380_to_ncmd(needle);
  1930. list_del(&ncmd->list);
  1931. return true;
  1932. }
  1933. return false;
  1934. }
  1935. /**
  1936. * NCR5380_abort - scsi host eh_abort_handler() method
  1937. * @cmd: the command to be aborted
  1938. *
  1939. * Try to abort a given command by removing it from queues and/or sending
  1940. * the target an abort message. This may not succeed in causing a target
  1941. * to abort the command. Nonetheless, the low-level driver must forget about
  1942. * the command because the mid-layer reclaims it and it may be re-issued.
  1943. *
  1944. * The normal path taken by a command is as follows. For EH we trace this
  1945. * same path to locate and abort the command.
  1946. *
  1947. * unissued -> selecting -> [unissued -> selecting ->]... connected ->
  1948. * [disconnected -> connected ->]...
  1949. * [autosense -> connected ->] done
  1950. *
  1951. * If cmd was not found at all then presumably it has already been completed,
  1952. * in which case return SUCCESS to try to avoid further EH measures.
  1953. *
  1954. * If the command has not completed yet, we must not fail to find it.
  1955. * We have no option but to forget the aborted command (even if it still
  1956. * lacks sense data). The mid-layer may re-issue a command that is in error
  1957. * recovery (see scsi_send_eh_cmnd), but the logic and data structures in
  1958. * this driver are such that a command can appear on one queue only.
  1959. *
  1960. * The lock protects driver data structures, but EH handlers also use it
  1961. * to serialize their own execution and prevent their own re-entry.
  1962. */
  1963. static int NCR5380_abort(struct scsi_cmnd *cmd)
  1964. {
  1965. struct Scsi_Host *instance = cmd->device->host;
  1966. struct NCR5380_hostdata *hostdata = shost_priv(instance);
  1967. unsigned long flags;
  1968. int result = SUCCESS;
  1969. spin_lock_irqsave(&hostdata->lock, flags);
  1970. #if (NDEBUG & NDEBUG_ANY)
  1971. scmd_printk(KERN_INFO, cmd, __func__);
  1972. #endif
  1973. NCR5380_dprint(NDEBUG_ANY, instance);
  1974. NCR5380_dprint_phase(NDEBUG_ANY, instance);
  1975. if (list_del_cmd(&hostdata->unissued, cmd)) {
  1976. dsprintk(NDEBUG_ABORT, instance,
  1977. "abort: removed %p from issue queue\n", cmd);
  1978. cmd->result = DID_ABORT << 16;
  1979. scsi_done(cmd); /* No tag or busy flag to worry about */
  1980. goto out;
  1981. }
  1982. if (hostdata->selecting == cmd) {
  1983. dsprintk(NDEBUG_ABORT, instance,
  1984. "abort: cmd %p == selecting\n", cmd);
  1985. hostdata->selecting = NULL;
  1986. cmd->result = DID_ABORT << 16;
  1987. complete_cmd(instance, cmd);
  1988. goto out;
  1989. }
  1990. if (list_del_cmd(&hostdata->disconnected, cmd)) {
  1991. dsprintk(NDEBUG_ABORT, instance,
  1992. "abort: removed %p from disconnected list\n", cmd);
  1993. /* Can't call NCR5380_select() and send ABORT because that
  1994. * means releasing the lock. Need a bus reset.
  1995. */
  1996. set_host_byte(cmd, DID_ERROR);
  1997. complete_cmd(instance, cmd);
  1998. result = FAILED;
  1999. goto out;
  2000. }
  2001. if (hostdata->connected == cmd) {
  2002. dsprintk(NDEBUG_ABORT, instance, "abort: cmd %p is connected\n", cmd);
  2003. hostdata->connected = NULL;
  2004. hostdata->dma_len = 0;
  2005. if (do_abort(instance, 0) < 0) {
  2006. set_host_byte(cmd, DID_ERROR);
  2007. complete_cmd(instance, cmd);
  2008. result = FAILED;
  2009. goto out;
  2010. }
  2011. set_host_byte(cmd, DID_ABORT);
  2012. complete_cmd(instance, cmd);
  2013. goto out;
  2014. }
  2015. if (list_del_cmd(&hostdata->autosense, cmd)) {
  2016. dsprintk(NDEBUG_ABORT, instance,
  2017. "abort: removed %p from sense queue\n", cmd);
  2018. complete_cmd(instance, cmd);
  2019. }
  2020. out:
  2021. if (result == FAILED)
  2022. dsprintk(NDEBUG_ABORT, instance, "abort: failed to abort %p\n", cmd);
  2023. else {
  2024. hostdata->busy[scmd_id(cmd)] &= ~(1 << cmd->device->lun);
  2025. dsprintk(NDEBUG_ABORT, instance, "abort: successfully aborted %p\n", cmd);
  2026. }
  2027. queue_work(hostdata->work_q, &hostdata->main_task);
  2028. spin_unlock_irqrestore(&hostdata->lock, flags);
  2029. return result;
  2030. }
  2031. static void bus_reset_cleanup(struct Scsi_Host *instance)
  2032. {
  2033. struct NCR5380_hostdata *hostdata = shost_priv(instance);
  2034. int i;
  2035. struct NCR5380_cmd *ncmd;
  2036. /* reset NCR registers */
  2037. NCR5380_write(MODE_REG, MR_BASE);
  2038. NCR5380_write(TARGET_COMMAND_REG, 0);
  2039. NCR5380_write(SELECT_ENABLE_REG, 0);
  2040. /* After the reset, there are no more connected or disconnected commands
  2041. * and no busy units; so clear the low-level status here to avoid
  2042. * conflicts when the mid-level code tries to wake up the affected
  2043. * commands!
  2044. */
  2045. if (hostdata->selecting) {
  2046. hostdata->selecting->result = DID_RESET << 16;
  2047. complete_cmd(instance, hostdata->selecting);
  2048. hostdata->selecting = NULL;
  2049. }
  2050. list_for_each_entry(ncmd, &hostdata->disconnected, list) {
  2051. struct scsi_cmnd *cmd = NCR5380_to_scmd(ncmd);
  2052. set_host_byte(cmd, DID_RESET);
  2053. complete_cmd(instance, cmd);
  2054. }
  2055. INIT_LIST_HEAD(&hostdata->disconnected);
  2056. list_for_each_entry(ncmd, &hostdata->autosense, list) {
  2057. struct scsi_cmnd *cmd = NCR5380_to_scmd(ncmd);
  2058. scsi_done(cmd);
  2059. }
  2060. INIT_LIST_HEAD(&hostdata->autosense);
  2061. if (hostdata->connected) {
  2062. set_host_byte(hostdata->connected, DID_RESET);
  2063. complete_cmd(instance, hostdata->connected);
  2064. hostdata->connected = NULL;
  2065. }
  2066. for (i = 0; i < 8; ++i)
  2067. hostdata->busy[i] = 0;
  2068. hostdata->dma_len = 0;
  2069. queue_work(hostdata->work_q, &hostdata->main_task);
  2070. }
  2071. /**
  2072. * NCR5380_host_reset - reset the SCSI host
  2073. * @cmd: SCSI command undergoing EH
  2074. *
  2075. * Returns SUCCESS
  2076. */
  2077. static int NCR5380_host_reset(struct scsi_cmnd *cmd)
  2078. {
  2079. struct Scsi_Host *instance = cmd->device->host;
  2080. struct NCR5380_hostdata *hostdata = shost_priv(instance);
  2081. unsigned long flags;
  2082. struct NCR5380_cmd *ncmd;
  2083. spin_lock_irqsave(&hostdata->lock, flags);
  2084. #if (NDEBUG & NDEBUG_ANY)
  2085. shost_printk(KERN_INFO, instance, __func__);
  2086. #endif
  2087. NCR5380_dprint(NDEBUG_ANY, instance);
  2088. NCR5380_dprint_phase(NDEBUG_ANY, instance);
  2089. list_for_each_entry(ncmd, &hostdata->unissued, list) {
  2090. struct scsi_cmnd *scmd = NCR5380_to_scmd(ncmd);
  2091. scmd->result = DID_RESET << 16;
  2092. scsi_done(scmd);
  2093. }
  2094. INIT_LIST_HEAD(&hostdata->unissued);
  2095. do_reset(instance);
  2096. bus_reset_cleanup(instance);
  2097. spin_unlock_irqrestore(&hostdata->lock, flags);
  2098. return SUCCESS;
  2099. }