rtc-rv3028.c 23 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * RTC driver for the Micro Crystal RV3028
  4. *
  5. * Copyright (C) 2019 Micro Crystal SA
  6. *
  7. * Alexandre Belloni <[email protected]>
  8. *
  9. */
  10. #include <linux/clk-provider.h>
  11. #include <linux/bcd.h>
  12. #include <linux/bitfield.h>
  13. #include <linux/bitops.h>
  14. #include <linux/i2c.h>
  15. #include <linux/interrupt.h>
  16. #include <linux/kernel.h>
  17. #include <linux/log2.h>
  18. #include <linux/module.h>
  19. #include <linux/of_device.h>
  20. #include <linux/regmap.h>
  21. #include <linux/rtc.h>
  22. #define RV3028_SEC 0x00
  23. #define RV3028_MIN 0x01
  24. #define RV3028_HOUR 0x02
  25. #define RV3028_WDAY 0x03
  26. #define RV3028_DAY 0x04
  27. #define RV3028_MONTH 0x05
  28. #define RV3028_YEAR 0x06
  29. #define RV3028_ALARM_MIN 0x07
  30. #define RV3028_ALARM_HOUR 0x08
  31. #define RV3028_ALARM_DAY 0x09
  32. #define RV3028_STATUS 0x0E
  33. #define RV3028_CTRL1 0x0F
  34. #define RV3028_CTRL2 0x10
  35. #define RV3028_EVT_CTRL 0x13
  36. #define RV3028_TS_COUNT 0x14
  37. #define RV3028_TS_SEC 0x15
  38. #define RV3028_RAM1 0x1F
  39. #define RV3028_EEPROM_ADDR 0x25
  40. #define RV3028_EEPROM_DATA 0x26
  41. #define RV3028_EEPROM_CMD 0x27
  42. #define RV3028_CLKOUT 0x35
  43. #define RV3028_OFFSET 0x36
  44. #define RV3028_BACKUP 0x37
  45. #define RV3028_STATUS_PORF BIT(0)
  46. #define RV3028_STATUS_EVF BIT(1)
  47. #define RV3028_STATUS_AF BIT(2)
  48. #define RV3028_STATUS_TF BIT(3)
  49. #define RV3028_STATUS_UF BIT(4)
  50. #define RV3028_STATUS_BSF BIT(5)
  51. #define RV3028_STATUS_CLKF BIT(6)
  52. #define RV3028_STATUS_EEBUSY BIT(7)
  53. #define RV3028_CLKOUT_FD_MASK GENMASK(2, 0)
  54. #define RV3028_CLKOUT_PORIE BIT(3)
  55. #define RV3028_CLKOUT_CLKSY BIT(6)
  56. #define RV3028_CLKOUT_CLKOE BIT(7)
  57. #define RV3028_CTRL1_EERD BIT(3)
  58. #define RV3028_CTRL1_WADA BIT(5)
  59. #define RV3028_CTRL2_RESET BIT(0)
  60. #define RV3028_CTRL2_12_24 BIT(1)
  61. #define RV3028_CTRL2_EIE BIT(2)
  62. #define RV3028_CTRL2_AIE BIT(3)
  63. #define RV3028_CTRL2_TIE BIT(4)
  64. #define RV3028_CTRL2_UIE BIT(5)
  65. #define RV3028_CTRL2_TSE BIT(7)
  66. #define RV3028_EVT_CTRL_TSR BIT(2)
  67. #define RV3028_EEPROM_CMD_UPDATE 0x11
  68. #define RV3028_EEPROM_CMD_WRITE 0x21
  69. #define RV3028_EEPROM_CMD_READ 0x22
  70. #define RV3028_EEBUSY_POLL 10000
  71. #define RV3028_EEBUSY_TIMEOUT 100000
  72. #define RV3028_BACKUP_TCE BIT(5)
  73. #define RV3028_BACKUP_TCR_MASK GENMASK(1,0)
  74. #define RV3028_BACKUP_BSM GENMASK(3,2)
  75. #define RV3028_BACKUP_BSM_DSM 0x1
  76. #define RV3028_BACKUP_BSM_LSM 0x3
  77. #define OFFSET_STEP_PPT 953674
  78. enum rv3028_type {
  79. rv_3028,
  80. };
  81. struct rv3028_data {
  82. struct regmap *regmap;
  83. struct rtc_device *rtc;
  84. enum rv3028_type type;
  85. #ifdef CONFIG_COMMON_CLK
  86. struct clk_hw clkout_hw;
  87. #endif
  88. };
  89. static u16 rv3028_trickle_resistors[] = {3000, 5000, 9000, 15000};
  90. static ssize_t timestamp0_store(struct device *dev,
  91. struct device_attribute *attr,
  92. const char *buf, size_t count)
  93. {
  94. struct rv3028_data *rv3028 = dev_get_drvdata(dev->parent);
  95. regmap_update_bits(rv3028->regmap, RV3028_EVT_CTRL, RV3028_EVT_CTRL_TSR,
  96. RV3028_EVT_CTRL_TSR);
  97. return count;
  98. };
  99. static ssize_t timestamp0_show(struct device *dev,
  100. struct device_attribute *attr, char *buf)
  101. {
  102. struct rv3028_data *rv3028 = dev_get_drvdata(dev->parent);
  103. struct rtc_time tm;
  104. int ret, count;
  105. u8 date[6];
  106. ret = regmap_read(rv3028->regmap, RV3028_TS_COUNT, &count);
  107. if (ret)
  108. return ret;
  109. if (!count)
  110. return 0;
  111. ret = regmap_bulk_read(rv3028->regmap, RV3028_TS_SEC, date,
  112. sizeof(date));
  113. if (ret)
  114. return ret;
  115. tm.tm_sec = bcd2bin(date[0]);
  116. tm.tm_min = bcd2bin(date[1]);
  117. tm.tm_hour = bcd2bin(date[2]);
  118. tm.tm_mday = bcd2bin(date[3]);
  119. tm.tm_mon = bcd2bin(date[4]) - 1;
  120. tm.tm_year = bcd2bin(date[5]) + 100;
  121. ret = rtc_valid_tm(&tm);
  122. if (ret)
  123. return ret;
  124. return sprintf(buf, "%llu\n",
  125. (unsigned long long)rtc_tm_to_time64(&tm));
  126. };
  127. static DEVICE_ATTR_RW(timestamp0);
  128. static ssize_t timestamp0_count_show(struct device *dev,
  129. struct device_attribute *attr, char *buf)
  130. {
  131. struct rv3028_data *rv3028 = dev_get_drvdata(dev->parent);
  132. int ret, count;
  133. ret = regmap_read(rv3028->regmap, RV3028_TS_COUNT, &count);
  134. if (ret)
  135. return ret;
  136. return sprintf(buf, "%u\n", count);
  137. };
  138. static DEVICE_ATTR_RO(timestamp0_count);
  139. static struct attribute *rv3028_attrs[] = {
  140. &dev_attr_timestamp0.attr,
  141. &dev_attr_timestamp0_count.attr,
  142. NULL
  143. };
  144. static const struct attribute_group rv3028_attr_group = {
  145. .attrs = rv3028_attrs,
  146. };
  147. static int rv3028_exit_eerd(struct rv3028_data *rv3028, u32 eerd)
  148. {
  149. if (eerd)
  150. return 0;
  151. return regmap_update_bits(rv3028->regmap, RV3028_CTRL1, RV3028_CTRL1_EERD, 0);
  152. }
  153. static int rv3028_enter_eerd(struct rv3028_data *rv3028, u32 *eerd)
  154. {
  155. u32 ctrl1, status;
  156. int ret;
  157. ret = regmap_read(rv3028->regmap, RV3028_CTRL1, &ctrl1);
  158. if (ret)
  159. return ret;
  160. *eerd = ctrl1 & RV3028_CTRL1_EERD;
  161. if (*eerd)
  162. return 0;
  163. ret = regmap_update_bits(rv3028->regmap, RV3028_CTRL1,
  164. RV3028_CTRL1_EERD, RV3028_CTRL1_EERD);
  165. if (ret)
  166. return ret;
  167. ret = regmap_read_poll_timeout(rv3028->regmap, RV3028_STATUS, status,
  168. !(status & RV3028_STATUS_EEBUSY),
  169. RV3028_EEBUSY_POLL, RV3028_EEBUSY_TIMEOUT);
  170. if (ret) {
  171. rv3028_exit_eerd(rv3028, *eerd);
  172. return ret;
  173. }
  174. return 0;
  175. }
  176. static int rv3028_update_eeprom(struct rv3028_data *rv3028, u32 eerd)
  177. {
  178. u32 status;
  179. int ret;
  180. ret = regmap_write(rv3028->regmap, RV3028_EEPROM_CMD, 0x0);
  181. if (ret)
  182. goto exit_eerd;
  183. ret = regmap_write(rv3028->regmap, RV3028_EEPROM_CMD, RV3028_EEPROM_CMD_UPDATE);
  184. if (ret)
  185. goto exit_eerd;
  186. usleep_range(63000, RV3028_EEBUSY_TIMEOUT);
  187. ret = regmap_read_poll_timeout(rv3028->regmap, RV3028_STATUS, status,
  188. !(status & RV3028_STATUS_EEBUSY),
  189. RV3028_EEBUSY_POLL, RV3028_EEBUSY_TIMEOUT);
  190. exit_eerd:
  191. rv3028_exit_eerd(rv3028, eerd);
  192. return ret;
  193. }
  194. static int rv3028_update_cfg(struct rv3028_data *rv3028, unsigned int reg,
  195. unsigned int mask, unsigned int val)
  196. {
  197. u32 eerd;
  198. int ret;
  199. ret = rv3028_enter_eerd(rv3028, &eerd);
  200. if (ret)
  201. return ret;
  202. ret = regmap_update_bits(rv3028->regmap, reg, mask, val);
  203. if (ret) {
  204. rv3028_exit_eerd(rv3028, eerd);
  205. return ret;
  206. }
  207. return rv3028_update_eeprom(rv3028, eerd);
  208. }
  209. static irqreturn_t rv3028_handle_irq(int irq, void *dev_id)
  210. {
  211. struct rv3028_data *rv3028 = dev_id;
  212. unsigned long events = 0;
  213. u32 status = 0, ctrl = 0;
  214. if (regmap_read(rv3028->regmap, RV3028_STATUS, &status) < 0 ||
  215. status == 0) {
  216. return IRQ_NONE;
  217. }
  218. status &= ~RV3028_STATUS_PORF;
  219. if (status & RV3028_STATUS_TF) {
  220. status |= RV3028_STATUS_TF;
  221. ctrl |= RV3028_CTRL2_TIE;
  222. events |= RTC_PF;
  223. }
  224. if (status & RV3028_STATUS_AF) {
  225. status |= RV3028_STATUS_AF;
  226. ctrl |= RV3028_CTRL2_AIE;
  227. events |= RTC_AF;
  228. }
  229. if (status & RV3028_STATUS_UF) {
  230. status |= RV3028_STATUS_UF;
  231. ctrl |= RV3028_CTRL2_UIE;
  232. events |= RTC_UF;
  233. }
  234. if (events) {
  235. rtc_update_irq(rv3028->rtc, 1, events);
  236. regmap_update_bits(rv3028->regmap, RV3028_STATUS, status, 0);
  237. regmap_update_bits(rv3028->regmap, RV3028_CTRL2, ctrl, 0);
  238. }
  239. if (status & RV3028_STATUS_EVF) {
  240. sysfs_notify(&rv3028->rtc->dev.kobj, NULL,
  241. dev_attr_timestamp0.attr.name);
  242. dev_warn(&rv3028->rtc->dev, "event detected");
  243. }
  244. return IRQ_HANDLED;
  245. }
  246. static int rv3028_get_time(struct device *dev, struct rtc_time *tm)
  247. {
  248. struct rv3028_data *rv3028 = dev_get_drvdata(dev);
  249. u8 date[7];
  250. int ret, status;
  251. ret = regmap_read(rv3028->regmap, RV3028_STATUS, &status);
  252. if (ret < 0)
  253. return ret;
  254. if (status & RV3028_STATUS_PORF)
  255. return -EINVAL;
  256. ret = regmap_bulk_read(rv3028->regmap, RV3028_SEC, date, sizeof(date));
  257. if (ret)
  258. return ret;
  259. tm->tm_sec = bcd2bin(date[RV3028_SEC] & 0x7f);
  260. tm->tm_min = bcd2bin(date[RV3028_MIN] & 0x7f);
  261. tm->tm_hour = bcd2bin(date[RV3028_HOUR] & 0x3f);
  262. tm->tm_wday = date[RV3028_WDAY] & 0x7f;
  263. tm->tm_mday = bcd2bin(date[RV3028_DAY] & 0x3f);
  264. tm->tm_mon = bcd2bin(date[RV3028_MONTH] & 0x1f) - 1;
  265. tm->tm_year = bcd2bin(date[RV3028_YEAR]) + 100;
  266. return 0;
  267. }
  268. static int rv3028_set_time(struct device *dev, struct rtc_time *tm)
  269. {
  270. struct rv3028_data *rv3028 = dev_get_drvdata(dev);
  271. u8 date[7];
  272. int ret;
  273. date[RV3028_SEC] = bin2bcd(tm->tm_sec);
  274. date[RV3028_MIN] = bin2bcd(tm->tm_min);
  275. date[RV3028_HOUR] = bin2bcd(tm->tm_hour);
  276. date[RV3028_WDAY] = tm->tm_wday;
  277. date[RV3028_DAY] = bin2bcd(tm->tm_mday);
  278. date[RV3028_MONTH] = bin2bcd(tm->tm_mon + 1);
  279. date[RV3028_YEAR] = bin2bcd(tm->tm_year - 100);
  280. /*
  281. * Writing to the Seconds register has the same effect as setting RESET
  282. * bit to 1
  283. */
  284. ret = regmap_bulk_write(rv3028->regmap, RV3028_SEC, date,
  285. sizeof(date));
  286. if (ret)
  287. return ret;
  288. ret = regmap_update_bits(rv3028->regmap, RV3028_STATUS,
  289. RV3028_STATUS_PORF, 0);
  290. return ret;
  291. }
  292. static int rv3028_get_alarm(struct device *dev, struct rtc_wkalrm *alrm)
  293. {
  294. struct rv3028_data *rv3028 = dev_get_drvdata(dev);
  295. u8 alarmvals[3];
  296. int status, ctrl, ret;
  297. ret = regmap_bulk_read(rv3028->regmap, RV3028_ALARM_MIN, alarmvals,
  298. sizeof(alarmvals));
  299. if (ret)
  300. return ret;
  301. ret = regmap_read(rv3028->regmap, RV3028_STATUS, &status);
  302. if (ret < 0)
  303. return ret;
  304. ret = regmap_read(rv3028->regmap, RV3028_CTRL2, &ctrl);
  305. if (ret < 0)
  306. return ret;
  307. alrm->time.tm_sec = 0;
  308. alrm->time.tm_min = bcd2bin(alarmvals[0] & 0x7f);
  309. alrm->time.tm_hour = bcd2bin(alarmvals[1] & 0x3f);
  310. alrm->time.tm_mday = bcd2bin(alarmvals[2] & 0x3f);
  311. alrm->enabled = !!(ctrl & RV3028_CTRL2_AIE);
  312. alrm->pending = (status & RV3028_STATUS_AF) && alrm->enabled;
  313. return 0;
  314. }
  315. static int rv3028_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
  316. {
  317. struct rv3028_data *rv3028 = dev_get_drvdata(dev);
  318. u8 alarmvals[3];
  319. u8 ctrl = 0;
  320. int ret;
  321. /* The alarm has no seconds, round up to nearest minute */
  322. if (alrm->time.tm_sec) {
  323. time64_t alarm_time = rtc_tm_to_time64(&alrm->time);
  324. alarm_time += 60 - alrm->time.tm_sec;
  325. rtc_time64_to_tm(alarm_time, &alrm->time);
  326. }
  327. ret = regmap_update_bits(rv3028->regmap, RV3028_CTRL2,
  328. RV3028_CTRL2_AIE | RV3028_CTRL2_UIE, 0);
  329. if (ret)
  330. return ret;
  331. alarmvals[0] = bin2bcd(alrm->time.tm_min);
  332. alarmvals[1] = bin2bcd(alrm->time.tm_hour);
  333. alarmvals[2] = bin2bcd(alrm->time.tm_mday);
  334. ret = regmap_update_bits(rv3028->regmap, RV3028_STATUS,
  335. RV3028_STATUS_AF, 0);
  336. if (ret)
  337. return ret;
  338. ret = regmap_bulk_write(rv3028->regmap, RV3028_ALARM_MIN, alarmvals,
  339. sizeof(alarmvals));
  340. if (ret)
  341. return ret;
  342. if (alrm->enabled) {
  343. if (rv3028->rtc->uie_rtctimer.enabled)
  344. ctrl |= RV3028_CTRL2_UIE;
  345. if (rv3028->rtc->aie_timer.enabled)
  346. ctrl |= RV3028_CTRL2_AIE;
  347. }
  348. ret = regmap_update_bits(rv3028->regmap, RV3028_CTRL2,
  349. RV3028_CTRL2_UIE | RV3028_CTRL2_AIE, ctrl);
  350. return ret;
  351. }
  352. static int rv3028_alarm_irq_enable(struct device *dev, unsigned int enabled)
  353. {
  354. struct rv3028_data *rv3028 = dev_get_drvdata(dev);
  355. int ctrl = 0, ret;
  356. if (enabled) {
  357. if (rv3028->rtc->uie_rtctimer.enabled)
  358. ctrl |= RV3028_CTRL2_UIE;
  359. if (rv3028->rtc->aie_timer.enabled)
  360. ctrl |= RV3028_CTRL2_AIE;
  361. }
  362. ret = regmap_update_bits(rv3028->regmap, RV3028_STATUS,
  363. RV3028_STATUS_AF | RV3028_STATUS_UF, 0);
  364. if (ret)
  365. return ret;
  366. ret = regmap_update_bits(rv3028->regmap, RV3028_CTRL2,
  367. RV3028_CTRL2_UIE | RV3028_CTRL2_AIE, ctrl);
  368. if (ret)
  369. return ret;
  370. return 0;
  371. }
  372. static int rv3028_read_offset(struct device *dev, long *offset)
  373. {
  374. struct rv3028_data *rv3028 = dev_get_drvdata(dev);
  375. int ret, value, steps;
  376. ret = regmap_read(rv3028->regmap, RV3028_OFFSET, &value);
  377. if (ret < 0)
  378. return ret;
  379. steps = sign_extend32(value << 1, 8);
  380. ret = regmap_read(rv3028->regmap, RV3028_BACKUP, &value);
  381. if (ret < 0)
  382. return ret;
  383. steps += value >> 7;
  384. *offset = DIV_ROUND_CLOSEST(steps * OFFSET_STEP_PPT, 1000);
  385. return 0;
  386. }
  387. static int rv3028_set_offset(struct device *dev, long offset)
  388. {
  389. struct rv3028_data *rv3028 = dev_get_drvdata(dev);
  390. u32 eerd;
  391. int ret;
  392. offset = clamp(offset, -244141L, 243187L) * 1000;
  393. offset = DIV_ROUND_CLOSEST(offset, OFFSET_STEP_PPT);
  394. ret = rv3028_enter_eerd(rv3028, &eerd);
  395. if (ret)
  396. return ret;
  397. ret = regmap_write(rv3028->regmap, RV3028_OFFSET, offset >> 1);
  398. if (ret < 0)
  399. goto exit_eerd;
  400. ret = regmap_update_bits(rv3028->regmap, RV3028_BACKUP, BIT(7),
  401. offset << 7);
  402. if (ret < 0)
  403. goto exit_eerd;
  404. return rv3028_update_eeprom(rv3028, eerd);
  405. exit_eerd:
  406. rv3028_exit_eerd(rv3028, eerd);
  407. return ret;
  408. }
  409. static int rv3028_param_get(struct device *dev, struct rtc_param *param)
  410. {
  411. struct rv3028_data *rv3028 = dev_get_drvdata(dev);
  412. int ret;
  413. u32 value;
  414. switch(param->param) {
  415. case RTC_PARAM_BACKUP_SWITCH_MODE:
  416. ret = regmap_read(rv3028->regmap, RV3028_BACKUP, &value);
  417. if (ret < 0)
  418. return ret;
  419. value = FIELD_GET(RV3028_BACKUP_BSM, value);
  420. switch(value) {
  421. case RV3028_BACKUP_BSM_DSM:
  422. param->uvalue = RTC_BSM_DIRECT;
  423. break;
  424. case RV3028_BACKUP_BSM_LSM:
  425. param->uvalue = RTC_BSM_LEVEL;
  426. break;
  427. default:
  428. param->uvalue = RTC_BSM_DISABLED;
  429. }
  430. break;
  431. default:
  432. return -EINVAL;
  433. }
  434. return 0;
  435. }
  436. static int rv3028_param_set(struct device *dev, struct rtc_param *param)
  437. {
  438. struct rv3028_data *rv3028 = dev_get_drvdata(dev);
  439. u8 mode;
  440. switch(param->param) {
  441. case RTC_PARAM_BACKUP_SWITCH_MODE:
  442. switch (param->uvalue) {
  443. case RTC_BSM_DISABLED:
  444. mode = 0;
  445. break;
  446. case RTC_BSM_DIRECT:
  447. mode = RV3028_BACKUP_BSM_DSM;
  448. break;
  449. case RTC_BSM_LEVEL:
  450. mode = RV3028_BACKUP_BSM_LSM;
  451. break;
  452. default:
  453. return -EINVAL;
  454. }
  455. return rv3028_update_cfg(rv3028, RV3028_BACKUP, RV3028_BACKUP_BSM,
  456. FIELD_PREP(RV3028_BACKUP_BSM, mode));
  457. default:
  458. return -EINVAL;
  459. }
  460. return 0;
  461. }
  462. static int rv3028_ioctl(struct device *dev, unsigned int cmd, unsigned long arg)
  463. {
  464. struct rv3028_data *rv3028 = dev_get_drvdata(dev);
  465. int status, ret = 0;
  466. switch (cmd) {
  467. case RTC_VL_READ:
  468. ret = regmap_read(rv3028->regmap, RV3028_STATUS, &status);
  469. if (ret < 0)
  470. return ret;
  471. status = status & RV3028_STATUS_PORF ? RTC_VL_DATA_INVALID : 0;
  472. return put_user(status, (unsigned int __user *)arg);
  473. default:
  474. return -ENOIOCTLCMD;
  475. }
  476. }
  477. static int rv3028_nvram_write(void *priv, unsigned int offset, void *val,
  478. size_t bytes)
  479. {
  480. return regmap_bulk_write(priv, RV3028_RAM1 + offset, val, bytes);
  481. }
  482. static int rv3028_nvram_read(void *priv, unsigned int offset, void *val,
  483. size_t bytes)
  484. {
  485. return regmap_bulk_read(priv, RV3028_RAM1 + offset, val, bytes);
  486. }
  487. static int rv3028_eeprom_write(void *priv, unsigned int offset, void *val,
  488. size_t bytes)
  489. {
  490. struct rv3028_data *rv3028 = priv;
  491. u32 status, eerd;
  492. int i, ret;
  493. u8 *buf = val;
  494. ret = rv3028_enter_eerd(rv3028, &eerd);
  495. if (ret)
  496. return ret;
  497. for (i = 0; i < bytes; i++) {
  498. ret = regmap_write(rv3028->regmap, RV3028_EEPROM_ADDR, offset + i);
  499. if (ret)
  500. goto restore_eerd;
  501. ret = regmap_write(rv3028->regmap, RV3028_EEPROM_DATA, buf[i]);
  502. if (ret)
  503. goto restore_eerd;
  504. ret = regmap_write(rv3028->regmap, RV3028_EEPROM_CMD, 0x0);
  505. if (ret)
  506. goto restore_eerd;
  507. ret = regmap_write(rv3028->regmap, RV3028_EEPROM_CMD,
  508. RV3028_EEPROM_CMD_WRITE);
  509. if (ret)
  510. goto restore_eerd;
  511. usleep_range(RV3028_EEBUSY_POLL, RV3028_EEBUSY_TIMEOUT);
  512. ret = regmap_read_poll_timeout(rv3028->regmap, RV3028_STATUS, status,
  513. !(status & RV3028_STATUS_EEBUSY),
  514. RV3028_EEBUSY_POLL,
  515. RV3028_EEBUSY_TIMEOUT);
  516. if (ret)
  517. goto restore_eerd;
  518. }
  519. restore_eerd:
  520. rv3028_exit_eerd(rv3028, eerd);
  521. return ret;
  522. }
  523. static int rv3028_eeprom_read(void *priv, unsigned int offset, void *val,
  524. size_t bytes)
  525. {
  526. struct rv3028_data *rv3028 = priv;
  527. u32 status, eerd, data;
  528. int i, ret;
  529. u8 *buf = val;
  530. ret = rv3028_enter_eerd(rv3028, &eerd);
  531. if (ret)
  532. return ret;
  533. for (i = 0; i < bytes; i++) {
  534. ret = regmap_write(rv3028->regmap, RV3028_EEPROM_ADDR, offset + i);
  535. if (ret)
  536. goto restore_eerd;
  537. ret = regmap_write(rv3028->regmap, RV3028_EEPROM_CMD, 0x0);
  538. if (ret)
  539. goto restore_eerd;
  540. ret = regmap_write(rv3028->regmap, RV3028_EEPROM_CMD,
  541. RV3028_EEPROM_CMD_READ);
  542. if (ret)
  543. goto restore_eerd;
  544. ret = regmap_read_poll_timeout(rv3028->regmap, RV3028_STATUS, status,
  545. !(status & RV3028_STATUS_EEBUSY),
  546. RV3028_EEBUSY_POLL,
  547. RV3028_EEBUSY_TIMEOUT);
  548. if (ret)
  549. goto restore_eerd;
  550. ret = regmap_read(rv3028->regmap, RV3028_EEPROM_DATA, &data);
  551. if (ret)
  552. goto restore_eerd;
  553. buf[i] = data;
  554. }
  555. restore_eerd:
  556. rv3028_exit_eerd(rv3028, eerd);
  557. return ret;
  558. }
  559. #ifdef CONFIG_COMMON_CLK
  560. #define clkout_hw_to_rv3028(hw) container_of(hw, struct rv3028_data, clkout_hw)
  561. static int clkout_rates[] = {
  562. 32768,
  563. 8192,
  564. 1024,
  565. 64,
  566. 32,
  567. 1,
  568. };
  569. static unsigned long rv3028_clkout_recalc_rate(struct clk_hw *hw,
  570. unsigned long parent_rate)
  571. {
  572. int clkout, ret;
  573. struct rv3028_data *rv3028 = clkout_hw_to_rv3028(hw);
  574. ret = regmap_read(rv3028->regmap, RV3028_CLKOUT, &clkout);
  575. if (ret < 0)
  576. return 0;
  577. clkout &= RV3028_CLKOUT_FD_MASK;
  578. return clkout_rates[clkout];
  579. }
  580. static long rv3028_clkout_round_rate(struct clk_hw *hw, unsigned long rate,
  581. unsigned long *prate)
  582. {
  583. int i;
  584. for (i = 0; i < ARRAY_SIZE(clkout_rates); i++)
  585. if (clkout_rates[i] <= rate)
  586. return clkout_rates[i];
  587. return 0;
  588. }
  589. static int rv3028_clkout_set_rate(struct clk_hw *hw, unsigned long rate,
  590. unsigned long parent_rate)
  591. {
  592. int i, ret;
  593. u32 enabled;
  594. struct rv3028_data *rv3028 = clkout_hw_to_rv3028(hw);
  595. ret = regmap_read(rv3028->regmap, RV3028_CLKOUT, &enabled);
  596. if (ret < 0)
  597. return ret;
  598. ret = regmap_write(rv3028->regmap, RV3028_CLKOUT, 0x0);
  599. if (ret < 0)
  600. return ret;
  601. enabled &= RV3028_CLKOUT_CLKOE;
  602. for (i = 0; i < ARRAY_SIZE(clkout_rates); i++)
  603. if (clkout_rates[i] == rate)
  604. return rv3028_update_cfg(rv3028, RV3028_CLKOUT, 0xff,
  605. RV3028_CLKOUT_CLKSY | enabled | i);
  606. return -EINVAL;
  607. }
  608. static int rv3028_clkout_prepare(struct clk_hw *hw)
  609. {
  610. struct rv3028_data *rv3028 = clkout_hw_to_rv3028(hw);
  611. return regmap_write(rv3028->regmap, RV3028_CLKOUT,
  612. RV3028_CLKOUT_CLKSY | RV3028_CLKOUT_CLKOE);
  613. }
  614. static void rv3028_clkout_unprepare(struct clk_hw *hw)
  615. {
  616. struct rv3028_data *rv3028 = clkout_hw_to_rv3028(hw);
  617. regmap_write(rv3028->regmap, RV3028_CLKOUT, 0x0);
  618. regmap_update_bits(rv3028->regmap, RV3028_STATUS,
  619. RV3028_STATUS_CLKF, 0);
  620. }
  621. static int rv3028_clkout_is_prepared(struct clk_hw *hw)
  622. {
  623. int clkout, ret;
  624. struct rv3028_data *rv3028 = clkout_hw_to_rv3028(hw);
  625. ret = regmap_read(rv3028->regmap, RV3028_CLKOUT, &clkout);
  626. if (ret < 0)
  627. return ret;
  628. return !!(clkout & RV3028_CLKOUT_CLKOE);
  629. }
  630. static const struct clk_ops rv3028_clkout_ops = {
  631. .prepare = rv3028_clkout_prepare,
  632. .unprepare = rv3028_clkout_unprepare,
  633. .is_prepared = rv3028_clkout_is_prepared,
  634. .recalc_rate = rv3028_clkout_recalc_rate,
  635. .round_rate = rv3028_clkout_round_rate,
  636. .set_rate = rv3028_clkout_set_rate,
  637. };
  638. static int rv3028_clkout_register_clk(struct rv3028_data *rv3028,
  639. struct i2c_client *client)
  640. {
  641. int ret;
  642. struct clk *clk;
  643. struct clk_init_data init;
  644. struct device_node *node = client->dev.of_node;
  645. ret = regmap_update_bits(rv3028->regmap, RV3028_STATUS,
  646. RV3028_STATUS_CLKF, 0);
  647. if (ret < 0)
  648. return ret;
  649. init.name = "rv3028-clkout";
  650. init.ops = &rv3028_clkout_ops;
  651. init.flags = 0;
  652. init.parent_names = NULL;
  653. init.num_parents = 0;
  654. rv3028->clkout_hw.init = &init;
  655. /* optional override of the clockname */
  656. of_property_read_string(node, "clock-output-names", &init.name);
  657. /* register the clock */
  658. clk = devm_clk_register(&client->dev, &rv3028->clkout_hw);
  659. if (!IS_ERR(clk))
  660. of_clk_add_provider(node, of_clk_src_simple_get, clk);
  661. return 0;
  662. }
  663. #endif
  664. static const struct rtc_class_ops rv3028_rtc_ops = {
  665. .read_time = rv3028_get_time,
  666. .set_time = rv3028_set_time,
  667. .read_alarm = rv3028_get_alarm,
  668. .set_alarm = rv3028_set_alarm,
  669. .alarm_irq_enable = rv3028_alarm_irq_enable,
  670. .read_offset = rv3028_read_offset,
  671. .set_offset = rv3028_set_offset,
  672. .ioctl = rv3028_ioctl,
  673. .param_get = rv3028_param_get,
  674. .param_set = rv3028_param_set,
  675. };
  676. static const struct regmap_config regmap_config = {
  677. .reg_bits = 8,
  678. .val_bits = 8,
  679. .max_register = 0x37,
  680. };
  681. static int rv3028_probe(struct i2c_client *client)
  682. {
  683. struct rv3028_data *rv3028;
  684. int ret, status;
  685. u32 ohms;
  686. struct nvmem_config nvmem_cfg = {
  687. .name = "rv3028_nvram",
  688. .word_size = 1,
  689. .stride = 1,
  690. .size = 2,
  691. .type = NVMEM_TYPE_BATTERY_BACKED,
  692. .reg_read = rv3028_nvram_read,
  693. .reg_write = rv3028_nvram_write,
  694. };
  695. struct nvmem_config eeprom_cfg = {
  696. .name = "rv3028_eeprom",
  697. .word_size = 1,
  698. .stride = 1,
  699. .size = 43,
  700. .type = NVMEM_TYPE_EEPROM,
  701. .reg_read = rv3028_eeprom_read,
  702. .reg_write = rv3028_eeprom_write,
  703. };
  704. rv3028 = devm_kzalloc(&client->dev, sizeof(struct rv3028_data),
  705. GFP_KERNEL);
  706. if (!rv3028)
  707. return -ENOMEM;
  708. rv3028->regmap = devm_regmap_init_i2c(client, &regmap_config);
  709. if (IS_ERR(rv3028->regmap))
  710. return PTR_ERR(rv3028->regmap);
  711. i2c_set_clientdata(client, rv3028);
  712. ret = regmap_read(rv3028->regmap, RV3028_STATUS, &status);
  713. if (ret < 0)
  714. return ret;
  715. if (status & RV3028_STATUS_AF)
  716. dev_warn(&client->dev, "An alarm may have been missed.\n");
  717. rv3028->rtc = devm_rtc_allocate_device(&client->dev);
  718. if (IS_ERR(rv3028->rtc))
  719. return PTR_ERR(rv3028->rtc);
  720. if (client->irq > 0) {
  721. ret = devm_request_threaded_irq(&client->dev, client->irq,
  722. NULL, rv3028_handle_irq,
  723. IRQF_TRIGGER_LOW | IRQF_ONESHOT,
  724. "rv3028", rv3028);
  725. if (ret) {
  726. dev_warn(&client->dev, "unable to request IRQ, alarms disabled\n");
  727. client->irq = 0;
  728. }
  729. }
  730. if (!client->irq)
  731. clear_bit(RTC_FEATURE_ALARM, rv3028->rtc->features);
  732. ret = regmap_update_bits(rv3028->regmap, RV3028_CTRL1,
  733. RV3028_CTRL1_WADA, RV3028_CTRL1_WADA);
  734. if (ret)
  735. return ret;
  736. /* setup timestamping */
  737. ret = regmap_update_bits(rv3028->regmap, RV3028_CTRL2,
  738. RV3028_CTRL2_EIE | RV3028_CTRL2_TSE,
  739. RV3028_CTRL2_EIE | RV3028_CTRL2_TSE);
  740. if (ret)
  741. return ret;
  742. /* setup trickle charger */
  743. if (!device_property_read_u32(&client->dev, "trickle-resistor-ohms",
  744. &ohms)) {
  745. int i;
  746. for (i = 0; i < ARRAY_SIZE(rv3028_trickle_resistors); i++)
  747. if (ohms == rv3028_trickle_resistors[i])
  748. break;
  749. if (i < ARRAY_SIZE(rv3028_trickle_resistors)) {
  750. ret = rv3028_update_cfg(rv3028, RV3028_BACKUP, RV3028_BACKUP_TCE |
  751. RV3028_BACKUP_TCR_MASK, RV3028_BACKUP_TCE | i);
  752. if (ret)
  753. return ret;
  754. } else {
  755. dev_warn(&client->dev, "invalid trickle resistor value\n");
  756. }
  757. }
  758. ret = rtc_add_group(rv3028->rtc, &rv3028_attr_group);
  759. if (ret)
  760. return ret;
  761. set_bit(RTC_FEATURE_BACKUP_SWITCH_MODE, rv3028->rtc->features);
  762. rv3028->rtc->range_min = RTC_TIMESTAMP_BEGIN_2000;
  763. rv3028->rtc->range_max = RTC_TIMESTAMP_END_2099;
  764. rv3028->rtc->ops = &rv3028_rtc_ops;
  765. ret = devm_rtc_register_device(rv3028->rtc);
  766. if (ret)
  767. return ret;
  768. nvmem_cfg.priv = rv3028->regmap;
  769. devm_rtc_nvmem_register(rv3028->rtc, &nvmem_cfg);
  770. eeprom_cfg.priv = rv3028;
  771. devm_rtc_nvmem_register(rv3028->rtc, &eeprom_cfg);
  772. rv3028->rtc->max_user_freq = 1;
  773. #ifdef CONFIG_COMMON_CLK
  774. rv3028_clkout_register_clk(rv3028, client);
  775. #endif
  776. return 0;
  777. }
  778. static const __maybe_unused struct of_device_id rv3028_of_match[] = {
  779. { .compatible = "microcrystal,rv3028", },
  780. { }
  781. };
  782. MODULE_DEVICE_TABLE(of, rv3028_of_match);
  783. static struct i2c_driver rv3028_driver = {
  784. .driver = {
  785. .name = "rtc-rv3028",
  786. .of_match_table = of_match_ptr(rv3028_of_match),
  787. },
  788. .probe_new = rv3028_probe,
  789. };
  790. module_i2c_driver(rv3028_driver);
  791. MODULE_AUTHOR("Alexandre Belloni <[email protected]>");
  792. MODULE_DESCRIPTION("Micro Crystal RV3028 RTC driver");
  793. MODULE_LICENSE("GPL v2");