rtc-pl031.c 12 KB

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  1. // SPDX-License-Identifier: GPL-2.0-or-later
  2. /*
  3. * drivers/rtc/rtc-pl031.c
  4. *
  5. * Real Time Clock interface for ARM AMBA PrimeCell 031 RTC
  6. *
  7. * Author: Deepak Saxena <[email protected]>
  8. *
  9. * Copyright 2006 (c) MontaVista Software, Inc.
  10. *
  11. * Author: Mian Yousaf Kaukab <[email protected]>
  12. * Copyright 2010 (c) ST-Ericsson AB
  13. */
  14. #include <linux/module.h>
  15. #include <linux/rtc.h>
  16. #include <linux/init.h>
  17. #include <linux/interrupt.h>
  18. #include <linux/amba/bus.h>
  19. #include <linux/io.h>
  20. #include <linux/bcd.h>
  21. #include <linux/delay.h>
  22. #include <linux/pm_wakeirq.h>
  23. #include <linux/slab.h>
  24. /*
  25. * Register definitions
  26. */
  27. #define RTC_DR 0x00 /* Data read register */
  28. #define RTC_MR 0x04 /* Match register */
  29. #define RTC_LR 0x08 /* Data load register */
  30. #define RTC_CR 0x0c /* Control register */
  31. #define RTC_IMSC 0x10 /* Interrupt mask and set register */
  32. #define RTC_RIS 0x14 /* Raw interrupt status register */
  33. #define RTC_MIS 0x18 /* Masked interrupt status register */
  34. #define RTC_ICR 0x1c /* Interrupt clear register */
  35. /* ST variants have additional timer functionality */
  36. #define RTC_TDR 0x20 /* Timer data read register */
  37. #define RTC_TLR 0x24 /* Timer data load register */
  38. #define RTC_TCR 0x28 /* Timer control register */
  39. #define RTC_YDR 0x30 /* Year data read register */
  40. #define RTC_YMR 0x34 /* Year match register */
  41. #define RTC_YLR 0x38 /* Year data load register */
  42. #define RTC_CR_EN (1 << 0) /* counter enable bit */
  43. #define RTC_CR_CWEN (1 << 26) /* Clockwatch enable bit */
  44. #define RTC_TCR_EN (1 << 1) /* Periodic timer enable bit */
  45. /* Common bit definitions for Interrupt status and control registers */
  46. #define RTC_BIT_AI (1 << 0) /* Alarm interrupt bit */
  47. #define RTC_BIT_PI (1 << 1) /* Periodic interrupt bit. ST variants only. */
  48. /* Common bit definations for ST v2 for reading/writing time */
  49. #define RTC_SEC_SHIFT 0
  50. #define RTC_SEC_MASK (0x3F << RTC_SEC_SHIFT) /* Second [0-59] */
  51. #define RTC_MIN_SHIFT 6
  52. #define RTC_MIN_MASK (0x3F << RTC_MIN_SHIFT) /* Minute [0-59] */
  53. #define RTC_HOUR_SHIFT 12
  54. #define RTC_HOUR_MASK (0x1F << RTC_HOUR_SHIFT) /* Hour [0-23] */
  55. #define RTC_WDAY_SHIFT 17
  56. #define RTC_WDAY_MASK (0x7 << RTC_WDAY_SHIFT) /* Day of Week [1-7] 1=Sunday */
  57. #define RTC_MDAY_SHIFT 20
  58. #define RTC_MDAY_MASK (0x1F << RTC_MDAY_SHIFT) /* Day of Month [1-31] */
  59. #define RTC_MON_SHIFT 25
  60. #define RTC_MON_MASK (0xF << RTC_MON_SHIFT) /* Month [1-12] 1=January */
  61. #define RTC_TIMER_FREQ 32768
  62. /**
  63. * struct pl031_vendor_data - per-vendor variations
  64. * @ops: the vendor-specific operations used on this silicon version
  65. * @clockwatch: if this is an ST Microelectronics silicon version with a
  66. * clockwatch function
  67. * @st_weekday: if this is an ST Microelectronics silicon version that need
  68. * the weekday fix
  69. * @irqflags: special IRQ flags per variant
  70. */
  71. struct pl031_vendor_data {
  72. struct rtc_class_ops ops;
  73. bool clockwatch;
  74. bool st_weekday;
  75. unsigned long irqflags;
  76. time64_t range_min;
  77. timeu64_t range_max;
  78. };
  79. struct pl031_local {
  80. struct pl031_vendor_data *vendor;
  81. struct rtc_device *rtc;
  82. void __iomem *base;
  83. };
  84. static int pl031_alarm_irq_enable(struct device *dev,
  85. unsigned int enabled)
  86. {
  87. struct pl031_local *ldata = dev_get_drvdata(dev);
  88. unsigned long imsc;
  89. /* Clear any pending alarm interrupts. */
  90. writel(RTC_BIT_AI, ldata->base + RTC_ICR);
  91. imsc = readl(ldata->base + RTC_IMSC);
  92. if (enabled == 1)
  93. writel(imsc | RTC_BIT_AI, ldata->base + RTC_IMSC);
  94. else
  95. writel(imsc & ~RTC_BIT_AI, ldata->base + RTC_IMSC);
  96. return 0;
  97. }
  98. /*
  99. * Convert Gregorian date to ST v2 RTC format.
  100. */
  101. static int pl031_stv2_tm_to_time(struct device *dev,
  102. struct rtc_time *tm, unsigned long *st_time,
  103. unsigned long *bcd_year)
  104. {
  105. int year = tm->tm_year + 1900;
  106. int wday = tm->tm_wday;
  107. /* wday masking is not working in hardware so wday must be valid */
  108. if (wday < -1 || wday > 6) {
  109. dev_err(dev, "invalid wday value %d\n", tm->tm_wday);
  110. return -EINVAL;
  111. } else if (wday == -1) {
  112. /* wday is not provided, calculate it here */
  113. struct rtc_time calc_tm;
  114. rtc_time64_to_tm(rtc_tm_to_time64(tm), &calc_tm);
  115. wday = calc_tm.tm_wday;
  116. }
  117. *bcd_year = (bin2bcd(year % 100) | bin2bcd(year / 100) << 8);
  118. *st_time = ((tm->tm_mon + 1) << RTC_MON_SHIFT)
  119. | (tm->tm_mday << RTC_MDAY_SHIFT)
  120. | ((wday + 1) << RTC_WDAY_SHIFT)
  121. | (tm->tm_hour << RTC_HOUR_SHIFT)
  122. | (tm->tm_min << RTC_MIN_SHIFT)
  123. | (tm->tm_sec << RTC_SEC_SHIFT);
  124. return 0;
  125. }
  126. /*
  127. * Convert ST v2 RTC format to Gregorian date.
  128. */
  129. static int pl031_stv2_time_to_tm(unsigned long st_time, unsigned long bcd_year,
  130. struct rtc_time *tm)
  131. {
  132. tm->tm_year = bcd2bin(bcd_year) + (bcd2bin(bcd_year >> 8) * 100);
  133. tm->tm_mon = ((st_time & RTC_MON_MASK) >> RTC_MON_SHIFT) - 1;
  134. tm->tm_mday = ((st_time & RTC_MDAY_MASK) >> RTC_MDAY_SHIFT);
  135. tm->tm_wday = ((st_time & RTC_WDAY_MASK) >> RTC_WDAY_SHIFT) - 1;
  136. tm->tm_hour = ((st_time & RTC_HOUR_MASK) >> RTC_HOUR_SHIFT);
  137. tm->tm_min = ((st_time & RTC_MIN_MASK) >> RTC_MIN_SHIFT);
  138. tm->tm_sec = ((st_time & RTC_SEC_MASK) >> RTC_SEC_SHIFT);
  139. tm->tm_yday = rtc_year_days(tm->tm_mday, tm->tm_mon, tm->tm_year);
  140. tm->tm_year -= 1900;
  141. return 0;
  142. }
  143. static int pl031_stv2_read_time(struct device *dev, struct rtc_time *tm)
  144. {
  145. struct pl031_local *ldata = dev_get_drvdata(dev);
  146. pl031_stv2_time_to_tm(readl(ldata->base + RTC_DR),
  147. readl(ldata->base + RTC_YDR), tm);
  148. return 0;
  149. }
  150. static int pl031_stv2_set_time(struct device *dev, struct rtc_time *tm)
  151. {
  152. unsigned long time;
  153. unsigned long bcd_year;
  154. struct pl031_local *ldata = dev_get_drvdata(dev);
  155. int ret;
  156. ret = pl031_stv2_tm_to_time(dev, tm, &time, &bcd_year);
  157. if (ret == 0) {
  158. writel(bcd_year, ldata->base + RTC_YLR);
  159. writel(time, ldata->base + RTC_LR);
  160. }
  161. return ret;
  162. }
  163. static int pl031_stv2_read_alarm(struct device *dev, struct rtc_wkalrm *alarm)
  164. {
  165. struct pl031_local *ldata = dev_get_drvdata(dev);
  166. int ret;
  167. ret = pl031_stv2_time_to_tm(readl(ldata->base + RTC_MR),
  168. readl(ldata->base + RTC_YMR), &alarm->time);
  169. alarm->pending = readl(ldata->base + RTC_RIS) & RTC_BIT_AI;
  170. alarm->enabled = readl(ldata->base + RTC_IMSC) & RTC_BIT_AI;
  171. return ret;
  172. }
  173. static int pl031_stv2_set_alarm(struct device *dev, struct rtc_wkalrm *alarm)
  174. {
  175. struct pl031_local *ldata = dev_get_drvdata(dev);
  176. unsigned long time;
  177. unsigned long bcd_year;
  178. int ret;
  179. ret = pl031_stv2_tm_to_time(dev, &alarm->time,
  180. &time, &bcd_year);
  181. if (ret == 0) {
  182. writel(bcd_year, ldata->base + RTC_YMR);
  183. writel(time, ldata->base + RTC_MR);
  184. pl031_alarm_irq_enable(dev, alarm->enabled);
  185. }
  186. return ret;
  187. }
  188. static irqreturn_t pl031_interrupt(int irq, void *dev_id)
  189. {
  190. struct pl031_local *ldata = dev_id;
  191. unsigned long rtcmis;
  192. unsigned long events = 0;
  193. rtcmis = readl(ldata->base + RTC_MIS);
  194. if (rtcmis & RTC_BIT_AI) {
  195. writel(RTC_BIT_AI, ldata->base + RTC_ICR);
  196. events |= (RTC_AF | RTC_IRQF);
  197. rtc_update_irq(ldata->rtc, 1, events);
  198. return IRQ_HANDLED;
  199. }
  200. return IRQ_NONE;
  201. }
  202. static int pl031_read_time(struct device *dev, struct rtc_time *tm)
  203. {
  204. struct pl031_local *ldata = dev_get_drvdata(dev);
  205. rtc_time64_to_tm(readl(ldata->base + RTC_DR), tm);
  206. return 0;
  207. }
  208. static int pl031_set_time(struct device *dev, struct rtc_time *tm)
  209. {
  210. struct pl031_local *ldata = dev_get_drvdata(dev);
  211. writel(rtc_tm_to_time64(tm), ldata->base + RTC_LR);
  212. return 0;
  213. }
  214. static int pl031_read_alarm(struct device *dev, struct rtc_wkalrm *alarm)
  215. {
  216. struct pl031_local *ldata = dev_get_drvdata(dev);
  217. rtc_time64_to_tm(readl(ldata->base + RTC_MR), &alarm->time);
  218. alarm->pending = readl(ldata->base + RTC_RIS) & RTC_BIT_AI;
  219. alarm->enabled = readl(ldata->base + RTC_IMSC) & RTC_BIT_AI;
  220. return 0;
  221. }
  222. static int pl031_set_alarm(struct device *dev, struct rtc_wkalrm *alarm)
  223. {
  224. struct pl031_local *ldata = dev_get_drvdata(dev);
  225. writel(rtc_tm_to_time64(&alarm->time), ldata->base + RTC_MR);
  226. pl031_alarm_irq_enable(dev, alarm->enabled);
  227. return 0;
  228. }
  229. static void pl031_remove(struct amba_device *adev)
  230. {
  231. struct pl031_local *ldata = dev_get_drvdata(&adev->dev);
  232. dev_pm_clear_wake_irq(&adev->dev);
  233. device_init_wakeup(&adev->dev, false);
  234. if (adev->irq[0])
  235. free_irq(adev->irq[0], ldata);
  236. amba_release_regions(adev);
  237. }
  238. static int pl031_probe(struct amba_device *adev, const struct amba_id *id)
  239. {
  240. int ret;
  241. struct pl031_local *ldata;
  242. struct pl031_vendor_data *vendor = id->data;
  243. struct rtc_class_ops *ops;
  244. unsigned long time, data;
  245. ret = amba_request_regions(adev, NULL);
  246. if (ret)
  247. goto err_req;
  248. ldata = devm_kzalloc(&adev->dev, sizeof(struct pl031_local),
  249. GFP_KERNEL);
  250. ops = devm_kmemdup(&adev->dev, &vendor->ops, sizeof(vendor->ops),
  251. GFP_KERNEL);
  252. if (!ldata || !ops) {
  253. ret = -ENOMEM;
  254. goto out;
  255. }
  256. ldata->vendor = vendor;
  257. ldata->base = devm_ioremap(&adev->dev, adev->res.start,
  258. resource_size(&adev->res));
  259. if (!ldata->base) {
  260. ret = -ENOMEM;
  261. goto out;
  262. }
  263. amba_set_drvdata(adev, ldata);
  264. dev_dbg(&adev->dev, "designer ID = 0x%02x\n", amba_manf(adev));
  265. dev_dbg(&adev->dev, "revision = 0x%01x\n", amba_rev(adev));
  266. data = readl(ldata->base + RTC_CR);
  267. /* Enable the clockwatch on ST Variants */
  268. if (vendor->clockwatch)
  269. data |= RTC_CR_CWEN;
  270. else
  271. data |= RTC_CR_EN;
  272. writel(data, ldata->base + RTC_CR);
  273. /*
  274. * On ST PL031 variants, the RTC reset value does not provide correct
  275. * weekday for 2000-01-01. Correct the erroneous sunday to saturday.
  276. */
  277. if (vendor->st_weekday) {
  278. if (readl(ldata->base + RTC_YDR) == 0x2000) {
  279. time = readl(ldata->base + RTC_DR);
  280. if ((time &
  281. (RTC_MON_MASK | RTC_MDAY_MASK | RTC_WDAY_MASK))
  282. == 0x02120000) {
  283. time = time | (0x7 << RTC_WDAY_SHIFT);
  284. writel(0x2000, ldata->base + RTC_YLR);
  285. writel(time, ldata->base + RTC_LR);
  286. }
  287. }
  288. }
  289. device_init_wakeup(&adev->dev, true);
  290. ldata->rtc = devm_rtc_allocate_device(&adev->dev);
  291. if (IS_ERR(ldata->rtc)) {
  292. ret = PTR_ERR(ldata->rtc);
  293. goto out;
  294. }
  295. if (!adev->irq[0])
  296. clear_bit(RTC_FEATURE_ALARM, ldata->rtc->features);
  297. ldata->rtc->ops = ops;
  298. ldata->rtc->range_min = vendor->range_min;
  299. ldata->rtc->range_max = vendor->range_max;
  300. ret = devm_rtc_register_device(ldata->rtc);
  301. if (ret)
  302. goto out;
  303. if (adev->irq[0]) {
  304. ret = request_irq(adev->irq[0], pl031_interrupt,
  305. vendor->irqflags, "rtc-pl031", ldata);
  306. if (ret)
  307. goto out;
  308. dev_pm_set_wake_irq(&adev->dev, adev->irq[0]);
  309. }
  310. return 0;
  311. out:
  312. amba_release_regions(adev);
  313. err_req:
  314. return ret;
  315. }
  316. /* Operations for the original ARM version */
  317. static struct pl031_vendor_data arm_pl031 = {
  318. .ops = {
  319. .read_time = pl031_read_time,
  320. .set_time = pl031_set_time,
  321. .read_alarm = pl031_read_alarm,
  322. .set_alarm = pl031_set_alarm,
  323. .alarm_irq_enable = pl031_alarm_irq_enable,
  324. },
  325. .range_max = U32_MAX,
  326. };
  327. /* The First ST derivative */
  328. static struct pl031_vendor_data stv1_pl031 = {
  329. .ops = {
  330. .read_time = pl031_read_time,
  331. .set_time = pl031_set_time,
  332. .read_alarm = pl031_read_alarm,
  333. .set_alarm = pl031_set_alarm,
  334. .alarm_irq_enable = pl031_alarm_irq_enable,
  335. },
  336. .clockwatch = true,
  337. .st_weekday = true,
  338. .range_max = U32_MAX,
  339. };
  340. /* And the second ST derivative */
  341. static struct pl031_vendor_data stv2_pl031 = {
  342. .ops = {
  343. .read_time = pl031_stv2_read_time,
  344. .set_time = pl031_stv2_set_time,
  345. .read_alarm = pl031_stv2_read_alarm,
  346. .set_alarm = pl031_stv2_set_alarm,
  347. .alarm_irq_enable = pl031_alarm_irq_enable,
  348. },
  349. .clockwatch = true,
  350. .st_weekday = true,
  351. /*
  352. * This variant shares the IRQ with another block and must not
  353. * suspend that IRQ line.
  354. * TODO check if it shares with IRQF_NO_SUSPEND user, else we can
  355. * remove IRQF_COND_SUSPEND
  356. */
  357. .irqflags = IRQF_SHARED | IRQF_COND_SUSPEND,
  358. .range_min = RTC_TIMESTAMP_BEGIN_0000,
  359. .range_max = RTC_TIMESTAMP_END_9999,
  360. };
  361. static const struct amba_id pl031_ids[] = {
  362. {
  363. .id = 0x00041031,
  364. .mask = 0x000fffff,
  365. .data = &arm_pl031,
  366. },
  367. /* ST Micro variants */
  368. {
  369. .id = 0x00180031,
  370. .mask = 0x00ffffff,
  371. .data = &stv1_pl031,
  372. },
  373. {
  374. .id = 0x00280031,
  375. .mask = 0x00ffffff,
  376. .data = &stv2_pl031,
  377. },
  378. {0, 0},
  379. };
  380. MODULE_DEVICE_TABLE(amba, pl031_ids);
  381. static struct amba_driver pl031_driver = {
  382. .drv = {
  383. .name = "rtc-pl031",
  384. },
  385. .id_table = pl031_ids,
  386. .probe = pl031_probe,
  387. .remove = pl031_remove,
  388. };
  389. module_amba_driver(pl031_driver);
  390. MODULE_AUTHOR("Deepak Saxena <[email protected]>");
  391. MODULE_DESCRIPTION("ARM AMBA PL031 RTC Driver");
  392. MODULE_LICENSE("GPL");