rtc-pcf8523.c 12 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (C) 2012 Avionic Design GmbH
  4. */
  5. #include <linux/bcd.h>
  6. #include <linux/bitfield.h>
  7. #include <linux/i2c.h>
  8. #include <linux/module.h>
  9. #include <linux/regmap.h>
  10. #include <linux/rtc.h>
  11. #include <linux/of.h>
  12. #include <linux/pm_wakeirq.h>
  13. #define PCF8523_REG_CONTROL1 0x00
  14. #define PCF8523_CONTROL1_CAP_SEL BIT(7)
  15. #define PCF8523_CONTROL1_STOP BIT(5)
  16. #define PCF8523_CONTROL1_AIE BIT(1)
  17. #define PCF8523_REG_CONTROL2 0x01
  18. #define PCF8523_CONTROL2_AF BIT(3)
  19. #define PCF8523_REG_CONTROL3 0x02
  20. #define PCF8523_CONTROL3_PM GENMASK(7,5)
  21. #define PCF8523_PM_STANDBY 0x7
  22. #define PCF8523_CONTROL3_BLF BIT(2) /* battery low bit, read-only */
  23. #define PCF8523_CONTROL3_BSF BIT(3)
  24. #define PCF8523_REG_SECONDS 0x03
  25. #define PCF8523_SECONDS_OS BIT(7)
  26. #define PCF8523_REG_MINUTES 0x04
  27. #define PCF8523_REG_HOURS 0x05
  28. #define PCF8523_REG_DAYS 0x06
  29. #define PCF8523_REG_WEEKDAYS 0x07
  30. #define PCF8523_REG_MONTHS 0x08
  31. #define PCF8523_REG_YEARS 0x09
  32. #define PCF8523_REG_MINUTE_ALARM 0x0a
  33. #define PCF8523_REG_HOUR_ALARM 0x0b
  34. #define PCF8523_REG_DAY_ALARM 0x0c
  35. #define PCF8523_REG_WEEKDAY_ALARM 0x0d
  36. #define ALARM_DIS BIT(7)
  37. #define PCF8523_REG_OFFSET 0x0e
  38. #define PCF8523_OFFSET_MODE BIT(7)
  39. #define PCF8523_TMR_CLKOUT_CTRL 0x0f
  40. struct pcf8523 {
  41. struct rtc_device *rtc;
  42. struct regmap *regmap;
  43. };
  44. static int pcf8523_load_capacitance(struct pcf8523 *pcf8523, struct device_node *node)
  45. {
  46. u32 load, value = 0;
  47. load = 12500;
  48. of_property_read_u32(node, "quartz-load-femtofarads", &load);
  49. switch (load) {
  50. default:
  51. dev_warn(&pcf8523->rtc->dev, "Unknown quartz-load-femtofarads value: %d. Assuming 12500",
  52. load);
  53. fallthrough;
  54. case 12500:
  55. value |= PCF8523_CONTROL1_CAP_SEL;
  56. break;
  57. case 7000:
  58. break;
  59. }
  60. return regmap_update_bits(pcf8523->regmap, PCF8523_REG_CONTROL1,
  61. PCF8523_CONTROL1_CAP_SEL, value);
  62. }
  63. static irqreturn_t pcf8523_irq(int irq, void *dev_id)
  64. {
  65. struct pcf8523 *pcf8523 = dev_id;
  66. u32 value;
  67. int err;
  68. err = regmap_read(pcf8523->regmap, PCF8523_REG_CONTROL2, &value);
  69. if (err < 0)
  70. return IRQ_HANDLED;
  71. if (value & PCF8523_CONTROL2_AF) {
  72. value &= ~PCF8523_CONTROL2_AF;
  73. regmap_write(pcf8523->regmap, PCF8523_REG_CONTROL2, value);
  74. rtc_update_irq(pcf8523->rtc, 1, RTC_IRQF | RTC_AF);
  75. return IRQ_HANDLED;
  76. }
  77. return IRQ_NONE;
  78. }
  79. static int pcf8523_rtc_read_time(struct device *dev, struct rtc_time *tm)
  80. {
  81. struct pcf8523 *pcf8523 = dev_get_drvdata(dev);
  82. u8 regs[7];
  83. int err;
  84. err = regmap_bulk_read(pcf8523->regmap, PCF8523_REG_SECONDS, regs,
  85. sizeof(regs));
  86. if (err < 0)
  87. return err;
  88. if (regs[0] & PCF8523_SECONDS_OS)
  89. return -EINVAL;
  90. tm->tm_sec = bcd2bin(regs[0] & 0x7f);
  91. tm->tm_min = bcd2bin(regs[1] & 0x7f);
  92. tm->tm_hour = bcd2bin(regs[2] & 0x3f);
  93. tm->tm_mday = bcd2bin(regs[3] & 0x3f);
  94. tm->tm_wday = regs[4] & 0x7;
  95. tm->tm_mon = bcd2bin(regs[5] & 0x1f) - 1;
  96. tm->tm_year = bcd2bin(regs[6]) + 100;
  97. return 0;
  98. }
  99. static int pcf8523_rtc_set_time(struct device *dev, struct rtc_time *tm)
  100. {
  101. struct pcf8523 *pcf8523 = dev_get_drvdata(dev);
  102. u8 regs[7];
  103. int err;
  104. err = regmap_update_bits(pcf8523->regmap, PCF8523_REG_CONTROL1,
  105. PCF8523_CONTROL1_STOP, PCF8523_CONTROL1_STOP);
  106. if (err < 0)
  107. return err;
  108. /* This will purposely overwrite PCF8523_SECONDS_OS */
  109. regs[0] = bin2bcd(tm->tm_sec);
  110. regs[1] = bin2bcd(tm->tm_min);
  111. regs[2] = bin2bcd(tm->tm_hour);
  112. regs[3] = bin2bcd(tm->tm_mday);
  113. regs[4] = tm->tm_wday;
  114. regs[5] = bin2bcd(tm->tm_mon + 1);
  115. regs[6] = bin2bcd(tm->tm_year - 100);
  116. err = regmap_bulk_write(pcf8523->regmap, PCF8523_REG_SECONDS, regs,
  117. sizeof(regs));
  118. if (err < 0) {
  119. /*
  120. * If the time cannot be set, restart the RTC anyway. Note
  121. * that errors are ignored if the RTC cannot be started so
  122. * that we have a chance to propagate the original error.
  123. */
  124. regmap_update_bits(pcf8523->regmap, PCF8523_REG_CONTROL1,
  125. PCF8523_CONTROL1_STOP, 0);
  126. return err;
  127. }
  128. return regmap_update_bits(pcf8523->regmap, PCF8523_REG_CONTROL1,
  129. PCF8523_CONTROL1_STOP, 0);
  130. }
  131. static int pcf8523_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *tm)
  132. {
  133. struct pcf8523 *pcf8523 = dev_get_drvdata(dev);
  134. u8 regs[4];
  135. u32 value;
  136. int err;
  137. err = regmap_bulk_read(pcf8523->regmap, PCF8523_REG_MINUTE_ALARM, regs,
  138. sizeof(regs));
  139. if (err < 0)
  140. return err;
  141. tm->time.tm_sec = 0;
  142. tm->time.tm_min = bcd2bin(regs[0] & 0x7F);
  143. tm->time.tm_hour = bcd2bin(regs[1] & 0x3F);
  144. tm->time.tm_mday = bcd2bin(regs[2] & 0x3F);
  145. tm->time.tm_wday = bcd2bin(regs[3] & 0x7);
  146. err = regmap_read(pcf8523->regmap, PCF8523_REG_CONTROL1, &value);
  147. if (err < 0)
  148. return err;
  149. tm->enabled = !!(value & PCF8523_CONTROL1_AIE);
  150. err = regmap_read(pcf8523->regmap, PCF8523_REG_CONTROL2, &value);
  151. if (err < 0)
  152. return err;
  153. tm->pending = !!(value & PCF8523_CONTROL2_AF);
  154. return 0;
  155. }
  156. static int pcf8523_irq_enable(struct device *dev, unsigned int enabled)
  157. {
  158. struct pcf8523 *pcf8523 = dev_get_drvdata(dev);
  159. return regmap_update_bits(pcf8523->regmap, PCF8523_REG_CONTROL1,
  160. PCF8523_CONTROL1_AIE, enabled ?
  161. PCF8523_CONTROL1_AIE : 0);
  162. }
  163. static int pcf8523_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *tm)
  164. {
  165. struct pcf8523 *pcf8523 = dev_get_drvdata(dev);
  166. u8 regs[5];
  167. int err;
  168. err = pcf8523_irq_enable(dev, 0);
  169. if (err)
  170. return err;
  171. err = regmap_write(pcf8523->regmap, PCF8523_REG_CONTROL2, 0);
  172. if (err < 0)
  173. return err;
  174. regs[0] = bin2bcd(tm->time.tm_min);
  175. regs[1] = bin2bcd(tm->time.tm_hour);
  176. regs[2] = bin2bcd(tm->time.tm_mday);
  177. regs[3] = ALARM_DIS;
  178. err = regmap_bulk_write(pcf8523->regmap, PCF8523_REG_MINUTE_ALARM, regs,
  179. sizeof(regs));
  180. if (err < 0)
  181. return err;
  182. if (tm->enabled)
  183. return pcf8523_irq_enable(dev, tm->enabled);
  184. return 0;
  185. }
  186. static int pcf8523_param_get(struct device *dev, struct rtc_param *param)
  187. {
  188. struct pcf8523 *pcf8523 = dev_get_drvdata(dev);
  189. int ret;
  190. u32 value;
  191. switch(param->param) {
  192. case RTC_PARAM_BACKUP_SWITCH_MODE:
  193. ret = regmap_read(pcf8523->regmap, PCF8523_REG_CONTROL3, &value);
  194. if (ret < 0)
  195. return ret;
  196. value = FIELD_GET(PCF8523_CONTROL3_PM, value);
  197. switch(value) {
  198. case 0x0:
  199. case 0x4:
  200. param->uvalue = RTC_BSM_LEVEL;
  201. break;
  202. case 0x1:
  203. case 0x5:
  204. param->uvalue = RTC_BSM_DIRECT;
  205. break;
  206. case PCF8523_PM_STANDBY:
  207. param->uvalue = RTC_BSM_STANDBY;
  208. break;
  209. default:
  210. param->uvalue = RTC_BSM_DISABLED;
  211. }
  212. break;
  213. default:
  214. return -EINVAL;
  215. }
  216. return 0;
  217. }
  218. static int pcf8523_param_set(struct device *dev, struct rtc_param *param)
  219. {
  220. struct pcf8523 *pcf8523 = dev_get_drvdata(dev);
  221. u8 mode;
  222. switch(param->param) {
  223. case RTC_PARAM_BACKUP_SWITCH_MODE:
  224. switch (param->uvalue) {
  225. case RTC_BSM_DISABLED:
  226. mode = 0x2;
  227. break;
  228. case RTC_BSM_DIRECT:
  229. mode = 0x1;
  230. break;
  231. case RTC_BSM_LEVEL:
  232. mode = 0x0;
  233. break;
  234. case RTC_BSM_STANDBY:
  235. mode = PCF8523_PM_STANDBY;
  236. break;
  237. default:
  238. return -EINVAL;
  239. }
  240. return regmap_update_bits(pcf8523->regmap, PCF8523_REG_CONTROL3,
  241. PCF8523_CONTROL3_PM,
  242. FIELD_PREP(PCF8523_CONTROL3_PM, mode));
  243. break;
  244. default:
  245. return -EINVAL;
  246. }
  247. return 0;
  248. }
  249. static int pcf8523_rtc_ioctl(struct device *dev, unsigned int cmd,
  250. unsigned long arg)
  251. {
  252. struct pcf8523 *pcf8523 = dev_get_drvdata(dev);
  253. unsigned int flags = 0;
  254. u32 value;
  255. int ret;
  256. switch (cmd) {
  257. case RTC_VL_READ:
  258. ret = regmap_read(pcf8523->regmap, PCF8523_REG_CONTROL3, &value);
  259. if (ret < 0)
  260. return ret;
  261. if (value & PCF8523_CONTROL3_BLF)
  262. flags |= RTC_VL_BACKUP_LOW;
  263. ret = regmap_read(pcf8523->regmap, PCF8523_REG_SECONDS, &value);
  264. if (ret < 0)
  265. return ret;
  266. if (value & PCF8523_SECONDS_OS)
  267. flags |= RTC_VL_DATA_INVALID;
  268. return put_user(flags, (unsigned int __user *)arg);
  269. default:
  270. return -ENOIOCTLCMD;
  271. }
  272. }
  273. static int pcf8523_rtc_read_offset(struct device *dev, long *offset)
  274. {
  275. struct pcf8523 *pcf8523 = dev_get_drvdata(dev);
  276. int err;
  277. u32 value;
  278. s8 val;
  279. err = regmap_read(pcf8523->regmap, PCF8523_REG_OFFSET, &value);
  280. if (err < 0)
  281. return err;
  282. /* sign extend the 7-bit offset value */
  283. val = value << 1;
  284. *offset = (value & PCF8523_OFFSET_MODE ? 4069 : 4340) * (val >> 1);
  285. return 0;
  286. }
  287. static int pcf8523_rtc_set_offset(struct device *dev, long offset)
  288. {
  289. struct pcf8523 *pcf8523 = dev_get_drvdata(dev);
  290. long reg_m0, reg_m1;
  291. u32 value;
  292. reg_m0 = clamp(DIV_ROUND_CLOSEST(offset, 4340), -64L, 63L);
  293. reg_m1 = clamp(DIV_ROUND_CLOSEST(offset, 4069), -64L, 63L);
  294. if (abs(reg_m0 * 4340 - offset) < abs(reg_m1 * 4069 - offset))
  295. value = reg_m0 & 0x7f;
  296. else
  297. value = (reg_m1 & 0x7f) | PCF8523_OFFSET_MODE;
  298. return regmap_write(pcf8523->regmap, PCF8523_REG_OFFSET, value);
  299. }
  300. static const struct rtc_class_ops pcf8523_rtc_ops = {
  301. .read_time = pcf8523_rtc_read_time,
  302. .set_time = pcf8523_rtc_set_time,
  303. .read_alarm = pcf8523_rtc_read_alarm,
  304. .set_alarm = pcf8523_rtc_set_alarm,
  305. .alarm_irq_enable = pcf8523_irq_enable,
  306. .ioctl = pcf8523_rtc_ioctl,
  307. .read_offset = pcf8523_rtc_read_offset,
  308. .set_offset = pcf8523_rtc_set_offset,
  309. .param_get = pcf8523_param_get,
  310. .param_set = pcf8523_param_set,
  311. };
  312. static const struct regmap_config regmap_config = {
  313. .reg_bits = 8,
  314. .val_bits = 8,
  315. .max_register = 0x13,
  316. };
  317. static int pcf8523_probe(struct i2c_client *client)
  318. {
  319. struct pcf8523 *pcf8523;
  320. struct rtc_device *rtc;
  321. bool wakeup_source = false;
  322. u32 value;
  323. int err;
  324. if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C))
  325. return -ENODEV;
  326. pcf8523 = devm_kzalloc(&client->dev, sizeof(struct pcf8523), GFP_KERNEL);
  327. if (!pcf8523)
  328. return -ENOMEM;
  329. pcf8523->regmap = devm_regmap_init_i2c(client, &regmap_config);
  330. if (IS_ERR(pcf8523->regmap))
  331. return PTR_ERR(pcf8523->regmap);
  332. i2c_set_clientdata(client, pcf8523);
  333. rtc = devm_rtc_allocate_device(&client->dev);
  334. if (IS_ERR(rtc))
  335. return PTR_ERR(rtc);
  336. pcf8523->rtc = rtc;
  337. err = pcf8523_load_capacitance(pcf8523, client->dev.of_node);
  338. if (err < 0)
  339. dev_warn(&client->dev, "failed to set xtal load capacitance: %d",
  340. err);
  341. err = regmap_read(pcf8523->regmap, PCF8523_REG_SECONDS, &value);
  342. if (err < 0)
  343. return err;
  344. if (value & PCF8523_SECONDS_OS) {
  345. err = regmap_read(pcf8523->regmap, PCF8523_REG_CONTROL3, &value);
  346. if (err < 0)
  347. return err;
  348. if (FIELD_GET(PCF8523_CONTROL3_PM, value) == PCF8523_PM_STANDBY) {
  349. err = regmap_write(pcf8523->regmap, PCF8523_REG_CONTROL3,
  350. value & ~PCF8523_CONTROL3_PM);
  351. if (err < 0)
  352. return err;
  353. }
  354. }
  355. rtc->ops = &pcf8523_rtc_ops;
  356. rtc->range_min = RTC_TIMESTAMP_BEGIN_2000;
  357. rtc->range_max = RTC_TIMESTAMP_END_2099;
  358. set_bit(RTC_FEATURE_ALARM_RES_MINUTE, rtc->features);
  359. clear_bit(RTC_FEATURE_UPDATE_INTERRUPT, rtc->features);
  360. if (client->irq > 0) {
  361. err = regmap_write(pcf8523->regmap, PCF8523_TMR_CLKOUT_CTRL, 0x38);
  362. if (err < 0)
  363. return err;
  364. err = devm_request_threaded_irq(&client->dev, client->irq,
  365. NULL, pcf8523_irq,
  366. IRQF_SHARED | IRQF_ONESHOT | IRQF_TRIGGER_LOW,
  367. dev_name(&rtc->dev), pcf8523);
  368. if (err)
  369. return err;
  370. dev_pm_set_wake_irq(&client->dev, client->irq);
  371. }
  372. wakeup_source = of_property_read_bool(client->dev.of_node, "wakeup-source");
  373. if (client->irq > 0 || wakeup_source)
  374. device_init_wakeup(&client->dev, true);
  375. return devm_rtc_register_device(rtc);
  376. }
  377. static const struct i2c_device_id pcf8523_id[] = {
  378. { "pcf8523", 0 },
  379. { }
  380. };
  381. MODULE_DEVICE_TABLE(i2c, pcf8523_id);
  382. static const struct of_device_id pcf8523_of_match[] = {
  383. { .compatible = "nxp,pcf8523" },
  384. { .compatible = "microcrystal,rv8523" },
  385. { }
  386. };
  387. MODULE_DEVICE_TABLE(of, pcf8523_of_match);
  388. static struct i2c_driver pcf8523_driver = {
  389. .driver = {
  390. .name = "rtc-pcf8523",
  391. .of_match_table = pcf8523_of_match,
  392. },
  393. .probe_new = pcf8523_probe,
  394. .id_table = pcf8523_id,
  395. };
  396. module_i2c_driver(pcf8523_driver);
  397. MODULE_AUTHOR("Thierry Reding <[email protected]>");
  398. MODULE_DESCRIPTION("NXP PCF8523 RTC driver");
  399. MODULE_LICENSE("GPL v2");