rtc-m41t80.c 26 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * I2C client/driver for the ST M41T80 family of i2c rtc chips.
  4. *
  5. * Author: Alexander Bigga <[email protected]>
  6. *
  7. * Based on m41t00.c by Mark A. Greer <[email protected]>
  8. *
  9. * 2006 (c) mycable GmbH
  10. */
  11. #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  12. #include <linux/bcd.h>
  13. #include <linux/clk-provider.h>
  14. #include <linux/i2c.h>
  15. #include <linux/init.h>
  16. #include <linux/kernel.h>
  17. #include <linux/module.h>
  18. #include <linux/of_device.h>
  19. #include <linux/rtc.h>
  20. #include <linux/slab.h>
  21. #include <linux/mutex.h>
  22. #include <linux/string.h>
  23. #ifdef CONFIG_RTC_DRV_M41T80_WDT
  24. #include <linux/fs.h>
  25. #include <linux/ioctl.h>
  26. #include <linux/miscdevice.h>
  27. #include <linux/reboot.h>
  28. #include <linux/watchdog.h>
  29. #endif
  30. #define M41T80_REG_SSEC 0x00
  31. #define M41T80_REG_SEC 0x01
  32. #define M41T80_REG_MIN 0x02
  33. #define M41T80_REG_HOUR 0x03
  34. #define M41T80_REG_WDAY 0x04
  35. #define M41T80_REG_DAY 0x05
  36. #define M41T80_REG_MON 0x06
  37. #define M41T80_REG_YEAR 0x07
  38. #define M41T80_REG_ALARM_MON 0x0a
  39. #define M41T80_REG_ALARM_DAY 0x0b
  40. #define M41T80_REG_ALARM_HOUR 0x0c
  41. #define M41T80_REG_ALARM_MIN 0x0d
  42. #define M41T80_REG_ALARM_SEC 0x0e
  43. #define M41T80_REG_FLAGS 0x0f
  44. #define M41T80_REG_SQW 0x13
  45. #define M41T80_DATETIME_REG_SIZE (M41T80_REG_YEAR + 1)
  46. #define M41T80_ALARM_REG_SIZE \
  47. (M41T80_REG_ALARM_SEC + 1 - M41T80_REG_ALARM_MON)
  48. #define M41T80_SQW_MAX_FREQ 32768
  49. #define M41T80_SEC_ST BIT(7) /* ST: Stop Bit */
  50. #define M41T80_ALMON_AFE BIT(7) /* AFE: AF Enable Bit */
  51. #define M41T80_ALMON_SQWE BIT(6) /* SQWE: SQW Enable Bit */
  52. #define M41T80_ALHOUR_HT BIT(6) /* HT: Halt Update Bit */
  53. #define M41T80_FLAGS_OF BIT(2) /* OF: Oscillator Failure Bit */
  54. #define M41T80_FLAGS_AF BIT(6) /* AF: Alarm Flag Bit */
  55. #define M41T80_FLAGS_BATT_LOW BIT(4) /* BL: Battery Low Bit */
  56. #define M41T80_WATCHDOG_RB2 BIT(7) /* RB: Watchdog resolution */
  57. #define M41T80_WATCHDOG_RB1 BIT(1) /* RB: Watchdog resolution */
  58. #define M41T80_WATCHDOG_RB0 BIT(0) /* RB: Watchdog resolution */
  59. #define M41T80_FEATURE_HT BIT(0) /* Halt feature */
  60. #define M41T80_FEATURE_BL BIT(1) /* Battery low indicator */
  61. #define M41T80_FEATURE_SQ BIT(2) /* Squarewave feature */
  62. #define M41T80_FEATURE_WD BIT(3) /* Extra watchdog resolution */
  63. #define M41T80_FEATURE_SQ_ALT BIT(4) /* RSx bits are in reg 4 */
  64. static const struct i2c_device_id m41t80_id[] = {
  65. { "m41t62", M41T80_FEATURE_SQ | M41T80_FEATURE_SQ_ALT },
  66. { "m41t65", M41T80_FEATURE_HT | M41T80_FEATURE_WD },
  67. { "m41t80", M41T80_FEATURE_SQ },
  68. { "m41t81", M41T80_FEATURE_HT | M41T80_FEATURE_SQ},
  69. { "m41t81s", M41T80_FEATURE_HT | M41T80_FEATURE_BL | M41T80_FEATURE_SQ },
  70. { "m41t82", M41T80_FEATURE_HT | M41T80_FEATURE_BL | M41T80_FEATURE_SQ },
  71. { "m41t83", M41T80_FEATURE_HT | M41T80_FEATURE_BL | M41T80_FEATURE_SQ },
  72. { "m41st84", M41T80_FEATURE_HT | M41T80_FEATURE_BL | M41T80_FEATURE_SQ },
  73. { "m41st85", M41T80_FEATURE_HT | M41T80_FEATURE_BL | M41T80_FEATURE_SQ },
  74. { "m41st87", M41T80_FEATURE_HT | M41T80_FEATURE_BL | M41T80_FEATURE_SQ },
  75. { "rv4162", M41T80_FEATURE_SQ | M41T80_FEATURE_WD | M41T80_FEATURE_SQ_ALT },
  76. { }
  77. };
  78. MODULE_DEVICE_TABLE(i2c, m41t80_id);
  79. static const __maybe_unused struct of_device_id m41t80_of_match[] = {
  80. {
  81. .compatible = "st,m41t62",
  82. .data = (void *)(M41T80_FEATURE_SQ | M41T80_FEATURE_SQ_ALT)
  83. },
  84. {
  85. .compatible = "st,m41t65",
  86. .data = (void *)(M41T80_FEATURE_HT | M41T80_FEATURE_WD)
  87. },
  88. {
  89. .compatible = "st,m41t80",
  90. .data = (void *)(M41T80_FEATURE_SQ)
  91. },
  92. {
  93. .compatible = "st,m41t81",
  94. .data = (void *)(M41T80_FEATURE_HT | M41T80_FEATURE_SQ)
  95. },
  96. {
  97. .compatible = "st,m41t81s",
  98. .data = (void *)(M41T80_FEATURE_HT | M41T80_FEATURE_BL | M41T80_FEATURE_SQ)
  99. },
  100. {
  101. .compatible = "st,m41t82",
  102. .data = (void *)(M41T80_FEATURE_HT | M41T80_FEATURE_BL | M41T80_FEATURE_SQ)
  103. },
  104. {
  105. .compatible = "st,m41t83",
  106. .data = (void *)(M41T80_FEATURE_HT | M41T80_FEATURE_BL | M41T80_FEATURE_SQ)
  107. },
  108. {
  109. .compatible = "st,m41t84",
  110. .data = (void *)(M41T80_FEATURE_HT | M41T80_FEATURE_BL | M41T80_FEATURE_SQ)
  111. },
  112. {
  113. .compatible = "st,m41t85",
  114. .data = (void *)(M41T80_FEATURE_HT | M41T80_FEATURE_BL | M41T80_FEATURE_SQ)
  115. },
  116. {
  117. .compatible = "st,m41t87",
  118. .data = (void *)(M41T80_FEATURE_HT | M41T80_FEATURE_BL | M41T80_FEATURE_SQ)
  119. },
  120. {
  121. .compatible = "microcrystal,rv4162",
  122. .data = (void *)(M41T80_FEATURE_SQ | M41T80_FEATURE_WD | M41T80_FEATURE_SQ_ALT)
  123. },
  124. /* DT compatibility only, do not use compatibles below: */
  125. {
  126. .compatible = "st,rv4162",
  127. .data = (void *)(M41T80_FEATURE_SQ | M41T80_FEATURE_WD | M41T80_FEATURE_SQ_ALT)
  128. },
  129. {
  130. .compatible = "rv4162",
  131. .data = (void *)(M41T80_FEATURE_SQ | M41T80_FEATURE_WD | M41T80_FEATURE_SQ_ALT)
  132. },
  133. { }
  134. };
  135. MODULE_DEVICE_TABLE(of, m41t80_of_match);
  136. struct m41t80_data {
  137. unsigned long features;
  138. struct i2c_client *client;
  139. struct rtc_device *rtc;
  140. #ifdef CONFIG_COMMON_CLK
  141. struct clk_hw sqw;
  142. unsigned long freq;
  143. unsigned int sqwe;
  144. #endif
  145. };
  146. static irqreturn_t m41t80_handle_irq(int irq, void *dev_id)
  147. {
  148. struct i2c_client *client = dev_id;
  149. struct m41t80_data *m41t80 = i2c_get_clientdata(client);
  150. unsigned long events = 0;
  151. int flags, flags_afe;
  152. rtc_lock(m41t80->rtc);
  153. flags_afe = i2c_smbus_read_byte_data(client, M41T80_REG_ALARM_MON);
  154. if (flags_afe < 0) {
  155. rtc_unlock(m41t80->rtc);
  156. return IRQ_NONE;
  157. }
  158. flags = i2c_smbus_read_byte_data(client, M41T80_REG_FLAGS);
  159. if (flags <= 0) {
  160. rtc_unlock(m41t80->rtc);
  161. return IRQ_NONE;
  162. }
  163. if (flags & M41T80_FLAGS_AF) {
  164. flags &= ~M41T80_FLAGS_AF;
  165. flags_afe &= ~M41T80_ALMON_AFE;
  166. events |= RTC_AF;
  167. }
  168. if (events) {
  169. rtc_update_irq(m41t80->rtc, 1, events);
  170. i2c_smbus_write_byte_data(client, M41T80_REG_FLAGS, flags);
  171. i2c_smbus_write_byte_data(client, M41T80_REG_ALARM_MON,
  172. flags_afe);
  173. }
  174. rtc_unlock(m41t80->rtc);
  175. return IRQ_HANDLED;
  176. }
  177. static int m41t80_rtc_read_time(struct device *dev, struct rtc_time *tm)
  178. {
  179. struct i2c_client *client = to_i2c_client(dev);
  180. unsigned char buf[8];
  181. int err, flags;
  182. flags = i2c_smbus_read_byte_data(client, M41T80_REG_FLAGS);
  183. if (flags < 0)
  184. return flags;
  185. if (flags & M41T80_FLAGS_OF) {
  186. dev_err(&client->dev, "Oscillator failure, data is invalid.\n");
  187. return -EINVAL;
  188. }
  189. err = i2c_smbus_read_i2c_block_data(client, M41T80_REG_SSEC,
  190. sizeof(buf), buf);
  191. if (err < 0) {
  192. dev_err(&client->dev, "Unable to read date\n");
  193. return err;
  194. }
  195. tm->tm_sec = bcd2bin(buf[M41T80_REG_SEC] & 0x7f);
  196. tm->tm_min = bcd2bin(buf[M41T80_REG_MIN] & 0x7f);
  197. tm->tm_hour = bcd2bin(buf[M41T80_REG_HOUR] & 0x3f);
  198. tm->tm_mday = bcd2bin(buf[M41T80_REG_DAY] & 0x3f);
  199. tm->tm_wday = buf[M41T80_REG_WDAY] & 0x07;
  200. tm->tm_mon = bcd2bin(buf[M41T80_REG_MON] & 0x1f) - 1;
  201. /* assume 20YY not 19YY, and ignore the Century Bit */
  202. tm->tm_year = bcd2bin(buf[M41T80_REG_YEAR]) + 100;
  203. return 0;
  204. }
  205. static int m41t80_rtc_set_time(struct device *dev, struct rtc_time *tm)
  206. {
  207. struct i2c_client *client = to_i2c_client(dev);
  208. struct m41t80_data *clientdata = i2c_get_clientdata(client);
  209. unsigned char buf[8];
  210. int err, flags;
  211. buf[M41T80_REG_SSEC] = 0;
  212. buf[M41T80_REG_SEC] = bin2bcd(tm->tm_sec);
  213. buf[M41T80_REG_MIN] = bin2bcd(tm->tm_min);
  214. buf[M41T80_REG_HOUR] = bin2bcd(tm->tm_hour);
  215. buf[M41T80_REG_DAY] = bin2bcd(tm->tm_mday);
  216. buf[M41T80_REG_MON] = bin2bcd(tm->tm_mon + 1);
  217. buf[M41T80_REG_YEAR] = bin2bcd(tm->tm_year - 100);
  218. buf[M41T80_REG_WDAY] = tm->tm_wday;
  219. /* If the square wave output is controlled in the weekday register */
  220. if (clientdata->features & M41T80_FEATURE_SQ_ALT) {
  221. int val;
  222. val = i2c_smbus_read_byte_data(client, M41T80_REG_WDAY);
  223. if (val < 0)
  224. return val;
  225. buf[M41T80_REG_WDAY] |= (val & 0xf0);
  226. }
  227. err = i2c_smbus_write_i2c_block_data(client, M41T80_REG_SSEC,
  228. sizeof(buf), buf);
  229. if (err < 0) {
  230. dev_err(&client->dev, "Unable to write to date registers\n");
  231. return err;
  232. }
  233. /* Clear the OF bit of Flags Register */
  234. flags = i2c_smbus_read_byte_data(client, M41T80_REG_FLAGS);
  235. if (flags < 0)
  236. return flags;
  237. err = i2c_smbus_write_byte_data(client, M41T80_REG_FLAGS,
  238. flags & ~M41T80_FLAGS_OF);
  239. if (err < 0) {
  240. dev_err(&client->dev, "Unable to write flags register\n");
  241. return err;
  242. }
  243. return err;
  244. }
  245. static int m41t80_rtc_proc(struct device *dev, struct seq_file *seq)
  246. {
  247. struct i2c_client *client = to_i2c_client(dev);
  248. struct m41t80_data *clientdata = i2c_get_clientdata(client);
  249. int reg;
  250. if (clientdata->features & M41T80_FEATURE_BL) {
  251. reg = i2c_smbus_read_byte_data(client, M41T80_REG_FLAGS);
  252. if (reg < 0)
  253. return reg;
  254. seq_printf(seq, "battery\t\t: %s\n",
  255. (reg & M41T80_FLAGS_BATT_LOW) ? "exhausted" : "ok");
  256. }
  257. return 0;
  258. }
  259. static int m41t80_alarm_irq_enable(struct device *dev, unsigned int enabled)
  260. {
  261. struct i2c_client *client = to_i2c_client(dev);
  262. int flags, retval;
  263. flags = i2c_smbus_read_byte_data(client, M41T80_REG_ALARM_MON);
  264. if (flags < 0)
  265. return flags;
  266. if (enabled)
  267. flags |= M41T80_ALMON_AFE;
  268. else
  269. flags &= ~M41T80_ALMON_AFE;
  270. retval = i2c_smbus_write_byte_data(client, M41T80_REG_ALARM_MON, flags);
  271. if (retval < 0) {
  272. dev_err(dev, "Unable to enable alarm IRQ %d\n", retval);
  273. return retval;
  274. }
  275. return 0;
  276. }
  277. static int m41t80_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
  278. {
  279. struct i2c_client *client = to_i2c_client(dev);
  280. u8 alarmvals[5];
  281. int ret, err;
  282. alarmvals[0] = bin2bcd(alrm->time.tm_mon + 1);
  283. alarmvals[1] = bin2bcd(alrm->time.tm_mday);
  284. alarmvals[2] = bin2bcd(alrm->time.tm_hour);
  285. alarmvals[3] = bin2bcd(alrm->time.tm_min);
  286. alarmvals[4] = bin2bcd(alrm->time.tm_sec);
  287. /* Clear AF and AFE flags */
  288. ret = i2c_smbus_read_byte_data(client, M41T80_REG_ALARM_MON);
  289. if (ret < 0)
  290. return ret;
  291. err = i2c_smbus_write_byte_data(client, M41T80_REG_ALARM_MON,
  292. ret & ~(M41T80_ALMON_AFE));
  293. if (err < 0) {
  294. dev_err(dev, "Unable to clear AFE bit\n");
  295. return err;
  296. }
  297. /* Keep SQWE bit value */
  298. alarmvals[0] |= (ret & M41T80_ALMON_SQWE);
  299. ret = i2c_smbus_read_byte_data(client, M41T80_REG_FLAGS);
  300. if (ret < 0)
  301. return ret;
  302. err = i2c_smbus_write_byte_data(client, M41T80_REG_FLAGS,
  303. ret & ~(M41T80_FLAGS_AF));
  304. if (err < 0) {
  305. dev_err(dev, "Unable to clear AF bit\n");
  306. return err;
  307. }
  308. /* Write the alarm */
  309. err = i2c_smbus_write_i2c_block_data(client, M41T80_REG_ALARM_MON,
  310. 5, alarmvals);
  311. if (err)
  312. return err;
  313. /* Enable the alarm interrupt */
  314. if (alrm->enabled) {
  315. alarmvals[0] |= M41T80_ALMON_AFE;
  316. err = i2c_smbus_write_byte_data(client, M41T80_REG_ALARM_MON,
  317. alarmvals[0]);
  318. if (err)
  319. return err;
  320. }
  321. return 0;
  322. }
  323. static int m41t80_read_alarm(struct device *dev, struct rtc_wkalrm *alrm)
  324. {
  325. struct i2c_client *client = to_i2c_client(dev);
  326. u8 alarmvals[5];
  327. int flags, ret;
  328. ret = i2c_smbus_read_i2c_block_data(client, M41T80_REG_ALARM_MON,
  329. 5, alarmvals);
  330. if (ret != 5)
  331. return ret < 0 ? ret : -EIO;
  332. flags = i2c_smbus_read_byte_data(client, M41T80_REG_FLAGS);
  333. if (flags < 0)
  334. return flags;
  335. alrm->time.tm_sec = bcd2bin(alarmvals[4] & 0x7f);
  336. alrm->time.tm_min = bcd2bin(alarmvals[3] & 0x7f);
  337. alrm->time.tm_hour = bcd2bin(alarmvals[2] & 0x3f);
  338. alrm->time.tm_mday = bcd2bin(alarmvals[1] & 0x3f);
  339. alrm->time.tm_mon = bcd2bin(alarmvals[0] & 0x3f) - 1;
  340. alrm->enabled = !!(alarmvals[0] & M41T80_ALMON_AFE);
  341. alrm->pending = (flags & M41T80_FLAGS_AF) && alrm->enabled;
  342. return 0;
  343. }
  344. static const struct rtc_class_ops m41t80_rtc_ops = {
  345. .read_time = m41t80_rtc_read_time,
  346. .set_time = m41t80_rtc_set_time,
  347. .proc = m41t80_rtc_proc,
  348. .read_alarm = m41t80_read_alarm,
  349. .set_alarm = m41t80_set_alarm,
  350. .alarm_irq_enable = m41t80_alarm_irq_enable,
  351. };
  352. #ifdef CONFIG_PM_SLEEP
  353. static int m41t80_suspend(struct device *dev)
  354. {
  355. struct i2c_client *client = to_i2c_client(dev);
  356. if (client->irq >= 0 && device_may_wakeup(dev))
  357. enable_irq_wake(client->irq);
  358. return 0;
  359. }
  360. static int m41t80_resume(struct device *dev)
  361. {
  362. struct i2c_client *client = to_i2c_client(dev);
  363. if (client->irq >= 0 && device_may_wakeup(dev))
  364. disable_irq_wake(client->irq);
  365. return 0;
  366. }
  367. #endif
  368. static SIMPLE_DEV_PM_OPS(m41t80_pm, m41t80_suspend, m41t80_resume);
  369. #ifdef CONFIG_COMMON_CLK
  370. #define sqw_to_m41t80_data(_hw) container_of(_hw, struct m41t80_data, sqw)
  371. static unsigned long m41t80_decode_freq(int setting)
  372. {
  373. return (setting == 0) ? 0 : (setting == 1) ? M41T80_SQW_MAX_FREQ :
  374. M41T80_SQW_MAX_FREQ >> setting;
  375. }
  376. static unsigned long m41t80_get_freq(struct m41t80_data *m41t80)
  377. {
  378. struct i2c_client *client = m41t80->client;
  379. int reg_sqw = (m41t80->features & M41T80_FEATURE_SQ_ALT) ?
  380. M41T80_REG_WDAY : M41T80_REG_SQW;
  381. int ret = i2c_smbus_read_byte_data(client, reg_sqw);
  382. if (ret < 0)
  383. return 0;
  384. return m41t80_decode_freq(ret >> 4);
  385. }
  386. static unsigned long m41t80_sqw_recalc_rate(struct clk_hw *hw,
  387. unsigned long parent_rate)
  388. {
  389. return sqw_to_m41t80_data(hw)->freq;
  390. }
  391. static long m41t80_sqw_round_rate(struct clk_hw *hw, unsigned long rate,
  392. unsigned long *prate)
  393. {
  394. if (rate >= M41T80_SQW_MAX_FREQ)
  395. return M41T80_SQW_MAX_FREQ;
  396. if (rate >= M41T80_SQW_MAX_FREQ / 4)
  397. return M41T80_SQW_MAX_FREQ / 4;
  398. if (!rate)
  399. return 0;
  400. return 1 << ilog2(rate);
  401. }
  402. static int m41t80_sqw_set_rate(struct clk_hw *hw, unsigned long rate,
  403. unsigned long parent_rate)
  404. {
  405. struct m41t80_data *m41t80 = sqw_to_m41t80_data(hw);
  406. struct i2c_client *client = m41t80->client;
  407. int reg_sqw = (m41t80->features & M41T80_FEATURE_SQ_ALT) ?
  408. M41T80_REG_WDAY : M41T80_REG_SQW;
  409. int reg, ret, val = 0;
  410. if (rate >= M41T80_SQW_MAX_FREQ)
  411. val = 1;
  412. else if (rate >= M41T80_SQW_MAX_FREQ / 4)
  413. val = 2;
  414. else if (rate)
  415. val = 15 - ilog2(rate);
  416. reg = i2c_smbus_read_byte_data(client, reg_sqw);
  417. if (reg < 0)
  418. return reg;
  419. reg = (reg & 0x0f) | (val << 4);
  420. ret = i2c_smbus_write_byte_data(client, reg_sqw, reg);
  421. if (!ret)
  422. m41t80->freq = m41t80_decode_freq(val);
  423. return ret;
  424. }
  425. static int m41t80_sqw_control(struct clk_hw *hw, bool enable)
  426. {
  427. struct m41t80_data *m41t80 = sqw_to_m41t80_data(hw);
  428. struct i2c_client *client = m41t80->client;
  429. int ret = i2c_smbus_read_byte_data(client, M41T80_REG_ALARM_MON);
  430. if (ret < 0)
  431. return ret;
  432. if (enable)
  433. ret |= M41T80_ALMON_SQWE;
  434. else
  435. ret &= ~M41T80_ALMON_SQWE;
  436. ret = i2c_smbus_write_byte_data(client, M41T80_REG_ALARM_MON, ret);
  437. if (!ret)
  438. m41t80->sqwe = enable;
  439. return ret;
  440. }
  441. static int m41t80_sqw_prepare(struct clk_hw *hw)
  442. {
  443. return m41t80_sqw_control(hw, 1);
  444. }
  445. static void m41t80_sqw_unprepare(struct clk_hw *hw)
  446. {
  447. m41t80_sqw_control(hw, 0);
  448. }
  449. static int m41t80_sqw_is_prepared(struct clk_hw *hw)
  450. {
  451. return sqw_to_m41t80_data(hw)->sqwe;
  452. }
  453. static const struct clk_ops m41t80_sqw_ops = {
  454. .prepare = m41t80_sqw_prepare,
  455. .unprepare = m41t80_sqw_unprepare,
  456. .is_prepared = m41t80_sqw_is_prepared,
  457. .recalc_rate = m41t80_sqw_recalc_rate,
  458. .round_rate = m41t80_sqw_round_rate,
  459. .set_rate = m41t80_sqw_set_rate,
  460. };
  461. static struct clk *m41t80_sqw_register_clk(struct m41t80_data *m41t80)
  462. {
  463. struct i2c_client *client = m41t80->client;
  464. struct device_node *node = client->dev.of_node;
  465. struct device_node *fixed_clock;
  466. struct clk *clk;
  467. struct clk_init_data init;
  468. int ret;
  469. fixed_clock = of_get_child_by_name(node, "clock");
  470. if (fixed_clock) {
  471. /*
  472. * skip registering square wave clock when a fixed
  473. * clock has been registered. The fixed clock is
  474. * registered automatically when being referenced.
  475. */
  476. of_node_put(fixed_clock);
  477. return NULL;
  478. }
  479. /* First disable the clock */
  480. ret = i2c_smbus_read_byte_data(client, M41T80_REG_ALARM_MON);
  481. if (ret < 0)
  482. return ERR_PTR(ret);
  483. ret = i2c_smbus_write_byte_data(client, M41T80_REG_ALARM_MON,
  484. ret & ~(M41T80_ALMON_SQWE));
  485. if (ret < 0)
  486. return ERR_PTR(ret);
  487. init.name = "m41t80-sqw";
  488. init.ops = &m41t80_sqw_ops;
  489. init.flags = 0;
  490. init.parent_names = NULL;
  491. init.num_parents = 0;
  492. m41t80->sqw.init = &init;
  493. m41t80->freq = m41t80_get_freq(m41t80);
  494. /* optional override of the clockname */
  495. of_property_read_string(node, "clock-output-names", &init.name);
  496. /* register the clock */
  497. clk = clk_register(&client->dev, &m41t80->sqw);
  498. if (!IS_ERR(clk))
  499. of_clk_add_provider(node, of_clk_src_simple_get, clk);
  500. return clk;
  501. }
  502. #endif
  503. #ifdef CONFIG_RTC_DRV_M41T80_WDT
  504. /*
  505. *****************************************************************************
  506. *
  507. * Watchdog Driver
  508. *
  509. *****************************************************************************
  510. */
  511. static DEFINE_MUTEX(m41t80_rtc_mutex);
  512. static struct i2c_client *save_client;
  513. /* Default margin */
  514. #define WD_TIMO 60 /* 1..31 seconds */
  515. static int wdt_margin = WD_TIMO;
  516. module_param(wdt_margin, int, 0);
  517. MODULE_PARM_DESC(wdt_margin, "Watchdog timeout in seconds (default 60s)");
  518. static unsigned long wdt_is_open;
  519. static int boot_flag;
  520. /**
  521. * wdt_ping - Reload counter one with the watchdog timeout.
  522. * We don't bother reloading the cascade counter.
  523. */
  524. static void wdt_ping(void)
  525. {
  526. unsigned char i2c_data[2];
  527. struct i2c_msg msgs1[1] = {
  528. {
  529. .addr = save_client->addr,
  530. .flags = 0,
  531. .len = 2,
  532. .buf = i2c_data,
  533. },
  534. };
  535. struct m41t80_data *clientdata = i2c_get_clientdata(save_client);
  536. i2c_data[0] = 0x09; /* watchdog register */
  537. if (wdt_margin > 31)
  538. i2c_data[1] = (wdt_margin & 0xFC) | 0x83; /* resolution = 4s */
  539. else
  540. /*
  541. * WDS = 1 (0x80), mulitplier = WD_TIMO, resolution = 1s (0x02)
  542. */
  543. i2c_data[1] = wdt_margin << 2 | 0x82;
  544. /*
  545. * M41T65 has three bits for watchdog resolution. Don't set bit 7, as
  546. * that would be an invalid resolution.
  547. */
  548. if (clientdata->features & M41T80_FEATURE_WD)
  549. i2c_data[1] &= ~M41T80_WATCHDOG_RB2;
  550. i2c_transfer(save_client->adapter, msgs1, 1);
  551. }
  552. /**
  553. * wdt_disable - disables watchdog.
  554. */
  555. static void wdt_disable(void)
  556. {
  557. unsigned char i2c_data[2], i2c_buf[0x10];
  558. struct i2c_msg msgs0[2] = {
  559. {
  560. .addr = save_client->addr,
  561. .flags = 0,
  562. .len = 1,
  563. .buf = i2c_data,
  564. },
  565. {
  566. .addr = save_client->addr,
  567. .flags = I2C_M_RD,
  568. .len = 1,
  569. .buf = i2c_buf,
  570. },
  571. };
  572. struct i2c_msg msgs1[1] = {
  573. {
  574. .addr = save_client->addr,
  575. .flags = 0,
  576. .len = 2,
  577. .buf = i2c_data,
  578. },
  579. };
  580. i2c_data[0] = 0x09;
  581. i2c_transfer(save_client->adapter, msgs0, 2);
  582. i2c_data[0] = 0x09;
  583. i2c_data[1] = 0x00;
  584. i2c_transfer(save_client->adapter, msgs1, 1);
  585. }
  586. /**
  587. * wdt_write - write to watchdog.
  588. * @file: file handle to the watchdog
  589. * @buf: buffer to write (unused as data does not matter here
  590. * @count: count of bytes
  591. * @ppos: pointer to the position to write. No seeks allowed
  592. *
  593. * A write to a watchdog device is defined as a keepalive signal. Any
  594. * write of data will do, as we we don't define content meaning.
  595. */
  596. static ssize_t wdt_write(struct file *file, const char __user *buf,
  597. size_t count, loff_t *ppos)
  598. {
  599. if (count) {
  600. wdt_ping();
  601. return 1;
  602. }
  603. return 0;
  604. }
  605. static ssize_t wdt_read(struct file *file, char __user *buf,
  606. size_t count, loff_t *ppos)
  607. {
  608. return 0;
  609. }
  610. /**
  611. * wdt_ioctl - ioctl handler to set watchdog.
  612. * @file: file handle to the device
  613. * @cmd: watchdog command
  614. * @arg: argument pointer
  615. *
  616. * The watchdog API defines a common set of functions for all watchdogs
  617. * according to their available features. We only actually usefully support
  618. * querying capabilities and current status.
  619. */
  620. static int wdt_ioctl(struct file *file, unsigned int cmd,
  621. unsigned long arg)
  622. {
  623. int new_margin, rv;
  624. static struct watchdog_info ident = {
  625. .options = WDIOF_POWERUNDER | WDIOF_KEEPALIVEPING |
  626. WDIOF_SETTIMEOUT,
  627. .firmware_version = 1,
  628. .identity = "M41T80 WTD"
  629. };
  630. switch (cmd) {
  631. case WDIOC_GETSUPPORT:
  632. return copy_to_user((struct watchdog_info __user *)arg, &ident,
  633. sizeof(ident)) ? -EFAULT : 0;
  634. case WDIOC_GETSTATUS:
  635. case WDIOC_GETBOOTSTATUS:
  636. return put_user(boot_flag, (int __user *)arg);
  637. case WDIOC_KEEPALIVE:
  638. wdt_ping();
  639. return 0;
  640. case WDIOC_SETTIMEOUT:
  641. if (get_user(new_margin, (int __user *)arg))
  642. return -EFAULT;
  643. /* Arbitrary, can't find the card's limits */
  644. if (new_margin < 1 || new_margin > 124)
  645. return -EINVAL;
  646. wdt_margin = new_margin;
  647. wdt_ping();
  648. fallthrough;
  649. case WDIOC_GETTIMEOUT:
  650. return put_user(wdt_margin, (int __user *)arg);
  651. case WDIOC_SETOPTIONS:
  652. if (copy_from_user(&rv, (int __user *)arg, sizeof(int)))
  653. return -EFAULT;
  654. if (rv & WDIOS_DISABLECARD) {
  655. pr_info("disable watchdog\n");
  656. wdt_disable();
  657. }
  658. if (rv & WDIOS_ENABLECARD) {
  659. pr_info("enable watchdog\n");
  660. wdt_ping();
  661. }
  662. return -EINVAL;
  663. }
  664. return -ENOTTY;
  665. }
  666. static long wdt_unlocked_ioctl(struct file *file, unsigned int cmd,
  667. unsigned long arg)
  668. {
  669. int ret;
  670. mutex_lock(&m41t80_rtc_mutex);
  671. ret = wdt_ioctl(file, cmd, arg);
  672. mutex_unlock(&m41t80_rtc_mutex);
  673. return ret;
  674. }
  675. /**
  676. * wdt_open - open a watchdog.
  677. * @inode: inode of device
  678. * @file: file handle to device
  679. *
  680. */
  681. static int wdt_open(struct inode *inode, struct file *file)
  682. {
  683. if (iminor(inode) == WATCHDOG_MINOR) {
  684. mutex_lock(&m41t80_rtc_mutex);
  685. if (test_and_set_bit(0, &wdt_is_open)) {
  686. mutex_unlock(&m41t80_rtc_mutex);
  687. return -EBUSY;
  688. }
  689. /*
  690. * Activate
  691. */
  692. wdt_is_open = 1;
  693. mutex_unlock(&m41t80_rtc_mutex);
  694. return stream_open(inode, file);
  695. }
  696. return -ENODEV;
  697. }
  698. /**
  699. * wdt_release - release a watchdog.
  700. * @inode: inode to board
  701. * @file: file handle to board
  702. *
  703. */
  704. static int wdt_release(struct inode *inode, struct file *file)
  705. {
  706. if (iminor(inode) == WATCHDOG_MINOR)
  707. clear_bit(0, &wdt_is_open);
  708. return 0;
  709. }
  710. /**
  711. * wdt_notify_sys - notify to watchdog.
  712. * @this: our notifier block
  713. * @code: the event being reported
  714. * @unused: unused
  715. *
  716. * Our notifier is called on system shutdowns. We want to turn the card
  717. * off at reboot otherwise the machine will reboot again during memory
  718. * test or worse yet during the following fsck. This would suck, in fact
  719. * trust me - if it happens it does suck.
  720. */
  721. static int wdt_notify_sys(struct notifier_block *this, unsigned long code,
  722. void *unused)
  723. {
  724. if (code == SYS_DOWN || code == SYS_HALT)
  725. /* Disable Watchdog */
  726. wdt_disable();
  727. return NOTIFY_DONE;
  728. }
  729. static const struct file_operations wdt_fops = {
  730. .owner = THIS_MODULE,
  731. .read = wdt_read,
  732. .unlocked_ioctl = wdt_unlocked_ioctl,
  733. .compat_ioctl = compat_ptr_ioctl,
  734. .write = wdt_write,
  735. .open = wdt_open,
  736. .release = wdt_release,
  737. .llseek = no_llseek,
  738. };
  739. static struct miscdevice wdt_dev = {
  740. .minor = WATCHDOG_MINOR,
  741. .name = "watchdog",
  742. .fops = &wdt_fops,
  743. };
  744. /*
  745. * The WDT card needs to learn about soft shutdowns in order to
  746. * turn the timebomb registers off.
  747. */
  748. static struct notifier_block wdt_notifier = {
  749. .notifier_call = wdt_notify_sys,
  750. };
  751. #endif /* CONFIG_RTC_DRV_M41T80_WDT */
  752. /*
  753. *****************************************************************************
  754. *
  755. * Driver Interface
  756. *
  757. *****************************************************************************
  758. */
  759. static int m41t80_probe(struct i2c_client *client,
  760. const struct i2c_device_id *id)
  761. {
  762. struct i2c_adapter *adapter = client->adapter;
  763. int rc = 0;
  764. struct rtc_time tm;
  765. struct m41t80_data *m41t80_data = NULL;
  766. bool wakeup_source = false;
  767. if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_I2C_BLOCK |
  768. I2C_FUNC_SMBUS_BYTE_DATA)) {
  769. dev_err(&adapter->dev, "doesn't support I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_I2C_BLOCK\n");
  770. return -ENODEV;
  771. }
  772. m41t80_data = devm_kzalloc(&client->dev, sizeof(*m41t80_data),
  773. GFP_KERNEL);
  774. if (!m41t80_data)
  775. return -ENOMEM;
  776. m41t80_data->client = client;
  777. if (client->dev.of_node)
  778. m41t80_data->features = (unsigned long)
  779. of_device_get_match_data(&client->dev);
  780. else
  781. m41t80_data->features = id->driver_data;
  782. i2c_set_clientdata(client, m41t80_data);
  783. m41t80_data->rtc = devm_rtc_allocate_device(&client->dev);
  784. if (IS_ERR(m41t80_data->rtc))
  785. return PTR_ERR(m41t80_data->rtc);
  786. #ifdef CONFIG_OF
  787. wakeup_source = of_property_read_bool(client->dev.of_node,
  788. "wakeup-source");
  789. #endif
  790. if (client->irq > 0) {
  791. rc = devm_request_threaded_irq(&client->dev, client->irq,
  792. NULL, m41t80_handle_irq,
  793. IRQF_TRIGGER_LOW | IRQF_ONESHOT,
  794. "m41t80", client);
  795. if (rc) {
  796. dev_warn(&client->dev, "unable to request IRQ, alarms disabled\n");
  797. client->irq = 0;
  798. wakeup_source = false;
  799. }
  800. }
  801. if (client->irq > 0 || wakeup_source)
  802. device_init_wakeup(&client->dev, true);
  803. else
  804. clear_bit(RTC_FEATURE_ALARM, m41t80_data->rtc->features);
  805. m41t80_data->rtc->ops = &m41t80_rtc_ops;
  806. m41t80_data->rtc->range_min = RTC_TIMESTAMP_BEGIN_2000;
  807. m41t80_data->rtc->range_max = RTC_TIMESTAMP_END_2099;
  808. if (client->irq <= 0)
  809. clear_bit(RTC_FEATURE_UPDATE_INTERRUPT, m41t80_data->rtc->features);
  810. /* Make sure HT (Halt Update) bit is cleared */
  811. rc = i2c_smbus_read_byte_data(client, M41T80_REG_ALARM_HOUR);
  812. if (rc >= 0 && rc & M41T80_ALHOUR_HT) {
  813. if (m41t80_data->features & M41T80_FEATURE_HT) {
  814. m41t80_rtc_read_time(&client->dev, &tm);
  815. dev_info(&client->dev, "HT bit was set!\n");
  816. dev_info(&client->dev, "Power Down at %ptR\n", &tm);
  817. }
  818. rc = i2c_smbus_write_byte_data(client, M41T80_REG_ALARM_HOUR,
  819. rc & ~M41T80_ALHOUR_HT);
  820. }
  821. if (rc < 0) {
  822. dev_err(&client->dev, "Can't clear HT bit\n");
  823. return rc;
  824. }
  825. /* Make sure ST (stop) bit is cleared */
  826. rc = i2c_smbus_read_byte_data(client, M41T80_REG_SEC);
  827. if (rc >= 0 && rc & M41T80_SEC_ST)
  828. rc = i2c_smbus_write_byte_data(client, M41T80_REG_SEC,
  829. rc & ~M41T80_SEC_ST);
  830. if (rc < 0) {
  831. dev_err(&client->dev, "Can't clear ST bit\n");
  832. return rc;
  833. }
  834. #ifdef CONFIG_RTC_DRV_M41T80_WDT
  835. if (m41t80_data->features & M41T80_FEATURE_HT) {
  836. save_client = client;
  837. rc = misc_register(&wdt_dev);
  838. if (rc)
  839. return rc;
  840. rc = register_reboot_notifier(&wdt_notifier);
  841. if (rc) {
  842. misc_deregister(&wdt_dev);
  843. return rc;
  844. }
  845. }
  846. #endif
  847. #ifdef CONFIG_COMMON_CLK
  848. if (m41t80_data->features & M41T80_FEATURE_SQ)
  849. m41t80_sqw_register_clk(m41t80_data);
  850. #endif
  851. rc = devm_rtc_register_device(m41t80_data->rtc);
  852. if (rc)
  853. return rc;
  854. return 0;
  855. }
  856. static void m41t80_remove(struct i2c_client *client)
  857. {
  858. #ifdef CONFIG_RTC_DRV_M41T80_WDT
  859. struct m41t80_data *clientdata = i2c_get_clientdata(client);
  860. if (clientdata->features & M41T80_FEATURE_HT) {
  861. misc_deregister(&wdt_dev);
  862. unregister_reboot_notifier(&wdt_notifier);
  863. }
  864. #endif
  865. }
  866. static struct i2c_driver m41t80_driver = {
  867. .driver = {
  868. .name = "rtc-m41t80",
  869. .of_match_table = of_match_ptr(m41t80_of_match),
  870. .pm = &m41t80_pm,
  871. },
  872. .probe = m41t80_probe,
  873. .remove = m41t80_remove,
  874. .id_table = m41t80_id,
  875. };
  876. module_i2c_driver(m41t80_driver);
  877. MODULE_AUTHOR("Alexander Bigga <[email protected]>");
  878. MODULE_DESCRIPTION("ST Microelectronics M41T80 series RTC I2C Client Driver");
  879. MODULE_LICENSE("GPL");