rtc-ds1511.c 12 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * An rtc driver for the Dallas DS1511
  4. *
  5. * Copyright (C) 2006 Atsushi Nemoto <[email protected]>
  6. * Copyright (C) 2007 Andrew Sharp <[email protected]>
  7. *
  8. * Real time clock driver for the Dallas 1511 chip, which also
  9. * contains a watchdog timer. There is a tiny amount of code that
  10. * platform code could use to mess with the watchdog device a little
  11. * bit, but not a full watchdog driver.
  12. */
  13. #include <linux/bcd.h>
  14. #include <linux/init.h>
  15. #include <linux/kernel.h>
  16. #include <linux/gfp.h>
  17. #include <linux/delay.h>
  18. #include <linux/interrupt.h>
  19. #include <linux/rtc.h>
  20. #include <linux/platform_device.h>
  21. #include <linux/io.h>
  22. #include <linux/module.h>
  23. enum ds1511reg {
  24. DS1511_SEC = 0x0,
  25. DS1511_MIN = 0x1,
  26. DS1511_HOUR = 0x2,
  27. DS1511_DOW = 0x3,
  28. DS1511_DOM = 0x4,
  29. DS1511_MONTH = 0x5,
  30. DS1511_YEAR = 0x6,
  31. DS1511_CENTURY = 0x7,
  32. DS1511_AM1_SEC = 0x8,
  33. DS1511_AM2_MIN = 0x9,
  34. DS1511_AM3_HOUR = 0xa,
  35. DS1511_AM4_DATE = 0xb,
  36. DS1511_WD_MSEC = 0xc,
  37. DS1511_WD_SEC = 0xd,
  38. DS1511_CONTROL_A = 0xe,
  39. DS1511_CONTROL_B = 0xf,
  40. DS1511_RAMADDR_LSB = 0x10,
  41. DS1511_RAMDATA = 0x13
  42. };
  43. #define DS1511_BLF1 0x80
  44. #define DS1511_BLF2 0x40
  45. #define DS1511_PRS 0x20
  46. #define DS1511_PAB 0x10
  47. #define DS1511_TDF 0x08
  48. #define DS1511_KSF 0x04
  49. #define DS1511_WDF 0x02
  50. #define DS1511_IRQF 0x01
  51. #define DS1511_TE 0x80
  52. #define DS1511_CS 0x40
  53. #define DS1511_BME 0x20
  54. #define DS1511_TPE 0x10
  55. #define DS1511_TIE 0x08
  56. #define DS1511_KIE 0x04
  57. #define DS1511_WDE 0x02
  58. #define DS1511_WDS 0x01
  59. #define DS1511_RAM_MAX 0x100
  60. #define RTC_CMD DS1511_CONTROL_B
  61. #define RTC_CMD1 DS1511_CONTROL_A
  62. #define RTC_ALARM_SEC DS1511_AM1_SEC
  63. #define RTC_ALARM_MIN DS1511_AM2_MIN
  64. #define RTC_ALARM_HOUR DS1511_AM3_HOUR
  65. #define RTC_ALARM_DATE DS1511_AM4_DATE
  66. #define RTC_SEC DS1511_SEC
  67. #define RTC_MIN DS1511_MIN
  68. #define RTC_HOUR DS1511_HOUR
  69. #define RTC_DOW DS1511_DOW
  70. #define RTC_DOM DS1511_DOM
  71. #define RTC_MON DS1511_MONTH
  72. #define RTC_YEAR DS1511_YEAR
  73. #define RTC_CENTURY DS1511_CENTURY
  74. #define RTC_TIE DS1511_TIE
  75. #define RTC_TE DS1511_TE
  76. struct rtc_plat_data {
  77. struct rtc_device *rtc;
  78. void __iomem *ioaddr; /* virtual base address */
  79. int irq;
  80. unsigned int irqen;
  81. int alrm_sec;
  82. int alrm_min;
  83. int alrm_hour;
  84. int alrm_mday;
  85. spinlock_t lock;
  86. };
  87. static DEFINE_SPINLOCK(ds1511_lock);
  88. static __iomem char *ds1511_base;
  89. static u32 reg_spacing = 1;
  90. static noinline void
  91. rtc_write(uint8_t val, uint32_t reg)
  92. {
  93. writeb(val, ds1511_base + (reg * reg_spacing));
  94. }
  95. static noinline uint8_t
  96. rtc_read(enum ds1511reg reg)
  97. {
  98. return readb(ds1511_base + (reg * reg_spacing));
  99. }
  100. static inline void
  101. rtc_disable_update(void)
  102. {
  103. rtc_write((rtc_read(RTC_CMD) & ~RTC_TE), RTC_CMD);
  104. }
  105. static void
  106. rtc_enable_update(void)
  107. {
  108. rtc_write((rtc_read(RTC_CMD) | RTC_TE), RTC_CMD);
  109. }
  110. /*
  111. * #define DS1511_WDOG_RESET_SUPPORT
  112. *
  113. * Uncomment this if you want to use these routines in
  114. * some platform code.
  115. */
  116. #ifdef DS1511_WDOG_RESET_SUPPORT
  117. /*
  118. * just enough code to set the watchdog timer so that it
  119. * will reboot the system
  120. */
  121. void
  122. ds1511_wdog_set(unsigned long deciseconds)
  123. {
  124. /*
  125. * the wdog timer can take 99.99 seconds
  126. */
  127. deciseconds %= 10000;
  128. /*
  129. * set the wdog values in the wdog registers
  130. */
  131. rtc_write(bin2bcd(deciseconds % 100), DS1511_WD_MSEC);
  132. rtc_write(bin2bcd(deciseconds / 100), DS1511_WD_SEC);
  133. /*
  134. * set wdog enable and wdog 'steering' bit to issue a reset
  135. */
  136. rtc_write(rtc_read(RTC_CMD) | DS1511_WDE | DS1511_WDS, RTC_CMD);
  137. }
  138. void
  139. ds1511_wdog_disable(void)
  140. {
  141. /*
  142. * clear wdog enable and wdog 'steering' bits
  143. */
  144. rtc_write(rtc_read(RTC_CMD) & ~(DS1511_WDE | DS1511_WDS), RTC_CMD);
  145. /*
  146. * clear the wdog counter
  147. */
  148. rtc_write(0, DS1511_WD_MSEC);
  149. rtc_write(0, DS1511_WD_SEC);
  150. }
  151. #endif
  152. /*
  153. * set the rtc chip's idea of the time.
  154. * stupidly, some callers call with year unmolested;
  155. * and some call with year = year - 1900. thanks.
  156. */
  157. static int ds1511_rtc_set_time(struct device *dev, struct rtc_time *rtc_tm)
  158. {
  159. u8 mon, day, dow, hrs, min, sec, yrs, cen;
  160. unsigned long flags;
  161. /*
  162. * won't have to change this for a while
  163. */
  164. if (rtc_tm->tm_year < 1900)
  165. rtc_tm->tm_year += 1900;
  166. if (rtc_tm->tm_year < 1970)
  167. return -EINVAL;
  168. yrs = rtc_tm->tm_year % 100;
  169. cen = rtc_tm->tm_year / 100;
  170. mon = rtc_tm->tm_mon + 1; /* tm_mon starts at zero */
  171. day = rtc_tm->tm_mday;
  172. dow = rtc_tm->tm_wday & 0x7; /* automatic BCD */
  173. hrs = rtc_tm->tm_hour;
  174. min = rtc_tm->tm_min;
  175. sec = rtc_tm->tm_sec;
  176. if ((mon > 12) || (day == 0))
  177. return -EINVAL;
  178. if (day > rtc_month_days(rtc_tm->tm_mon, rtc_tm->tm_year))
  179. return -EINVAL;
  180. if ((hrs >= 24) || (min >= 60) || (sec >= 60))
  181. return -EINVAL;
  182. /*
  183. * each register is a different number of valid bits
  184. */
  185. sec = bin2bcd(sec) & 0x7f;
  186. min = bin2bcd(min) & 0x7f;
  187. hrs = bin2bcd(hrs) & 0x3f;
  188. day = bin2bcd(day) & 0x3f;
  189. mon = bin2bcd(mon) & 0x1f;
  190. yrs = bin2bcd(yrs) & 0xff;
  191. cen = bin2bcd(cen) & 0xff;
  192. spin_lock_irqsave(&ds1511_lock, flags);
  193. rtc_disable_update();
  194. rtc_write(cen, RTC_CENTURY);
  195. rtc_write(yrs, RTC_YEAR);
  196. rtc_write((rtc_read(RTC_MON) & 0xe0) | mon, RTC_MON);
  197. rtc_write(day, RTC_DOM);
  198. rtc_write(hrs, RTC_HOUR);
  199. rtc_write(min, RTC_MIN);
  200. rtc_write(sec, RTC_SEC);
  201. rtc_write(dow, RTC_DOW);
  202. rtc_enable_update();
  203. spin_unlock_irqrestore(&ds1511_lock, flags);
  204. return 0;
  205. }
  206. static int ds1511_rtc_read_time(struct device *dev, struct rtc_time *rtc_tm)
  207. {
  208. unsigned int century;
  209. unsigned long flags;
  210. spin_lock_irqsave(&ds1511_lock, flags);
  211. rtc_disable_update();
  212. rtc_tm->tm_sec = rtc_read(RTC_SEC) & 0x7f;
  213. rtc_tm->tm_min = rtc_read(RTC_MIN) & 0x7f;
  214. rtc_tm->tm_hour = rtc_read(RTC_HOUR) & 0x3f;
  215. rtc_tm->tm_mday = rtc_read(RTC_DOM) & 0x3f;
  216. rtc_tm->tm_wday = rtc_read(RTC_DOW) & 0x7;
  217. rtc_tm->tm_mon = rtc_read(RTC_MON) & 0x1f;
  218. rtc_tm->tm_year = rtc_read(RTC_YEAR) & 0x7f;
  219. century = rtc_read(RTC_CENTURY);
  220. rtc_enable_update();
  221. spin_unlock_irqrestore(&ds1511_lock, flags);
  222. rtc_tm->tm_sec = bcd2bin(rtc_tm->tm_sec);
  223. rtc_tm->tm_min = bcd2bin(rtc_tm->tm_min);
  224. rtc_tm->tm_hour = bcd2bin(rtc_tm->tm_hour);
  225. rtc_tm->tm_mday = bcd2bin(rtc_tm->tm_mday);
  226. rtc_tm->tm_wday = bcd2bin(rtc_tm->tm_wday);
  227. rtc_tm->tm_mon = bcd2bin(rtc_tm->tm_mon);
  228. rtc_tm->tm_year = bcd2bin(rtc_tm->tm_year);
  229. century = bcd2bin(century) * 100;
  230. /*
  231. * Account for differences between how the RTC uses the values
  232. * and how they are defined in a struct rtc_time;
  233. */
  234. century += rtc_tm->tm_year;
  235. rtc_tm->tm_year = century - 1900;
  236. rtc_tm->tm_mon--;
  237. return 0;
  238. }
  239. /*
  240. * write the alarm register settings
  241. *
  242. * we only have the use to interrupt every second, otherwise
  243. * known as the update interrupt, or the interrupt if the whole
  244. * date/hours/mins/secs matches. the ds1511 has many more
  245. * permutations, but the kernel doesn't.
  246. */
  247. static void
  248. ds1511_rtc_update_alarm(struct rtc_plat_data *pdata)
  249. {
  250. unsigned long flags;
  251. spin_lock_irqsave(&pdata->lock, flags);
  252. rtc_write(pdata->alrm_mday < 0 || (pdata->irqen & RTC_UF) ?
  253. 0x80 : bin2bcd(pdata->alrm_mday) & 0x3f,
  254. RTC_ALARM_DATE);
  255. rtc_write(pdata->alrm_hour < 0 || (pdata->irqen & RTC_UF) ?
  256. 0x80 : bin2bcd(pdata->alrm_hour) & 0x3f,
  257. RTC_ALARM_HOUR);
  258. rtc_write(pdata->alrm_min < 0 || (pdata->irqen & RTC_UF) ?
  259. 0x80 : bin2bcd(pdata->alrm_min) & 0x7f,
  260. RTC_ALARM_MIN);
  261. rtc_write(pdata->alrm_sec < 0 || (pdata->irqen & RTC_UF) ?
  262. 0x80 : bin2bcd(pdata->alrm_sec) & 0x7f,
  263. RTC_ALARM_SEC);
  264. rtc_write(rtc_read(RTC_CMD) | (pdata->irqen ? RTC_TIE : 0), RTC_CMD);
  265. rtc_read(RTC_CMD1); /* clear interrupts */
  266. spin_unlock_irqrestore(&pdata->lock, flags);
  267. }
  268. static int
  269. ds1511_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
  270. {
  271. struct rtc_plat_data *pdata = dev_get_drvdata(dev);
  272. if (pdata->irq <= 0)
  273. return -EINVAL;
  274. pdata->alrm_mday = alrm->time.tm_mday;
  275. pdata->alrm_hour = alrm->time.tm_hour;
  276. pdata->alrm_min = alrm->time.tm_min;
  277. pdata->alrm_sec = alrm->time.tm_sec;
  278. if (alrm->enabled)
  279. pdata->irqen |= RTC_AF;
  280. ds1511_rtc_update_alarm(pdata);
  281. return 0;
  282. }
  283. static int
  284. ds1511_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm)
  285. {
  286. struct rtc_plat_data *pdata = dev_get_drvdata(dev);
  287. if (pdata->irq <= 0)
  288. return -EINVAL;
  289. alrm->time.tm_mday = pdata->alrm_mday < 0 ? 0 : pdata->alrm_mday;
  290. alrm->time.tm_hour = pdata->alrm_hour < 0 ? 0 : pdata->alrm_hour;
  291. alrm->time.tm_min = pdata->alrm_min < 0 ? 0 : pdata->alrm_min;
  292. alrm->time.tm_sec = pdata->alrm_sec < 0 ? 0 : pdata->alrm_sec;
  293. alrm->enabled = (pdata->irqen & RTC_AF) ? 1 : 0;
  294. return 0;
  295. }
  296. static irqreturn_t
  297. ds1511_interrupt(int irq, void *dev_id)
  298. {
  299. struct platform_device *pdev = dev_id;
  300. struct rtc_plat_data *pdata = platform_get_drvdata(pdev);
  301. unsigned long events = 0;
  302. spin_lock(&pdata->lock);
  303. /*
  304. * read and clear interrupt
  305. */
  306. if (rtc_read(RTC_CMD1) & DS1511_IRQF) {
  307. events = RTC_IRQF;
  308. if (rtc_read(RTC_ALARM_SEC) & 0x80)
  309. events |= RTC_UF;
  310. else
  311. events |= RTC_AF;
  312. rtc_update_irq(pdata->rtc, 1, events);
  313. }
  314. spin_unlock(&pdata->lock);
  315. return events ? IRQ_HANDLED : IRQ_NONE;
  316. }
  317. static int ds1511_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled)
  318. {
  319. struct rtc_plat_data *pdata = dev_get_drvdata(dev);
  320. if (pdata->irq <= 0)
  321. return -EINVAL;
  322. if (enabled)
  323. pdata->irqen |= RTC_AF;
  324. else
  325. pdata->irqen &= ~RTC_AF;
  326. ds1511_rtc_update_alarm(pdata);
  327. return 0;
  328. }
  329. static const struct rtc_class_ops ds1511_rtc_ops = {
  330. .read_time = ds1511_rtc_read_time,
  331. .set_time = ds1511_rtc_set_time,
  332. .read_alarm = ds1511_rtc_read_alarm,
  333. .set_alarm = ds1511_rtc_set_alarm,
  334. .alarm_irq_enable = ds1511_rtc_alarm_irq_enable,
  335. };
  336. static int ds1511_nvram_read(void *priv, unsigned int pos, void *buf,
  337. size_t size)
  338. {
  339. int i;
  340. rtc_write(pos, DS1511_RAMADDR_LSB);
  341. for (i = 0; i < size; i++)
  342. *(char *)buf++ = rtc_read(DS1511_RAMDATA);
  343. return 0;
  344. }
  345. static int ds1511_nvram_write(void *priv, unsigned int pos, void *buf,
  346. size_t size)
  347. {
  348. int i;
  349. rtc_write(pos, DS1511_RAMADDR_LSB);
  350. for (i = 0; i < size; i++)
  351. rtc_write(*(char *)buf++, DS1511_RAMDATA);
  352. return 0;
  353. }
  354. static int ds1511_rtc_probe(struct platform_device *pdev)
  355. {
  356. struct rtc_plat_data *pdata;
  357. int ret = 0;
  358. struct nvmem_config ds1511_nvmem_cfg = {
  359. .name = "ds1511_nvram",
  360. .word_size = 1,
  361. .stride = 1,
  362. .size = DS1511_RAM_MAX,
  363. .reg_read = ds1511_nvram_read,
  364. .reg_write = ds1511_nvram_write,
  365. .priv = &pdev->dev,
  366. };
  367. pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL);
  368. if (!pdata)
  369. return -ENOMEM;
  370. ds1511_base = devm_platform_ioremap_resource(pdev, 0);
  371. if (IS_ERR(ds1511_base))
  372. return PTR_ERR(ds1511_base);
  373. pdata->ioaddr = ds1511_base;
  374. pdata->irq = platform_get_irq(pdev, 0);
  375. /*
  376. * turn on the clock and the crystal, etc.
  377. */
  378. rtc_write(DS1511_BME, RTC_CMD);
  379. rtc_write(0, RTC_CMD1);
  380. /*
  381. * clear the wdog counter
  382. */
  383. rtc_write(0, DS1511_WD_MSEC);
  384. rtc_write(0, DS1511_WD_SEC);
  385. /*
  386. * start the clock
  387. */
  388. rtc_enable_update();
  389. /*
  390. * check for a dying bat-tree
  391. */
  392. if (rtc_read(RTC_CMD1) & DS1511_BLF1)
  393. dev_warn(&pdev->dev, "voltage-low detected.\n");
  394. spin_lock_init(&pdata->lock);
  395. platform_set_drvdata(pdev, pdata);
  396. pdata->rtc = devm_rtc_allocate_device(&pdev->dev);
  397. if (IS_ERR(pdata->rtc))
  398. return PTR_ERR(pdata->rtc);
  399. pdata->rtc->ops = &ds1511_rtc_ops;
  400. ret = devm_rtc_register_device(pdata->rtc);
  401. if (ret)
  402. return ret;
  403. devm_rtc_nvmem_register(pdata->rtc, &ds1511_nvmem_cfg);
  404. /*
  405. * if the platform has an interrupt in mind for this device,
  406. * then by all means, set it
  407. */
  408. if (pdata->irq > 0) {
  409. rtc_read(RTC_CMD1);
  410. if (devm_request_irq(&pdev->dev, pdata->irq, ds1511_interrupt,
  411. IRQF_SHARED, pdev->name, pdev) < 0) {
  412. dev_warn(&pdev->dev, "interrupt not available.\n");
  413. pdata->irq = 0;
  414. }
  415. }
  416. return 0;
  417. }
  418. /* work with hotplug and coldplug */
  419. MODULE_ALIAS("platform:ds1511");
  420. static struct platform_driver ds1511_rtc_driver = {
  421. .probe = ds1511_rtc_probe,
  422. .driver = {
  423. .name = "ds1511",
  424. },
  425. };
  426. module_platform_driver(ds1511_rtc_driver);
  427. MODULE_AUTHOR("Andrew Sharp <[email protected]>");
  428. MODULE_DESCRIPTION("Dallas DS1511 RTC driver");
  429. MODULE_LICENSE("GPL");