rtc-cmos.c 38 KB

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  1. // SPDX-License-Identifier: GPL-2.0-or-later
  2. /*
  3. * RTC class driver for "CMOS RTC": PCs, ACPI, etc
  4. *
  5. * Copyright (C) 1996 Paul Gortmaker (drivers/char/rtc.c)
  6. * Copyright (C) 2006 David Brownell (convert to new framework)
  7. */
  8. /*
  9. * The original "cmos clock" chip was an MC146818 chip, now obsolete.
  10. * That defined the register interface now provided by all PCs, some
  11. * non-PC systems, and incorporated into ACPI. Modern PC chipsets
  12. * integrate an MC146818 clone in their southbridge, and boards use
  13. * that instead of discrete clones like the DS12887 or M48T86. There
  14. * are also clones that connect using the LPC bus.
  15. *
  16. * That register API is also used directly by various other drivers
  17. * (notably for integrated NVRAM), infrastructure (x86 has code to
  18. * bypass the RTC framework, directly reading the RTC during boot
  19. * and updating minutes/seconds for systems using NTP synch) and
  20. * utilities (like userspace 'hwclock', if no /dev node exists).
  21. *
  22. * So **ALL** calls to CMOS_READ and CMOS_WRITE must be done with
  23. * interrupts disabled, holding the global rtc_lock, to exclude those
  24. * other drivers and utilities on correctly configured systems.
  25. */
  26. #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  27. #include <linux/kernel.h>
  28. #include <linux/module.h>
  29. #include <linux/init.h>
  30. #include <linux/interrupt.h>
  31. #include <linux/spinlock.h>
  32. #include <linux/platform_device.h>
  33. #include <linux/log2.h>
  34. #include <linux/pm.h>
  35. #include <linux/of.h>
  36. #include <linux/of_platform.h>
  37. #ifdef CONFIG_X86
  38. #include <asm/i8259.h>
  39. #include <asm/processor.h>
  40. #include <linux/dmi.h>
  41. #endif
  42. /* this is for "generic access to PC-style RTC" using CMOS_READ/CMOS_WRITE */
  43. #include <linux/mc146818rtc.h>
  44. #ifdef CONFIG_ACPI
  45. /*
  46. * Use ACPI SCI to replace HPET interrupt for RTC Alarm event
  47. *
  48. * If cleared, ACPI SCI is only used to wake up the system from suspend
  49. *
  50. * If set, ACPI SCI is used to handle UIE/AIE and system wakeup
  51. */
  52. static bool use_acpi_alarm;
  53. module_param(use_acpi_alarm, bool, 0444);
  54. static inline int cmos_use_acpi_alarm(void)
  55. {
  56. return use_acpi_alarm;
  57. }
  58. #else /* !CONFIG_ACPI */
  59. static inline int cmos_use_acpi_alarm(void)
  60. {
  61. return 0;
  62. }
  63. #endif
  64. struct cmos_rtc {
  65. struct rtc_device *rtc;
  66. struct device *dev;
  67. int irq;
  68. struct resource *iomem;
  69. time64_t alarm_expires;
  70. void (*wake_on)(struct device *);
  71. void (*wake_off)(struct device *);
  72. u8 enabled_wake;
  73. u8 suspend_ctrl;
  74. /* newer hardware extends the original register set */
  75. u8 day_alrm;
  76. u8 mon_alrm;
  77. u8 century;
  78. struct rtc_wkalrm saved_wkalrm;
  79. };
  80. /* both platform and pnp busses use negative numbers for invalid irqs */
  81. #define is_valid_irq(n) ((n) > 0)
  82. static const char driver_name[] = "rtc_cmos";
  83. /* The RTC_INTR register may have e.g. RTC_PF set even if RTC_PIE is clear;
  84. * always mask it against the irq enable bits in RTC_CONTROL. Bit values
  85. * are the same: PF==PIE, AF=AIE, UF=UIE; so RTC_IRQMASK works with both.
  86. */
  87. #define RTC_IRQMASK (RTC_PF | RTC_AF | RTC_UF)
  88. static inline int is_intr(u8 rtc_intr)
  89. {
  90. if (!(rtc_intr & RTC_IRQF))
  91. return 0;
  92. return rtc_intr & RTC_IRQMASK;
  93. }
  94. /*----------------------------------------------------------------*/
  95. /* Much modern x86 hardware has HPETs (10+ MHz timers) which, because
  96. * many BIOS programmers don't set up "sane mode" IRQ routing, are mostly
  97. * used in a broken "legacy replacement" mode. The breakage includes
  98. * HPET #1 hijacking the IRQ for this RTC, and being unavailable for
  99. * other (better) use.
  100. *
  101. * When that broken mode is in use, platform glue provides a partial
  102. * emulation of hardware RTC IRQ facilities using HPET #1. We don't
  103. * want to use HPET for anything except those IRQs though...
  104. */
  105. #ifdef CONFIG_HPET_EMULATE_RTC
  106. #include <asm/hpet.h>
  107. #else
  108. static inline int is_hpet_enabled(void)
  109. {
  110. return 0;
  111. }
  112. static inline int hpet_mask_rtc_irq_bit(unsigned long mask)
  113. {
  114. return 0;
  115. }
  116. static inline int hpet_set_rtc_irq_bit(unsigned long mask)
  117. {
  118. return 0;
  119. }
  120. static inline int
  121. hpet_set_alarm_time(unsigned char hrs, unsigned char min, unsigned char sec)
  122. {
  123. return 0;
  124. }
  125. static inline int hpet_set_periodic_freq(unsigned long freq)
  126. {
  127. return 0;
  128. }
  129. static inline int hpet_rtc_dropped_irq(void)
  130. {
  131. return 0;
  132. }
  133. static inline int hpet_rtc_timer_init(void)
  134. {
  135. return 0;
  136. }
  137. extern irq_handler_t hpet_rtc_interrupt;
  138. static inline int hpet_register_irq_handler(irq_handler_t handler)
  139. {
  140. return 0;
  141. }
  142. static inline int hpet_unregister_irq_handler(irq_handler_t handler)
  143. {
  144. return 0;
  145. }
  146. #endif
  147. /* Don't use HPET for RTC Alarm event if ACPI Fixed event is used */
  148. static inline int use_hpet_alarm(void)
  149. {
  150. return is_hpet_enabled() && !cmos_use_acpi_alarm();
  151. }
  152. /*----------------------------------------------------------------*/
  153. #ifdef RTC_PORT
  154. /* Most newer x86 systems have two register banks, the first used
  155. * for RTC and NVRAM and the second only for NVRAM. Caller must
  156. * own rtc_lock ... and we won't worry about access during NMI.
  157. */
  158. #define can_bank2 true
  159. static inline unsigned char cmos_read_bank2(unsigned char addr)
  160. {
  161. outb(addr, RTC_PORT(2));
  162. return inb(RTC_PORT(3));
  163. }
  164. static inline void cmos_write_bank2(unsigned char val, unsigned char addr)
  165. {
  166. outb(addr, RTC_PORT(2));
  167. outb(val, RTC_PORT(3));
  168. }
  169. #else
  170. #define can_bank2 false
  171. static inline unsigned char cmos_read_bank2(unsigned char addr)
  172. {
  173. return 0;
  174. }
  175. static inline void cmos_write_bank2(unsigned char val, unsigned char addr)
  176. {
  177. }
  178. #endif
  179. /*----------------------------------------------------------------*/
  180. static int cmos_read_time(struct device *dev, struct rtc_time *t)
  181. {
  182. int ret;
  183. /*
  184. * If pm_trace abused the RTC for storage, set the timespec to 0,
  185. * which tells the caller that this RTC value is unusable.
  186. */
  187. if (!pm_trace_rtc_valid())
  188. return -EIO;
  189. ret = mc146818_get_time(t);
  190. if (ret < 0) {
  191. dev_err_ratelimited(dev, "unable to read current time\n");
  192. return ret;
  193. }
  194. return 0;
  195. }
  196. static int cmos_set_time(struct device *dev, struct rtc_time *t)
  197. {
  198. /* NOTE: this ignores the issue whereby updating the seconds
  199. * takes effect exactly 500ms after we write the register.
  200. * (Also queueing and other delays before we get this far.)
  201. */
  202. return mc146818_set_time(t);
  203. }
  204. struct cmos_read_alarm_callback_param {
  205. struct cmos_rtc *cmos;
  206. struct rtc_time *time;
  207. unsigned char rtc_control;
  208. };
  209. static void cmos_read_alarm_callback(unsigned char __always_unused seconds,
  210. void *param_in)
  211. {
  212. struct cmos_read_alarm_callback_param *p =
  213. (struct cmos_read_alarm_callback_param *)param_in;
  214. struct rtc_time *time = p->time;
  215. time->tm_sec = CMOS_READ(RTC_SECONDS_ALARM);
  216. time->tm_min = CMOS_READ(RTC_MINUTES_ALARM);
  217. time->tm_hour = CMOS_READ(RTC_HOURS_ALARM);
  218. if (p->cmos->day_alrm) {
  219. /* ignore upper bits on readback per ACPI spec */
  220. time->tm_mday = CMOS_READ(p->cmos->day_alrm) & 0x3f;
  221. if (!time->tm_mday)
  222. time->tm_mday = -1;
  223. if (p->cmos->mon_alrm) {
  224. time->tm_mon = CMOS_READ(p->cmos->mon_alrm);
  225. if (!time->tm_mon)
  226. time->tm_mon = -1;
  227. }
  228. }
  229. p->rtc_control = CMOS_READ(RTC_CONTROL);
  230. }
  231. static int cmos_read_alarm(struct device *dev, struct rtc_wkalrm *t)
  232. {
  233. struct cmos_rtc *cmos = dev_get_drvdata(dev);
  234. struct cmos_read_alarm_callback_param p = {
  235. .cmos = cmos,
  236. .time = &t->time,
  237. };
  238. /* This not only a rtc_op, but also called directly */
  239. if (!is_valid_irq(cmos->irq))
  240. return -EIO;
  241. /* Basic alarms only support hour, minute, and seconds fields.
  242. * Some also support day and month, for alarms up to a year in
  243. * the future.
  244. */
  245. /* Some Intel chipsets disconnect the alarm registers when the clock
  246. * update is in progress - during this time reads return bogus values
  247. * and writes may fail silently. See for example "7th Generation Intel®
  248. * Processor Family I/O for U/Y Platforms [...] Datasheet", section
  249. * 27.7.1
  250. *
  251. * Use the mc146818_avoid_UIP() function to avoid this.
  252. */
  253. if (!mc146818_avoid_UIP(cmos_read_alarm_callback, &p))
  254. return -EIO;
  255. if (!(p.rtc_control & RTC_DM_BINARY) || RTC_ALWAYS_BCD) {
  256. if (((unsigned)t->time.tm_sec) < 0x60)
  257. t->time.tm_sec = bcd2bin(t->time.tm_sec);
  258. else
  259. t->time.tm_sec = -1;
  260. if (((unsigned)t->time.tm_min) < 0x60)
  261. t->time.tm_min = bcd2bin(t->time.tm_min);
  262. else
  263. t->time.tm_min = -1;
  264. if (((unsigned)t->time.tm_hour) < 0x24)
  265. t->time.tm_hour = bcd2bin(t->time.tm_hour);
  266. else
  267. t->time.tm_hour = -1;
  268. if (cmos->day_alrm) {
  269. if (((unsigned)t->time.tm_mday) <= 0x31)
  270. t->time.tm_mday = bcd2bin(t->time.tm_mday);
  271. else
  272. t->time.tm_mday = -1;
  273. if (cmos->mon_alrm) {
  274. if (((unsigned)t->time.tm_mon) <= 0x12)
  275. t->time.tm_mon = bcd2bin(t->time.tm_mon)-1;
  276. else
  277. t->time.tm_mon = -1;
  278. }
  279. }
  280. }
  281. t->enabled = !!(p.rtc_control & RTC_AIE);
  282. t->pending = 0;
  283. return 0;
  284. }
  285. static void cmos_checkintr(struct cmos_rtc *cmos, unsigned char rtc_control)
  286. {
  287. unsigned char rtc_intr;
  288. /* NOTE after changing RTC_xIE bits we always read INTR_FLAGS;
  289. * allegedly some older rtcs need that to handle irqs properly
  290. */
  291. rtc_intr = CMOS_READ(RTC_INTR_FLAGS);
  292. if (use_hpet_alarm())
  293. return;
  294. rtc_intr &= (rtc_control & RTC_IRQMASK) | RTC_IRQF;
  295. if (is_intr(rtc_intr))
  296. rtc_update_irq(cmos->rtc, 1, rtc_intr);
  297. }
  298. static void cmos_irq_enable(struct cmos_rtc *cmos, unsigned char mask)
  299. {
  300. unsigned char rtc_control;
  301. /* flush any pending IRQ status, notably for update irqs,
  302. * before we enable new IRQs
  303. */
  304. rtc_control = CMOS_READ(RTC_CONTROL);
  305. cmos_checkintr(cmos, rtc_control);
  306. rtc_control |= mask;
  307. CMOS_WRITE(rtc_control, RTC_CONTROL);
  308. if (use_hpet_alarm())
  309. hpet_set_rtc_irq_bit(mask);
  310. if ((mask & RTC_AIE) && cmos_use_acpi_alarm()) {
  311. if (cmos->wake_on)
  312. cmos->wake_on(cmos->dev);
  313. }
  314. cmos_checkintr(cmos, rtc_control);
  315. }
  316. static void cmos_irq_disable(struct cmos_rtc *cmos, unsigned char mask)
  317. {
  318. unsigned char rtc_control;
  319. rtc_control = CMOS_READ(RTC_CONTROL);
  320. rtc_control &= ~mask;
  321. CMOS_WRITE(rtc_control, RTC_CONTROL);
  322. if (use_hpet_alarm())
  323. hpet_mask_rtc_irq_bit(mask);
  324. if ((mask & RTC_AIE) && cmos_use_acpi_alarm()) {
  325. if (cmos->wake_off)
  326. cmos->wake_off(cmos->dev);
  327. }
  328. cmos_checkintr(cmos, rtc_control);
  329. }
  330. static int cmos_validate_alarm(struct device *dev, struct rtc_wkalrm *t)
  331. {
  332. struct cmos_rtc *cmos = dev_get_drvdata(dev);
  333. struct rtc_time now;
  334. cmos_read_time(dev, &now);
  335. if (!cmos->day_alrm) {
  336. time64_t t_max_date;
  337. time64_t t_alrm;
  338. t_max_date = rtc_tm_to_time64(&now);
  339. t_max_date += 24 * 60 * 60 - 1;
  340. t_alrm = rtc_tm_to_time64(&t->time);
  341. if (t_alrm > t_max_date) {
  342. dev_err(dev,
  343. "Alarms can be up to one day in the future\n");
  344. return -EINVAL;
  345. }
  346. } else if (!cmos->mon_alrm) {
  347. struct rtc_time max_date = now;
  348. time64_t t_max_date;
  349. time64_t t_alrm;
  350. int max_mday;
  351. if (max_date.tm_mon == 11) {
  352. max_date.tm_mon = 0;
  353. max_date.tm_year += 1;
  354. } else {
  355. max_date.tm_mon += 1;
  356. }
  357. max_mday = rtc_month_days(max_date.tm_mon, max_date.tm_year);
  358. if (max_date.tm_mday > max_mday)
  359. max_date.tm_mday = max_mday;
  360. t_max_date = rtc_tm_to_time64(&max_date);
  361. t_max_date -= 1;
  362. t_alrm = rtc_tm_to_time64(&t->time);
  363. if (t_alrm > t_max_date) {
  364. dev_err(dev,
  365. "Alarms can be up to one month in the future\n");
  366. return -EINVAL;
  367. }
  368. } else {
  369. struct rtc_time max_date = now;
  370. time64_t t_max_date;
  371. time64_t t_alrm;
  372. int max_mday;
  373. max_date.tm_year += 1;
  374. max_mday = rtc_month_days(max_date.tm_mon, max_date.tm_year);
  375. if (max_date.tm_mday > max_mday)
  376. max_date.tm_mday = max_mday;
  377. t_max_date = rtc_tm_to_time64(&max_date);
  378. t_max_date -= 1;
  379. t_alrm = rtc_tm_to_time64(&t->time);
  380. if (t_alrm > t_max_date) {
  381. dev_err(dev,
  382. "Alarms can be up to one year in the future\n");
  383. return -EINVAL;
  384. }
  385. }
  386. return 0;
  387. }
  388. struct cmos_set_alarm_callback_param {
  389. struct cmos_rtc *cmos;
  390. unsigned char mon, mday, hrs, min, sec;
  391. struct rtc_wkalrm *t;
  392. };
  393. /* Note: this function may be executed by mc146818_avoid_UIP() more then
  394. * once
  395. */
  396. static void cmos_set_alarm_callback(unsigned char __always_unused seconds,
  397. void *param_in)
  398. {
  399. struct cmos_set_alarm_callback_param *p =
  400. (struct cmos_set_alarm_callback_param *)param_in;
  401. /* next rtc irq must not be from previous alarm setting */
  402. cmos_irq_disable(p->cmos, RTC_AIE);
  403. /* update alarm */
  404. CMOS_WRITE(p->hrs, RTC_HOURS_ALARM);
  405. CMOS_WRITE(p->min, RTC_MINUTES_ALARM);
  406. CMOS_WRITE(p->sec, RTC_SECONDS_ALARM);
  407. /* the system may support an "enhanced" alarm */
  408. if (p->cmos->day_alrm) {
  409. CMOS_WRITE(p->mday, p->cmos->day_alrm);
  410. if (p->cmos->mon_alrm)
  411. CMOS_WRITE(p->mon, p->cmos->mon_alrm);
  412. }
  413. if (use_hpet_alarm()) {
  414. /*
  415. * FIXME the HPET alarm glue currently ignores day_alrm
  416. * and mon_alrm ...
  417. */
  418. hpet_set_alarm_time(p->t->time.tm_hour, p->t->time.tm_min,
  419. p->t->time.tm_sec);
  420. }
  421. if (p->t->enabled)
  422. cmos_irq_enable(p->cmos, RTC_AIE);
  423. }
  424. static int cmos_set_alarm(struct device *dev, struct rtc_wkalrm *t)
  425. {
  426. struct cmos_rtc *cmos = dev_get_drvdata(dev);
  427. struct cmos_set_alarm_callback_param p = {
  428. .cmos = cmos,
  429. .t = t
  430. };
  431. unsigned char rtc_control;
  432. int ret;
  433. /* This not only a rtc_op, but also called directly */
  434. if (!is_valid_irq(cmos->irq))
  435. return -EIO;
  436. ret = cmos_validate_alarm(dev, t);
  437. if (ret < 0)
  438. return ret;
  439. p.mon = t->time.tm_mon + 1;
  440. p.mday = t->time.tm_mday;
  441. p.hrs = t->time.tm_hour;
  442. p.min = t->time.tm_min;
  443. p.sec = t->time.tm_sec;
  444. spin_lock_irq(&rtc_lock);
  445. rtc_control = CMOS_READ(RTC_CONTROL);
  446. spin_unlock_irq(&rtc_lock);
  447. if (!(rtc_control & RTC_DM_BINARY) || RTC_ALWAYS_BCD) {
  448. /* Writing 0xff means "don't care" or "match all". */
  449. p.mon = (p.mon <= 12) ? bin2bcd(p.mon) : 0xff;
  450. p.mday = (p.mday >= 1 && p.mday <= 31) ? bin2bcd(p.mday) : 0xff;
  451. p.hrs = (p.hrs < 24) ? bin2bcd(p.hrs) : 0xff;
  452. p.min = (p.min < 60) ? bin2bcd(p.min) : 0xff;
  453. p.sec = (p.sec < 60) ? bin2bcd(p.sec) : 0xff;
  454. }
  455. /*
  456. * Some Intel chipsets disconnect the alarm registers when the clock
  457. * update is in progress - during this time writes fail silently.
  458. *
  459. * Use mc146818_avoid_UIP() to avoid this.
  460. */
  461. if (!mc146818_avoid_UIP(cmos_set_alarm_callback, &p))
  462. return -EIO;
  463. cmos->alarm_expires = rtc_tm_to_time64(&t->time);
  464. return 0;
  465. }
  466. static int cmos_alarm_irq_enable(struct device *dev, unsigned int enabled)
  467. {
  468. struct cmos_rtc *cmos = dev_get_drvdata(dev);
  469. unsigned long flags;
  470. spin_lock_irqsave(&rtc_lock, flags);
  471. if (enabled)
  472. cmos_irq_enable(cmos, RTC_AIE);
  473. else
  474. cmos_irq_disable(cmos, RTC_AIE);
  475. spin_unlock_irqrestore(&rtc_lock, flags);
  476. return 0;
  477. }
  478. #if IS_ENABLED(CONFIG_RTC_INTF_PROC)
  479. static int cmos_procfs(struct device *dev, struct seq_file *seq)
  480. {
  481. struct cmos_rtc *cmos = dev_get_drvdata(dev);
  482. unsigned char rtc_control, valid;
  483. spin_lock_irq(&rtc_lock);
  484. rtc_control = CMOS_READ(RTC_CONTROL);
  485. valid = CMOS_READ(RTC_VALID);
  486. spin_unlock_irq(&rtc_lock);
  487. /* NOTE: at least ICH6 reports battery status using a different
  488. * (non-RTC) bit; and SQWE is ignored on many current systems.
  489. */
  490. seq_printf(seq,
  491. "periodic_IRQ\t: %s\n"
  492. "update_IRQ\t: %s\n"
  493. "HPET_emulated\t: %s\n"
  494. // "square_wave\t: %s\n"
  495. "BCD\t\t: %s\n"
  496. "DST_enable\t: %s\n"
  497. "periodic_freq\t: %d\n"
  498. "batt_status\t: %s\n",
  499. (rtc_control & RTC_PIE) ? "yes" : "no",
  500. (rtc_control & RTC_UIE) ? "yes" : "no",
  501. use_hpet_alarm() ? "yes" : "no",
  502. // (rtc_control & RTC_SQWE) ? "yes" : "no",
  503. (rtc_control & RTC_DM_BINARY) ? "no" : "yes",
  504. (rtc_control & RTC_DST_EN) ? "yes" : "no",
  505. cmos->rtc->irq_freq,
  506. (valid & RTC_VRT) ? "okay" : "dead");
  507. return 0;
  508. }
  509. #else
  510. #define cmos_procfs NULL
  511. #endif
  512. static const struct rtc_class_ops cmos_rtc_ops = {
  513. .read_time = cmos_read_time,
  514. .set_time = cmos_set_time,
  515. .read_alarm = cmos_read_alarm,
  516. .set_alarm = cmos_set_alarm,
  517. .proc = cmos_procfs,
  518. .alarm_irq_enable = cmos_alarm_irq_enable,
  519. };
  520. /*----------------------------------------------------------------*/
  521. /*
  522. * All these chips have at least 64 bytes of address space, shared by
  523. * RTC registers and NVRAM. Most of those bytes of NVRAM are used
  524. * by boot firmware. Modern chips have 128 or 256 bytes.
  525. */
  526. #define NVRAM_OFFSET (RTC_REG_D + 1)
  527. static int cmos_nvram_read(void *priv, unsigned int off, void *val,
  528. size_t count)
  529. {
  530. unsigned char *buf = val;
  531. int retval;
  532. off += NVRAM_OFFSET;
  533. spin_lock_irq(&rtc_lock);
  534. for (retval = 0; count; count--, off++, retval++) {
  535. if (off < 128)
  536. *buf++ = CMOS_READ(off);
  537. else if (can_bank2)
  538. *buf++ = cmos_read_bank2(off);
  539. else
  540. break;
  541. }
  542. spin_unlock_irq(&rtc_lock);
  543. return retval;
  544. }
  545. static int cmos_nvram_write(void *priv, unsigned int off, void *val,
  546. size_t count)
  547. {
  548. struct cmos_rtc *cmos = priv;
  549. unsigned char *buf = val;
  550. int retval;
  551. /* NOTE: on at least PCs and Ataris, the boot firmware uses a
  552. * checksum on part of the NVRAM data. That's currently ignored
  553. * here. If userspace is smart enough to know what fields of
  554. * NVRAM to update, updating checksums is also part of its job.
  555. */
  556. off += NVRAM_OFFSET;
  557. spin_lock_irq(&rtc_lock);
  558. for (retval = 0; count; count--, off++, retval++) {
  559. /* don't trash RTC registers */
  560. if (off == cmos->day_alrm
  561. || off == cmos->mon_alrm
  562. || off == cmos->century)
  563. buf++;
  564. else if (off < 128)
  565. CMOS_WRITE(*buf++, off);
  566. else if (can_bank2)
  567. cmos_write_bank2(*buf++, off);
  568. else
  569. break;
  570. }
  571. spin_unlock_irq(&rtc_lock);
  572. return retval;
  573. }
  574. /*----------------------------------------------------------------*/
  575. static struct cmos_rtc cmos_rtc;
  576. static irqreturn_t cmos_interrupt(int irq, void *p)
  577. {
  578. u8 irqstat;
  579. u8 rtc_control;
  580. spin_lock(&rtc_lock);
  581. /* When the HPET interrupt handler calls us, the interrupt
  582. * status is passed as arg1 instead of the irq number. But
  583. * always clear irq status, even when HPET is in the way.
  584. *
  585. * Note that HPET and RTC are almost certainly out of phase,
  586. * giving different IRQ status ...
  587. */
  588. irqstat = CMOS_READ(RTC_INTR_FLAGS);
  589. rtc_control = CMOS_READ(RTC_CONTROL);
  590. if (use_hpet_alarm())
  591. irqstat = (unsigned long)irq & 0xF0;
  592. /* If we were suspended, RTC_CONTROL may not be accurate since the
  593. * bios may have cleared it.
  594. */
  595. if (!cmos_rtc.suspend_ctrl)
  596. irqstat &= (rtc_control & RTC_IRQMASK) | RTC_IRQF;
  597. else
  598. irqstat &= (cmos_rtc.suspend_ctrl & RTC_IRQMASK) | RTC_IRQF;
  599. /* All Linux RTC alarms should be treated as if they were oneshot.
  600. * Similar code may be needed in system wakeup paths, in case the
  601. * alarm woke the system.
  602. */
  603. if (irqstat & RTC_AIE) {
  604. cmos_rtc.suspend_ctrl &= ~RTC_AIE;
  605. rtc_control &= ~RTC_AIE;
  606. CMOS_WRITE(rtc_control, RTC_CONTROL);
  607. if (use_hpet_alarm())
  608. hpet_mask_rtc_irq_bit(RTC_AIE);
  609. CMOS_READ(RTC_INTR_FLAGS);
  610. }
  611. spin_unlock(&rtc_lock);
  612. if (is_intr(irqstat)) {
  613. rtc_update_irq(p, 1, irqstat);
  614. return IRQ_HANDLED;
  615. } else
  616. return IRQ_NONE;
  617. }
  618. #ifdef CONFIG_ACPI
  619. #include <linux/acpi.h>
  620. static u32 rtc_handler(void *context)
  621. {
  622. struct device *dev = context;
  623. struct cmos_rtc *cmos = dev_get_drvdata(dev);
  624. unsigned char rtc_control = 0;
  625. unsigned char rtc_intr;
  626. unsigned long flags;
  627. /*
  628. * Always update rtc irq when ACPI is used as RTC Alarm.
  629. * Or else, ACPI SCI is enabled during suspend/resume only,
  630. * update rtc irq in that case.
  631. */
  632. if (cmos_use_acpi_alarm())
  633. cmos_interrupt(0, (void *)cmos->rtc);
  634. else {
  635. /* Fix me: can we use cmos_interrupt() here as well? */
  636. spin_lock_irqsave(&rtc_lock, flags);
  637. if (cmos_rtc.suspend_ctrl)
  638. rtc_control = CMOS_READ(RTC_CONTROL);
  639. if (rtc_control & RTC_AIE) {
  640. cmos_rtc.suspend_ctrl &= ~RTC_AIE;
  641. CMOS_WRITE(rtc_control, RTC_CONTROL);
  642. rtc_intr = CMOS_READ(RTC_INTR_FLAGS);
  643. rtc_update_irq(cmos->rtc, 1, rtc_intr);
  644. }
  645. spin_unlock_irqrestore(&rtc_lock, flags);
  646. }
  647. pm_wakeup_hard_event(dev);
  648. acpi_clear_event(ACPI_EVENT_RTC);
  649. acpi_disable_event(ACPI_EVENT_RTC, 0);
  650. return ACPI_INTERRUPT_HANDLED;
  651. }
  652. static void acpi_rtc_event_setup(struct device *dev)
  653. {
  654. if (acpi_disabled)
  655. return;
  656. acpi_install_fixed_event_handler(ACPI_EVENT_RTC, rtc_handler, dev);
  657. /*
  658. * After the RTC handler is installed, the Fixed_RTC event should
  659. * be disabled. Only when the RTC alarm is set will it be enabled.
  660. */
  661. acpi_clear_event(ACPI_EVENT_RTC);
  662. acpi_disable_event(ACPI_EVENT_RTC, 0);
  663. }
  664. static void acpi_rtc_event_cleanup(void)
  665. {
  666. if (acpi_disabled)
  667. return;
  668. acpi_remove_fixed_event_handler(ACPI_EVENT_RTC, rtc_handler);
  669. }
  670. static void rtc_wake_on(struct device *dev)
  671. {
  672. acpi_clear_event(ACPI_EVENT_RTC);
  673. acpi_enable_event(ACPI_EVENT_RTC, 0);
  674. }
  675. static void rtc_wake_off(struct device *dev)
  676. {
  677. acpi_disable_event(ACPI_EVENT_RTC, 0);
  678. }
  679. #ifdef CONFIG_X86
  680. /* Enable use_acpi_alarm mode for Intel platforms no earlier than 2015 */
  681. static void use_acpi_alarm_quirks(void)
  682. {
  683. if (boot_cpu_data.x86_vendor != X86_VENDOR_INTEL)
  684. return;
  685. if (!is_hpet_enabled())
  686. return;
  687. if (dmi_get_bios_year() < 2015)
  688. return;
  689. use_acpi_alarm = true;
  690. }
  691. #else
  692. static inline void use_acpi_alarm_quirks(void) { }
  693. #endif
  694. static void acpi_cmos_wake_setup(struct device *dev)
  695. {
  696. if (acpi_disabled)
  697. return;
  698. use_acpi_alarm_quirks();
  699. cmos_rtc.wake_on = rtc_wake_on;
  700. cmos_rtc.wake_off = rtc_wake_off;
  701. /* ACPI tables bug workaround. */
  702. if (acpi_gbl_FADT.month_alarm && !acpi_gbl_FADT.day_alarm) {
  703. dev_dbg(dev, "bogus FADT month_alarm (%d)\n",
  704. acpi_gbl_FADT.month_alarm);
  705. acpi_gbl_FADT.month_alarm = 0;
  706. }
  707. cmos_rtc.day_alrm = acpi_gbl_FADT.day_alarm;
  708. cmos_rtc.mon_alrm = acpi_gbl_FADT.month_alarm;
  709. cmos_rtc.century = acpi_gbl_FADT.century;
  710. if (acpi_gbl_FADT.flags & ACPI_FADT_S4_RTC_WAKE)
  711. dev_info(dev, "RTC can wake from S4\n");
  712. /* RTC always wakes from S1/S2/S3, and often S4/STD */
  713. device_init_wakeup(dev, 1);
  714. }
  715. static void cmos_check_acpi_rtc_status(struct device *dev,
  716. unsigned char *rtc_control)
  717. {
  718. struct cmos_rtc *cmos = dev_get_drvdata(dev);
  719. acpi_event_status rtc_status;
  720. acpi_status status;
  721. if (acpi_gbl_FADT.flags & ACPI_FADT_FIXED_RTC)
  722. return;
  723. status = acpi_get_event_status(ACPI_EVENT_RTC, &rtc_status);
  724. if (ACPI_FAILURE(status)) {
  725. dev_err(dev, "Could not get RTC status\n");
  726. } else if (rtc_status & ACPI_EVENT_FLAG_SET) {
  727. unsigned char mask;
  728. *rtc_control &= ~RTC_AIE;
  729. CMOS_WRITE(*rtc_control, RTC_CONTROL);
  730. mask = CMOS_READ(RTC_INTR_FLAGS);
  731. rtc_update_irq(cmos->rtc, 1, mask);
  732. }
  733. }
  734. #else /* !CONFIG_ACPI */
  735. static inline void acpi_rtc_event_setup(struct device *dev)
  736. {
  737. }
  738. static inline void acpi_rtc_event_cleanup(void)
  739. {
  740. }
  741. static inline void acpi_cmos_wake_setup(struct device *dev)
  742. {
  743. }
  744. static inline void cmos_check_acpi_rtc_status(struct device *dev,
  745. unsigned char *rtc_control)
  746. {
  747. }
  748. #endif /* CONFIG_ACPI */
  749. #ifdef CONFIG_PNP
  750. #define INITSECTION
  751. #else
  752. #define INITSECTION __init
  753. #endif
  754. static int INITSECTION
  755. cmos_do_probe(struct device *dev, struct resource *ports, int rtc_irq)
  756. {
  757. struct cmos_rtc_board_info *info = dev_get_platdata(dev);
  758. int retval = 0;
  759. unsigned char rtc_control;
  760. unsigned address_space;
  761. u32 flags = 0;
  762. struct nvmem_config nvmem_cfg = {
  763. .name = "cmos_nvram",
  764. .word_size = 1,
  765. .stride = 1,
  766. .reg_read = cmos_nvram_read,
  767. .reg_write = cmos_nvram_write,
  768. .priv = &cmos_rtc,
  769. };
  770. /* there can be only one ... */
  771. if (cmos_rtc.dev)
  772. return -EBUSY;
  773. if (!ports)
  774. return -ENODEV;
  775. /* Claim I/O ports ASAP, minimizing conflict with legacy driver.
  776. *
  777. * REVISIT non-x86 systems may instead use memory space resources
  778. * (needing ioremap etc), not i/o space resources like this ...
  779. */
  780. if (RTC_IOMAPPED)
  781. ports = request_region(ports->start, resource_size(ports),
  782. driver_name);
  783. else
  784. ports = request_mem_region(ports->start, resource_size(ports),
  785. driver_name);
  786. if (!ports) {
  787. dev_dbg(dev, "i/o registers already in use\n");
  788. return -EBUSY;
  789. }
  790. cmos_rtc.irq = rtc_irq;
  791. cmos_rtc.iomem = ports;
  792. /* Heuristic to deduce NVRAM size ... do what the legacy NVRAM
  793. * driver did, but don't reject unknown configs. Old hardware
  794. * won't address 128 bytes. Newer chips have multiple banks,
  795. * though they may not be listed in one I/O resource.
  796. */
  797. #if defined(CONFIG_ATARI)
  798. address_space = 64;
  799. #elif defined(__i386__) || defined(__x86_64__) || defined(__arm__) \
  800. || defined(__sparc__) || defined(__mips__) \
  801. || defined(__powerpc__)
  802. address_space = 128;
  803. #else
  804. #warning Assuming 128 bytes of RTC+NVRAM address space, not 64 bytes.
  805. address_space = 128;
  806. #endif
  807. if (can_bank2 && ports->end > (ports->start + 1))
  808. address_space = 256;
  809. /* For ACPI systems extension info comes from the FADT. On others,
  810. * board specific setup provides it as appropriate. Systems where
  811. * the alarm IRQ isn't automatically a wakeup IRQ (like ACPI, and
  812. * some almost-clones) can provide hooks to make that behave.
  813. *
  814. * Note that ACPI doesn't preclude putting these registers into
  815. * "extended" areas of the chip, including some that we won't yet
  816. * expect CMOS_READ and friends to handle.
  817. */
  818. if (info) {
  819. if (info->flags)
  820. flags = info->flags;
  821. if (info->address_space)
  822. address_space = info->address_space;
  823. cmos_rtc.day_alrm = info->rtc_day_alarm;
  824. cmos_rtc.mon_alrm = info->rtc_mon_alarm;
  825. cmos_rtc.century = info->rtc_century;
  826. if (info->wake_on && info->wake_off) {
  827. cmos_rtc.wake_on = info->wake_on;
  828. cmos_rtc.wake_off = info->wake_off;
  829. }
  830. } else {
  831. acpi_cmos_wake_setup(dev);
  832. }
  833. if (cmos_rtc.day_alrm >= 128)
  834. cmos_rtc.day_alrm = 0;
  835. if (cmos_rtc.mon_alrm >= 128)
  836. cmos_rtc.mon_alrm = 0;
  837. if (cmos_rtc.century >= 128)
  838. cmos_rtc.century = 0;
  839. cmos_rtc.dev = dev;
  840. dev_set_drvdata(dev, &cmos_rtc);
  841. cmos_rtc.rtc = devm_rtc_allocate_device(dev);
  842. if (IS_ERR(cmos_rtc.rtc)) {
  843. retval = PTR_ERR(cmos_rtc.rtc);
  844. goto cleanup0;
  845. }
  846. rename_region(ports, dev_name(&cmos_rtc.rtc->dev));
  847. if (!mc146818_does_rtc_work()) {
  848. dev_warn(dev, "broken or not accessible\n");
  849. retval = -ENXIO;
  850. goto cleanup1;
  851. }
  852. spin_lock_irq(&rtc_lock);
  853. if (!(flags & CMOS_RTC_FLAGS_NOFREQ)) {
  854. /* force periodic irq to CMOS reset default of 1024Hz;
  855. *
  856. * REVISIT it's been reported that at least one x86_64 ALI
  857. * mobo doesn't use 32KHz here ... for portability we might
  858. * need to do something about other clock frequencies.
  859. */
  860. cmos_rtc.rtc->irq_freq = 1024;
  861. if (use_hpet_alarm())
  862. hpet_set_periodic_freq(cmos_rtc.rtc->irq_freq);
  863. CMOS_WRITE(RTC_REF_CLCK_32KHZ | 0x06, RTC_FREQ_SELECT);
  864. }
  865. /* disable irqs */
  866. if (is_valid_irq(rtc_irq))
  867. cmos_irq_disable(&cmos_rtc, RTC_PIE | RTC_AIE | RTC_UIE);
  868. rtc_control = CMOS_READ(RTC_CONTROL);
  869. spin_unlock_irq(&rtc_lock);
  870. if (is_valid_irq(rtc_irq) && !(rtc_control & RTC_24H)) {
  871. dev_warn(dev, "only 24-hr supported\n");
  872. retval = -ENXIO;
  873. goto cleanup1;
  874. }
  875. if (use_hpet_alarm())
  876. hpet_rtc_timer_init();
  877. if (is_valid_irq(rtc_irq)) {
  878. irq_handler_t rtc_cmos_int_handler;
  879. if (use_hpet_alarm()) {
  880. rtc_cmos_int_handler = hpet_rtc_interrupt;
  881. retval = hpet_register_irq_handler(cmos_interrupt);
  882. if (retval) {
  883. hpet_mask_rtc_irq_bit(RTC_IRQMASK);
  884. dev_warn(dev, "hpet_register_irq_handler "
  885. " failed in rtc_init().");
  886. goto cleanup1;
  887. }
  888. } else
  889. rtc_cmos_int_handler = cmos_interrupt;
  890. retval = request_irq(rtc_irq, rtc_cmos_int_handler,
  891. 0, dev_name(&cmos_rtc.rtc->dev),
  892. cmos_rtc.rtc);
  893. if (retval < 0) {
  894. dev_dbg(dev, "IRQ %d is already in use\n", rtc_irq);
  895. goto cleanup1;
  896. }
  897. } else {
  898. clear_bit(RTC_FEATURE_ALARM, cmos_rtc.rtc->features);
  899. }
  900. cmos_rtc.rtc->ops = &cmos_rtc_ops;
  901. retval = devm_rtc_register_device(cmos_rtc.rtc);
  902. if (retval)
  903. goto cleanup2;
  904. /* Set the sync offset for the periodic 11min update correct */
  905. cmos_rtc.rtc->set_offset_nsec = NSEC_PER_SEC / 2;
  906. /* export at least the first block of NVRAM */
  907. nvmem_cfg.size = address_space - NVRAM_OFFSET;
  908. devm_rtc_nvmem_register(cmos_rtc.rtc, &nvmem_cfg);
  909. /*
  910. * Everything has gone well so far, so by default register a handler for
  911. * the ACPI RTC fixed event.
  912. */
  913. if (!info)
  914. acpi_rtc_event_setup(dev);
  915. dev_info(dev, "%s%s, %d bytes nvram%s\n",
  916. !is_valid_irq(rtc_irq) ? "no alarms" :
  917. cmos_rtc.mon_alrm ? "alarms up to one year" :
  918. cmos_rtc.day_alrm ? "alarms up to one month" :
  919. "alarms up to one day",
  920. cmos_rtc.century ? ", y3k" : "",
  921. nvmem_cfg.size,
  922. use_hpet_alarm() ? ", hpet irqs" : "");
  923. return 0;
  924. cleanup2:
  925. if (is_valid_irq(rtc_irq))
  926. free_irq(rtc_irq, cmos_rtc.rtc);
  927. cleanup1:
  928. cmos_rtc.dev = NULL;
  929. cleanup0:
  930. if (RTC_IOMAPPED)
  931. release_region(ports->start, resource_size(ports));
  932. else
  933. release_mem_region(ports->start, resource_size(ports));
  934. return retval;
  935. }
  936. static void cmos_do_shutdown(int rtc_irq)
  937. {
  938. spin_lock_irq(&rtc_lock);
  939. if (is_valid_irq(rtc_irq))
  940. cmos_irq_disable(&cmos_rtc, RTC_IRQMASK);
  941. spin_unlock_irq(&rtc_lock);
  942. }
  943. static void cmos_do_remove(struct device *dev)
  944. {
  945. struct cmos_rtc *cmos = dev_get_drvdata(dev);
  946. struct resource *ports;
  947. cmos_do_shutdown(cmos->irq);
  948. if (is_valid_irq(cmos->irq)) {
  949. free_irq(cmos->irq, cmos->rtc);
  950. if (use_hpet_alarm())
  951. hpet_unregister_irq_handler(cmos_interrupt);
  952. }
  953. if (!dev_get_platdata(dev))
  954. acpi_rtc_event_cleanup();
  955. cmos->rtc = NULL;
  956. ports = cmos->iomem;
  957. if (RTC_IOMAPPED)
  958. release_region(ports->start, resource_size(ports));
  959. else
  960. release_mem_region(ports->start, resource_size(ports));
  961. cmos->iomem = NULL;
  962. cmos->dev = NULL;
  963. }
  964. static int cmos_aie_poweroff(struct device *dev)
  965. {
  966. struct cmos_rtc *cmos = dev_get_drvdata(dev);
  967. struct rtc_time now;
  968. time64_t t_now;
  969. int retval = 0;
  970. unsigned char rtc_control;
  971. if (!cmos->alarm_expires)
  972. return -EINVAL;
  973. spin_lock_irq(&rtc_lock);
  974. rtc_control = CMOS_READ(RTC_CONTROL);
  975. spin_unlock_irq(&rtc_lock);
  976. /* We only care about the situation where AIE is disabled. */
  977. if (rtc_control & RTC_AIE)
  978. return -EBUSY;
  979. cmos_read_time(dev, &now);
  980. t_now = rtc_tm_to_time64(&now);
  981. /*
  982. * When enabling "RTC wake-up" in BIOS setup, the machine reboots
  983. * automatically right after shutdown on some buggy boxes.
  984. * This automatic rebooting issue won't happen when the alarm
  985. * time is larger than now+1 seconds.
  986. *
  987. * If the alarm time is equal to now+1 seconds, the issue can be
  988. * prevented by cancelling the alarm.
  989. */
  990. if (cmos->alarm_expires == t_now + 1) {
  991. struct rtc_wkalrm alarm;
  992. /* Cancel the AIE timer by configuring the past time. */
  993. rtc_time64_to_tm(t_now - 1, &alarm.time);
  994. alarm.enabled = 0;
  995. retval = cmos_set_alarm(dev, &alarm);
  996. } else if (cmos->alarm_expires > t_now + 1) {
  997. retval = -EBUSY;
  998. }
  999. return retval;
  1000. }
  1001. static int cmos_suspend(struct device *dev)
  1002. {
  1003. struct cmos_rtc *cmos = dev_get_drvdata(dev);
  1004. unsigned char tmp;
  1005. /* only the alarm might be a wakeup event source */
  1006. spin_lock_irq(&rtc_lock);
  1007. cmos->suspend_ctrl = tmp = CMOS_READ(RTC_CONTROL);
  1008. if (tmp & (RTC_PIE|RTC_AIE|RTC_UIE)) {
  1009. unsigned char mask;
  1010. if (device_may_wakeup(dev))
  1011. mask = RTC_IRQMASK & ~RTC_AIE;
  1012. else
  1013. mask = RTC_IRQMASK;
  1014. tmp &= ~mask;
  1015. CMOS_WRITE(tmp, RTC_CONTROL);
  1016. if (use_hpet_alarm())
  1017. hpet_mask_rtc_irq_bit(mask);
  1018. cmos_checkintr(cmos, tmp);
  1019. }
  1020. spin_unlock_irq(&rtc_lock);
  1021. if ((tmp & RTC_AIE) && !cmos_use_acpi_alarm()) {
  1022. cmos->enabled_wake = 1;
  1023. if (cmos->wake_on)
  1024. cmos->wake_on(dev);
  1025. else
  1026. enable_irq_wake(cmos->irq);
  1027. }
  1028. memset(&cmos->saved_wkalrm, 0, sizeof(struct rtc_wkalrm));
  1029. cmos_read_alarm(dev, &cmos->saved_wkalrm);
  1030. dev_dbg(dev, "suspend%s, ctrl %02x\n",
  1031. (tmp & RTC_AIE) ? ", alarm may wake" : "",
  1032. tmp);
  1033. return 0;
  1034. }
  1035. /* We want RTC alarms to wake us from e.g. ACPI G2/S5 "soft off", even
  1036. * after a detour through G3 "mechanical off", although the ACPI spec
  1037. * says wakeup should only work from G1/S4 "hibernate". To most users,
  1038. * distinctions between S4 and S5 are pointless. So when the hardware
  1039. * allows, don't draw that distinction.
  1040. */
  1041. static inline int cmos_poweroff(struct device *dev)
  1042. {
  1043. if (!IS_ENABLED(CONFIG_PM))
  1044. return -ENOSYS;
  1045. return cmos_suspend(dev);
  1046. }
  1047. static void cmos_check_wkalrm(struct device *dev)
  1048. {
  1049. struct cmos_rtc *cmos = dev_get_drvdata(dev);
  1050. struct rtc_wkalrm current_alarm;
  1051. time64_t t_now;
  1052. time64_t t_current_expires;
  1053. time64_t t_saved_expires;
  1054. struct rtc_time now;
  1055. /* Check if we have RTC Alarm armed */
  1056. if (!(cmos->suspend_ctrl & RTC_AIE))
  1057. return;
  1058. cmos_read_time(dev, &now);
  1059. t_now = rtc_tm_to_time64(&now);
  1060. /*
  1061. * ACPI RTC wake event is cleared after resume from STR,
  1062. * ACK the rtc irq here
  1063. */
  1064. if (t_now >= cmos->alarm_expires && cmos_use_acpi_alarm()) {
  1065. local_irq_disable();
  1066. cmos_interrupt(0, (void *)cmos->rtc);
  1067. local_irq_enable();
  1068. return;
  1069. }
  1070. memset(&current_alarm, 0, sizeof(struct rtc_wkalrm));
  1071. cmos_read_alarm(dev, &current_alarm);
  1072. t_current_expires = rtc_tm_to_time64(&current_alarm.time);
  1073. t_saved_expires = rtc_tm_to_time64(&cmos->saved_wkalrm.time);
  1074. if (t_current_expires != t_saved_expires ||
  1075. cmos->saved_wkalrm.enabled != current_alarm.enabled) {
  1076. cmos_set_alarm(dev, &cmos->saved_wkalrm);
  1077. }
  1078. }
  1079. static int __maybe_unused cmos_resume(struct device *dev)
  1080. {
  1081. struct cmos_rtc *cmos = dev_get_drvdata(dev);
  1082. unsigned char tmp;
  1083. if (cmos->enabled_wake && !cmos_use_acpi_alarm()) {
  1084. if (cmos->wake_off)
  1085. cmos->wake_off(dev);
  1086. else
  1087. disable_irq_wake(cmos->irq);
  1088. cmos->enabled_wake = 0;
  1089. }
  1090. /* The BIOS might have changed the alarm, restore it */
  1091. cmos_check_wkalrm(dev);
  1092. spin_lock_irq(&rtc_lock);
  1093. tmp = cmos->suspend_ctrl;
  1094. cmos->suspend_ctrl = 0;
  1095. /* re-enable any irqs previously active */
  1096. if (tmp & RTC_IRQMASK) {
  1097. unsigned char mask;
  1098. if (device_may_wakeup(dev) && use_hpet_alarm())
  1099. hpet_rtc_timer_init();
  1100. do {
  1101. CMOS_WRITE(tmp, RTC_CONTROL);
  1102. if (use_hpet_alarm())
  1103. hpet_set_rtc_irq_bit(tmp & RTC_IRQMASK);
  1104. mask = CMOS_READ(RTC_INTR_FLAGS);
  1105. mask &= (tmp & RTC_IRQMASK) | RTC_IRQF;
  1106. if (!use_hpet_alarm() || !is_intr(mask))
  1107. break;
  1108. /* force one-shot behavior if HPET blocked
  1109. * the wake alarm's irq
  1110. */
  1111. rtc_update_irq(cmos->rtc, 1, mask);
  1112. tmp &= ~RTC_AIE;
  1113. hpet_mask_rtc_irq_bit(RTC_AIE);
  1114. } while (mask & RTC_AIE);
  1115. if (tmp & RTC_AIE)
  1116. cmos_check_acpi_rtc_status(dev, &tmp);
  1117. }
  1118. spin_unlock_irq(&rtc_lock);
  1119. dev_dbg(dev, "resume, ctrl %02x\n", tmp);
  1120. return 0;
  1121. }
  1122. static SIMPLE_DEV_PM_OPS(cmos_pm_ops, cmos_suspend, cmos_resume);
  1123. /*----------------------------------------------------------------*/
  1124. /* On non-x86 systems, a "CMOS" RTC lives most naturally on platform_bus.
  1125. * ACPI systems always list these as PNPACPI devices, and pre-ACPI PCs
  1126. * probably list them in similar PNPBIOS tables; so PNP is more common.
  1127. *
  1128. * We don't use legacy "poke at the hardware" probing. Ancient PCs that
  1129. * predate even PNPBIOS should set up platform_bus devices.
  1130. */
  1131. #ifdef CONFIG_PNP
  1132. #include <linux/pnp.h>
  1133. static int cmos_pnp_probe(struct pnp_dev *pnp, const struct pnp_device_id *id)
  1134. {
  1135. int irq;
  1136. if (pnp_port_start(pnp, 0) == 0x70 && !pnp_irq_valid(pnp, 0)) {
  1137. irq = 0;
  1138. #ifdef CONFIG_X86
  1139. /* Some machines contain a PNP entry for the RTC, but
  1140. * don't define the IRQ. It should always be safe to
  1141. * hardcode it on systems with a legacy PIC.
  1142. */
  1143. if (nr_legacy_irqs())
  1144. irq = RTC_IRQ;
  1145. #endif
  1146. } else {
  1147. irq = pnp_irq(pnp, 0);
  1148. }
  1149. return cmos_do_probe(&pnp->dev, pnp_get_resource(pnp, IORESOURCE_IO, 0), irq);
  1150. }
  1151. static void cmos_pnp_remove(struct pnp_dev *pnp)
  1152. {
  1153. cmos_do_remove(&pnp->dev);
  1154. }
  1155. static void cmos_pnp_shutdown(struct pnp_dev *pnp)
  1156. {
  1157. struct device *dev = &pnp->dev;
  1158. struct cmos_rtc *cmos = dev_get_drvdata(dev);
  1159. if (system_state == SYSTEM_POWER_OFF) {
  1160. int retval = cmos_poweroff(dev);
  1161. if (cmos_aie_poweroff(dev) < 0 && !retval)
  1162. return;
  1163. }
  1164. cmos_do_shutdown(cmos->irq);
  1165. }
  1166. static const struct pnp_device_id rtc_ids[] = {
  1167. { .id = "PNP0b00", },
  1168. { .id = "PNP0b01", },
  1169. { .id = "PNP0b02", },
  1170. { },
  1171. };
  1172. MODULE_DEVICE_TABLE(pnp, rtc_ids);
  1173. static struct pnp_driver cmos_pnp_driver = {
  1174. .name = driver_name,
  1175. .id_table = rtc_ids,
  1176. .probe = cmos_pnp_probe,
  1177. .remove = cmos_pnp_remove,
  1178. .shutdown = cmos_pnp_shutdown,
  1179. /* flag ensures resume() gets called, and stops syslog spam */
  1180. .flags = PNP_DRIVER_RES_DO_NOT_CHANGE,
  1181. .driver = {
  1182. .pm = &cmos_pm_ops,
  1183. },
  1184. };
  1185. #endif /* CONFIG_PNP */
  1186. #ifdef CONFIG_OF
  1187. static const struct of_device_id of_cmos_match[] = {
  1188. {
  1189. .compatible = "motorola,mc146818",
  1190. },
  1191. { },
  1192. };
  1193. MODULE_DEVICE_TABLE(of, of_cmos_match);
  1194. static __init void cmos_of_init(struct platform_device *pdev)
  1195. {
  1196. struct device_node *node = pdev->dev.of_node;
  1197. const __be32 *val;
  1198. if (!node)
  1199. return;
  1200. val = of_get_property(node, "ctrl-reg", NULL);
  1201. if (val)
  1202. CMOS_WRITE(be32_to_cpup(val), RTC_CONTROL);
  1203. val = of_get_property(node, "freq-reg", NULL);
  1204. if (val)
  1205. CMOS_WRITE(be32_to_cpup(val), RTC_FREQ_SELECT);
  1206. }
  1207. #else
  1208. static inline void cmos_of_init(struct platform_device *pdev) {}
  1209. #endif
  1210. /*----------------------------------------------------------------*/
  1211. /* Platform setup should have set up an RTC device, when PNP is
  1212. * unavailable ... this could happen even on (older) PCs.
  1213. */
  1214. static int __init cmos_platform_probe(struct platform_device *pdev)
  1215. {
  1216. struct resource *resource;
  1217. int irq;
  1218. cmos_of_init(pdev);
  1219. if (RTC_IOMAPPED)
  1220. resource = platform_get_resource(pdev, IORESOURCE_IO, 0);
  1221. else
  1222. resource = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  1223. irq = platform_get_irq(pdev, 0);
  1224. if (irq < 0)
  1225. irq = -1;
  1226. return cmos_do_probe(&pdev->dev, resource, irq);
  1227. }
  1228. static int cmos_platform_remove(struct platform_device *pdev)
  1229. {
  1230. cmos_do_remove(&pdev->dev);
  1231. return 0;
  1232. }
  1233. static void cmos_platform_shutdown(struct platform_device *pdev)
  1234. {
  1235. struct device *dev = &pdev->dev;
  1236. struct cmos_rtc *cmos = dev_get_drvdata(dev);
  1237. if (system_state == SYSTEM_POWER_OFF) {
  1238. int retval = cmos_poweroff(dev);
  1239. if (cmos_aie_poweroff(dev) < 0 && !retval)
  1240. return;
  1241. }
  1242. cmos_do_shutdown(cmos->irq);
  1243. }
  1244. /* work with hotplug and coldplug */
  1245. MODULE_ALIAS("platform:rtc_cmos");
  1246. static struct platform_driver cmos_platform_driver = {
  1247. .remove = cmos_platform_remove,
  1248. .shutdown = cmos_platform_shutdown,
  1249. .driver = {
  1250. .name = driver_name,
  1251. .pm = &cmos_pm_ops,
  1252. .of_match_table = of_match_ptr(of_cmos_match),
  1253. }
  1254. };
  1255. #ifdef CONFIG_PNP
  1256. static bool pnp_driver_registered;
  1257. #endif
  1258. static bool platform_driver_registered;
  1259. static int __init cmos_init(void)
  1260. {
  1261. int retval = 0;
  1262. #ifdef CONFIG_PNP
  1263. retval = pnp_register_driver(&cmos_pnp_driver);
  1264. if (retval == 0)
  1265. pnp_driver_registered = true;
  1266. #endif
  1267. if (!cmos_rtc.dev) {
  1268. retval = platform_driver_probe(&cmos_platform_driver,
  1269. cmos_platform_probe);
  1270. if (retval == 0)
  1271. platform_driver_registered = true;
  1272. }
  1273. if (retval == 0)
  1274. return 0;
  1275. #ifdef CONFIG_PNP
  1276. if (pnp_driver_registered)
  1277. pnp_unregister_driver(&cmos_pnp_driver);
  1278. #endif
  1279. return retval;
  1280. }
  1281. module_init(cmos_init);
  1282. static void __exit cmos_exit(void)
  1283. {
  1284. #ifdef CONFIG_PNP
  1285. if (pnp_driver_registered)
  1286. pnp_unregister_driver(&cmos_pnp_driver);
  1287. #endif
  1288. if (platform_driver_registered)
  1289. platform_driver_unregister(&cmos_platform_driver);
  1290. }
  1291. module_exit(cmos_exit);
  1292. MODULE_AUTHOR("David Brownell");
  1293. MODULE_DESCRIPTION("Driver for PC-style 'CMOS' RTCs");
  1294. MODULE_LICENSE("GPL");