pwm-iqs620a.c 6.4 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Azoteq IQS620A PWM Generator
  4. *
  5. * Copyright (C) 2019 Jeff LaBundy <[email protected]>
  6. *
  7. * Limitations:
  8. * - The period is fixed to 1 ms and is generated continuously despite changes
  9. * to the duty cycle or enable/disable state.
  10. * - Changes to the duty cycle or enable/disable state take effect immediately
  11. * and may result in a glitch during the period in which the change is made.
  12. * - The device cannot generate a 0% duty cycle. For duty cycles below 1 / 256
  13. * ms, the output is disabled and relies upon an external pull-down resistor
  14. * to hold the GPIO3/LTX pin low.
  15. */
  16. #include <linux/device.h>
  17. #include <linux/kernel.h>
  18. #include <linux/mfd/iqs62x.h>
  19. #include <linux/module.h>
  20. #include <linux/mutex.h>
  21. #include <linux/notifier.h>
  22. #include <linux/platform_device.h>
  23. #include <linux/pwm.h>
  24. #include <linux/regmap.h>
  25. #include <linux/slab.h>
  26. #define IQS620_PWR_SETTINGS 0xd2
  27. #define IQS620_PWR_SETTINGS_PWM_OUT BIT(7)
  28. #define IQS620_PWM_DUTY_CYCLE 0xd8
  29. #define IQS620_PWM_PERIOD_NS 1000000
  30. struct iqs620_pwm_private {
  31. struct iqs62x_core *iqs62x;
  32. struct pwm_chip chip;
  33. struct notifier_block notifier;
  34. struct mutex lock;
  35. unsigned int duty_scale;
  36. };
  37. static int iqs620_pwm_init(struct iqs620_pwm_private *iqs620_pwm,
  38. unsigned int duty_scale)
  39. {
  40. struct iqs62x_core *iqs62x = iqs620_pwm->iqs62x;
  41. int ret;
  42. if (!duty_scale)
  43. return regmap_update_bits(iqs62x->regmap, IQS620_PWR_SETTINGS,
  44. IQS620_PWR_SETTINGS_PWM_OUT, 0);
  45. ret = regmap_write(iqs62x->regmap, IQS620_PWM_DUTY_CYCLE,
  46. duty_scale - 1);
  47. if (ret)
  48. return ret;
  49. return regmap_update_bits(iqs62x->regmap, IQS620_PWR_SETTINGS,
  50. IQS620_PWR_SETTINGS_PWM_OUT, 0xff);
  51. }
  52. static int iqs620_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm,
  53. const struct pwm_state *state)
  54. {
  55. struct iqs620_pwm_private *iqs620_pwm;
  56. unsigned int duty_cycle;
  57. unsigned int duty_scale;
  58. int ret;
  59. if (state->polarity != PWM_POLARITY_NORMAL)
  60. return -EINVAL;
  61. if (state->period < IQS620_PWM_PERIOD_NS)
  62. return -EINVAL;
  63. iqs620_pwm = container_of(chip, struct iqs620_pwm_private, chip);
  64. /*
  65. * The duty cycle generated by the device is calculated as follows:
  66. *
  67. * duty_cycle = (IQS620_PWM_DUTY_CYCLE + 1) / 256 * 1 ms
  68. *
  69. * ...where IQS620_PWM_DUTY_CYCLE is a register value between 0 and 255
  70. * (inclusive). Therefore the lowest duty cycle the device can generate
  71. * while the output is enabled is 1 / 256 ms.
  72. *
  73. * For lower duty cycles (e.g. 0), the PWM output is simply disabled to
  74. * allow an external pull-down resistor to hold the GPIO3/LTX pin low.
  75. */
  76. duty_cycle = min_t(u64, state->duty_cycle, IQS620_PWM_PERIOD_NS);
  77. duty_scale = duty_cycle * 256 / IQS620_PWM_PERIOD_NS;
  78. if (!state->enabled)
  79. duty_scale = 0;
  80. mutex_lock(&iqs620_pwm->lock);
  81. ret = iqs620_pwm_init(iqs620_pwm, duty_scale);
  82. if (!ret)
  83. iqs620_pwm->duty_scale = duty_scale;
  84. mutex_unlock(&iqs620_pwm->lock);
  85. return ret;
  86. }
  87. static int iqs620_pwm_get_state(struct pwm_chip *chip, struct pwm_device *pwm,
  88. struct pwm_state *state)
  89. {
  90. struct iqs620_pwm_private *iqs620_pwm;
  91. iqs620_pwm = container_of(chip, struct iqs620_pwm_private, chip);
  92. mutex_lock(&iqs620_pwm->lock);
  93. /*
  94. * Since the device cannot generate a 0% duty cycle, requests to do so
  95. * cause subsequent calls to iqs620_pwm_get_state to report the output
  96. * as disabled. This is not ideal, but is the best compromise based on
  97. * the capabilities of the device.
  98. */
  99. state->enabled = iqs620_pwm->duty_scale > 0;
  100. state->duty_cycle = DIV_ROUND_UP(iqs620_pwm->duty_scale *
  101. IQS620_PWM_PERIOD_NS, 256);
  102. mutex_unlock(&iqs620_pwm->lock);
  103. state->period = IQS620_PWM_PERIOD_NS;
  104. state->polarity = PWM_POLARITY_NORMAL;
  105. return 0;
  106. }
  107. static int iqs620_pwm_notifier(struct notifier_block *notifier,
  108. unsigned long event_flags, void *context)
  109. {
  110. struct iqs620_pwm_private *iqs620_pwm;
  111. int ret;
  112. if (!(event_flags & BIT(IQS62X_EVENT_SYS_RESET)))
  113. return NOTIFY_DONE;
  114. iqs620_pwm = container_of(notifier, struct iqs620_pwm_private,
  115. notifier);
  116. mutex_lock(&iqs620_pwm->lock);
  117. /*
  118. * The parent MFD driver already prints an error message in the event
  119. * of a device reset, so nothing else is printed here unless there is
  120. * an additional failure.
  121. */
  122. ret = iqs620_pwm_init(iqs620_pwm, iqs620_pwm->duty_scale);
  123. mutex_unlock(&iqs620_pwm->lock);
  124. if (ret) {
  125. dev_err(iqs620_pwm->chip.dev,
  126. "Failed to re-initialize device: %d\n", ret);
  127. return NOTIFY_BAD;
  128. }
  129. return NOTIFY_OK;
  130. }
  131. static const struct pwm_ops iqs620_pwm_ops = {
  132. .apply = iqs620_pwm_apply,
  133. .get_state = iqs620_pwm_get_state,
  134. .owner = THIS_MODULE,
  135. };
  136. static void iqs620_pwm_notifier_unregister(void *context)
  137. {
  138. struct iqs620_pwm_private *iqs620_pwm = context;
  139. int ret;
  140. ret = blocking_notifier_chain_unregister(&iqs620_pwm->iqs62x->nh,
  141. &iqs620_pwm->notifier);
  142. if (ret)
  143. dev_err(iqs620_pwm->chip.dev,
  144. "Failed to unregister notifier: %d\n", ret);
  145. }
  146. static int iqs620_pwm_probe(struct platform_device *pdev)
  147. {
  148. struct iqs62x_core *iqs62x = dev_get_drvdata(pdev->dev.parent);
  149. struct iqs620_pwm_private *iqs620_pwm;
  150. unsigned int val;
  151. int ret;
  152. iqs620_pwm = devm_kzalloc(&pdev->dev, sizeof(*iqs620_pwm), GFP_KERNEL);
  153. if (!iqs620_pwm)
  154. return -ENOMEM;
  155. iqs620_pwm->iqs62x = iqs62x;
  156. ret = regmap_read(iqs62x->regmap, IQS620_PWR_SETTINGS, &val);
  157. if (ret)
  158. return ret;
  159. if (val & IQS620_PWR_SETTINGS_PWM_OUT) {
  160. ret = regmap_read(iqs62x->regmap, IQS620_PWM_DUTY_CYCLE, &val);
  161. if (ret)
  162. return ret;
  163. iqs620_pwm->duty_scale = val + 1;
  164. }
  165. iqs620_pwm->chip.dev = &pdev->dev;
  166. iqs620_pwm->chip.ops = &iqs620_pwm_ops;
  167. iqs620_pwm->chip.npwm = 1;
  168. mutex_init(&iqs620_pwm->lock);
  169. iqs620_pwm->notifier.notifier_call = iqs620_pwm_notifier;
  170. ret = blocking_notifier_chain_register(&iqs620_pwm->iqs62x->nh,
  171. &iqs620_pwm->notifier);
  172. if (ret) {
  173. dev_err(&pdev->dev, "Failed to register notifier: %d\n", ret);
  174. return ret;
  175. }
  176. ret = devm_add_action_or_reset(&pdev->dev,
  177. iqs620_pwm_notifier_unregister,
  178. iqs620_pwm);
  179. if (ret)
  180. return ret;
  181. ret = devm_pwmchip_add(&pdev->dev, &iqs620_pwm->chip);
  182. if (ret)
  183. dev_err(&pdev->dev, "Failed to add device: %d\n", ret);
  184. return ret;
  185. }
  186. static struct platform_driver iqs620_pwm_platform_driver = {
  187. .driver = {
  188. .name = "iqs620a-pwm",
  189. },
  190. .probe = iqs620_pwm_probe,
  191. };
  192. module_platform_driver(iqs620_pwm_platform_driver);
  193. MODULE_AUTHOR("Jeff LaBundy <[email protected]>");
  194. MODULE_DESCRIPTION("Azoteq IQS620A PWM Generator");
  195. MODULE_LICENSE("GPL");
  196. MODULE_ALIAS("platform:iqs620a-pwm");