pwm-cros-ec.c 8.4 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Expose a PWM controlled by the ChromeOS EC to the host processor.
  4. *
  5. * Copyright (C) 2016 Google, Inc.
  6. */
  7. #include <linux/module.h>
  8. #include <linux/platform_data/cros_ec_commands.h>
  9. #include <linux/platform_data/cros_ec_proto.h>
  10. #include <linux/platform_device.h>
  11. #include <linux/pwm.h>
  12. #include <linux/slab.h>
  13. #include <dt-bindings/mfd/cros_ec.h>
  14. /**
  15. * struct cros_ec_pwm_device - Driver data for EC PWM
  16. *
  17. * @dev: Device node
  18. * @ec: Pointer to EC device
  19. * @chip: PWM controller chip
  20. * @use_pwm_type: Use PWM types instead of generic channels
  21. */
  22. struct cros_ec_pwm_device {
  23. struct device *dev;
  24. struct cros_ec_device *ec;
  25. struct pwm_chip chip;
  26. bool use_pwm_type;
  27. };
  28. /**
  29. * struct cros_ec_pwm - per-PWM driver data
  30. * @duty_cycle: cached duty cycle
  31. */
  32. struct cros_ec_pwm {
  33. u16 duty_cycle;
  34. };
  35. static inline struct cros_ec_pwm_device *pwm_to_cros_ec_pwm(struct pwm_chip *c)
  36. {
  37. return container_of(c, struct cros_ec_pwm_device, chip);
  38. }
  39. static int cros_ec_pwm_request(struct pwm_chip *chip, struct pwm_device *pwm)
  40. {
  41. struct cros_ec_pwm *channel;
  42. channel = kzalloc(sizeof(*channel), GFP_KERNEL);
  43. if (!channel)
  44. return -ENOMEM;
  45. pwm_set_chip_data(pwm, channel);
  46. return 0;
  47. }
  48. static void cros_ec_pwm_free(struct pwm_chip *chip, struct pwm_device *pwm)
  49. {
  50. struct cros_ec_pwm *channel = pwm_get_chip_data(pwm);
  51. kfree(channel);
  52. }
  53. static int cros_ec_dt_type_to_pwm_type(u8 dt_index, u8 *pwm_type)
  54. {
  55. switch (dt_index) {
  56. case CROS_EC_PWM_DT_KB_LIGHT:
  57. *pwm_type = EC_PWM_TYPE_KB_LIGHT;
  58. return 0;
  59. case CROS_EC_PWM_DT_DISPLAY_LIGHT:
  60. *pwm_type = EC_PWM_TYPE_DISPLAY_LIGHT;
  61. return 0;
  62. default:
  63. return -EINVAL;
  64. }
  65. }
  66. static int cros_ec_pwm_set_duty(struct cros_ec_pwm_device *ec_pwm, u8 index,
  67. u16 duty)
  68. {
  69. struct cros_ec_device *ec = ec_pwm->ec;
  70. struct {
  71. struct cros_ec_command msg;
  72. struct ec_params_pwm_set_duty params;
  73. } __packed buf;
  74. struct ec_params_pwm_set_duty *params = &buf.params;
  75. struct cros_ec_command *msg = &buf.msg;
  76. int ret;
  77. memset(&buf, 0, sizeof(buf));
  78. msg->version = 0;
  79. msg->command = EC_CMD_PWM_SET_DUTY;
  80. msg->insize = 0;
  81. msg->outsize = sizeof(*params);
  82. params->duty = duty;
  83. if (ec_pwm->use_pwm_type) {
  84. ret = cros_ec_dt_type_to_pwm_type(index, &params->pwm_type);
  85. if (ret) {
  86. dev_err(ec->dev, "Invalid PWM type index: %d\n", index);
  87. return ret;
  88. }
  89. params->index = 0;
  90. } else {
  91. params->pwm_type = EC_PWM_TYPE_GENERIC;
  92. params->index = index;
  93. }
  94. return cros_ec_cmd_xfer_status(ec, msg);
  95. }
  96. static int cros_ec_pwm_get_duty(struct cros_ec_pwm_device *ec_pwm, u8 index)
  97. {
  98. struct cros_ec_device *ec = ec_pwm->ec;
  99. struct {
  100. struct cros_ec_command msg;
  101. union {
  102. struct ec_params_pwm_get_duty params;
  103. struct ec_response_pwm_get_duty resp;
  104. };
  105. } __packed buf;
  106. struct ec_params_pwm_get_duty *params = &buf.params;
  107. struct ec_response_pwm_get_duty *resp = &buf.resp;
  108. struct cros_ec_command *msg = &buf.msg;
  109. int ret;
  110. memset(&buf, 0, sizeof(buf));
  111. msg->version = 0;
  112. msg->command = EC_CMD_PWM_GET_DUTY;
  113. msg->insize = sizeof(*resp);
  114. msg->outsize = sizeof(*params);
  115. if (ec_pwm->use_pwm_type) {
  116. ret = cros_ec_dt_type_to_pwm_type(index, &params->pwm_type);
  117. if (ret) {
  118. dev_err(ec->dev, "Invalid PWM type index: %d\n", index);
  119. return ret;
  120. }
  121. params->index = 0;
  122. } else {
  123. params->pwm_type = EC_PWM_TYPE_GENERIC;
  124. params->index = index;
  125. }
  126. ret = cros_ec_cmd_xfer_status(ec, msg);
  127. if (ret < 0)
  128. return ret;
  129. return resp->duty;
  130. }
  131. static int cros_ec_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm,
  132. const struct pwm_state *state)
  133. {
  134. struct cros_ec_pwm_device *ec_pwm = pwm_to_cros_ec_pwm(chip);
  135. struct cros_ec_pwm *channel = pwm_get_chip_data(pwm);
  136. u16 duty_cycle;
  137. int ret;
  138. /* The EC won't let us change the period */
  139. if (state->period != EC_PWM_MAX_DUTY)
  140. return -EINVAL;
  141. if (state->polarity != PWM_POLARITY_NORMAL)
  142. return -EINVAL;
  143. /*
  144. * EC doesn't separate the concept of duty cycle and enabled, but
  145. * kernel does. Translate.
  146. */
  147. duty_cycle = state->enabled ? state->duty_cycle : 0;
  148. ret = cros_ec_pwm_set_duty(ec_pwm, pwm->hwpwm, duty_cycle);
  149. if (ret < 0)
  150. return ret;
  151. channel->duty_cycle = state->duty_cycle;
  152. return 0;
  153. }
  154. static int cros_ec_pwm_get_state(struct pwm_chip *chip, struct pwm_device *pwm,
  155. struct pwm_state *state)
  156. {
  157. struct cros_ec_pwm_device *ec_pwm = pwm_to_cros_ec_pwm(chip);
  158. struct cros_ec_pwm *channel = pwm_get_chip_data(pwm);
  159. int ret;
  160. ret = cros_ec_pwm_get_duty(ec_pwm, pwm->hwpwm);
  161. if (ret < 0) {
  162. dev_err(chip->dev, "error getting initial duty: %d\n", ret);
  163. return 0;
  164. }
  165. state->enabled = (ret > 0);
  166. state->period = EC_PWM_MAX_DUTY;
  167. state->polarity = PWM_POLARITY_NORMAL;
  168. /*
  169. * Note that "disabled" and "duty cycle == 0" are treated the same. If
  170. * the cached duty cycle is not zero, used the cached duty cycle. This
  171. * ensures that the configured duty cycle is kept across a disable and
  172. * enable operation and avoids potentially confusing consumers.
  173. *
  174. * For the case of the initial hardware readout, channel->duty_cycle
  175. * will be 0 and the actual duty cycle read from the EC is used.
  176. */
  177. if (ret == 0 && channel->duty_cycle > 0)
  178. state->duty_cycle = channel->duty_cycle;
  179. else
  180. state->duty_cycle = ret;
  181. return 0;
  182. }
  183. static struct pwm_device *
  184. cros_ec_pwm_xlate(struct pwm_chip *pc, const struct of_phandle_args *args)
  185. {
  186. struct pwm_device *pwm;
  187. if (args->args[0] >= pc->npwm)
  188. return ERR_PTR(-EINVAL);
  189. pwm = pwm_request_from_chip(pc, args->args[0], NULL);
  190. if (IS_ERR(pwm))
  191. return pwm;
  192. /* The EC won't let us change the period */
  193. pwm->args.period = EC_PWM_MAX_DUTY;
  194. return pwm;
  195. }
  196. static const struct pwm_ops cros_ec_pwm_ops = {
  197. .request = cros_ec_pwm_request,
  198. .free = cros_ec_pwm_free,
  199. .get_state = cros_ec_pwm_get_state,
  200. .apply = cros_ec_pwm_apply,
  201. .owner = THIS_MODULE,
  202. };
  203. /*
  204. * Determine the number of supported PWMs. The EC does not return the number
  205. * of PWMs it supports directly, so we have to read the pwm duty cycle for
  206. * subsequent channels until we get an error.
  207. */
  208. static int cros_ec_num_pwms(struct cros_ec_pwm_device *ec_pwm)
  209. {
  210. int i, ret;
  211. /* The index field is only 8 bits */
  212. for (i = 0; i <= U8_MAX; i++) {
  213. ret = cros_ec_pwm_get_duty(ec_pwm, i);
  214. /*
  215. * We look for SUCCESS, INVALID_COMMAND, or INVALID_PARAM
  216. * responses; everything else is treated as an error.
  217. * The EC error codes map to -EOPNOTSUPP and -EINVAL,
  218. * so check for those.
  219. */
  220. switch (ret) {
  221. case -EOPNOTSUPP: /* invalid command */
  222. return -ENODEV;
  223. case -EINVAL: /* invalid parameter */
  224. return i;
  225. default:
  226. if (ret < 0)
  227. return ret;
  228. break;
  229. }
  230. }
  231. return U8_MAX;
  232. }
  233. static int cros_ec_pwm_probe(struct platform_device *pdev)
  234. {
  235. struct cros_ec_device *ec = dev_get_drvdata(pdev->dev.parent);
  236. struct device *dev = &pdev->dev;
  237. struct device_node *np = pdev->dev.of_node;
  238. struct cros_ec_pwm_device *ec_pwm;
  239. struct pwm_chip *chip;
  240. int ret;
  241. if (!ec) {
  242. dev_err(dev, "no parent EC device\n");
  243. return -EINVAL;
  244. }
  245. ec_pwm = devm_kzalloc(dev, sizeof(*ec_pwm), GFP_KERNEL);
  246. if (!ec_pwm)
  247. return -ENOMEM;
  248. chip = &ec_pwm->chip;
  249. ec_pwm->ec = ec;
  250. if (of_device_is_compatible(np, "google,cros-ec-pwm-type"))
  251. ec_pwm->use_pwm_type = true;
  252. /* PWM chip */
  253. chip->dev = dev;
  254. chip->ops = &cros_ec_pwm_ops;
  255. chip->of_xlate = cros_ec_pwm_xlate;
  256. chip->of_pwm_n_cells = 1;
  257. if (ec_pwm->use_pwm_type) {
  258. chip->npwm = CROS_EC_PWM_DT_COUNT;
  259. } else {
  260. ret = cros_ec_num_pwms(ec_pwm);
  261. if (ret < 0) {
  262. dev_err(dev, "Couldn't find PWMs: %d\n", ret);
  263. return ret;
  264. }
  265. chip->npwm = ret;
  266. }
  267. dev_dbg(dev, "Probed %u PWMs\n", chip->npwm);
  268. ret = pwmchip_add(chip);
  269. if (ret < 0) {
  270. dev_err(dev, "cannot register PWM: %d\n", ret);
  271. return ret;
  272. }
  273. platform_set_drvdata(pdev, ec_pwm);
  274. return ret;
  275. }
  276. static int cros_ec_pwm_remove(struct platform_device *dev)
  277. {
  278. struct cros_ec_pwm_device *ec_pwm = platform_get_drvdata(dev);
  279. struct pwm_chip *chip = &ec_pwm->chip;
  280. pwmchip_remove(chip);
  281. return 0;
  282. }
  283. #ifdef CONFIG_OF
  284. static const struct of_device_id cros_ec_pwm_of_match[] = {
  285. { .compatible = "google,cros-ec-pwm" },
  286. { .compatible = "google,cros-ec-pwm-type" },
  287. {},
  288. };
  289. MODULE_DEVICE_TABLE(of, cros_ec_pwm_of_match);
  290. #endif
  291. static struct platform_driver cros_ec_pwm_driver = {
  292. .probe = cros_ec_pwm_probe,
  293. .remove = cros_ec_pwm_remove,
  294. .driver = {
  295. .name = "cros-ec-pwm",
  296. .of_match_table = of_match_ptr(cros_ec_pwm_of_match),
  297. },
  298. };
  299. module_platform_driver(cros_ec_pwm_driver);
  300. MODULE_ALIAS("platform:cros-ec-pwm");
  301. MODULE_DESCRIPTION("ChromeOS EC PWM driver");
  302. MODULE_LICENSE("GPL v2");