phy-hi3660-usb3.c 5.7 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Phy provider for USB 3.0 controller on HiSilicon 3660 platform
  4. *
  5. * Copyright (C) 2017-2018 Hilisicon Electronics Co., Ltd.
  6. * http://www.huawei.com
  7. *
  8. * Authors: Yu Chen <[email protected]>
  9. */
  10. #include <linux/kernel.h>
  11. #include <linux/mfd/syscon.h>
  12. #include <linux/module.h>
  13. #include <linux/phy/phy.h>
  14. #include <linux/platform_device.h>
  15. #include <linux/regmap.h>
  16. #define PERI_CRG_CLK_EN4 0x40
  17. #define PERI_CRG_CLK_DIS4 0x44
  18. #define GT_CLK_USB3OTG_REF BIT(0)
  19. #define GT_ACLK_USB3OTG BIT(1)
  20. #define PERI_CRG_RSTEN4 0x90
  21. #define PERI_CRG_RSTDIS4 0x94
  22. #define IP_RST_USB3OTGPHY_POR BIT(3)
  23. #define IP_RST_USB3OTG BIT(5)
  24. #define PERI_CRG_ISODIS 0x148
  25. #define USB_REFCLK_ISO_EN BIT(25)
  26. #define PCTRL_PERI_CTRL3 0x10
  27. #define PCTRL_PERI_CTRL3_MSK_START 16
  28. #define USB_TCXO_EN BIT(1)
  29. #define PCTRL_PERI_CTRL24 0x64
  30. #define SC_CLK_USB3PHY_3MUX1_SEL BIT(25)
  31. #define USBOTG3_CTRL0 0x00
  32. #define SC_USB3PHY_ABB_GT_EN BIT(15)
  33. #define USBOTG3_CTRL2 0x08
  34. #define USBOTG3CTRL2_POWERDOWN_HSP BIT(0)
  35. #define USBOTG3CTRL2_POWERDOWN_SSP BIT(1)
  36. #define USBOTG3_CTRL3 0x0C
  37. #define USBOTG3_CTRL3_VBUSVLDEXT BIT(6)
  38. #define USBOTG3_CTRL3_VBUSVLDEXTSEL BIT(5)
  39. #define USBOTG3_CTRL4 0x10
  40. #define USBOTG3_CTRL7 0x1c
  41. #define REF_SSP_EN BIT(16)
  42. /* This value config the default txtune parameter of the usb 2.0 phy */
  43. #define HI3660_USB_DEFAULT_PHY_PARAM 0x1c466e3
  44. struct hi3660_priv {
  45. struct device *dev;
  46. struct regmap *peri_crg;
  47. struct regmap *pctrl;
  48. struct regmap *otg_bc;
  49. u32 eye_diagram_param;
  50. };
  51. static int hi3660_phy_init(struct phy *phy)
  52. {
  53. struct hi3660_priv *priv = phy_get_drvdata(phy);
  54. u32 val, mask;
  55. int ret;
  56. /* usb refclk iso disable */
  57. ret = regmap_write(priv->peri_crg, PERI_CRG_ISODIS, USB_REFCLK_ISO_EN);
  58. if (ret)
  59. goto out;
  60. /* enable usb_tcxo_en */
  61. val = USB_TCXO_EN | (USB_TCXO_EN << PCTRL_PERI_CTRL3_MSK_START);
  62. ret = regmap_write(priv->pctrl, PCTRL_PERI_CTRL3, val);
  63. if (ret)
  64. goto out;
  65. /* assert phy */
  66. val = IP_RST_USB3OTGPHY_POR | IP_RST_USB3OTG;
  67. ret = regmap_write(priv->peri_crg, PERI_CRG_RSTEN4, val);
  68. if (ret)
  69. goto out;
  70. /* enable phy ref clk */
  71. val = SC_USB3PHY_ABB_GT_EN;
  72. mask = val;
  73. ret = regmap_update_bits(priv->otg_bc, USBOTG3_CTRL0, mask, val);
  74. if (ret)
  75. goto out;
  76. val = REF_SSP_EN;
  77. mask = val;
  78. ret = regmap_update_bits(priv->otg_bc, USBOTG3_CTRL7, mask, val);
  79. if (ret)
  80. goto out;
  81. /* exit from IDDQ mode */
  82. mask = USBOTG3CTRL2_POWERDOWN_HSP | USBOTG3CTRL2_POWERDOWN_SSP;
  83. ret = regmap_update_bits(priv->otg_bc, USBOTG3_CTRL2, mask, 0);
  84. if (ret)
  85. goto out;
  86. /* delay for exit from IDDQ mode */
  87. usleep_range(100, 120);
  88. /* deassert phy */
  89. val = IP_RST_USB3OTGPHY_POR | IP_RST_USB3OTG;
  90. ret = regmap_write(priv->peri_crg, PERI_CRG_RSTDIS4, val);
  91. if (ret)
  92. goto out;
  93. /* delay for phy deasserted */
  94. usleep_range(10000, 15000);
  95. /* fake vbus valid signal */
  96. val = USBOTG3_CTRL3_VBUSVLDEXT | USBOTG3_CTRL3_VBUSVLDEXTSEL;
  97. mask = val;
  98. ret = regmap_update_bits(priv->otg_bc, USBOTG3_CTRL3, mask, val);
  99. if (ret)
  100. goto out;
  101. /* delay for vbus valid */
  102. usleep_range(100, 120);
  103. ret = regmap_write(priv->otg_bc, USBOTG3_CTRL4,
  104. priv->eye_diagram_param);
  105. if (ret)
  106. goto out;
  107. return 0;
  108. out:
  109. dev_err(priv->dev, "failed to init phy ret: %d\n", ret);
  110. return ret;
  111. }
  112. static int hi3660_phy_exit(struct phy *phy)
  113. {
  114. struct hi3660_priv *priv = phy_get_drvdata(phy);
  115. u32 val;
  116. int ret;
  117. /* assert phy */
  118. val = IP_RST_USB3OTGPHY_POR;
  119. ret = regmap_write(priv->peri_crg, PERI_CRG_RSTEN4, val);
  120. if (ret)
  121. goto out;
  122. /* disable usb_tcxo_en */
  123. val = USB_TCXO_EN << PCTRL_PERI_CTRL3_MSK_START;
  124. ret = regmap_write(priv->pctrl, PCTRL_PERI_CTRL3, val);
  125. if (ret)
  126. goto out;
  127. return 0;
  128. out:
  129. dev_err(priv->dev, "failed to exit phy ret: %d\n", ret);
  130. return ret;
  131. }
  132. static const struct phy_ops hi3660_phy_ops = {
  133. .init = hi3660_phy_init,
  134. .exit = hi3660_phy_exit,
  135. .owner = THIS_MODULE,
  136. };
  137. static int hi3660_phy_probe(struct platform_device *pdev)
  138. {
  139. struct phy_provider *phy_provider;
  140. struct device *dev = &pdev->dev;
  141. struct phy *phy;
  142. struct hi3660_priv *priv;
  143. priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
  144. if (!priv)
  145. return -ENOMEM;
  146. priv->dev = dev;
  147. priv->peri_crg = syscon_regmap_lookup_by_phandle(dev->of_node,
  148. "hisilicon,pericrg-syscon");
  149. if (IS_ERR(priv->peri_crg)) {
  150. dev_err(dev, "no hisilicon,pericrg-syscon\n");
  151. return PTR_ERR(priv->peri_crg);
  152. }
  153. priv->pctrl = syscon_regmap_lookup_by_phandle(dev->of_node,
  154. "hisilicon,pctrl-syscon");
  155. if (IS_ERR(priv->pctrl)) {
  156. dev_err(dev, "no hisilicon,pctrl-syscon\n");
  157. return PTR_ERR(priv->pctrl);
  158. }
  159. /* node of hi3660 phy is a sub-node of usb3_otg_bc */
  160. priv->otg_bc = syscon_node_to_regmap(dev->parent->of_node);
  161. if (IS_ERR(priv->otg_bc)) {
  162. dev_err(dev, "no hisilicon,usb3-otg-bc-syscon\n");
  163. return PTR_ERR(priv->otg_bc);
  164. }
  165. if (of_property_read_u32(dev->of_node, "hisilicon,eye-diagram-param",
  166. &(priv->eye_diagram_param)))
  167. priv->eye_diagram_param = HI3660_USB_DEFAULT_PHY_PARAM;
  168. phy = devm_phy_create(dev, NULL, &hi3660_phy_ops);
  169. if (IS_ERR(phy))
  170. return PTR_ERR(phy);
  171. phy_set_drvdata(phy, priv);
  172. phy_provider = devm_of_phy_provider_register(dev, of_phy_simple_xlate);
  173. return PTR_ERR_OR_ZERO(phy_provider);
  174. }
  175. static const struct of_device_id hi3660_phy_of_match[] = {
  176. {.compatible = "hisilicon,hi3660-usb-phy",},
  177. { }
  178. };
  179. MODULE_DEVICE_TABLE(of, hi3660_phy_of_match);
  180. static struct platform_driver hi3660_phy_driver = {
  181. .probe = hi3660_phy_probe,
  182. .driver = {
  183. .name = "hi3660-usb-phy",
  184. .of_match_table = hi3660_phy_of_match,
  185. }
  186. };
  187. module_platform_driver(hi3660_phy_driver);
  188. MODULE_AUTHOR("Yu Chen <[email protected]>");
  189. MODULE_LICENSE("GPL v2");
  190. MODULE_DESCRIPTION("Hilisicon Hi3660 USB3 PHY Driver");