phy-sun9i-usb.c 4.5 KB

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  1. // SPDX-License-Identifier: GPL-2.0-or-later
  2. /*
  3. * Allwinner sun9i USB phy driver
  4. *
  5. * Copyright (C) 2014-2015 Chen-Yu Tsai <[email protected]>
  6. *
  7. * Based on phy-sun4i-usb.c from
  8. * Hans de Goede <[email protected]>
  9. *
  10. * and code from
  11. * Allwinner Technology Co., Ltd. <www.allwinnertech.com>
  12. */
  13. #include <linux/clk.h>
  14. #include <linux/err.h>
  15. #include <linux/io.h>
  16. #include <linux/module.h>
  17. #include <linux/phy/phy.h>
  18. #include <linux/usb/of.h>
  19. #include <linux/platform_device.h>
  20. #include <linux/reset.h>
  21. #define SUNXI_AHB_INCR16_BURST_EN BIT(11)
  22. #define SUNXI_AHB_INCR8_BURST_EN BIT(10)
  23. #define SUNXI_AHB_INCR4_BURST_EN BIT(9)
  24. #define SUNXI_AHB_INCRX_ALIGN_EN BIT(8)
  25. #define SUNXI_ULPI_BYPASS_EN BIT(0)
  26. /* usb1 HSIC specific bits */
  27. #define SUNXI_EHCI_HS_FORCE BIT(20)
  28. #define SUNXI_HSIC_CONNECT_DET BIT(17)
  29. #define SUNXI_HSIC_CONNECT_INT BIT(16)
  30. #define SUNXI_HSIC BIT(1)
  31. struct sun9i_usb_phy {
  32. struct phy *phy;
  33. void __iomem *pmu;
  34. struct reset_control *reset;
  35. struct clk *clk;
  36. struct clk *hsic_clk;
  37. enum usb_phy_interface type;
  38. };
  39. static void sun9i_usb_phy_passby(struct sun9i_usb_phy *phy, int enable)
  40. {
  41. u32 bits, reg_value;
  42. bits = SUNXI_AHB_INCR16_BURST_EN | SUNXI_AHB_INCR8_BURST_EN |
  43. SUNXI_AHB_INCR4_BURST_EN | SUNXI_AHB_INCRX_ALIGN_EN |
  44. SUNXI_ULPI_BYPASS_EN;
  45. if (phy->type == USBPHY_INTERFACE_MODE_HSIC)
  46. bits |= SUNXI_HSIC | SUNXI_EHCI_HS_FORCE |
  47. SUNXI_HSIC_CONNECT_DET | SUNXI_HSIC_CONNECT_INT;
  48. reg_value = readl(phy->pmu);
  49. if (enable)
  50. reg_value |= bits;
  51. else
  52. reg_value &= ~bits;
  53. writel(reg_value, phy->pmu);
  54. }
  55. static int sun9i_usb_phy_init(struct phy *_phy)
  56. {
  57. struct sun9i_usb_phy *phy = phy_get_drvdata(_phy);
  58. int ret;
  59. ret = clk_prepare_enable(phy->clk);
  60. if (ret)
  61. goto err_clk;
  62. ret = clk_prepare_enable(phy->hsic_clk);
  63. if (ret)
  64. goto err_hsic_clk;
  65. ret = reset_control_deassert(phy->reset);
  66. if (ret)
  67. goto err_reset;
  68. sun9i_usb_phy_passby(phy, 1);
  69. return 0;
  70. err_reset:
  71. clk_disable_unprepare(phy->hsic_clk);
  72. err_hsic_clk:
  73. clk_disable_unprepare(phy->clk);
  74. err_clk:
  75. return ret;
  76. }
  77. static int sun9i_usb_phy_exit(struct phy *_phy)
  78. {
  79. struct sun9i_usb_phy *phy = phy_get_drvdata(_phy);
  80. sun9i_usb_phy_passby(phy, 0);
  81. reset_control_assert(phy->reset);
  82. clk_disable_unprepare(phy->hsic_clk);
  83. clk_disable_unprepare(phy->clk);
  84. return 0;
  85. }
  86. static const struct phy_ops sun9i_usb_phy_ops = {
  87. .init = sun9i_usb_phy_init,
  88. .exit = sun9i_usb_phy_exit,
  89. .owner = THIS_MODULE,
  90. };
  91. static int sun9i_usb_phy_probe(struct platform_device *pdev)
  92. {
  93. struct sun9i_usb_phy *phy;
  94. struct device *dev = &pdev->dev;
  95. struct device_node *np = dev->of_node;
  96. struct phy_provider *phy_provider;
  97. phy = devm_kzalloc(dev, sizeof(*phy), GFP_KERNEL);
  98. if (!phy)
  99. return -ENOMEM;
  100. phy->type = of_usb_get_phy_mode(np);
  101. if (phy->type == USBPHY_INTERFACE_MODE_HSIC) {
  102. phy->clk = devm_clk_get(dev, "hsic_480M");
  103. if (IS_ERR(phy->clk)) {
  104. dev_err(dev, "failed to get hsic_480M clock\n");
  105. return PTR_ERR(phy->clk);
  106. }
  107. phy->hsic_clk = devm_clk_get(dev, "hsic_12M");
  108. if (IS_ERR(phy->hsic_clk)) {
  109. dev_err(dev, "failed to get hsic_12M clock\n");
  110. return PTR_ERR(phy->hsic_clk);
  111. }
  112. phy->reset = devm_reset_control_get(dev, "hsic");
  113. if (IS_ERR(phy->reset)) {
  114. dev_err(dev, "failed to get reset control\n");
  115. return PTR_ERR(phy->reset);
  116. }
  117. } else {
  118. phy->clk = devm_clk_get(dev, "phy");
  119. if (IS_ERR(phy->clk)) {
  120. dev_err(dev, "failed to get phy clock\n");
  121. return PTR_ERR(phy->clk);
  122. }
  123. phy->reset = devm_reset_control_get(dev, "phy");
  124. if (IS_ERR(phy->reset)) {
  125. dev_err(dev, "failed to get reset control\n");
  126. return PTR_ERR(phy->reset);
  127. }
  128. }
  129. phy->pmu = devm_platform_ioremap_resource(pdev, 0);
  130. if (IS_ERR(phy->pmu))
  131. return PTR_ERR(phy->pmu);
  132. phy->phy = devm_phy_create(dev, NULL, &sun9i_usb_phy_ops);
  133. if (IS_ERR(phy->phy)) {
  134. dev_err(dev, "failed to create PHY\n");
  135. return PTR_ERR(phy->phy);
  136. }
  137. phy_set_drvdata(phy->phy, phy);
  138. phy_provider = devm_of_phy_provider_register(dev, of_phy_simple_xlate);
  139. return PTR_ERR_OR_ZERO(phy_provider);
  140. }
  141. static const struct of_device_id sun9i_usb_phy_of_match[] = {
  142. { .compatible = "allwinner,sun9i-a80-usb-phy" },
  143. { },
  144. };
  145. MODULE_DEVICE_TABLE(of, sun9i_usb_phy_of_match);
  146. static struct platform_driver sun9i_usb_phy_driver = {
  147. .probe = sun9i_usb_phy_probe,
  148. .driver = {
  149. .of_match_table = sun9i_usb_phy_of_match,
  150. .name = "sun9i-usb-phy",
  151. }
  152. };
  153. module_platform_driver(sun9i_usb_phy_driver);
  154. MODULE_DESCRIPTION("Allwinner sun9i USB phy driver");
  155. MODULE_AUTHOR("Chen-Yu Tsai <[email protected]>");
  156. MODULE_LICENSE("GPL");