msm_sdexpress.c 19 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2022-2024 Qualcomm Innovation Center, Inc. All rights reserved.
  4. */
  5. #include "msm_sdexpress.h"
  6. static void msm_sdexpress_kobj_release(struct kobject *kobj)
  7. {
  8. kobject_put(kobj);
  9. }
  10. static struct kobj_type msm_sdexpress_ktype = {
  11. .release = msm_sdexpress_kobj_release,
  12. };
  13. static int msm_sdexpress_vreg_set_voltage(struct msm_sdexpress_reg_data *vreg,
  14. int min_uV, int max_uV)
  15. {
  16. int ret = 0;
  17. if (!vreg->set_voltage_sup)
  18. return ret;
  19. ret = regulator_set_voltage(vreg->reg, min_uV, max_uV);
  20. if (ret)
  21. pr_err("%s: regulator_set_voltage(%s)failed. min_uV=%d,max_uV=%d,ret=%d\n",
  22. __func__, vreg->name, min_uV, max_uV, ret);
  23. return ret;
  24. }
  25. static int msm_sdexpress_vreg_set_optimum_mode(struct msm_sdexpress_reg_data *vreg,
  26. int uA_load)
  27. {
  28. int ret = 0;
  29. if (!vreg->set_voltage_sup)
  30. return ret;
  31. ret = regulator_set_load(vreg->reg, uA_load);
  32. if (ret < 0) {
  33. pr_err("%s: regulator_set_load(reg=%s,uA_load=%d) failed ret=%d\n",
  34. __func__, vreg->name, uA_load, ret);
  35. return ret;
  36. }
  37. return 0;
  38. }
  39. static int msm_sdexpress_vreg_enable(struct msm_sdexpress_reg_data *vreg)
  40. {
  41. int ret = 0;
  42. /* Put regulator in HPM (high power mode) */
  43. ret = msm_sdexpress_vreg_set_optimum_mode(vreg, vreg->hpm_uA);
  44. if (ret < 0)
  45. return ret;
  46. if (!vreg->is_enabled) {
  47. /* Set voltage level */
  48. ret = msm_sdexpress_vreg_set_voltage(vreg, vreg->low_vol_level,
  49. vreg->high_vol_level);
  50. if (ret)
  51. return ret;
  52. }
  53. ret = regulator_enable(vreg->reg);
  54. if (ret) {
  55. pr_err("%s: regulator_enable(%s) failed. ret=%d\n",
  56. __func__, vreg->name, ret);
  57. return ret;
  58. }
  59. vreg->is_enabled = true;
  60. return ret;
  61. }
  62. static int msm_sdexpress_vreg_disable(struct msm_sdexpress_reg_data *vreg)
  63. {
  64. int ret = 0;
  65. if (!vreg->is_enabled)
  66. return ret;
  67. /* Never disable regulator marked as always_on */
  68. if (!vreg->is_always_on) {
  69. ret = regulator_disable(vreg->reg);
  70. if (ret) {
  71. pr_err("%s: regulator_disable(%s) failed. ret=%d\n",
  72. __func__, vreg->name, ret);
  73. return ret;
  74. }
  75. vreg->is_enabled = false;
  76. /* Set min. voltage level to 0 */
  77. return msm_sdexpress_vreg_set_voltage(vreg, 0, vreg->high_vol_level);
  78. }
  79. if (!vreg->lpm_sup)
  80. return ret;
  81. /* Put always_on regulator in LPM (low power mode) */
  82. return msm_sdexpress_vreg_set_optimum_mode(vreg, vreg->lpm_uA);
  83. }
  84. static int msm_sdexpress_setup_vreg(struct msm_sdexpress_info *info,
  85. struct msm_sdexpress_reg_data *vreg,
  86. bool enable)
  87. {
  88. if (enable)
  89. return msm_sdexpress_vreg_enable(vreg);
  90. return msm_sdexpress_vreg_disable(vreg);
  91. }
  92. static void msm_sdexpress_deenumerate_card(struct msm_sdexpress_info *info)
  93. {
  94. int rc = 0;
  95. struct msm_sdexpress_reg_data *vreg;
  96. mutex_lock(&info->detect_lock);
  97. /* Check if card is already deenumerated */
  98. if (!info->card_enumerated) {
  99. mutex_unlock(&info->detect_lock);
  100. return;
  101. }
  102. rc = msm_pcie_deenumerate(info->pci_nvme_instance);
  103. if (rc) {
  104. pr_err("%s: pcie deenumeration fails err:%d\n",
  105. __func__, rc);
  106. mutex_unlock(&info->detect_lock);
  107. return;
  108. }
  109. vreg = info->vreg_data->vdd1_data;
  110. rc = msm_sdexpress_vreg_disable(vreg);
  111. vreg = info->vreg_data->vdd2_data;
  112. rc = msm_sdexpress_vreg_disable(vreg);
  113. info->card_enumerated = false;
  114. mutex_unlock(&info->detect_lock);
  115. pr_debug("sdexpress deenumeration successful\n");
  116. }
  117. static void msm_sdexpress_enumerate_card(struct msm_sdexpress_info *info)
  118. {
  119. int rc, retry_count = 0;
  120. unsigned long timeout;
  121. struct msm_sdexpress_reg_data *vreg;
  122. mutex_lock(&info->detect_lock);
  123. /* Check if card is already enumerated */
  124. if (info->card_enumerated) {
  125. mutex_unlock(&info->detect_lock);
  126. return;
  127. }
  128. /*
  129. * Make sure the following are low and high before powering the VDD's.
  130. * During probe, all these lines are in their respective low/high states.
  131. * So, take care during hotplug, system suspend & resumes sceniarios.
  132. * LOW:
  133. * SDCLK (pull down to be provided on PCB),
  134. * PCIE RESET
  135. * REFCLK+
  136. * REFCLK-
  137. *
  138. * HIGH:
  139. * CMD (pull up to be provided on PCB)
  140. * CLKREQ
  141. */
  142. retry:
  143. /* Enable vdd1 regulator */
  144. vreg = info->vreg_data->vdd1_data;
  145. rc = msm_sdexpress_setup_vreg(info, vreg, true);
  146. if (rc) {
  147. pr_err("%s: Unable to enable VDD1 regulator:%d\n", __func__, rc);
  148. goto out;
  149. }
  150. /*
  151. * After VDD1 enable, if the host detects RESET low and CLKREQ high,
  152. * enable VDD2 LDO.
  153. *
  154. * Setting RESET to low and CLKREQ to high would be taken care of by
  155. * board-level hardware. So go ahead and enable VDD2
  156. */
  157. udelay(1000);
  158. vreg = info->vreg_data->vdd2_data;
  159. rc = msm_sdexpress_setup_vreg(info, vreg, true);
  160. if (rc) {
  161. pr_err("%s: Unable to enable VDD2 regulator:%d\n", __func__, rc);
  162. goto disable_vdd1;
  163. }
  164. /*
  165. * When the card detects VDD2 ON, the card drives CLKREQ low
  166. * within a time period from VDD2 stabilization.
  167. * wait for 5 sec. ?
  168. */
  169. timeout = (5 * HZ) + jiffies;
  170. while ((gpiod_get_value(info->sdexpress_clkreq_gpio->gpio)) == 0) {
  171. usleep_range(500, 600);
  172. if (time_after(jiffies, timeout)) {
  173. pr_err("%s: CLKREQ is not going low. Wrong card may be inserted ?\n",
  174. __func__);
  175. /* notify userspace that an incompatible card is inserted */
  176. kobject_uevent(&info->kobj, KOBJ_CHANGE);
  177. rc = -ENODEV;
  178. goto disable_vdd2;
  179. }
  180. }
  181. if (!rc)
  182. rc = msm_pcie_enumerate(info->pci_nvme_instance);
  183. /*
  184. * sometimes on few platforms, pcie enumerate may fail on first call.
  185. * As there is no harm for a retry, go for it.
  186. */
  187. if (rc) {
  188. while (retry_count++ < PCIE_ENUMERATE_RETRY) {
  189. vreg = info->vreg_data->vdd1_data;
  190. msm_sdexpress_vreg_disable(vreg);
  191. vreg = info->vreg_data->vdd2_data;
  192. msm_sdexpress_vreg_disable(vreg);
  193. usleep_range(5000, 6000);
  194. goto retry;
  195. }
  196. }
  197. if (!rc) {
  198. info->card_enumerated = true;
  199. mutex_unlock(&info->detect_lock);
  200. pr_info("%s: Card enumerated successfully\n", __func__);
  201. return;
  202. }
  203. disable_vdd2:
  204. vreg = info->vreg_data->vdd2_data;
  205. msm_sdexpress_vreg_disable(vreg);
  206. disable_vdd1:
  207. vreg = info->vreg_data->vdd1_data;
  208. msm_sdexpress_vreg_disable(vreg);
  209. out:
  210. mutex_unlock(&info->detect_lock);
  211. pr_err("%s: failed to call pcie enumeration. err:%d\n", __func__, rc);
  212. }
  213. static void msm_sdexpress_detect_change(struct work_struct *work)
  214. {
  215. struct msm_sdexpress_info *info;
  216. info = container_of(to_delayed_work(work), struct msm_sdexpress_info, sdex_work);
  217. pr_debug("%s Enter. trigger event:%d cd gpio:%d clkreq gpio:%d\n", __func__,
  218. atomic_read(&info->trigger_card_event),
  219. gpiod_get_value(info->sdexpress_gpio->gpio),
  220. gpiod_get_value(info->sdexpress_clkreq_gpio->gpio));
  221. if (atomic_read(&info->trigger_card_event) &&
  222. gpiod_get_value(info->sdexpress_gpio->gpio))
  223. msm_sdexpress_deenumerate_card(info);
  224. else
  225. msm_sdexpress_enumerate_card(info);
  226. }
  227. static irqreturn_t msm_sdexpress_gpio_cd_irqt(int irq, void *dev_id)
  228. {
  229. struct msm_sdexpress_info *info = dev_id;
  230. atomic_set(&info->trigger_card_event, 1);
  231. queue_delayed_work(info->sdexpress_wq, &info->sdex_work,
  232. msecs_to_jiffies(info->sdexpress_gpio->cd_debounce_delay_ms));
  233. return IRQ_HANDLED;
  234. }
  235. static int msm_sdexpress_dt_parse_vreg_info(struct device *dev,
  236. struct msm_sdexpress_reg_data **vreg_data, const char *vreg_name)
  237. {
  238. int len, ret = 0;
  239. const __be32 *prop;
  240. char prop_name[MAX_PROP_SIZE];
  241. struct msm_sdexpress_reg_data *vreg;
  242. struct device_node *np = dev->of_node;
  243. snprintf(prop_name, MAX_PROP_SIZE, "%s-supply", vreg_name);
  244. if (!of_parse_phandle(np, prop_name, 0)) {
  245. dev_info(dev, "No vreg data found for %s\n", vreg_name);
  246. return ret;
  247. }
  248. vreg = devm_kzalloc(dev, sizeof(*vreg), GFP_KERNEL);
  249. if (!vreg)
  250. return -ENOMEM;
  251. vreg->name = vreg_name;
  252. snprintf(prop_name, MAX_PROP_SIZE,
  253. "qcom,%s-always-on", vreg_name);
  254. if (of_get_property(np, prop_name, NULL))
  255. vreg->is_always_on = true;
  256. snprintf(prop_name, MAX_PROP_SIZE,
  257. "qcom,%s-lpm-sup", vreg_name);
  258. if (of_get_property(np, prop_name, NULL))
  259. vreg->lpm_sup = true;
  260. snprintf(prop_name, MAX_PROP_SIZE,
  261. "qcom,%s-voltage-level", vreg_name);
  262. prop = of_get_property(np, prop_name, &len);
  263. if (!prop || (len != (2 * sizeof(__be32)))) {
  264. dev_warn(dev, "%s %s property. setting default values\n",
  265. prop ? "invalid format" : "no", prop_name);
  266. if (!strcmp(vreg_name, "vdd1")) {
  267. vreg->low_vol_level = SDEXPRESS_VREG_VDD1_DEFAULT_UV;
  268. vreg->high_vol_level = SDEXPRESS_VREG_VDD1_DEFAULT_UV;
  269. } else {
  270. vreg->low_vol_level = SDEXPRESS_VREG_VDD2_DEFAULT_UV;
  271. vreg->high_vol_level = SDEXPRESS_VREG_VDD2_DEFAULT_UV;
  272. }
  273. } else {
  274. vreg->low_vol_level = be32_to_cpup(&prop[0]);
  275. vreg->high_vol_level = be32_to_cpup(&prop[1]);
  276. }
  277. snprintf(prop_name, MAX_PROP_SIZE,
  278. "qcom,%s-current-level", vreg_name);
  279. prop = of_get_property(np, prop_name, &len);
  280. if (!prop || (len != (2 * sizeof(__be32)))) {
  281. dev_warn(dev, "%s %s property\n",
  282. prop ? "invalid format" : "no", prop_name);
  283. vreg->lpm_uA = SDEXPRESS_VREG_DEFAULT_MIN_LOAD_UA;
  284. vreg->hpm_uA = SDEXPRESS_VREG_DEFAULT_MAX_LODA_UA;
  285. } else {
  286. vreg->lpm_uA = be32_to_cpup(&prop[0]);
  287. vreg->hpm_uA = be32_to_cpup(&prop[1]);
  288. }
  289. *vreg_data = vreg;
  290. dev_dbg(dev, "%s: %s %s vol=[%d %d]uV, curr=[%d %d]uA\n",
  291. vreg->name, vreg->is_always_on ? "always_on," : "",
  292. vreg->lpm_sup ? "lpm_sup," : "", vreg->low_vol_level,
  293. vreg->high_vol_level, vreg->lpm_uA, vreg->hpm_uA);
  294. return ret;
  295. }
  296. static int msm_sdexpress_parse_clkreq_gpio(struct device *dev,
  297. struct msm_sdexpress_info *info)
  298. {
  299. int rc = 0;
  300. struct gpio_desc *desc;
  301. struct msm_sdexpress_gpio *ctx;
  302. ctx = devm_kzalloc(dev, sizeof(struct msm_sdexpress_gpio),
  303. GFP_KERNEL);
  304. if (!ctx)
  305. return -ENOMEM;
  306. ctx->label = devm_kasprintf(dev, GFP_KERNEL,
  307. "%s sdexpress-clkreq", dev_name(dev));
  308. if (!ctx->label) {
  309. dev_err(dev, "%s no memory for clkreq_label (%d)\n",
  310. __func__, -ENOMEM);
  311. rc = -ENOMEM;
  312. goto out;
  313. }
  314. info->sdexpress_clkreq_gpio = ctx;
  315. desc = devm_gpiod_get_index(dev, "clkreq", 0, GPIOD_IN);
  316. if (IS_ERR(desc)) {
  317. dev_err(dev, "%s unable to get clkreq gpio desc (%d)\n",
  318. __func__, PTR_ERR(desc));
  319. rc = PTR_ERR(desc);
  320. goto out;
  321. }
  322. /*
  323. * clkreq pin function should be set to function-1 so that PCIe
  324. * controller can drive this pin for PCIe link low power states.
  325. * But devm_gpiod_get_index is inadvertently overriding pin
  326. * configuration from function-1 to function-0. Due to this PCIe
  327. * controller is unable to drive this pin. So PCIe l1ss is not
  328. * working as expected.
  329. *
  330. * To configure this clkreq gpio function to function-1, apply
  331. * pinctrl configuration which can set function to function-1.
  332. * Since we can't directly write active config as its gets
  333. * applied by driver framework, first apply sleep config and
  334. * then apply active config.
  335. */
  336. rc = pinctrl_pm_select_sleep_state(dev);
  337. if (rc) {
  338. dev_err(dev, "%s failed to set sleep state (%d)\n",
  339. __func__, rc);
  340. goto out;
  341. }
  342. msleep(200);
  343. rc = pinctrl_pm_select_default_state(dev);
  344. if (rc) {
  345. dev_err(dev, "%s failed to set default state (%d)\n",
  346. __func__, rc);
  347. goto out;
  348. }
  349. info->sdexpress_clkreq_gpio->gpio = desc;
  350. out:
  351. return rc;
  352. }
  353. static int msm_sdexpress_parse_cd_gpio(struct device *dev,
  354. struct msm_sdexpress_info *info)
  355. {
  356. int rc;
  357. u32 cd_debounce_delay_ms;
  358. struct gpio_desc *desc;
  359. struct msm_sdexpress_gpio *ctx;
  360. ctx = devm_kzalloc(dev, sizeof(struct msm_sdexpress_gpio),
  361. GFP_KERNEL);
  362. if (!ctx)
  363. return -ENOMEM;
  364. ctx->label = devm_kasprintf(dev, GFP_KERNEL,
  365. "%s sdexpress-cd", dev_name(dev));
  366. if (!ctx->label) {
  367. dev_err(dev, "%s no memory for label (%d)\n",
  368. __func__, -ENOMEM);
  369. rc = -ENOMEM;
  370. goto out;
  371. }
  372. info->sdexpress_gpio = ctx;
  373. info->cd_irq = -EINVAL;
  374. desc = devm_gpiod_get_index(dev, "sdexpress", 0, GPIOD_IN);
  375. if (IS_ERR(desc)) {
  376. dev_err(dev, "%s unable to get gpio desc (%d)\n",
  377. __func__, PTR_ERR(desc));
  378. rc = PTR_ERR(desc);
  379. goto out;
  380. }
  381. if (device_property_read_u32(dev, "cd-debounce-delay-ms",
  382. &cd_debounce_delay_ms))
  383. cd_debounce_delay_ms = 200;
  384. rc = gpiod_set_debounce(desc, cd_debounce_delay_ms * 1000);
  385. if (rc < 0) {
  386. dev_warn(dev, "%s unable to set debounce for cd gpio desc (%d)\n",
  387. __func__, rc);
  388. rc = 0;
  389. }
  390. info->sdexpress_gpio->cd_debounce_delay_ms = cd_debounce_delay_ms;
  391. info->sdexpress_gpio->gpio = desc;
  392. out:
  393. return rc;
  394. }
  395. static int msm_sdexpress_populate_pdata(struct device *dev,
  396. struct msm_sdexpress_info *info)
  397. {
  398. int rc;
  399. struct device_node *of_node = dev->of_node;
  400. rc = of_property_read_u32(of_node, "qcom,pcie-nvme-instance",
  401. &info->pci_nvme_instance);
  402. if (rc) {
  403. dev_err(dev, "pcie instance is missing\n");
  404. goto out;
  405. }
  406. info->vreg_data = devm_kzalloc(dev, sizeof(struct msm_sdexpress_vreg_data),
  407. GFP_KERNEL);
  408. if (!info->vreg_data) {
  409. rc = -ENOMEM;
  410. goto out;
  411. }
  412. rc = msm_sdexpress_dt_parse_vreg_info(dev, &info->vreg_data->vdd1_data,
  413. "vdd1");
  414. if (rc) {
  415. dev_err(dev, "failed parsing vdd1 data\n");
  416. goto out;
  417. }
  418. rc = msm_sdexpress_dt_parse_vreg_info(dev, &info->vreg_data->vdd2_data,
  419. "vdd2");
  420. if (rc) {
  421. dev_err(dev, "failed parsing vdd2 data\n");
  422. goto out;
  423. }
  424. rc = msm_sdexpress_parse_cd_gpio(dev, info);
  425. if (rc) {
  426. dev_err(dev, "failed to parse cd gpio\n");
  427. goto out;
  428. }
  429. rc = msm_sdexpress_parse_clkreq_gpio(dev, info);
  430. if (rc)
  431. dev_err(dev, "failed to parse clkreq gpio\n");
  432. out:
  433. return rc;
  434. }
  435. /*
  436. * Regulator utility functions
  437. */
  438. static int msm_sdexpress_vreg_init_reg(struct device *dev,
  439. struct msm_sdexpress_reg_data *vreg)
  440. {
  441. int ret = 0;
  442. /* check if regulator is already initialized? */
  443. if (vreg->reg)
  444. goto out;
  445. /* Get the regulator handle */
  446. vreg->reg = devm_regulator_get(dev, vreg->name);
  447. if (IS_ERR(vreg->reg)) {
  448. ret = PTR_ERR(vreg->reg);
  449. pr_err("%s: devm_regulator_get(%s) failed. ret=%d\n",
  450. __func__, vreg->name, ret);
  451. goto out;
  452. }
  453. if (regulator_count_voltages(vreg->reg) > 0) {
  454. vreg->set_voltage_sup = true;
  455. /* sanity check */
  456. if (!vreg->high_vol_level || !vreg->hpm_uA) {
  457. pr_err("%s: %s invalid constraints specified\n",
  458. __func__, vreg->name);
  459. ret = -EINVAL;
  460. }
  461. }
  462. out:
  463. return ret;
  464. }
  465. static int msm_sdexpress_vreg_init(struct device *dev,
  466. struct msm_sdexpress_info *info)
  467. {
  468. int ret;
  469. struct msm_sdexpress_vreg_data *slot;
  470. struct msm_sdexpress_reg_data *vdd1_reg, *vdd2_reg;
  471. slot = info->vreg_data;
  472. vdd1_reg = slot->vdd1_data;
  473. vdd2_reg = slot->vdd2_data;
  474. if (!vdd1_reg || !vdd2_reg)
  475. return -EINVAL;
  476. /*
  477. * Get the regulator handle from voltage regulator framework
  478. * and then try to set the voltage level for the regulator
  479. */
  480. ret = msm_sdexpress_vreg_init_reg(dev, vdd1_reg);
  481. if (ret)
  482. goto out;
  483. ret = msm_sdexpress_vreg_init_reg(dev, vdd2_reg);
  484. out:
  485. if (ret)
  486. dev_err(dev, "vreg init failed (%d)\n", ret);
  487. return ret;
  488. }
  489. static void msm_sdexpress_gpiod_request_cd_irq(struct msm_sdexpress_info *info)
  490. {
  491. int irq, ret;
  492. struct device *dev = info->dev;
  493. struct msm_sdexpress_gpio *ctx = info->sdexpress_gpio;
  494. if (!ctx || !ctx->gpio)
  495. return;
  496. /* Do not use IRQ if the platform prefers to poll */
  497. irq = gpiod_to_irq(ctx->gpio);
  498. if (irq < 0) {
  499. dev_err(dev, "fails to allocate irq for cdgpio(%d)\n", irq);
  500. return;
  501. }
  502. if (!ctx->cd_gpio_isr)
  503. ctx->cd_gpio_isr = msm_sdexpress_gpio_cd_irqt;
  504. ret = devm_request_threaded_irq(dev, irq, NULL, ctx->cd_gpio_isr,
  505. IRQF_TRIGGER_RISING |
  506. IRQF_TRIGGER_FALLING |
  507. IRQF_ONESHOT,
  508. ctx->label, info);
  509. if (ret < 0) {
  510. dev_err(dev, "intr allocation failed, continuing w/o hotplug support(%d)\n",
  511. ret);
  512. return;
  513. }
  514. info->cd_irq = irq;
  515. /* Enable wake capability for card detect irq */
  516. ret = enable_irq_wake(info->cd_irq);
  517. if (ret)
  518. dev_err(dev, "failed to enable wake capability for cd-gpio(%d)\n",
  519. ret);
  520. }
  521. /*
  522. * This function gets called when its device named msm-sdexpress is added to
  523. * device tree .dts file with all its required resources such as gpio, vdd1,
  524. * vdd2 etc.
  525. */
  526. static int msm_sdexpress_probe(struct platform_device *pdev)
  527. {
  528. struct msm_sdexpress_info *info;
  529. int ret;
  530. char sdexpress_wq_name[sizeof("sdexpress_wq")];
  531. struct device *dev = &pdev->dev;
  532. info = devm_kzalloc(&pdev->dev, sizeof(struct msm_sdexpress_info),
  533. GFP_KERNEL);
  534. if (!info) {
  535. ret = -ENOMEM;
  536. goto out;
  537. }
  538. scnprintf(sdexpress_wq_name, ARRAY_SIZE(sdexpress_wq_name), "%s",
  539. "sdexpress_wq");
  540. info->sdexpress_wq = create_singlethread_workqueue(sdexpress_wq_name);
  541. if (!info->sdexpress_wq) {
  542. pr_err("%s: failed to create the workqueue\n",
  543. __func__);
  544. ret = -ENOMEM;
  545. goto out;
  546. }
  547. INIT_DELAYED_WORK(&info->sdex_work, msm_sdexpress_detect_change);
  548. mutex_init(&info->detect_lock);
  549. /* Parse platform data */
  550. ret = msm_sdexpress_populate_pdata(dev, info);
  551. if (ret) {
  552. dev_err(&pdev->dev, "DT parsing error\n");
  553. goto err;
  554. }
  555. info->dev = dev;
  556. /*
  557. * Register an irq for a given cd gpio.
  558. * If registration fails, still go ahead this would allow
  559. * to detect the card presence on boot up.
  560. */
  561. msm_sdexpress_gpiod_request_cd_irq(info);
  562. platform_set_drvdata(pdev, info);
  563. /* Setup regulators */
  564. ret = msm_sdexpress_vreg_init(&pdev->dev, info);
  565. if (ret) {
  566. dev_err(&pdev->dev, "Regulator setup failed (%d)\n", ret);
  567. goto err;
  568. }
  569. /* Queue a work-item for card presence from bootup */
  570. atomic_set(&info->trigger_card_event, 0);
  571. if (!gpiod_get_value(info->sdexpress_gpio->gpio))
  572. queue_delayed_work(info->sdexpress_wq, &info->sdex_work,
  573. msecs_to_jiffies(SDEXPRESS_PROBE_DELAYED_PERIOD));
  574. /* Initialize and register a kobject with the kobject core */
  575. kobject_init(&info->kobj, &msm_sdexpress_ktype);
  576. ret = kobject_add(&info->kobj, &dev->kobj, "%s", "sdexpress");
  577. if (ret) {
  578. dev_err(&pdev->dev, "Failed to add kobject (%d)\n", ret);
  579. goto kput;
  580. }
  581. /* announce that kobject has been created */
  582. ret = kobject_uevent(&info->kobj, KOBJ_ADD);
  583. if (ret) {
  584. dev_err(&pdev->dev, "Failed to sent uevent (%d)\n", ret);
  585. goto kput;
  586. }
  587. pr_info("%s: probe successful\n", __func__);
  588. return ret;
  589. kput:
  590. kobject_put(&info->kobj);
  591. err:
  592. if (info->sdexpress_wq)
  593. destroy_workqueue(info->sdexpress_wq);
  594. out:
  595. return ret;
  596. }
  597. /*
  598. * Remove functionality that gets called when driver/device
  599. * msm_sdexpress is removed.
  600. */
  601. static int msm_sdexpress_remove(struct platform_device *pdev)
  602. {
  603. struct msm_sdexpress_reg_data *vreg;
  604. struct msm_sdexpress_info *info = dev_get_drvdata(&pdev->dev);
  605. if (info->sdexpress_wq)
  606. destroy_workqueue(info->sdexpress_wq);
  607. vreg = info->vreg_data->vdd1_data;
  608. msm_sdexpress_vreg_disable(vreg);
  609. vreg = info->vreg_data->vdd2_data;
  610. msm_sdexpress_vreg_disable(vreg);
  611. dev_set_drvdata(&pdev->dev, NULL);
  612. return 0;
  613. }
  614. static const struct of_device_id msm_sdexpress_match_table[] = {
  615. { .compatible = "qcom,msm-sdexpress", },
  616. {},
  617. };
  618. static struct platform_driver msm_sdexpress_driver = {
  619. .probe = msm_sdexpress_probe,
  620. .remove = msm_sdexpress_remove,
  621. .driver = {
  622. .name = DRIVER_NAME,
  623. .of_match_table = msm_sdexpress_match_table,
  624. },
  625. };
  626. module_platform_driver(msm_sdexpress_driver);
  627. MODULE_ALIAS(DRIVER_NAME);
  628. MODULE_LICENSE("GPL");
  629. MODULE_DESCRIPTION("MSM SDExpress platform driver");