ntb_transport.c 61 KB

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  1. /*
  2. * This file is provided under a dual BSD/GPLv2 license. When using or
  3. * redistributing this file, you may do so under either license.
  4. *
  5. * GPL LICENSE SUMMARY
  6. *
  7. * Copyright(c) 2012 Intel Corporation. All rights reserved.
  8. * Copyright (C) 2015 EMC Corporation. All Rights Reserved.
  9. *
  10. * This program is free software; you can redistribute it and/or modify
  11. * it under the terms of version 2 of the GNU General Public License as
  12. * published by the Free Software Foundation.
  13. *
  14. * BSD LICENSE
  15. *
  16. * Copyright(c) 2012 Intel Corporation. All rights reserved.
  17. * Copyright (C) 2015 EMC Corporation. All Rights Reserved.
  18. *
  19. * Redistribution and use in source and binary forms, with or without
  20. * modification, are permitted provided that the following conditions
  21. * are met:
  22. *
  23. * * Redistributions of source code must retain the above copyright
  24. * notice, this list of conditions and the following disclaimer.
  25. * * Redistributions in binary form must reproduce the above copy
  26. * notice, this list of conditions and the following disclaimer in
  27. * the documentation and/or other materials provided with the
  28. * distribution.
  29. * * Neither the name of Intel Corporation nor the names of its
  30. * contributors may be used to endorse or promote products derived
  31. * from this software without specific prior written permission.
  32. *
  33. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  34. * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  35. * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  36. * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  37. * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  38. * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  39. * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  40. * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  41. * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  42. * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  43. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  44. *
  45. * PCIe NTB Transport Linux driver
  46. *
  47. * Contact Information:
  48. * Jon Mason <[email protected]>
  49. */
  50. #include <linux/debugfs.h>
  51. #include <linux/delay.h>
  52. #include <linux/dmaengine.h>
  53. #include <linux/dma-mapping.h>
  54. #include <linux/errno.h>
  55. #include <linux/export.h>
  56. #include <linux/interrupt.h>
  57. #include <linux/module.h>
  58. #include <linux/pci.h>
  59. #include <linux/slab.h>
  60. #include <linux/types.h>
  61. #include <linux/uaccess.h>
  62. #include "linux/ntb.h"
  63. #include "linux/ntb_transport.h"
  64. #define NTB_TRANSPORT_VERSION 4
  65. #define NTB_TRANSPORT_VER "4"
  66. #define NTB_TRANSPORT_NAME "ntb_transport"
  67. #define NTB_TRANSPORT_DESC "Software Queue-Pair Transport over NTB"
  68. #define NTB_TRANSPORT_MIN_SPADS (MW0_SZ_HIGH + 2)
  69. MODULE_DESCRIPTION(NTB_TRANSPORT_DESC);
  70. MODULE_VERSION(NTB_TRANSPORT_VER);
  71. MODULE_LICENSE("Dual BSD/GPL");
  72. MODULE_AUTHOR("Intel Corporation");
  73. static unsigned long max_mw_size;
  74. module_param(max_mw_size, ulong, 0644);
  75. MODULE_PARM_DESC(max_mw_size, "Limit size of large memory windows");
  76. static unsigned int transport_mtu = 0x10000;
  77. module_param(transport_mtu, uint, 0644);
  78. MODULE_PARM_DESC(transport_mtu, "Maximum size of NTB transport packets");
  79. static unsigned char max_num_clients;
  80. module_param(max_num_clients, byte, 0644);
  81. MODULE_PARM_DESC(max_num_clients, "Maximum number of NTB transport clients");
  82. static unsigned int copy_bytes = 1024;
  83. module_param(copy_bytes, uint, 0644);
  84. MODULE_PARM_DESC(copy_bytes, "Threshold under which NTB will use the CPU to copy instead of DMA");
  85. static bool use_dma;
  86. module_param(use_dma, bool, 0644);
  87. MODULE_PARM_DESC(use_dma, "Use DMA engine to perform large data copy");
  88. static bool use_msi;
  89. #ifdef CONFIG_NTB_MSI
  90. module_param(use_msi, bool, 0644);
  91. MODULE_PARM_DESC(use_msi, "Use MSI interrupts instead of doorbells");
  92. #endif
  93. static struct dentry *nt_debugfs_dir;
  94. /* Only two-ports NTB devices are supported */
  95. #define PIDX NTB_DEF_PEER_IDX
  96. struct ntb_queue_entry {
  97. /* ntb_queue list reference */
  98. struct list_head entry;
  99. /* pointers to data to be transferred */
  100. void *cb_data;
  101. void *buf;
  102. unsigned int len;
  103. unsigned int flags;
  104. int retries;
  105. int errors;
  106. unsigned int tx_index;
  107. unsigned int rx_index;
  108. struct ntb_transport_qp *qp;
  109. union {
  110. struct ntb_payload_header __iomem *tx_hdr;
  111. struct ntb_payload_header *rx_hdr;
  112. };
  113. };
  114. struct ntb_rx_info {
  115. unsigned int entry;
  116. };
  117. struct ntb_transport_qp {
  118. struct ntb_transport_ctx *transport;
  119. struct ntb_dev *ndev;
  120. void *cb_data;
  121. struct dma_chan *tx_dma_chan;
  122. struct dma_chan *rx_dma_chan;
  123. bool client_ready;
  124. bool link_is_up;
  125. bool active;
  126. u8 qp_num; /* Only 64 QP's are allowed. 0-63 */
  127. u64 qp_bit;
  128. struct ntb_rx_info __iomem *rx_info;
  129. struct ntb_rx_info *remote_rx_info;
  130. void (*tx_handler)(struct ntb_transport_qp *qp, void *qp_data,
  131. void *data, int len);
  132. struct list_head tx_free_q;
  133. spinlock_t ntb_tx_free_q_lock;
  134. void __iomem *tx_mw;
  135. phys_addr_t tx_mw_phys;
  136. size_t tx_mw_size;
  137. dma_addr_t tx_mw_dma_addr;
  138. unsigned int tx_index;
  139. unsigned int tx_max_entry;
  140. unsigned int tx_max_frame;
  141. void (*rx_handler)(struct ntb_transport_qp *qp, void *qp_data,
  142. void *data, int len);
  143. struct list_head rx_post_q;
  144. struct list_head rx_pend_q;
  145. struct list_head rx_free_q;
  146. /* ntb_rx_q_lock: synchronize access to rx_XXXX_q */
  147. spinlock_t ntb_rx_q_lock;
  148. void *rx_buff;
  149. unsigned int rx_index;
  150. unsigned int rx_max_entry;
  151. unsigned int rx_max_frame;
  152. unsigned int rx_alloc_entry;
  153. dma_cookie_t last_cookie;
  154. struct tasklet_struct rxc_db_work;
  155. void (*event_handler)(void *data, int status);
  156. struct delayed_work link_work;
  157. struct work_struct link_cleanup;
  158. struct dentry *debugfs_dir;
  159. struct dentry *debugfs_stats;
  160. /* Stats */
  161. u64 rx_bytes;
  162. u64 rx_pkts;
  163. u64 rx_ring_empty;
  164. u64 rx_err_no_buf;
  165. u64 rx_err_oflow;
  166. u64 rx_err_ver;
  167. u64 rx_memcpy;
  168. u64 rx_async;
  169. u64 tx_bytes;
  170. u64 tx_pkts;
  171. u64 tx_ring_full;
  172. u64 tx_err_no_buf;
  173. u64 tx_memcpy;
  174. u64 tx_async;
  175. bool use_msi;
  176. int msi_irq;
  177. struct ntb_msi_desc msi_desc;
  178. struct ntb_msi_desc peer_msi_desc;
  179. };
  180. struct ntb_transport_mw {
  181. phys_addr_t phys_addr;
  182. resource_size_t phys_size;
  183. void __iomem *vbase;
  184. size_t xlat_size;
  185. size_t buff_size;
  186. size_t alloc_size;
  187. void *alloc_addr;
  188. void *virt_addr;
  189. dma_addr_t dma_addr;
  190. };
  191. struct ntb_transport_client_dev {
  192. struct list_head entry;
  193. struct ntb_transport_ctx *nt;
  194. struct device dev;
  195. };
  196. struct ntb_transport_ctx {
  197. struct list_head entry;
  198. struct list_head client_devs;
  199. struct ntb_dev *ndev;
  200. struct ntb_transport_mw *mw_vec;
  201. struct ntb_transport_qp *qp_vec;
  202. unsigned int mw_count;
  203. unsigned int qp_count;
  204. u64 qp_bitmap;
  205. u64 qp_bitmap_free;
  206. bool use_msi;
  207. unsigned int msi_spad_offset;
  208. u64 msi_db_mask;
  209. bool link_is_up;
  210. struct delayed_work link_work;
  211. struct work_struct link_cleanup;
  212. struct dentry *debugfs_node_dir;
  213. };
  214. enum {
  215. DESC_DONE_FLAG = BIT(0),
  216. LINK_DOWN_FLAG = BIT(1),
  217. };
  218. struct ntb_payload_header {
  219. unsigned int ver;
  220. unsigned int len;
  221. unsigned int flags;
  222. };
  223. enum {
  224. VERSION = 0,
  225. QP_LINKS,
  226. NUM_QPS,
  227. NUM_MWS,
  228. MW0_SZ_HIGH,
  229. MW0_SZ_LOW,
  230. };
  231. #define dev_client_dev(__dev) \
  232. container_of((__dev), struct ntb_transport_client_dev, dev)
  233. #define drv_client(__drv) \
  234. container_of((__drv), struct ntb_transport_client, driver)
  235. #define QP_TO_MW(nt, qp) ((qp) % nt->mw_count)
  236. #define NTB_QP_DEF_NUM_ENTRIES 100
  237. #define NTB_LINK_DOWN_TIMEOUT 10
  238. static void ntb_transport_rxc_db(unsigned long data);
  239. static const struct ntb_ctx_ops ntb_transport_ops;
  240. static struct ntb_client ntb_transport_client;
  241. static int ntb_async_tx_submit(struct ntb_transport_qp *qp,
  242. struct ntb_queue_entry *entry);
  243. static void ntb_memcpy_tx(struct ntb_queue_entry *entry, void __iomem *offset);
  244. static int ntb_async_rx_submit(struct ntb_queue_entry *entry, void *offset);
  245. static void ntb_memcpy_rx(struct ntb_queue_entry *entry, void *offset);
  246. static int ntb_transport_bus_match(struct device *dev,
  247. struct device_driver *drv)
  248. {
  249. return !strncmp(dev_name(dev), drv->name, strlen(drv->name));
  250. }
  251. static int ntb_transport_bus_probe(struct device *dev)
  252. {
  253. const struct ntb_transport_client *client;
  254. int rc;
  255. get_device(dev);
  256. client = drv_client(dev->driver);
  257. rc = client->probe(dev);
  258. if (rc)
  259. put_device(dev);
  260. return rc;
  261. }
  262. static void ntb_transport_bus_remove(struct device *dev)
  263. {
  264. const struct ntb_transport_client *client;
  265. client = drv_client(dev->driver);
  266. client->remove(dev);
  267. put_device(dev);
  268. }
  269. static struct bus_type ntb_transport_bus = {
  270. .name = "ntb_transport",
  271. .match = ntb_transport_bus_match,
  272. .probe = ntb_transport_bus_probe,
  273. .remove = ntb_transport_bus_remove,
  274. };
  275. static LIST_HEAD(ntb_transport_list);
  276. static int ntb_bus_init(struct ntb_transport_ctx *nt)
  277. {
  278. list_add_tail(&nt->entry, &ntb_transport_list);
  279. return 0;
  280. }
  281. static void ntb_bus_remove(struct ntb_transport_ctx *nt)
  282. {
  283. struct ntb_transport_client_dev *client_dev, *cd;
  284. list_for_each_entry_safe(client_dev, cd, &nt->client_devs, entry) {
  285. dev_err(client_dev->dev.parent, "%s still attached to bus, removing\n",
  286. dev_name(&client_dev->dev));
  287. list_del(&client_dev->entry);
  288. device_unregister(&client_dev->dev);
  289. }
  290. list_del(&nt->entry);
  291. }
  292. static void ntb_transport_client_release(struct device *dev)
  293. {
  294. struct ntb_transport_client_dev *client_dev;
  295. client_dev = dev_client_dev(dev);
  296. kfree(client_dev);
  297. }
  298. /**
  299. * ntb_transport_unregister_client_dev - Unregister NTB client device
  300. * @device_name: Name of NTB client device
  301. *
  302. * Unregister an NTB client device with the NTB transport layer
  303. */
  304. void ntb_transport_unregister_client_dev(char *device_name)
  305. {
  306. struct ntb_transport_client_dev *client, *cd;
  307. struct ntb_transport_ctx *nt;
  308. list_for_each_entry(nt, &ntb_transport_list, entry)
  309. list_for_each_entry_safe(client, cd, &nt->client_devs, entry)
  310. if (!strncmp(dev_name(&client->dev), device_name,
  311. strlen(device_name))) {
  312. list_del(&client->entry);
  313. device_unregister(&client->dev);
  314. }
  315. }
  316. EXPORT_SYMBOL_GPL(ntb_transport_unregister_client_dev);
  317. /**
  318. * ntb_transport_register_client_dev - Register NTB client device
  319. * @device_name: Name of NTB client device
  320. *
  321. * Register an NTB client device with the NTB transport layer
  322. */
  323. int ntb_transport_register_client_dev(char *device_name)
  324. {
  325. struct ntb_transport_client_dev *client_dev;
  326. struct ntb_transport_ctx *nt;
  327. int node;
  328. int rc, i = 0;
  329. if (list_empty(&ntb_transport_list))
  330. return -ENODEV;
  331. list_for_each_entry(nt, &ntb_transport_list, entry) {
  332. struct device *dev;
  333. node = dev_to_node(&nt->ndev->dev);
  334. client_dev = kzalloc_node(sizeof(*client_dev),
  335. GFP_KERNEL, node);
  336. if (!client_dev) {
  337. rc = -ENOMEM;
  338. goto err;
  339. }
  340. dev = &client_dev->dev;
  341. /* setup and register client devices */
  342. dev_set_name(dev, "%s%d", device_name, i);
  343. dev->bus = &ntb_transport_bus;
  344. dev->release = ntb_transport_client_release;
  345. dev->parent = &nt->ndev->dev;
  346. rc = device_register(dev);
  347. if (rc) {
  348. put_device(dev);
  349. goto err;
  350. }
  351. list_add_tail(&client_dev->entry, &nt->client_devs);
  352. i++;
  353. }
  354. return 0;
  355. err:
  356. ntb_transport_unregister_client_dev(device_name);
  357. return rc;
  358. }
  359. EXPORT_SYMBOL_GPL(ntb_transport_register_client_dev);
  360. /**
  361. * ntb_transport_register_client - Register NTB client driver
  362. * @drv: NTB client driver to be registered
  363. *
  364. * Register an NTB client driver with the NTB transport layer
  365. *
  366. * RETURNS: An appropriate -ERRNO error value on error, or zero for success.
  367. */
  368. int ntb_transport_register_client(struct ntb_transport_client *drv)
  369. {
  370. drv->driver.bus = &ntb_transport_bus;
  371. if (list_empty(&ntb_transport_list))
  372. return -ENODEV;
  373. return driver_register(&drv->driver);
  374. }
  375. EXPORT_SYMBOL_GPL(ntb_transport_register_client);
  376. /**
  377. * ntb_transport_unregister_client - Unregister NTB client driver
  378. * @drv: NTB client driver to be unregistered
  379. *
  380. * Unregister an NTB client driver with the NTB transport layer
  381. *
  382. * RETURNS: An appropriate -ERRNO error value on error, or zero for success.
  383. */
  384. void ntb_transport_unregister_client(struct ntb_transport_client *drv)
  385. {
  386. driver_unregister(&drv->driver);
  387. }
  388. EXPORT_SYMBOL_GPL(ntb_transport_unregister_client);
  389. static ssize_t debugfs_read(struct file *filp, char __user *ubuf, size_t count,
  390. loff_t *offp)
  391. {
  392. struct ntb_transport_qp *qp;
  393. char *buf;
  394. ssize_t ret, out_offset, out_count;
  395. qp = filp->private_data;
  396. if (!qp || !qp->link_is_up)
  397. return 0;
  398. out_count = 1000;
  399. buf = kmalloc(out_count, GFP_KERNEL);
  400. if (!buf)
  401. return -ENOMEM;
  402. out_offset = 0;
  403. out_offset += scnprintf(buf + out_offset, out_count - out_offset,
  404. "\nNTB QP stats:\n\n");
  405. out_offset += scnprintf(buf + out_offset, out_count - out_offset,
  406. "rx_bytes - \t%llu\n", qp->rx_bytes);
  407. out_offset += scnprintf(buf + out_offset, out_count - out_offset,
  408. "rx_pkts - \t%llu\n", qp->rx_pkts);
  409. out_offset += scnprintf(buf + out_offset, out_count - out_offset,
  410. "rx_memcpy - \t%llu\n", qp->rx_memcpy);
  411. out_offset += scnprintf(buf + out_offset, out_count - out_offset,
  412. "rx_async - \t%llu\n", qp->rx_async);
  413. out_offset += scnprintf(buf + out_offset, out_count - out_offset,
  414. "rx_ring_empty - %llu\n", qp->rx_ring_empty);
  415. out_offset += scnprintf(buf + out_offset, out_count - out_offset,
  416. "rx_err_no_buf - %llu\n", qp->rx_err_no_buf);
  417. out_offset += scnprintf(buf + out_offset, out_count - out_offset,
  418. "rx_err_oflow - \t%llu\n", qp->rx_err_oflow);
  419. out_offset += scnprintf(buf + out_offset, out_count - out_offset,
  420. "rx_err_ver - \t%llu\n", qp->rx_err_ver);
  421. out_offset += scnprintf(buf + out_offset, out_count - out_offset,
  422. "rx_buff - \t0x%p\n", qp->rx_buff);
  423. out_offset += scnprintf(buf + out_offset, out_count - out_offset,
  424. "rx_index - \t%u\n", qp->rx_index);
  425. out_offset += scnprintf(buf + out_offset, out_count - out_offset,
  426. "rx_max_entry - \t%u\n", qp->rx_max_entry);
  427. out_offset += scnprintf(buf + out_offset, out_count - out_offset,
  428. "rx_alloc_entry - \t%u\n\n", qp->rx_alloc_entry);
  429. out_offset += scnprintf(buf + out_offset, out_count - out_offset,
  430. "tx_bytes - \t%llu\n", qp->tx_bytes);
  431. out_offset += scnprintf(buf + out_offset, out_count - out_offset,
  432. "tx_pkts - \t%llu\n", qp->tx_pkts);
  433. out_offset += scnprintf(buf + out_offset, out_count - out_offset,
  434. "tx_memcpy - \t%llu\n", qp->tx_memcpy);
  435. out_offset += scnprintf(buf + out_offset, out_count - out_offset,
  436. "tx_async - \t%llu\n", qp->tx_async);
  437. out_offset += scnprintf(buf + out_offset, out_count - out_offset,
  438. "tx_ring_full - \t%llu\n", qp->tx_ring_full);
  439. out_offset += scnprintf(buf + out_offset, out_count - out_offset,
  440. "tx_err_no_buf - %llu\n", qp->tx_err_no_buf);
  441. out_offset += scnprintf(buf + out_offset, out_count - out_offset,
  442. "tx_mw - \t0x%p\n", qp->tx_mw);
  443. out_offset += scnprintf(buf + out_offset, out_count - out_offset,
  444. "tx_index (H) - \t%u\n", qp->tx_index);
  445. out_offset += scnprintf(buf + out_offset, out_count - out_offset,
  446. "RRI (T) - \t%u\n",
  447. qp->remote_rx_info->entry);
  448. out_offset += scnprintf(buf + out_offset, out_count - out_offset,
  449. "tx_max_entry - \t%u\n", qp->tx_max_entry);
  450. out_offset += scnprintf(buf + out_offset, out_count - out_offset,
  451. "free tx - \t%u\n",
  452. ntb_transport_tx_free_entry(qp));
  453. out_offset += scnprintf(buf + out_offset, out_count - out_offset,
  454. "\n");
  455. out_offset += scnprintf(buf + out_offset, out_count - out_offset,
  456. "Using TX DMA - \t%s\n",
  457. qp->tx_dma_chan ? "Yes" : "No");
  458. out_offset += scnprintf(buf + out_offset, out_count - out_offset,
  459. "Using RX DMA - \t%s\n",
  460. qp->rx_dma_chan ? "Yes" : "No");
  461. out_offset += scnprintf(buf + out_offset, out_count - out_offset,
  462. "QP Link - \t%s\n",
  463. qp->link_is_up ? "Up" : "Down");
  464. out_offset += scnprintf(buf + out_offset, out_count - out_offset,
  465. "\n");
  466. if (out_offset > out_count)
  467. out_offset = out_count;
  468. ret = simple_read_from_buffer(ubuf, count, offp, buf, out_offset);
  469. kfree(buf);
  470. return ret;
  471. }
  472. static const struct file_operations ntb_qp_debugfs_stats = {
  473. .owner = THIS_MODULE,
  474. .open = simple_open,
  475. .read = debugfs_read,
  476. };
  477. static void ntb_list_add(spinlock_t *lock, struct list_head *entry,
  478. struct list_head *list)
  479. {
  480. unsigned long flags;
  481. spin_lock_irqsave(lock, flags);
  482. list_add_tail(entry, list);
  483. spin_unlock_irqrestore(lock, flags);
  484. }
  485. static struct ntb_queue_entry *ntb_list_rm(spinlock_t *lock,
  486. struct list_head *list)
  487. {
  488. struct ntb_queue_entry *entry;
  489. unsigned long flags;
  490. spin_lock_irqsave(lock, flags);
  491. if (list_empty(list)) {
  492. entry = NULL;
  493. goto out;
  494. }
  495. entry = list_first_entry(list, struct ntb_queue_entry, entry);
  496. list_del(&entry->entry);
  497. out:
  498. spin_unlock_irqrestore(lock, flags);
  499. return entry;
  500. }
  501. static struct ntb_queue_entry *ntb_list_mv(spinlock_t *lock,
  502. struct list_head *list,
  503. struct list_head *to_list)
  504. {
  505. struct ntb_queue_entry *entry;
  506. unsigned long flags;
  507. spin_lock_irqsave(lock, flags);
  508. if (list_empty(list)) {
  509. entry = NULL;
  510. } else {
  511. entry = list_first_entry(list, struct ntb_queue_entry, entry);
  512. list_move_tail(&entry->entry, to_list);
  513. }
  514. spin_unlock_irqrestore(lock, flags);
  515. return entry;
  516. }
  517. static int ntb_transport_setup_qp_mw(struct ntb_transport_ctx *nt,
  518. unsigned int qp_num)
  519. {
  520. struct ntb_transport_qp *qp = &nt->qp_vec[qp_num];
  521. struct ntb_transport_mw *mw;
  522. struct ntb_dev *ndev = nt->ndev;
  523. struct ntb_queue_entry *entry;
  524. unsigned int rx_size, num_qps_mw;
  525. unsigned int mw_num, mw_count, qp_count;
  526. unsigned int i;
  527. int node;
  528. mw_count = nt->mw_count;
  529. qp_count = nt->qp_count;
  530. mw_num = QP_TO_MW(nt, qp_num);
  531. mw = &nt->mw_vec[mw_num];
  532. if (!mw->virt_addr)
  533. return -ENOMEM;
  534. if (mw_num < qp_count % mw_count)
  535. num_qps_mw = qp_count / mw_count + 1;
  536. else
  537. num_qps_mw = qp_count / mw_count;
  538. rx_size = (unsigned int)mw->xlat_size / num_qps_mw;
  539. qp->rx_buff = mw->virt_addr + rx_size * (qp_num / mw_count);
  540. rx_size -= sizeof(struct ntb_rx_info);
  541. qp->remote_rx_info = qp->rx_buff + rx_size;
  542. /* Due to housekeeping, there must be atleast 2 buffs */
  543. qp->rx_max_frame = min(transport_mtu, rx_size / 2);
  544. qp->rx_max_entry = rx_size / qp->rx_max_frame;
  545. qp->rx_index = 0;
  546. /*
  547. * Checking to see if we have more entries than the default.
  548. * We should add additional entries if that is the case so we
  549. * can be in sync with the transport frames.
  550. */
  551. node = dev_to_node(&ndev->dev);
  552. for (i = qp->rx_alloc_entry; i < qp->rx_max_entry; i++) {
  553. entry = kzalloc_node(sizeof(*entry), GFP_KERNEL, node);
  554. if (!entry)
  555. return -ENOMEM;
  556. entry->qp = qp;
  557. ntb_list_add(&qp->ntb_rx_q_lock, &entry->entry,
  558. &qp->rx_free_q);
  559. qp->rx_alloc_entry++;
  560. }
  561. qp->remote_rx_info->entry = qp->rx_max_entry - 1;
  562. /* setup the hdr offsets with 0's */
  563. for (i = 0; i < qp->rx_max_entry; i++) {
  564. void *offset = (qp->rx_buff + qp->rx_max_frame * (i + 1) -
  565. sizeof(struct ntb_payload_header));
  566. memset(offset, 0, sizeof(struct ntb_payload_header));
  567. }
  568. qp->rx_pkts = 0;
  569. qp->tx_pkts = 0;
  570. qp->tx_index = 0;
  571. return 0;
  572. }
  573. static irqreturn_t ntb_transport_isr(int irq, void *dev)
  574. {
  575. struct ntb_transport_qp *qp = dev;
  576. tasklet_schedule(&qp->rxc_db_work);
  577. return IRQ_HANDLED;
  578. }
  579. static void ntb_transport_setup_qp_peer_msi(struct ntb_transport_ctx *nt,
  580. unsigned int qp_num)
  581. {
  582. struct ntb_transport_qp *qp = &nt->qp_vec[qp_num];
  583. int spad = qp_num * 2 + nt->msi_spad_offset;
  584. if (!nt->use_msi)
  585. return;
  586. if (spad >= ntb_spad_count(nt->ndev))
  587. return;
  588. qp->peer_msi_desc.addr_offset =
  589. ntb_peer_spad_read(qp->ndev, PIDX, spad);
  590. qp->peer_msi_desc.data =
  591. ntb_peer_spad_read(qp->ndev, PIDX, spad + 1);
  592. dev_dbg(&qp->ndev->pdev->dev, "QP%d Peer MSI addr=%x data=%x\n",
  593. qp_num, qp->peer_msi_desc.addr_offset, qp->peer_msi_desc.data);
  594. if (qp->peer_msi_desc.addr_offset) {
  595. qp->use_msi = true;
  596. dev_info(&qp->ndev->pdev->dev,
  597. "Using MSI interrupts for QP%d\n", qp_num);
  598. }
  599. }
  600. static void ntb_transport_setup_qp_msi(struct ntb_transport_ctx *nt,
  601. unsigned int qp_num)
  602. {
  603. struct ntb_transport_qp *qp = &nt->qp_vec[qp_num];
  604. int spad = qp_num * 2 + nt->msi_spad_offset;
  605. int rc;
  606. if (!nt->use_msi)
  607. return;
  608. if (spad >= ntb_spad_count(nt->ndev)) {
  609. dev_warn_once(&qp->ndev->pdev->dev,
  610. "Not enough SPADS to use MSI interrupts\n");
  611. return;
  612. }
  613. ntb_spad_write(qp->ndev, spad, 0);
  614. ntb_spad_write(qp->ndev, spad + 1, 0);
  615. if (!qp->msi_irq) {
  616. qp->msi_irq = ntbm_msi_request_irq(qp->ndev, ntb_transport_isr,
  617. KBUILD_MODNAME, qp,
  618. &qp->msi_desc);
  619. if (qp->msi_irq < 0) {
  620. dev_warn(&qp->ndev->pdev->dev,
  621. "Unable to allocate MSI interrupt for qp%d\n",
  622. qp_num);
  623. return;
  624. }
  625. }
  626. rc = ntb_spad_write(qp->ndev, spad, qp->msi_desc.addr_offset);
  627. if (rc)
  628. goto err_free_interrupt;
  629. rc = ntb_spad_write(qp->ndev, spad + 1, qp->msi_desc.data);
  630. if (rc)
  631. goto err_free_interrupt;
  632. dev_dbg(&qp->ndev->pdev->dev, "QP%d MSI %d addr=%x data=%x\n",
  633. qp_num, qp->msi_irq, qp->msi_desc.addr_offset,
  634. qp->msi_desc.data);
  635. return;
  636. err_free_interrupt:
  637. devm_free_irq(&nt->ndev->dev, qp->msi_irq, qp);
  638. }
  639. static void ntb_transport_msi_peer_desc_changed(struct ntb_transport_ctx *nt)
  640. {
  641. int i;
  642. dev_dbg(&nt->ndev->pdev->dev, "Peer MSI descriptors changed");
  643. for (i = 0; i < nt->qp_count; i++)
  644. ntb_transport_setup_qp_peer_msi(nt, i);
  645. }
  646. static void ntb_transport_msi_desc_changed(void *data)
  647. {
  648. struct ntb_transport_ctx *nt = data;
  649. int i;
  650. dev_dbg(&nt->ndev->pdev->dev, "MSI descriptors changed");
  651. for (i = 0; i < nt->qp_count; i++)
  652. ntb_transport_setup_qp_msi(nt, i);
  653. ntb_peer_db_set(nt->ndev, nt->msi_db_mask);
  654. }
  655. static void ntb_free_mw(struct ntb_transport_ctx *nt, int num_mw)
  656. {
  657. struct ntb_transport_mw *mw = &nt->mw_vec[num_mw];
  658. struct pci_dev *pdev = nt->ndev->pdev;
  659. if (!mw->virt_addr)
  660. return;
  661. ntb_mw_clear_trans(nt->ndev, PIDX, num_mw);
  662. dma_free_coherent(&pdev->dev, mw->alloc_size,
  663. mw->alloc_addr, mw->dma_addr);
  664. mw->xlat_size = 0;
  665. mw->buff_size = 0;
  666. mw->alloc_size = 0;
  667. mw->alloc_addr = NULL;
  668. mw->virt_addr = NULL;
  669. }
  670. static int ntb_alloc_mw_buffer(struct ntb_transport_mw *mw,
  671. struct device *dma_dev, size_t align)
  672. {
  673. dma_addr_t dma_addr;
  674. void *alloc_addr, *virt_addr;
  675. int rc;
  676. alloc_addr = dma_alloc_coherent(dma_dev, mw->alloc_size,
  677. &dma_addr, GFP_KERNEL);
  678. if (!alloc_addr) {
  679. dev_err(dma_dev, "Unable to alloc MW buff of size %zu\n",
  680. mw->alloc_size);
  681. return -ENOMEM;
  682. }
  683. virt_addr = alloc_addr;
  684. /*
  685. * we must ensure that the memory address allocated is BAR size
  686. * aligned in order for the XLAT register to take the value. This
  687. * is a requirement of the hardware. It is recommended to setup CMA
  688. * for BAR sizes equal or greater than 4MB.
  689. */
  690. if (!IS_ALIGNED(dma_addr, align)) {
  691. if (mw->alloc_size > mw->buff_size) {
  692. virt_addr = PTR_ALIGN(alloc_addr, align);
  693. dma_addr = ALIGN(dma_addr, align);
  694. } else {
  695. rc = -ENOMEM;
  696. goto err;
  697. }
  698. }
  699. mw->alloc_addr = alloc_addr;
  700. mw->virt_addr = virt_addr;
  701. mw->dma_addr = dma_addr;
  702. return 0;
  703. err:
  704. dma_free_coherent(dma_dev, mw->alloc_size, alloc_addr, dma_addr);
  705. return rc;
  706. }
  707. static int ntb_set_mw(struct ntb_transport_ctx *nt, int num_mw,
  708. resource_size_t size)
  709. {
  710. struct ntb_transport_mw *mw = &nt->mw_vec[num_mw];
  711. struct pci_dev *pdev = nt->ndev->pdev;
  712. size_t xlat_size, buff_size;
  713. resource_size_t xlat_align;
  714. resource_size_t xlat_align_size;
  715. int rc;
  716. if (!size)
  717. return -EINVAL;
  718. rc = ntb_mw_get_align(nt->ndev, PIDX, num_mw, &xlat_align,
  719. &xlat_align_size, NULL);
  720. if (rc)
  721. return rc;
  722. xlat_size = round_up(size, xlat_align_size);
  723. buff_size = round_up(size, xlat_align);
  724. /* No need to re-setup */
  725. if (mw->xlat_size == xlat_size)
  726. return 0;
  727. if (mw->buff_size)
  728. ntb_free_mw(nt, num_mw);
  729. /* Alloc memory for receiving data. Must be aligned */
  730. mw->xlat_size = xlat_size;
  731. mw->buff_size = buff_size;
  732. mw->alloc_size = buff_size;
  733. rc = ntb_alloc_mw_buffer(mw, &pdev->dev, xlat_align);
  734. if (rc) {
  735. mw->alloc_size *= 2;
  736. rc = ntb_alloc_mw_buffer(mw, &pdev->dev, xlat_align);
  737. if (rc) {
  738. dev_err(&pdev->dev,
  739. "Unable to alloc aligned MW buff\n");
  740. mw->xlat_size = 0;
  741. mw->buff_size = 0;
  742. mw->alloc_size = 0;
  743. return rc;
  744. }
  745. }
  746. /* Notify HW the memory location of the receive buffer */
  747. rc = ntb_mw_set_trans(nt->ndev, PIDX, num_mw, mw->dma_addr,
  748. mw->xlat_size);
  749. if (rc) {
  750. dev_err(&pdev->dev, "Unable to set mw%d translation", num_mw);
  751. ntb_free_mw(nt, num_mw);
  752. return -EIO;
  753. }
  754. return 0;
  755. }
  756. static void ntb_qp_link_context_reset(struct ntb_transport_qp *qp)
  757. {
  758. qp->link_is_up = false;
  759. qp->active = false;
  760. qp->tx_index = 0;
  761. qp->rx_index = 0;
  762. qp->rx_bytes = 0;
  763. qp->rx_pkts = 0;
  764. qp->rx_ring_empty = 0;
  765. qp->rx_err_no_buf = 0;
  766. qp->rx_err_oflow = 0;
  767. qp->rx_err_ver = 0;
  768. qp->rx_memcpy = 0;
  769. qp->rx_async = 0;
  770. qp->tx_bytes = 0;
  771. qp->tx_pkts = 0;
  772. qp->tx_ring_full = 0;
  773. qp->tx_err_no_buf = 0;
  774. qp->tx_memcpy = 0;
  775. qp->tx_async = 0;
  776. }
  777. static void ntb_qp_link_down_reset(struct ntb_transport_qp *qp)
  778. {
  779. ntb_qp_link_context_reset(qp);
  780. if (qp->remote_rx_info)
  781. qp->remote_rx_info->entry = qp->rx_max_entry - 1;
  782. }
  783. static void ntb_qp_link_cleanup(struct ntb_transport_qp *qp)
  784. {
  785. struct ntb_transport_ctx *nt = qp->transport;
  786. struct pci_dev *pdev = nt->ndev->pdev;
  787. dev_info(&pdev->dev, "qp %d: Link Cleanup\n", qp->qp_num);
  788. cancel_delayed_work_sync(&qp->link_work);
  789. ntb_qp_link_down_reset(qp);
  790. if (qp->event_handler)
  791. qp->event_handler(qp->cb_data, qp->link_is_up);
  792. }
  793. static void ntb_qp_link_cleanup_work(struct work_struct *work)
  794. {
  795. struct ntb_transport_qp *qp = container_of(work,
  796. struct ntb_transport_qp,
  797. link_cleanup);
  798. struct ntb_transport_ctx *nt = qp->transport;
  799. ntb_qp_link_cleanup(qp);
  800. if (nt->link_is_up)
  801. schedule_delayed_work(&qp->link_work,
  802. msecs_to_jiffies(NTB_LINK_DOWN_TIMEOUT));
  803. }
  804. static void ntb_qp_link_down(struct ntb_transport_qp *qp)
  805. {
  806. schedule_work(&qp->link_cleanup);
  807. }
  808. static void ntb_transport_link_cleanup(struct ntb_transport_ctx *nt)
  809. {
  810. struct ntb_transport_qp *qp;
  811. u64 qp_bitmap_alloc;
  812. unsigned int i, count;
  813. qp_bitmap_alloc = nt->qp_bitmap & ~nt->qp_bitmap_free;
  814. /* Pass along the info to any clients */
  815. for (i = 0; i < nt->qp_count; i++)
  816. if (qp_bitmap_alloc & BIT_ULL(i)) {
  817. qp = &nt->qp_vec[i];
  818. ntb_qp_link_cleanup(qp);
  819. cancel_work_sync(&qp->link_cleanup);
  820. cancel_delayed_work_sync(&qp->link_work);
  821. }
  822. if (!nt->link_is_up)
  823. cancel_delayed_work_sync(&nt->link_work);
  824. for (i = 0; i < nt->mw_count; i++)
  825. ntb_free_mw(nt, i);
  826. /* The scratchpad registers keep the values if the remote side
  827. * goes down, blast them now to give them a sane value the next
  828. * time they are accessed
  829. */
  830. count = ntb_spad_count(nt->ndev);
  831. for (i = 0; i < count; i++)
  832. ntb_spad_write(nt->ndev, i, 0);
  833. }
  834. static void ntb_transport_link_cleanup_work(struct work_struct *work)
  835. {
  836. struct ntb_transport_ctx *nt =
  837. container_of(work, struct ntb_transport_ctx, link_cleanup);
  838. ntb_transport_link_cleanup(nt);
  839. }
  840. static void ntb_transport_event_callback(void *data)
  841. {
  842. struct ntb_transport_ctx *nt = data;
  843. if (ntb_link_is_up(nt->ndev, NULL, NULL) == 1)
  844. schedule_delayed_work(&nt->link_work, 0);
  845. else
  846. schedule_work(&nt->link_cleanup);
  847. }
  848. static void ntb_transport_link_work(struct work_struct *work)
  849. {
  850. struct ntb_transport_ctx *nt =
  851. container_of(work, struct ntb_transport_ctx, link_work.work);
  852. struct ntb_dev *ndev = nt->ndev;
  853. struct pci_dev *pdev = ndev->pdev;
  854. resource_size_t size;
  855. u32 val;
  856. int rc = 0, i, spad;
  857. /* send the local info, in the opposite order of the way we read it */
  858. if (nt->use_msi) {
  859. rc = ntb_msi_setup_mws(ndev);
  860. if (rc) {
  861. dev_warn(&pdev->dev,
  862. "Failed to register MSI memory window: %d\n",
  863. rc);
  864. nt->use_msi = false;
  865. }
  866. }
  867. for (i = 0; i < nt->qp_count; i++)
  868. ntb_transport_setup_qp_msi(nt, i);
  869. for (i = 0; i < nt->mw_count; i++) {
  870. size = nt->mw_vec[i].phys_size;
  871. if (max_mw_size && size > max_mw_size)
  872. size = max_mw_size;
  873. spad = MW0_SZ_HIGH + (i * 2);
  874. ntb_peer_spad_write(ndev, PIDX, spad, upper_32_bits(size));
  875. spad = MW0_SZ_LOW + (i * 2);
  876. ntb_peer_spad_write(ndev, PIDX, spad, lower_32_bits(size));
  877. }
  878. ntb_peer_spad_write(ndev, PIDX, NUM_MWS, nt->mw_count);
  879. ntb_peer_spad_write(ndev, PIDX, NUM_QPS, nt->qp_count);
  880. ntb_peer_spad_write(ndev, PIDX, VERSION, NTB_TRANSPORT_VERSION);
  881. /* Query the remote side for its info */
  882. val = ntb_spad_read(ndev, VERSION);
  883. dev_dbg(&pdev->dev, "Remote version = %d\n", val);
  884. if (val != NTB_TRANSPORT_VERSION)
  885. goto out;
  886. val = ntb_spad_read(ndev, NUM_QPS);
  887. dev_dbg(&pdev->dev, "Remote max number of qps = %d\n", val);
  888. if (val != nt->qp_count)
  889. goto out;
  890. val = ntb_spad_read(ndev, NUM_MWS);
  891. dev_dbg(&pdev->dev, "Remote number of mws = %d\n", val);
  892. if (val != nt->mw_count)
  893. goto out;
  894. for (i = 0; i < nt->mw_count; i++) {
  895. u64 val64;
  896. val = ntb_spad_read(ndev, MW0_SZ_HIGH + (i * 2));
  897. val64 = (u64)val << 32;
  898. val = ntb_spad_read(ndev, MW0_SZ_LOW + (i * 2));
  899. val64 |= val;
  900. dev_dbg(&pdev->dev, "Remote MW%d size = %#llx\n", i, val64);
  901. rc = ntb_set_mw(nt, i, val64);
  902. if (rc)
  903. goto out1;
  904. }
  905. nt->link_is_up = true;
  906. for (i = 0; i < nt->qp_count; i++) {
  907. struct ntb_transport_qp *qp = &nt->qp_vec[i];
  908. ntb_transport_setup_qp_mw(nt, i);
  909. ntb_transport_setup_qp_peer_msi(nt, i);
  910. if (qp->client_ready)
  911. schedule_delayed_work(&qp->link_work, 0);
  912. }
  913. return;
  914. out1:
  915. for (i = 0; i < nt->mw_count; i++)
  916. ntb_free_mw(nt, i);
  917. /* if there's an actual failure, we should just bail */
  918. if (rc < 0)
  919. return;
  920. out:
  921. if (ntb_link_is_up(ndev, NULL, NULL) == 1)
  922. schedule_delayed_work(&nt->link_work,
  923. msecs_to_jiffies(NTB_LINK_DOWN_TIMEOUT));
  924. }
  925. static void ntb_qp_link_work(struct work_struct *work)
  926. {
  927. struct ntb_transport_qp *qp = container_of(work,
  928. struct ntb_transport_qp,
  929. link_work.work);
  930. struct pci_dev *pdev = qp->ndev->pdev;
  931. struct ntb_transport_ctx *nt = qp->transport;
  932. int val;
  933. WARN_ON(!nt->link_is_up);
  934. val = ntb_spad_read(nt->ndev, QP_LINKS);
  935. ntb_peer_spad_write(nt->ndev, PIDX, QP_LINKS, val | BIT(qp->qp_num));
  936. /* query remote spad for qp ready bits */
  937. dev_dbg_ratelimited(&pdev->dev, "Remote QP link status = %x\n", val);
  938. /* See if the remote side is up */
  939. if (val & BIT(qp->qp_num)) {
  940. dev_info(&pdev->dev, "qp %d: Link Up\n", qp->qp_num);
  941. qp->link_is_up = true;
  942. qp->active = true;
  943. if (qp->event_handler)
  944. qp->event_handler(qp->cb_data, qp->link_is_up);
  945. if (qp->active)
  946. tasklet_schedule(&qp->rxc_db_work);
  947. } else if (nt->link_is_up)
  948. schedule_delayed_work(&qp->link_work,
  949. msecs_to_jiffies(NTB_LINK_DOWN_TIMEOUT));
  950. }
  951. static int ntb_transport_init_queue(struct ntb_transport_ctx *nt,
  952. unsigned int qp_num)
  953. {
  954. struct ntb_transport_qp *qp;
  955. phys_addr_t mw_base;
  956. resource_size_t mw_size;
  957. unsigned int num_qps_mw, tx_size;
  958. unsigned int mw_num, mw_count, qp_count;
  959. u64 qp_offset;
  960. mw_count = nt->mw_count;
  961. qp_count = nt->qp_count;
  962. mw_num = QP_TO_MW(nt, qp_num);
  963. qp = &nt->qp_vec[qp_num];
  964. qp->qp_num = qp_num;
  965. qp->transport = nt;
  966. qp->ndev = nt->ndev;
  967. qp->client_ready = false;
  968. qp->event_handler = NULL;
  969. ntb_qp_link_context_reset(qp);
  970. if (mw_num < qp_count % mw_count)
  971. num_qps_mw = qp_count / mw_count + 1;
  972. else
  973. num_qps_mw = qp_count / mw_count;
  974. mw_base = nt->mw_vec[mw_num].phys_addr;
  975. mw_size = nt->mw_vec[mw_num].phys_size;
  976. if (max_mw_size && mw_size > max_mw_size)
  977. mw_size = max_mw_size;
  978. tx_size = (unsigned int)mw_size / num_qps_mw;
  979. qp_offset = tx_size * (qp_num / mw_count);
  980. qp->tx_mw_size = tx_size;
  981. qp->tx_mw = nt->mw_vec[mw_num].vbase + qp_offset;
  982. if (!qp->tx_mw)
  983. return -EINVAL;
  984. qp->tx_mw_phys = mw_base + qp_offset;
  985. if (!qp->tx_mw_phys)
  986. return -EINVAL;
  987. tx_size -= sizeof(struct ntb_rx_info);
  988. qp->rx_info = qp->tx_mw + tx_size;
  989. /* Due to housekeeping, there must be atleast 2 buffs */
  990. qp->tx_max_frame = min(transport_mtu, tx_size / 2);
  991. qp->tx_max_entry = tx_size / qp->tx_max_frame;
  992. if (nt->debugfs_node_dir) {
  993. char debugfs_name[4];
  994. snprintf(debugfs_name, 4, "qp%d", qp_num);
  995. qp->debugfs_dir = debugfs_create_dir(debugfs_name,
  996. nt->debugfs_node_dir);
  997. qp->debugfs_stats = debugfs_create_file("stats", S_IRUSR,
  998. qp->debugfs_dir, qp,
  999. &ntb_qp_debugfs_stats);
  1000. } else {
  1001. qp->debugfs_dir = NULL;
  1002. qp->debugfs_stats = NULL;
  1003. }
  1004. INIT_DELAYED_WORK(&qp->link_work, ntb_qp_link_work);
  1005. INIT_WORK(&qp->link_cleanup, ntb_qp_link_cleanup_work);
  1006. spin_lock_init(&qp->ntb_rx_q_lock);
  1007. spin_lock_init(&qp->ntb_tx_free_q_lock);
  1008. INIT_LIST_HEAD(&qp->rx_post_q);
  1009. INIT_LIST_HEAD(&qp->rx_pend_q);
  1010. INIT_LIST_HEAD(&qp->rx_free_q);
  1011. INIT_LIST_HEAD(&qp->tx_free_q);
  1012. tasklet_init(&qp->rxc_db_work, ntb_transport_rxc_db,
  1013. (unsigned long)qp);
  1014. return 0;
  1015. }
  1016. static int ntb_transport_probe(struct ntb_client *self, struct ntb_dev *ndev)
  1017. {
  1018. struct ntb_transport_ctx *nt;
  1019. struct ntb_transport_mw *mw;
  1020. unsigned int mw_count, qp_count, spad_count, max_mw_count_for_spads;
  1021. u64 qp_bitmap;
  1022. int node;
  1023. int rc, i;
  1024. mw_count = ntb_peer_mw_count(ndev);
  1025. if (!ndev->ops->mw_set_trans) {
  1026. dev_err(&ndev->dev, "Inbound MW based NTB API is required\n");
  1027. return -EINVAL;
  1028. }
  1029. if (ntb_db_is_unsafe(ndev))
  1030. dev_dbg(&ndev->dev,
  1031. "doorbell is unsafe, proceed anyway...\n");
  1032. if (ntb_spad_is_unsafe(ndev))
  1033. dev_dbg(&ndev->dev,
  1034. "scratchpad is unsafe, proceed anyway...\n");
  1035. if (ntb_peer_port_count(ndev) != NTB_DEF_PEER_CNT)
  1036. dev_warn(&ndev->dev, "Multi-port NTB devices unsupported\n");
  1037. node = dev_to_node(&ndev->dev);
  1038. nt = kzalloc_node(sizeof(*nt), GFP_KERNEL, node);
  1039. if (!nt)
  1040. return -ENOMEM;
  1041. nt->ndev = ndev;
  1042. /*
  1043. * If we are using MSI, and have at least one extra memory window,
  1044. * we will reserve the last MW for the MSI window.
  1045. */
  1046. if (use_msi && mw_count > 1) {
  1047. rc = ntb_msi_init(ndev, ntb_transport_msi_desc_changed);
  1048. if (!rc) {
  1049. mw_count -= 1;
  1050. nt->use_msi = true;
  1051. }
  1052. }
  1053. spad_count = ntb_spad_count(ndev);
  1054. /* Limit the MW's based on the availability of scratchpads */
  1055. if (spad_count < NTB_TRANSPORT_MIN_SPADS) {
  1056. nt->mw_count = 0;
  1057. rc = -EINVAL;
  1058. goto err;
  1059. }
  1060. max_mw_count_for_spads = (spad_count - MW0_SZ_HIGH) / 2;
  1061. nt->mw_count = min(mw_count, max_mw_count_for_spads);
  1062. nt->msi_spad_offset = nt->mw_count * 2 + MW0_SZ_HIGH;
  1063. nt->mw_vec = kcalloc_node(mw_count, sizeof(*nt->mw_vec),
  1064. GFP_KERNEL, node);
  1065. if (!nt->mw_vec) {
  1066. rc = -ENOMEM;
  1067. goto err;
  1068. }
  1069. for (i = 0; i < mw_count; i++) {
  1070. mw = &nt->mw_vec[i];
  1071. rc = ntb_peer_mw_get_addr(ndev, i, &mw->phys_addr,
  1072. &mw->phys_size);
  1073. if (rc)
  1074. goto err1;
  1075. mw->vbase = ioremap_wc(mw->phys_addr, mw->phys_size);
  1076. if (!mw->vbase) {
  1077. rc = -ENOMEM;
  1078. goto err1;
  1079. }
  1080. mw->buff_size = 0;
  1081. mw->xlat_size = 0;
  1082. mw->virt_addr = NULL;
  1083. mw->dma_addr = 0;
  1084. }
  1085. qp_bitmap = ntb_db_valid_mask(ndev);
  1086. qp_count = ilog2(qp_bitmap);
  1087. if (nt->use_msi) {
  1088. qp_count -= 1;
  1089. nt->msi_db_mask = 1 << qp_count;
  1090. ntb_db_clear_mask(ndev, nt->msi_db_mask);
  1091. }
  1092. if (max_num_clients && max_num_clients < qp_count)
  1093. qp_count = max_num_clients;
  1094. else if (nt->mw_count < qp_count)
  1095. qp_count = nt->mw_count;
  1096. qp_bitmap &= BIT_ULL(qp_count) - 1;
  1097. nt->qp_count = qp_count;
  1098. nt->qp_bitmap = qp_bitmap;
  1099. nt->qp_bitmap_free = qp_bitmap;
  1100. nt->qp_vec = kcalloc_node(qp_count, sizeof(*nt->qp_vec),
  1101. GFP_KERNEL, node);
  1102. if (!nt->qp_vec) {
  1103. rc = -ENOMEM;
  1104. goto err1;
  1105. }
  1106. if (nt_debugfs_dir) {
  1107. nt->debugfs_node_dir =
  1108. debugfs_create_dir(pci_name(ndev->pdev),
  1109. nt_debugfs_dir);
  1110. }
  1111. for (i = 0; i < qp_count; i++) {
  1112. rc = ntb_transport_init_queue(nt, i);
  1113. if (rc)
  1114. goto err2;
  1115. }
  1116. INIT_DELAYED_WORK(&nt->link_work, ntb_transport_link_work);
  1117. INIT_WORK(&nt->link_cleanup, ntb_transport_link_cleanup_work);
  1118. rc = ntb_set_ctx(ndev, nt, &ntb_transport_ops);
  1119. if (rc)
  1120. goto err2;
  1121. INIT_LIST_HEAD(&nt->client_devs);
  1122. rc = ntb_bus_init(nt);
  1123. if (rc)
  1124. goto err3;
  1125. nt->link_is_up = false;
  1126. ntb_link_enable(ndev, NTB_SPEED_AUTO, NTB_WIDTH_AUTO);
  1127. ntb_link_event(ndev);
  1128. return 0;
  1129. err3:
  1130. ntb_clear_ctx(ndev);
  1131. err2:
  1132. kfree(nt->qp_vec);
  1133. err1:
  1134. while (i--) {
  1135. mw = &nt->mw_vec[i];
  1136. iounmap(mw->vbase);
  1137. }
  1138. kfree(nt->mw_vec);
  1139. err:
  1140. kfree(nt);
  1141. return rc;
  1142. }
  1143. static void ntb_transport_free(struct ntb_client *self, struct ntb_dev *ndev)
  1144. {
  1145. struct ntb_transport_ctx *nt = ndev->ctx;
  1146. struct ntb_transport_qp *qp;
  1147. u64 qp_bitmap_alloc;
  1148. int i;
  1149. ntb_transport_link_cleanup(nt);
  1150. cancel_work_sync(&nt->link_cleanup);
  1151. cancel_delayed_work_sync(&nt->link_work);
  1152. qp_bitmap_alloc = nt->qp_bitmap & ~nt->qp_bitmap_free;
  1153. /* verify that all the qp's are freed */
  1154. for (i = 0; i < nt->qp_count; i++) {
  1155. qp = &nt->qp_vec[i];
  1156. if (qp_bitmap_alloc & BIT_ULL(i))
  1157. ntb_transport_free_queue(qp);
  1158. debugfs_remove_recursive(qp->debugfs_dir);
  1159. }
  1160. ntb_link_disable(ndev);
  1161. ntb_clear_ctx(ndev);
  1162. ntb_bus_remove(nt);
  1163. for (i = nt->mw_count; i--; ) {
  1164. ntb_free_mw(nt, i);
  1165. iounmap(nt->mw_vec[i].vbase);
  1166. }
  1167. kfree(nt->qp_vec);
  1168. kfree(nt->mw_vec);
  1169. kfree(nt);
  1170. }
  1171. static void ntb_complete_rxc(struct ntb_transport_qp *qp)
  1172. {
  1173. struct ntb_queue_entry *entry;
  1174. void *cb_data;
  1175. unsigned int len;
  1176. unsigned long irqflags;
  1177. spin_lock_irqsave(&qp->ntb_rx_q_lock, irqflags);
  1178. while (!list_empty(&qp->rx_post_q)) {
  1179. entry = list_first_entry(&qp->rx_post_q,
  1180. struct ntb_queue_entry, entry);
  1181. if (!(entry->flags & DESC_DONE_FLAG))
  1182. break;
  1183. entry->rx_hdr->flags = 0;
  1184. iowrite32(entry->rx_index, &qp->rx_info->entry);
  1185. cb_data = entry->cb_data;
  1186. len = entry->len;
  1187. list_move_tail(&entry->entry, &qp->rx_free_q);
  1188. spin_unlock_irqrestore(&qp->ntb_rx_q_lock, irqflags);
  1189. if (qp->rx_handler && qp->client_ready)
  1190. qp->rx_handler(qp, qp->cb_data, cb_data, len);
  1191. spin_lock_irqsave(&qp->ntb_rx_q_lock, irqflags);
  1192. }
  1193. spin_unlock_irqrestore(&qp->ntb_rx_q_lock, irqflags);
  1194. }
  1195. static void ntb_rx_copy_callback(void *data,
  1196. const struct dmaengine_result *res)
  1197. {
  1198. struct ntb_queue_entry *entry = data;
  1199. /* we need to check DMA results if we are using DMA */
  1200. if (res) {
  1201. enum dmaengine_tx_result dma_err = res->result;
  1202. switch (dma_err) {
  1203. case DMA_TRANS_READ_FAILED:
  1204. case DMA_TRANS_WRITE_FAILED:
  1205. entry->errors++;
  1206. fallthrough;
  1207. case DMA_TRANS_ABORTED:
  1208. {
  1209. struct ntb_transport_qp *qp = entry->qp;
  1210. void *offset = qp->rx_buff + qp->rx_max_frame *
  1211. qp->rx_index;
  1212. ntb_memcpy_rx(entry, offset);
  1213. qp->rx_memcpy++;
  1214. return;
  1215. }
  1216. case DMA_TRANS_NOERROR:
  1217. default:
  1218. break;
  1219. }
  1220. }
  1221. entry->flags |= DESC_DONE_FLAG;
  1222. ntb_complete_rxc(entry->qp);
  1223. }
  1224. static void ntb_memcpy_rx(struct ntb_queue_entry *entry, void *offset)
  1225. {
  1226. void *buf = entry->buf;
  1227. size_t len = entry->len;
  1228. memcpy(buf, offset, len);
  1229. /* Ensure that the data is fully copied out before clearing the flag */
  1230. wmb();
  1231. ntb_rx_copy_callback(entry, NULL);
  1232. }
  1233. static int ntb_async_rx_submit(struct ntb_queue_entry *entry, void *offset)
  1234. {
  1235. struct dma_async_tx_descriptor *txd;
  1236. struct ntb_transport_qp *qp = entry->qp;
  1237. struct dma_chan *chan = qp->rx_dma_chan;
  1238. struct dma_device *device;
  1239. size_t pay_off, buff_off, len;
  1240. struct dmaengine_unmap_data *unmap;
  1241. dma_cookie_t cookie;
  1242. void *buf = entry->buf;
  1243. len = entry->len;
  1244. device = chan->device;
  1245. pay_off = (size_t)offset & ~PAGE_MASK;
  1246. buff_off = (size_t)buf & ~PAGE_MASK;
  1247. if (!is_dma_copy_aligned(device, pay_off, buff_off, len))
  1248. goto err;
  1249. unmap = dmaengine_get_unmap_data(device->dev, 2, GFP_NOWAIT);
  1250. if (!unmap)
  1251. goto err;
  1252. unmap->len = len;
  1253. unmap->addr[0] = dma_map_page(device->dev, virt_to_page(offset),
  1254. pay_off, len, DMA_TO_DEVICE);
  1255. if (dma_mapping_error(device->dev, unmap->addr[0]))
  1256. goto err_get_unmap;
  1257. unmap->to_cnt = 1;
  1258. unmap->addr[1] = dma_map_page(device->dev, virt_to_page(buf),
  1259. buff_off, len, DMA_FROM_DEVICE);
  1260. if (dma_mapping_error(device->dev, unmap->addr[1]))
  1261. goto err_get_unmap;
  1262. unmap->from_cnt = 1;
  1263. txd = device->device_prep_dma_memcpy(chan, unmap->addr[1],
  1264. unmap->addr[0], len,
  1265. DMA_PREP_INTERRUPT);
  1266. if (!txd)
  1267. goto err_get_unmap;
  1268. txd->callback_result = ntb_rx_copy_callback;
  1269. txd->callback_param = entry;
  1270. dma_set_unmap(txd, unmap);
  1271. cookie = dmaengine_submit(txd);
  1272. if (dma_submit_error(cookie))
  1273. goto err_set_unmap;
  1274. dmaengine_unmap_put(unmap);
  1275. qp->last_cookie = cookie;
  1276. qp->rx_async++;
  1277. return 0;
  1278. err_set_unmap:
  1279. dmaengine_unmap_put(unmap);
  1280. err_get_unmap:
  1281. dmaengine_unmap_put(unmap);
  1282. err:
  1283. return -ENXIO;
  1284. }
  1285. static void ntb_async_rx(struct ntb_queue_entry *entry, void *offset)
  1286. {
  1287. struct ntb_transport_qp *qp = entry->qp;
  1288. struct dma_chan *chan = qp->rx_dma_chan;
  1289. int res;
  1290. if (!chan)
  1291. goto err;
  1292. if (entry->len < copy_bytes)
  1293. goto err;
  1294. res = ntb_async_rx_submit(entry, offset);
  1295. if (res < 0)
  1296. goto err;
  1297. if (!entry->retries)
  1298. qp->rx_async++;
  1299. return;
  1300. err:
  1301. ntb_memcpy_rx(entry, offset);
  1302. qp->rx_memcpy++;
  1303. }
  1304. static int ntb_process_rxc(struct ntb_transport_qp *qp)
  1305. {
  1306. struct ntb_payload_header *hdr;
  1307. struct ntb_queue_entry *entry;
  1308. void *offset;
  1309. offset = qp->rx_buff + qp->rx_max_frame * qp->rx_index;
  1310. hdr = offset + qp->rx_max_frame - sizeof(struct ntb_payload_header);
  1311. dev_dbg(&qp->ndev->pdev->dev, "qp %d: RX ver %u len %d flags %x\n",
  1312. qp->qp_num, hdr->ver, hdr->len, hdr->flags);
  1313. if (!(hdr->flags & DESC_DONE_FLAG)) {
  1314. dev_dbg(&qp->ndev->pdev->dev, "done flag not set\n");
  1315. qp->rx_ring_empty++;
  1316. return -EAGAIN;
  1317. }
  1318. if (hdr->flags & LINK_DOWN_FLAG) {
  1319. dev_dbg(&qp->ndev->pdev->dev, "link down flag set\n");
  1320. ntb_qp_link_down(qp);
  1321. hdr->flags = 0;
  1322. return -EAGAIN;
  1323. }
  1324. if (hdr->ver != (u32)qp->rx_pkts) {
  1325. dev_dbg(&qp->ndev->pdev->dev,
  1326. "version mismatch, expected %llu - got %u\n",
  1327. qp->rx_pkts, hdr->ver);
  1328. qp->rx_err_ver++;
  1329. return -EIO;
  1330. }
  1331. entry = ntb_list_mv(&qp->ntb_rx_q_lock, &qp->rx_pend_q, &qp->rx_post_q);
  1332. if (!entry) {
  1333. dev_dbg(&qp->ndev->pdev->dev, "no receive buffer\n");
  1334. qp->rx_err_no_buf++;
  1335. return -EAGAIN;
  1336. }
  1337. entry->rx_hdr = hdr;
  1338. entry->rx_index = qp->rx_index;
  1339. if (hdr->len > entry->len) {
  1340. dev_dbg(&qp->ndev->pdev->dev,
  1341. "receive buffer overflow! Wanted %d got %d\n",
  1342. hdr->len, entry->len);
  1343. qp->rx_err_oflow++;
  1344. entry->len = -EIO;
  1345. entry->flags |= DESC_DONE_FLAG;
  1346. ntb_complete_rxc(qp);
  1347. } else {
  1348. dev_dbg(&qp->ndev->pdev->dev,
  1349. "RX OK index %u ver %u size %d into buf size %d\n",
  1350. qp->rx_index, hdr->ver, hdr->len, entry->len);
  1351. qp->rx_bytes += hdr->len;
  1352. qp->rx_pkts++;
  1353. entry->len = hdr->len;
  1354. ntb_async_rx(entry, offset);
  1355. }
  1356. qp->rx_index++;
  1357. qp->rx_index %= qp->rx_max_entry;
  1358. return 0;
  1359. }
  1360. static void ntb_transport_rxc_db(unsigned long data)
  1361. {
  1362. struct ntb_transport_qp *qp = (void *)data;
  1363. int rc, i;
  1364. dev_dbg(&qp->ndev->pdev->dev, "%s: doorbell %d received\n",
  1365. __func__, qp->qp_num);
  1366. /* Limit the number of packets processed in a single interrupt to
  1367. * provide fairness to others
  1368. */
  1369. for (i = 0; i < qp->rx_max_entry; i++) {
  1370. rc = ntb_process_rxc(qp);
  1371. if (rc)
  1372. break;
  1373. }
  1374. if (i && qp->rx_dma_chan)
  1375. dma_async_issue_pending(qp->rx_dma_chan);
  1376. if (i == qp->rx_max_entry) {
  1377. /* there is more work to do */
  1378. if (qp->active)
  1379. tasklet_schedule(&qp->rxc_db_work);
  1380. } else if (ntb_db_read(qp->ndev) & BIT_ULL(qp->qp_num)) {
  1381. /* the doorbell bit is set: clear it */
  1382. ntb_db_clear(qp->ndev, BIT_ULL(qp->qp_num));
  1383. /* ntb_db_read ensures ntb_db_clear write is committed */
  1384. ntb_db_read(qp->ndev);
  1385. /* an interrupt may have arrived between finishing
  1386. * ntb_process_rxc and clearing the doorbell bit:
  1387. * there might be some more work to do.
  1388. */
  1389. if (qp->active)
  1390. tasklet_schedule(&qp->rxc_db_work);
  1391. }
  1392. }
  1393. static void ntb_tx_copy_callback(void *data,
  1394. const struct dmaengine_result *res)
  1395. {
  1396. struct ntb_queue_entry *entry = data;
  1397. struct ntb_transport_qp *qp = entry->qp;
  1398. struct ntb_payload_header __iomem *hdr = entry->tx_hdr;
  1399. /* we need to check DMA results if we are using DMA */
  1400. if (res) {
  1401. enum dmaengine_tx_result dma_err = res->result;
  1402. switch (dma_err) {
  1403. case DMA_TRANS_READ_FAILED:
  1404. case DMA_TRANS_WRITE_FAILED:
  1405. entry->errors++;
  1406. fallthrough;
  1407. case DMA_TRANS_ABORTED:
  1408. {
  1409. void __iomem *offset =
  1410. qp->tx_mw + qp->tx_max_frame *
  1411. entry->tx_index;
  1412. /* resubmit via CPU */
  1413. ntb_memcpy_tx(entry, offset);
  1414. qp->tx_memcpy++;
  1415. return;
  1416. }
  1417. case DMA_TRANS_NOERROR:
  1418. default:
  1419. break;
  1420. }
  1421. }
  1422. iowrite32(entry->flags | DESC_DONE_FLAG, &hdr->flags);
  1423. if (qp->use_msi)
  1424. ntb_msi_peer_trigger(qp->ndev, PIDX, &qp->peer_msi_desc);
  1425. else
  1426. ntb_peer_db_set(qp->ndev, BIT_ULL(qp->qp_num));
  1427. /* The entry length can only be zero if the packet is intended to be a
  1428. * "link down" or similar. Since no payload is being sent in these
  1429. * cases, there is nothing to add to the completion queue.
  1430. */
  1431. if (entry->len > 0) {
  1432. qp->tx_bytes += entry->len;
  1433. if (qp->tx_handler)
  1434. qp->tx_handler(qp, qp->cb_data, entry->cb_data,
  1435. entry->len);
  1436. }
  1437. ntb_list_add(&qp->ntb_tx_free_q_lock, &entry->entry, &qp->tx_free_q);
  1438. }
  1439. static void ntb_memcpy_tx(struct ntb_queue_entry *entry, void __iomem *offset)
  1440. {
  1441. #ifdef ARCH_HAS_NOCACHE_UACCESS
  1442. /*
  1443. * Using non-temporal mov to improve performance on non-cached
  1444. * writes, even though we aren't actually copying from user space.
  1445. */
  1446. __copy_from_user_inatomic_nocache(offset, entry->buf, entry->len);
  1447. #else
  1448. memcpy_toio(offset, entry->buf, entry->len);
  1449. #endif
  1450. /* Ensure that the data is fully copied out before setting the flags */
  1451. wmb();
  1452. ntb_tx_copy_callback(entry, NULL);
  1453. }
  1454. static int ntb_async_tx_submit(struct ntb_transport_qp *qp,
  1455. struct ntb_queue_entry *entry)
  1456. {
  1457. struct dma_async_tx_descriptor *txd;
  1458. struct dma_chan *chan = qp->tx_dma_chan;
  1459. struct dma_device *device;
  1460. size_t len = entry->len;
  1461. void *buf = entry->buf;
  1462. size_t dest_off, buff_off;
  1463. struct dmaengine_unmap_data *unmap;
  1464. dma_addr_t dest;
  1465. dma_cookie_t cookie;
  1466. device = chan->device;
  1467. dest = qp->tx_mw_dma_addr + qp->tx_max_frame * entry->tx_index;
  1468. buff_off = (size_t)buf & ~PAGE_MASK;
  1469. dest_off = (size_t)dest & ~PAGE_MASK;
  1470. if (!is_dma_copy_aligned(device, buff_off, dest_off, len))
  1471. goto err;
  1472. unmap = dmaengine_get_unmap_data(device->dev, 1, GFP_NOWAIT);
  1473. if (!unmap)
  1474. goto err;
  1475. unmap->len = len;
  1476. unmap->addr[0] = dma_map_page(device->dev, virt_to_page(buf),
  1477. buff_off, len, DMA_TO_DEVICE);
  1478. if (dma_mapping_error(device->dev, unmap->addr[0]))
  1479. goto err_get_unmap;
  1480. unmap->to_cnt = 1;
  1481. txd = device->device_prep_dma_memcpy(chan, dest, unmap->addr[0], len,
  1482. DMA_PREP_INTERRUPT);
  1483. if (!txd)
  1484. goto err_get_unmap;
  1485. txd->callback_result = ntb_tx_copy_callback;
  1486. txd->callback_param = entry;
  1487. dma_set_unmap(txd, unmap);
  1488. cookie = dmaengine_submit(txd);
  1489. if (dma_submit_error(cookie))
  1490. goto err_set_unmap;
  1491. dmaengine_unmap_put(unmap);
  1492. dma_async_issue_pending(chan);
  1493. return 0;
  1494. err_set_unmap:
  1495. dmaengine_unmap_put(unmap);
  1496. err_get_unmap:
  1497. dmaengine_unmap_put(unmap);
  1498. err:
  1499. return -ENXIO;
  1500. }
  1501. static void ntb_async_tx(struct ntb_transport_qp *qp,
  1502. struct ntb_queue_entry *entry)
  1503. {
  1504. struct ntb_payload_header __iomem *hdr;
  1505. struct dma_chan *chan = qp->tx_dma_chan;
  1506. void __iomem *offset;
  1507. int res;
  1508. entry->tx_index = qp->tx_index;
  1509. offset = qp->tx_mw + qp->tx_max_frame * entry->tx_index;
  1510. hdr = offset + qp->tx_max_frame - sizeof(struct ntb_payload_header);
  1511. entry->tx_hdr = hdr;
  1512. iowrite32(entry->len, &hdr->len);
  1513. iowrite32((u32)qp->tx_pkts, &hdr->ver);
  1514. if (!chan)
  1515. goto err;
  1516. if (entry->len < copy_bytes)
  1517. goto err;
  1518. res = ntb_async_tx_submit(qp, entry);
  1519. if (res < 0)
  1520. goto err;
  1521. if (!entry->retries)
  1522. qp->tx_async++;
  1523. return;
  1524. err:
  1525. ntb_memcpy_tx(entry, offset);
  1526. qp->tx_memcpy++;
  1527. }
  1528. static int ntb_process_tx(struct ntb_transport_qp *qp,
  1529. struct ntb_queue_entry *entry)
  1530. {
  1531. if (qp->tx_index == qp->remote_rx_info->entry) {
  1532. qp->tx_ring_full++;
  1533. return -EAGAIN;
  1534. }
  1535. if (entry->len > qp->tx_max_frame - sizeof(struct ntb_payload_header)) {
  1536. if (qp->tx_handler)
  1537. qp->tx_handler(qp, qp->cb_data, NULL, -EIO);
  1538. ntb_list_add(&qp->ntb_tx_free_q_lock, &entry->entry,
  1539. &qp->tx_free_q);
  1540. return 0;
  1541. }
  1542. ntb_async_tx(qp, entry);
  1543. qp->tx_index++;
  1544. qp->tx_index %= qp->tx_max_entry;
  1545. qp->tx_pkts++;
  1546. return 0;
  1547. }
  1548. static void ntb_send_link_down(struct ntb_transport_qp *qp)
  1549. {
  1550. struct pci_dev *pdev = qp->ndev->pdev;
  1551. struct ntb_queue_entry *entry;
  1552. int i, rc;
  1553. if (!qp->link_is_up)
  1554. return;
  1555. dev_info(&pdev->dev, "qp %d: Send Link Down\n", qp->qp_num);
  1556. for (i = 0; i < NTB_LINK_DOWN_TIMEOUT; i++) {
  1557. entry = ntb_list_rm(&qp->ntb_tx_free_q_lock, &qp->tx_free_q);
  1558. if (entry)
  1559. break;
  1560. msleep(100);
  1561. }
  1562. if (!entry)
  1563. return;
  1564. entry->cb_data = NULL;
  1565. entry->buf = NULL;
  1566. entry->len = 0;
  1567. entry->flags = LINK_DOWN_FLAG;
  1568. rc = ntb_process_tx(qp, entry);
  1569. if (rc)
  1570. dev_err(&pdev->dev, "ntb: QP%d unable to send linkdown msg\n",
  1571. qp->qp_num);
  1572. ntb_qp_link_down_reset(qp);
  1573. }
  1574. static bool ntb_dma_filter_fn(struct dma_chan *chan, void *node)
  1575. {
  1576. return dev_to_node(&chan->dev->device) == (int)(unsigned long)node;
  1577. }
  1578. /**
  1579. * ntb_transport_create_queue - Create a new NTB transport layer queue
  1580. * @rx_handler: receive callback function
  1581. * @tx_handler: transmit callback function
  1582. * @event_handler: event callback function
  1583. *
  1584. * Create a new NTB transport layer queue and provide the queue with a callback
  1585. * routine for both transmit and receive. The receive callback routine will be
  1586. * used to pass up data when the transport has received it on the queue. The
  1587. * transmit callback routine will be called when the transport has completed the
  1588. * transmission of the data on the queue and the data is ready to be freed.
  1589. *
  1590. * RETURNS: pointer to newly created ntb_queue, NULL on error.
  1591. */
  1592. struct ntb_transport_qp *
  1593. ntb_transport_create_queue(void *data, struct device *client_dev,
  1594. const struct ntb_queue_handlers *handlers)
  1595. {
  1596. struct ntb_dev *ndev;
  1597. struct pci_dev *pdev;
  1598. struct ntb_transport_ctx *nt;
  1599. struct ntb_queue_entry *entry;
  1600. struct ntb_transport_qp *qp;
  1601. u64 qp_bit;
  1602. unsigned int free_queue;
  1603. dma_cap_mask_t dma_mask;
  1604. int node;
  1605. int i;
  1606. ndev = dev_ntb(client_dev->parent);
  1607. pdev = ndev->pdev;
  1608. nt = ndev->ctx;
  1609. node = dev_to_node(&ndev->dev);
  1610. free_queue = ffs(nt->qp_bitmap_free);
  1611. if (!free_queue)
  1612. goto err;
  1613. /* decrement free_queue to make it zero based */
  1614. free_queue--;
  1615. qp = &nt->qp_vec[free_queue];
  1616. qp_bit = BIT_ULL(qp->qp_num);
  1617. nt->qp_bitmap_free &= ~qp_bit;
  1618. qp->cb_data = data;
  1619. qp->rx_handler = handlers->rx_handler;
  1620. qp->tx_handler = handlers->tx_handler;
  1621. qp->event_handler = handlers->event_handler;
  1622. dma_cap_zero(dma_mask);
  1623. dma_cap_set(DMA_MEMCPY, dma_mask);
  1624. if (use_dma) {
  1625. qp->tx_dma_chan =
  1626. dma_request_channel(dma_mask, ntb_dma_filter_fn,
  1627. (void *)(unsigned long)node);
  1628. if (!qp->tx_dma_chan)
  1629. dev_info(&pdev->dev, "Unable to allocate TX DMA channel\n");
  1630. qp->rx_dma_chan =
  1631. dma_request_channel(dma_mask, ntb_dma_filter_fn,
  1632. (void *)(unsigned long)node);
  1633. if (!qp->rx_dma_chan)
  1634. dev_info(&pdev->dev, "Unable to allocate RX DMA channel\n");
  1635. } else {
  1636. qp->tx_dma_chan = NULL;
  1637. qp->rx_dma_chan = NULL;
  1638. }
  1639. qp->tx_mw_dma_addr = 0;
  1640. if (qp->tx_dma_chan) {
  1641. qp->tx_mw_dma_addr =
  1642. dma_map_resource(qp->tx_dma_chan->device->dev,
  1643. qp->tx_mw_phys, qp->tx_mw_size,
  1644. DMA_FROM_DEVICE, 0);
  1645. if (dma_mapping_error(qp->tx_dma_chan->device->dev,
  1646. qp->tx_mw_dma_addr)) {
  1647. qp->tx_mw_dma_addr = 0;
  1648. goto err1;
  1649. }
  1650. }
  1651. dev_dbg(&pdev->dev, "Using %s memcpy for TX\n",
  1652. qp->tx_dma_chan ? "DMA" : "CPU");
  1653. dev_dbg(&pdev->dev, "Using %s memcpy for RX\n",
  1654. qp->rx_dma_chan ? "DMA" : "CPU");
  1655. for (i = 0; i < NTB_QP_DEF_NUM_ENTRIES; i++) {
  1656. entry = kzalloc_node(sizeof(*entry), GFP_KERNEL, node);
  1657. if (!entry)
  1658. goto err1;
  1659. entry->qp = qp;
  1660. ntb_list_add(&qp->ntb_rx_q_lock, &entry->entry,
  1661. &qp->rx_free_q);
  1662. }
  1663. qp->rx_alloc_entry = NTB_QP_DEF_NUM_ENTRIES;
  1664. for (i = 0; i < qp->tx_max_entry; i++) {
  1665. entry = kzalloc_node(sizeof(*entry), GFP_KERNEL, node);
  1666. if (!entry)
  1667. goto err2;
  1668. entry->qp = qp;
  1669. ntb_list_add(&qp->ntb_tx_free_q_lock, &entry->entry,
  1670. &qp->tx_free_q);
  1671. }
  1672. ntb_db_clear(qp->ndev, qp_bit);
  1673. ntb_db_clear_mask(qp->ndev, qp_bit);
  1674. dev_info(&pdev->dev, "NTB Transport QP %d created\n", qp->qp_num);
  1675. return qp;
  1676. err2:
  1677. while ((entry = ntb_list_rm(&qp->ntb_tx_free_q_lock, &qp->tx_free_q)))
  1678. kfree(entry);
  1679. err1:
  1680. qp->rx_alloc_entry = 0;
  1681. while ((entry = ntb_list_rm(&qp->ntb_rx_q_lock, &qp->rx_free_q)))
  1682. kfree(entry);
  1683. if (qp->tx_mw_dma_addr)
  1684. dma_unmap_resource(qp->tx_dma_chan->device->dev,
  1685. qp->tx_mw_dma_addr, qp->tx_mw_size,
  1686. DMA_FROM_DEVICE, 0);
  1687. if (qp->tx_dma_chan)
  1688. dma_release_channel(qp->tx_dma_chan);
  1689. if (qp->rx_dma_chan)
  1690. dma_release_channel(qp->rx_dma_chan);
  1691. nt->qp_bitmap_free |= qp_bit;
  1692. err:
  1693. return NULL;
  1694. }
  1695. EXPORT_SYMBOL_GPL(ntb_transport_create_queue);
  1696. /**
  1697. * ntb_transport_free_queue - Frees NTB transport queue
  1698. * @qp: NTB queue to be freed
  1699. *
  1700. * Frees NTB transport queue
  1701. */
  1702. void ntb_transport_free_queue(struct ntb_transport_qp *qp)
  1703. {
  1704. struct pci_dev *pdev;
  1705. struct ntb_queue_entry *entry;
  1706. u64 qp_bit;
  1707. if (!qp)
  1708. return;
  1709. pdev = qp->ndev->pdev;
  1710. qp->active = false;
  1711. if (qp->tx_dma_chan) {
  1712. struct dma_chan *chan = qp->tx_dma_chan;
  1713. /* Putting the dma_chan to NULL will force any new traffic to be
  1714. * processed by the CPU instead of the DAM engine
  1715. */
  1716. qp->tx_dma_chan = NULL;
  1717. /* Try to be nice and wait for any queued DMA engine
  1718. * transactions to process before smashing it with a rock
  1719. */
  1720. dma_sync_wait(chan, qp->last_cookie);
  1721. dmaengine_terminate_all(chan);
  1722. dma_unmap_resource(chan->device->dev,
  1723. qp->tx_mw_dma_addr, qp->tx_mw_size,
  1724. DMA_FROM_DEVICE, 0);
  1725. dma_release_channel(chan);
  1726. }
  1727. if (qp->rx_dma_chan) {
  1728. struct dma_chan *chan = qp->rx_dma_chan;
  1729. /* Putting the dma_chan to NULL will force any new traffic to be
  1730. * processed by the CPU instead of the DAM engine
  1731. */
  1732. qp->rx_dma_chan = NULL;
  1733. /* Try to be nice and wait for any queued DMA engine
  1734. * transactions to process before smashing it with a rock
  1735. */
  1736. dma_sync_wait(chan, qp->last_cookie);
  1737. dmaengine_terminate_all(chan);
  1738. dma_release_channel(chan);
  1739. }
  1740. qp_bit = BIT_ULL(qp->qp_num);
  1741. ntb_db_set_mask(qp->ndev, qp_bit);
  1742. tasklet_kill(&qp->rxc_db_work);
  1743. cancel_delayed_work_sync(&qp->link_work);
  1744. qp->cb_data = NULL;
  1745. qp->rx_handler = NULL;
  1746. qp->tx_handler = NULL;
  1747. qp->event_handler = NULL;
  1748. while ((entry = ntb_list_rm(&qp->ntb_rx_q_lock, &qp->rx_free_q)))
  1749. kfree(entry);
  1750. while ((entry = ntb_list_rm(&qp->ntb_rx_q_lock, &qp->rx_pend_q))) {
  1751. dev_warn(&pdev->dev, "Freeing item from non-empty rx_pend_q\n");
  1752. kfree(entry);
  1753. }
  1754. while ((entry = ntb_list_rm(&qp->ntb_rx_q_lock, &qp->rx_post_q))) {
  1755. dev_warn(&pdev->dev, "Freeing item from non-empty rx_post_q\n");
  1756. kfree(entry);
  1757. }
  1758. while ((entry = ntb_list_rm(&qp->ntb_tx_free_q_lock, &qp->tx_free_q)))
  1759. kfree(entry);
  1760. qp->transport->qp_bitmap_free |= qp_bit;
  1761. dev_info(&pdev->dev, "NTB Transport QP %d freed\n", qp->qp_num);
  1762. }
  1763. EXPORT_SYMBOL_GPL(ntb_transport_free_queue);
  1764. /**
  1765. * ntb_transport_rx_remove - Dequeues enqueued rx packet
  1766. * @qp: NTB queue to be freed
  1767. * @len: pointer to variable to write enqueued buffers length
  1768. *
  1769. * Dequeues unused buffers from receive queue. Should only be used during
  1770. * shutdown of qp.
  1771. *
  1772. * RETURNS: NULL error value on error, or void* for success.
  1773. */
  1774. void *ntb_transport_rx_remove(struct ntb_transport_qp *qp, unsigned int *len)
  1775. {
  1776. struct ntb_queue_entry *entry;
  1777. void *buf;
  1778. if (!qp || qp->client_ready)
  1779. return NULL;
  1780. entry = ntb_list_rm(&qp->ntb_rx_q_lock, &qp->rx_pend_q);
  1781. if (!entry)
  1782. return NULL;
  1783. buf = entry->cb_data;
  1784. *len = entry->len;
  1785. ntb_list_add(&qp->ntb_rx_q_lock, &entry->entry, &qp->rx_free_q);
  1786. return buf;
  1787. }
  1788. EXPORT_SYMBOL_GPL(ntb_transport_rx_remove);
  1789. /**
  1790. * ntb_transport_rx_enqueue - Enqueue a new NTB queue entry
  1791. * @qp: NTB transport layer queue the entry is to be enqueued on
  1792. * @cb: per buffer pointer for callback function to use
  1793. * @data: pointer to data buffer that incoming packets will be copied into
  1794. * @len: length of the data buffer
  1795. *
  1796. * Enqueue a new receive buffer onto the transport queue into which a NTB
  1797. * payload can be received into.
  1798. *
  1799. * RETURNS: An appropriate -ERRNO error value on error, or zero for success.
  1800. */
  1801. int ntb_transport_rx_enqueue(struct ntb_transport_qp *qp, void *cb, void *data,
  1802. unsigned int len)
  1803. {
  1804. struct ntb_queue_entry *entry;
  1805. if (!qp)
  1806. return -EINVAL;
  1807. entry = ntb_list_rm(&qp->ntb_rx_q_lock, &qp->rx_free_q);
  1808. if (!entry)
  1809. return -ENOMEM;
  1810. entry->cb_data = cb;
  1811. entry->buf = data;
  1812. entry->len = len;
  1813. entry->flags = 0;
  1814. entry->retries = 0;
  1815. entry->errors = 0;
  1816. entry->rx_index = 0;
  1817. ntb_list_add(&qp->ntb_rx_q_lock, &entry->entry, &qp->rx_pend_q);
  1818. if (qp->active)
  1819. tasklet_schedule(&qp->rxc_db_work);
  1820. return 0;
  1821. }
  1822. EXPORT_SYMBOL_GPL(ntb_transport_rx_enqueue);
  1823. /**
  1824. * ntb_transport_tx_enqueue - Enqueue a new NTB queue entry
  1825. * @qp: NTB transport layer queue the entry is to be enqueued on
  1826. * @cb: per buffer pointer for callback function to use
  1827. * @data: pointer to data buffer that will be sent
  1828. * @len: length of the data buffer
  1829. *
  1830. * Enqueue a new transmit buffer onto the transport queue from which a NTB
  1831. * payload will be transmitted. This assumes that a lock is being held to
  1832. * serialize access to the qp.
  1833. *
  1834. * RETURNS: An appropriate -ERRNO error value on error, or zero for success.
  1835. */
  1836. int ntb_transport_tx_enqueue(struct ntb_transport_qp *qp, void *cb, void *data,
  1837. unsigned int len)
  1838. {
  1839. struct ntb_queue_entry *entry;
  1840. int rc;
  1841. if (!qp || !len)
  1842. return -EINVAL;
  1843. /* If the qp link is down already, just ignore. */
  1844. if (!qp->link_is_up)
  1845. return 0;
  1846. entry = ntb_list_rm(&qp->ntb_tx_free_q_lock, &qp->tx_free_q);
  1847. if (!entry) {
  1848. qp->tx_err_no_buf++;
  1849. return -EBUSY;
  1850. }
  1851. entry->cb_data = cb;
  1852. entry->buf = data;
  1853. entry->len = len;
  1854. entry->flags = 0;
  1855. entry->errors = 0;
  1856. entry->retries = 0;
  1857. entry->tx_index = 0;
  1858. rc = ntb_process_tx(qp, entry);
  1859. if (rc)
  1860. ntb_list_add(&qp->ntb_tx_free_q_lock, &entry->entry,
  1861. &qp->tx_free_q);
  1862. return rc;
  1863. }
  1864. EXPORT_SYMBOL_GPL(ntb_transport_tx_enqueue);
  1865. /**
  1866. * ntb_transport_link_up - Notify NTB transport of client readiness to use queue
  1867. * @qp: NTB transport layer queue to be enabled
  1868. *
  1869. * Notify NTB transport layer of client readiness to use queue
  1870. */
  1871. void ntb_transport_link_up(struct ntb_transport_qp *qp)
  1872. {
  1873. if (!qp)
  1874. return;
  1875. qp->client_ready = true;
  1876. if (qp->transport->link_is_up)
  1877. schedule_delayed_work(&qp->link_work, 0);
  1878. }
  1879. EXPORT_SYMBOL_GPL(ntb_transport_link_up);
  1880. /**
  1881. * ntb_transport_link_down - Notify NTB transport to no longer enqueue data
  1882. * @qp: NTB transport layer queue to be disabled
  1883. *
  1884. * Notify NTB transport layer of client's desire to no longer receive data on
  1885. * transport queue specified. It is the client's responsibility to ensure all
  1886. * entries on queue are purged or otherwise handled appropriately.
  1887. */
  1888. void ntb_transport_link_down(struct ntb_transport_qp *qp)
  1889. {
  1890. int val;
  1891. if (!qp)
  1892. return;
  1893. qp->client_ready = false;
  1894. val = ntb_spad_read(qp->ndev, QP_LINKS);
  1895. ntb_peer_spad_write(qp->ndev, PIDX, QP_LINKS, val & ~BIT(qp->qp_num));
  1896. if (qp->link_is_up)
  1897. ntb_send_link_down(qp);
  1898. else
  1899. cancel_delayed_work_sync(&qp->link_work);
  1900. }
  1901. EXPORT_SYMBOL_GPL(ntb_transport_link_down);
  1902. /**
  1903. * ntb_transport_link_query - Query transport link state
  1904. * @qp: NTB transport layer queue to be queried
  1905. *
  1906. * Query connectivity to the remote system of the NTB transport queue
  1907. *
  1908. * RETURNS: true for link up or false for link down
  1909. */
  1910. bool ntb_transport_link_query(struct ntb_transport_qp *qp)
  1911. {
  1912. if (!qp)
  1913. return false;
  1914. return qp->link_is_up;
  1915. }
  1916. EXPORT_SYMBOL_GPL(ntb_transport_link_query);
  1917. /**
  1918. * ntb_transport_qp_num - Query the qp number
  1919. * @qp: NTB transport layer queue to be queried
  1920. *
  1921. * Query qp number of the NTB transport queue
  1922. *
  1923. * RETURNS: a zero based number specifying the qp number
  1924. */
  1925. unsigned char ntb_transport_qp_num(struct ntb_transport_qp *qp)
  1926. {
  1927. if (!qp)
  1928. return 0;
  1929. return qp->qp_num;
  1930. }
  1931. EXPORT_SYMBOL_GPL(ntb_transport_qp_num);
  1932. /**
  1933. * ntb_transport_max_size - Query the max payload size of a qp
  1934. * @qp: NTB transport layer queue to be queried
  1935. *
  1936. * Query the maximum payload size permissible on the given qp
  1937. *
  1938. * RETURNS: the max payload size of a qp
  1939. */
  1940. unsigned int ntb_transport_max_size(struct ntb_transport_qp *qp)
  1941. {
  1942. unsigned int max_size;
  1943. unsigned int copy_align;
  1944. struct dma_chan *rx_chan, *tx_chan;
  1945. if (!qp)
  1946. return 0;
  1947. rx_chan = qp->rx_dma_chan;
  1948. tx_chan = qp->tx_dma_chan;
  1949. copy_align = max(rx_chan ? rx_chan->device->copy_align : 0,
  1950. tx_chan ? tx_chan->device->copy_align : 0);
  1951. /* If DMA engine usage is possible, try to find the max size for that */
  1952. max_size = qp->tx_max_frame - sizeof(struct ntb_payload_header);
  1953. max_size = round_down(max_size, 1 << copy_align);
  1954. return max_size;
  1955. }
  1956. EXPORT_SYMBOL_GPL(ntb_transport_max_size);
  1957. unsigned int ntb_transport_tx_free_entry(struct ntb_transport_qp *qp)
  1958. {
  1959. unsigned int head = qp->tx_index;
  1960. unsigned int tail = qp->remote_rx_info->entry;
  1961. return tail >= head ? tail - head : qp->tx_max_entry + tail - head;
  1962. }
  1963. EXPORT_SYMBOL_GPL(ntb_transport_tx_free_entry);
  1964. static void ntb_transport_doorbell_callback(void *data, int vector)
  1965. {
  1966. struct ntb_transport_ctx *nt = data;
  1967. struct ntb_transport_qp *qp;
  1968. u64 db_bits;
  1969. unsigned int qp_num;
  1970. if (ntb_db_read(nt->ndev) & nt->msi_db_mask) {
  1971. ntb_transport_msi_peer_desc_changed(nt);
  1972. ntb_db_clear(nt->ndev, nt->msi_db_mask);
  1973. }
  1974. db_bits = (nt->qp_bitmap & ~nt->qp_bitmap_free &
  1975. ntb_db_vector_mask(nt->ndev, vector));
  1976. while (db_bits) {
  1977. qp_num = __ffs(db_bits);
  1978. qp = &nt->qp_vec[qp_num];
  1979. if (qp->active)
  1980. tasklet_schedule(&qp->rxc_db_work);
  1981. db_bits &= ~BIT_ULL(qp_num);
  1982. }
  1983. }
  1984. static const struct ntb_ctx_ops ntb_transport_ops = {
  1985. .link_event = ntb_transport_event_callback,
  1986. .db_event = ntb_transport_doorbell_callback,
  1987. };
  1988. static struct ntb_client ntb_transport_client = {
  1989. .ops = {
  1990. .probe = ntb_transport_probe,
  1991. .remove = ntb_transport_free,
  1992. },
  1993. };
  1994. static int __init ntb_transport_init(void)
  1995. {
  1996. int rc;
  1997. pr_info("%s, version %s\n", NTB_TRANSPORT_DESC, NTB_TRANSPORT_VER);
  1998. if (debugfs_initialized())
  1999. nt_debugfs_dir = debugfs_create_dir(KBUILD_MODNAME, NULL);
  2000. rc = bus_register(&ntb_transport_bus);
  2001. if (rc)
  2002. goto err_bus;
  2003. rc = ntb_register_client(&ntb_transport_client);
  2004. if (rc)
  2005. goto err_client;
  2006. return 0;
  2007. err_client:
  2008. bus_unregister(&ntb_transport_bus);
  2009. err_bus:
  2010. debugfs_remove_recursive(nt_debugfs_dir);
  2011. return rc;
  2012. }
  2013. module_init(ntb_transport_init);
  2014. static void __exit ntb_transport_exit(void)
  2015. {
  2016. ntb_unregister_client(&ntb_transport_client);
  2017. bus_unregister(&ntb_transport_bus);
  2018. debugfs_remove_recursive(nt_debugfs_dir);
  2019. }
  2020. module_exit(ntb_transport_exit);