at86rf230.c 40 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * AT86RF230/RF231 driver
  4. *
  5. * Copyright (C) 2009-2012 Siemens AG
  6. *
  7. * Written by:
  8. * Dmitry Eremin-Solenikov <[email protected]>
  9. * Alexander Smirnov <[email protected]>
  10. * Alexander Aring <[email protected]>
  11. */
  12. #include <linux/kernel.h>
  13. #include <linux/module.h>
  14. #include <linux/hrtimer.h>
  15. #include <linux/jiffies.h>
  16. #include <linux/interrupt.h>
  17. #include <linux/irq.h>
  18. #include <linux/gpio.h>
  19. #include <linux/delay.h>
  20. #include <linux/spi/spi.h>
  21. #include <linux/spi/at86rf230.h>
  22. #include <linux/regmap.h>
  23. #include <linux/skbuff.h>
  24. #include <linux/of_gpio.h>
  25. #include <linux/ieee802154.h>
  26. #include <net/mac802154.h>
  27. #include <net/cfg802154.h>
  28. #include "at86rf230.h"
  29. struct at86rf230_local;
  30. /* at86rf2xx chip depend data.
  31. * All timings are in us.
  32. */
  33. struct at86rf2xx_chip_data {
  34. u16 t_sleep_cycle;
  35. u16 t_channel_switch;
  36. u16 t_reset_to_off;
  37. u16 t_off_to_aack;
  38. u16 t_off_to_tx_on;
  39. u16 t_off_to_sleep;
  40. u16 t_sleep_to_off;
  41. u16 t_frame;
  42. u16 t_p_ack;
  43. int rssi_base_val;
  44. int (*set_channel)(struct at86rf230_local *, u8, u8);
  45. int (*set_txpower)(struct at86rf230_local *, s32);
  46. };
  47. #define AT86RF2XX_MAX_BUF (127 + 3)
  48. /* tx retries to access the TX_ON state
  49. * if it's above then force change will be started.
  50. *
  51. * We assume the max_frame_retries (7) value of 802.15.4 here.
  52. */
  53. #define AT86RF2XX_MAX_TX_RETRIES 7
  54. /* We use the recommended 5 minutes timeout to recalibrate */
  55. #define AT86RF2XX_CAL_LOOP_TIMEOUT (5 * 60 * HZ)
  56. struct at86rf230_state_change {
  57. struct at86rf230_local *lp;
  58. int irq;
  59. struct hrtimer timer;
  60. struct spi_message msg;
  61. struct spi_transfer trx;
  62. u8 buf[AT86RF2XX_MAX_BUF];
  63. void (*complete)(void *context);
  64. u8 from_state;
  65. u8 to_state;
  66. int trac;
  67. bool free;
  68. };
  69. struct at86rf230_local {
  70. struct spi_device *spi;
  71. struct ieee802154_hw *hw;
  72. struct at86rf2xx_chip_data *data;
  73. struct regmap *regmap;
  74. int slp_tr;
  75. bool sleep;
  76. struct completion state_complete;
  77. struct at86rf230_state_change state;
  78. unsigned long cal_timeout;
  79. bool is_tx;
  80. bool is_tx_from_off;
  81. bool was_tx;
  82. u8 tx_retry;
  83. struct sk_buff *tx_skb;
  84. struct at86rf230_state_change tx;
  85. };
  86. #define AT86RF2XX_NUMREGS 0x3F
  87. static void
  88. at86rf230_async_state_change(struct at86rf230_local *lp,
  89. struct at86rf230_state_change *ctx,
  90. const u8 state, void (*complete)(void *context));
  91. static inline void
  92. at86rf230_sleep(struct at86rf230_local *lp)
  93. {
  94. if (gpio_is_valid(lp->slp_tr)) {
  95. gpio_set_value(lp->slp_tr, 1);
  96. usleep_range(lp->data->t_off_to_sleep,
  97. lp->data->t_off_to_sleep + 10);
  98. lp->sleep = true;
  99. }
  100. }
  101. static inline void
  102. at86rf230_awake(struct at86rf230_local *lp)
  103. {
  104. if (gpio_is_valid(lp->slp_tr)) {
  105. gpio_set_value(lp->slp_tr, 0);
  106. usleep_range(lp->data->t_sleep_to_off,
  107. lp->data->t_sleep_to_off + 100);
  108. lp->sleep = false;
  109. }
  110. }
  111. static inline int
  112. __at86rf230_write(struct at86rf230_local *lp,
  113. unsigned int addr, unsigned int data)
  114. {
  115. bool sleep = lp->sleep;
  116. int ret;
  117. /* awake for register setting if sleep */
  118. if (sleep)
  119. at86rf230_awake(lp);
  120. ret = regmap_write(lp->regmap, addr, data);
  121. /* sleep again if was sleeping */
  122. if (sleep)
  123. at86rf230_sleep(lp);
  124. return ret;
  125. }
  126. static inline int
  127. __at86rf230_read(struct at86rf230_local *lp,
  128. unsigned int addr, unsigned int *data)
  129. {
  130. bool sleep = lp->sleep;
  131. int ret;
  132. /* awake for register setting if sleep */
  133. if (sleep)
  134. at86rf230_awake(lp);
  135. ret = regmap_read(lp->regmap, addr, data);
  136. /* sleep again if was sleeping */
  137. if (sleep)
  138. at86rf230_sleep(lp);
  139. return ret;
  140. }
  141. static inline int
  142. at86rf230_read_subreg(struct at86rf230_local *lp,
  143. unsigned int addr, unsigned int mask,
  144. unsigned int shift, unsigned int *data)
  145. {
  146. int rc;
  147. rc = __at86rf230_read(lp, addr, data);
  148. if (!rc)
  149. *data = (*data & mask) >> shift;
  150. return rc;
  151. }
  152. static inline int
  153. at86rf230_write_subreg(struct at86rf230_local *lp,
  154. unsigned int addr, unsigned int mask,
  155. unsigned int shift, unsigned int data)
  156. {
  157. bool sleep = lp->sleep;
  158. int ret;
  159. /* awake for register setting if sleep */
  160. if (sleep)
  161. at86rf230_awake(lp);
  162. ret = regmap_update_bits(lp->regmap, addr, mask, data << shift);
  163. /* sleep again if was sleeping */
  164. if (sleep)
  165. at86rf230_sleep(lp);
  166. return ret;
  167. }
  168. static inline void
  169. at86rf230_slp_tr_rising_edge(struct at86rf230_local *lp)
  170. {
  171. gpio_set_value(lp->slp_tr, 1);
  172. udelay(1);
  173. gpio_set_value(lp->slp_tr, 0);
  174. }
  175. static bool
  176. at86rf230_reg_writeable(struct device *dev, unsigned int reg)
  177. {
  178. switch (reg) {
  179. case RG_TRX_STATE:
  180. case RG_TRX_CTRL_0:
  181. case RG_TRX_CTRL_1:
  182. case RG_PHY_TX_PWR:
  183. case RG_PHY_ED_LEVEL:
  184. case RG_PHY_CC_CCA:
  185. case RG_CCA_THRES:
  186. case RG_RX_CTRL:
  187. case RG_SFD_VALUE:
  188. case RG_TRX_CTRL_2:
  189. case RG_ANT_DIV:
  190. case RG_IRQ_MASK:
  191. case RG_VREG_CTRL:
  192. case RG_BATMON:
  193. case RG_XOSC_CTRL:
  194. case RG_RX_SYN:
  195. case RG_XAH_CTRL_1:
  196. case RG_FTN_CTRL:
  197. case RG_PLL_CF:
  198. case RG_PLL_DCU:
  199. case RG_SHORT_ADDR_0:
  200. case RG_SHORT_ADDR_1:
  201. case RG_PAN_ID_0:
  202. case RG_PAN_ID_1:
  203. case RG_IEEE_ADDR_0:
  204. case RG_IEEE_ADDR_1:
  205. case RG_IEEE_ADDR_2:
  206. case RG_IEEE_ADDR_3:
  207. case RG_IEEE_ADDR_4:
  208. case RG_IEEE_ADDR_5:
  209. case RG_IEEE_ADDR_6:
  210. case RG_IEEE_ADDR_7:
  211. case RG_XAH_CTRL_0:
  212. case RG_CSMA_SEED_0:
  213. case RG_CSMA_SEED_1:
  214. case RG_CSMA_BE:
  215. return true;
  216. default:
  217. return false;
  218. }
  219. }
  220. static bool
  221. at86rf230_reg_readable(struct device *dev, unsigned int reg)
  222. {
  223. bool rc;
  224. /* all writeable are also readable */
  225. rc = at86rf230_reg_writeable(dev, reg);
  226. if (rc)
  227. return rc;
  228. /* readonly regs */
  229. switch (reg) {
  230. case RG_TRX_STATUS:
  231. case RG_PHY_RSSI:
  232. case RG_IRQ_STATUS:
  233. case RG_PART_NUM:
  234. case RG_VERSION_NUM:
  235. case RG_MAN_ID_1:
  236. case RG_MAN_ID_0:
  237. return true;
  238. default:
  239. return false;
  240. }
  241. }
  242. static bool
  243. at86rf230_reg_volatile(struct device *dev, unsigned int reg)
  244. {
  245. /* can be changed during runtime */
  246. switch (reg) {
  247. case RG_TRX_STATUS:
  248. case RG_TRX_STATE:
  249. case RG_PHY_RSSI:
  250. case RG_PHY_ED_LEVEL:
  251. case RG_IRQ_STATUS:
  252. case RG_VREG_CTRL:
  253. case RG_PLL_CF:
  254. case RG_PLL_DCU:
  255. return true;
  256. default:
  257. return false;
  258. }
  259. }
  260. static bool
  261. at86rf230_reg_precious(struct device *dev, unsigned int reg)
  262. {
  263. /* don't clear irq line on read */
  264. switch (reg) {
  265. case RG_IRQ_STATUS:
  266. return true;
  267. default:
  268. return false;
  269. }
  270. }
  271. static const struct regmap_config at86rf230_regmap_spi_config = {
  272. .reg_bits = 8,
  273. .val_bits = 8,
  274. .write_flag_mask = CMD_REG | CMD_WRITE,
  275. .read_flag_mask = CMD_REG,
  276. .cache_type = REGCACHE_RBTREE,
  277. .max_register = AT86RF2XX_NUMREGS,
  278. .writeable_reg = at86rf230_reg_writeable,
  279. .readable_reg = at86rf230_reg_readable,
  280. .volatile_reg = at86rf230_reg_volatile,
  281. .precious_reg = at86rf230_reg_precious,
  282. };
  283. static void
  284. at86rf230_async_error_recover_complete(void *context)
  285. {
  286. struct at86rf230_state_change *ctx = context;
  287. struct at86rf230_local *lp = ctx->lp;
  288. if (ctx->free)
  289. kfree(ctx);
  290. if (lp->was_tx) {
  291. lp->was_tx = 0;
  292. ieee802154_xmit_hw_error(lp->hw, lp->tx_skb);
  293. }
  294. }
  295. static void
  296. at86rf230_async_error_recover(void *context)
  297. {
  298. struct at86rf230_state_change *ctx = context;
  299. struct at86rf230_local *lp = ctx->lp;
  300. if (lp->is_tx) {
  301. lp->was_tx = 1;
  302. lp->is_tx = 0;
  303. }
  304. at86rf230_async_state_change(lp, ctx, STATE_RX_AACK_ON,
  305. at86rf230_async_error_recover_complete);
  306. }
  307. static inline void
  308. at86rf230_async_error(struct at86rf230_local *lp,
  309. struct at86rf230_state_change *ctx, int rc)
  310. {
  311. dev_err(&lp->spi->dev, "spi_async error %d\n", rc);
  312. at86rf230_async_state_change(lp, ctx, STATE_FORCE_TRX_OFF,
  313. at86rf230_async_error_recover);
  314. }
  315. /* Generic function to get some register value in async mode */
  316. static void
  317. at86rf230_async_read_reg(struct at86rf230_local *lp, u8 reg,
  318. struct at86rf230_state_change *ctx,
  319. void (*complete)(void *context))
  320. {
  321. int rc;
  322. u8 *tx_buf = ctx->buf;
  323. tx_buf[0] = (reg & CMD_REG_MASK) | CMD_REG;
  324. ctx->msg.complete = complete;
  325. rc = spi_async(lp->spi, &ctx->msg);
  326. if (rc)
  327. at86rf230_async_error(lp, ctx, rc);
  328. }
  329. static void
  330. at86rf230_async_write_reg(struct at86rf230_local *lp, u8 reg, u8 val,
  331. struct at86rf230_state_change *ctx,
  332. void (*complete)(void *context))
  333. {
  334. int rc;
  335. ctx->buf[0] = (reg & CMD_REG_MASK) | CMD_REG | CMD_WRITE;
  336. ctx->buf[1] = val;
  337. ctx->msg.complete = complete;
  338. rc = spi_async(lp->spi, &ctx->msg);
  339. if (rc)
  340. at86rf230_async_error(lp, ctx, rc);
  341. }
  342. static void
  343. at86rf230_async_state_assert(void *context)
  344. {
  345. struct at86rf230_state_change *ctx = context;
  346. struct at86rf230_local *lp = ctx->lp;
  347. const u8 *buf = ctx->buf;
  348. const u8 trx_state = buf[1] & TRX_STATE_MASK;
  349. /* Assert state change */
  350. if (trx_state != ctx->to_state) {
  351. /* Special handling if transceiver state is in
  352. * STATE_BUSY_RX_AACK and a SHR was detected.
  353. */
  354. if (trx_state == STATE_BUSY_RX_AACK) {
  355. /* Undocumented race condition. If we send a state
  356. * change to STATE_RX_AACK_ON the transceiver could
  357. * change his state automatically to STATE_BUSY_RX_AACK
  358. * if a SHR was detected. This is not an error, but we
  359. * can't assert this.
  360. */
  361. if (ctx->to_state == STATE_RX_AACK_ON)
  362. goto done;
  363. /* If we change to STATE_TX_ON without forcing and
  364. * transceiver state is STATE_BUSY_RX_AACK, we wait
  365. * 'tFrame + tPAck' receiving time. In this time the
  366. * PDU should be received. If the transceiver is still
  367. * in STATE_BUSY_RX_AACK, we run a force state change
  368. * to STATE_TX_ON. This is a timeout handling, if the
  369. * transceiver stucks in STATE_BUSY_RX_AACK.
  370. *
  371. * Additional we do several retries to try to get into
  372. * TX_ON state without forcing. If the retries are
  373. * higher or equal than AT86RF2XX_MAX_TX_RETRIES we
  374. * will do a force change.
  375. */
  376. if (ctx->to_state == STATE_TX_ON ||
  377. ctx->to_state == STATE_TRX_OFF) {
  378. u8 state = ctx->to_state;
  379. if (lp->tx_retry >= AT86RF2XX_MAX_TX_RETRIES)
  380. state = STATE_FORCE_TRX_OFF;
  381. lp->tx_retry++;
  382. at86rf230_async_state_change(lp, ctx, state,
  383. ctx->complete);
  384. return;
  385. }
  386. }
  387. dev_warn(&lp->spi->dev, "unexcept state change from 0x%02x to 0x%02x. Actual state: 0x%02x\n",
  388. ctx->from_state, ctx->to_state, trx_state);
  389. }
  390. done:
  391. if (ctx->complete)
  392. ctx->complete(context);
  393. }
  394. static enum hrtimer_restart at86rf230_async_state_timer(struct hrtimer *timer)
  395. {
  396. struct at86rf230_state_change *ctx =
  397. container_of(timer, struct at86rf230_state_change, timer);
  398. struct at86rf230_local *lp = ctx->lp;
  399. at86rf230_async_read_reg(lp, RG_TRX_STATUS, ctx,
  400. at86rf230_async_state_assert);
  401. return HRTIMER_NORESTART;
  402. }
  403. /* Do state change timing delay. */
  404. static void
  405. at86rf230_async_state_delay(void *context)
  406. {
  407. struct at86rf230_state_change *ctx = context;
  408. struct at86rf230_local *lp = ctx->lp;
  409. struct at86rf2xx_chip_data *c = lp->data;
  410. bool force = false;
  411. ktime_t tim;
  412. /* The force state changes are will show as normal states in the
  413. * state status subregister. We change the to_state to the
  414. * corresponding one and remember if it was a force change, this
  415. * differs if we do a state change from STATE_BUSY_RX_AACK.
  416. */
  417. switch (ctx->to_state) {
  418. case STATE_FORCE_TX_ON:
  419. ctx->to_state = STATE_TX_ON;
  420. force = true;
  421. break;
  422. case STATE_FORCE_TRX_OFF:
  423. ctx->to_state = STATE_TRX_OFF;
  424. force = true;
  425. break;
  426. default:
  427. break;
  428. }
  429. switch (ctx->from_state) {
  430. case STATE_TRX_OFF:
  431. switch (ctx->to_state) {
  432. case STATE_RX_AACK_ON:
  433. tim = c->t_off_to_aack * NSEC_PER_USEC;
  434. /* state change from TRX_OFF to RX_AACK_ON to do a
  435. * calibration, we need to reset the timeout for the
  436. * next one.
  437. */
  438. lp->cal_timeout = jiffies + AT86RF2XX_CAL_LOOP_TIMEOUT;
  439. goto change;
  440. case STATE_TX_ARET_ON:
  441. case STATE_TX_ON:
  442. tim = c->t_off_to_tx_on * NSEC_PER_USEC;
  443. /* state change from TRX_OFF to TX_ON or ARET_ON to do
  444. * a calibration, we need to reset the timeout for the
  445. * next one.
  446. */
  447. lp->cal_timeout = jiffies + AT86RF2XX_CAL_LOOP_TIMEOUT;
  448. goto change;
  449. default:
  450. break;
  451. }
  452. break;
  453. case STATE_BUSY_RX_AACK:
  454. switch (ctx->to_state) {
  455. case STATE_TRX_OFF:
  456. case STATE_TX_ON:
  457. /* Wait for worst case receiving time if we
  458. * didn't make a force change from BUSY_RX_AACK
  459. * to TX_ON or TRX_OFF.
  460. */
  461. if (!force) {
  462. tim = (c->t_frame + c->t_p_ack) * NSEC_PER_USEC;
  463. goto change;
  464. }
  465. break;
  466. default:
  467. break;
  468. }
  469. break;
  470. /* Default value, means RESET state */
  471. case STATE_P_ON:
  472. switch (ctx->to_state) {
  473. case STATE_TRX_OFF:
  474. tim = c->t_reset_to_off * NSEC_PER_USEC;
  475. goto change;
  476. default:
  477. break;
  478. }
  479. break;
  480. default:
  481. break;
  482. }
  483. /* Default delay is 1us in the most cases */
  484. udelay(1);
  485. at86rf230_async_state_timer(&ctx->timer);
  486. return;
  487. change:
  488. hrtimer_start(&ctx->timer, tim, HRTIMER_MODE_REL);
  489. }
  490. static void
  491. at86rf230_async_state_change_start(void *context)
  492. {
  493. struct at86rf230_state_change *ctx = context;
  494. struct at86rf230_local *lp = ctx->lp;
  495. u8 *buf = ctx->buf;
  496. const u8 trx_state = buf[1] & TRX_STATE_MASK;
  497. /* Check for "possible" STATE_TRANSITION_IN_PROGRESS */
  498. if (trx_state == STATE_TRANSITION_IN_PROGRESS) {
  499. udelay(1);
  500. at86rf230_async_read_reg(lp, RG_TRX_STATUS, ctx,
  501. at86rf230_async_state_change_start);
  502. return;
  503. }
  504. /* Check if we already are in the state which we change in */
  505. if (trx_state == ctx->to_state) {
  506. if (ctx->complete)
  507. ctx->complete(context);
  508. return;
  509. }
  510. /* Set current state to the context of state change */
  511. ctx->from_state = trx_state;
  512. /* Going into the next step for a state change which do a timing
  513. * relevant delay.
  514. */
  515. at86rf230_async_write_reg(lp, RG_TRX_STATE, ctx->to_state, ctx,
  516. at86rf230_async_state_delay);
  517. }
  518. static void
  519. at86rf230_async_state_change(struct at86rf230_local *lp,
  520. struct at86rf230_state_change *ctx,
  521. const u8 state, void (*complete)(void *context))
  522. {
  523. /* Initialization for the state change context */
  524. ctx->to_state = state;
  525. ctx->complete = complete;
  526. at86rf230_async_read_reg(lp, RG_TRX_STATUS, ctx,
  527. at86rf230_async_state_change_start);
  528. }
  529. static void
  530. at86rf230_sync_state_change_complete(void *context)
  531. {
  532. struct at86rf230_state_change *ctx = context;
  533. struct at86rf230_local *lp = ctx->lp;
  534. complete(&lp->state_complete);
  535. }
  536. /* This function do a sync framework above the async state change.
  537. * Some callbacks of the IEEE 802.15.4 driver interface need to be
  538. * handled synchronously.
  539. */
  540. static int
  541. at86rf230_sync_state_change(struct at86rf230_local *lp, unsigned int state)
  542. {
  543. unsigned long rc;
  544. at86rf230_async_state_change(lp, &lp->state, state,
  545. at86rf230_sync_state_change_complete);
  546. rc = wait_for_completion_timeout(&lp->state_complete,
  547. msecs_to_jiffies(100));
  548. if (!rc) {
  549. at86rf230_async_error(lp, &lp->state, -ETIMEDOUT);
  550. return -ETIMEDOUT;
  551. }
  552. return 0;
  553. }
  554. static void
  555. at86rf230_tx_complete(void *context)
  556. {
  557. struct at86rf230_state_change *ctx = context;
  558. struct at86rf230_local *lp = ctx->lp;
  559. if (ctx->trac == IEEE802154_SUCCESS)
  560. ieee802154_xmit_complete(lp->hw, lp->tx_skb, false);
  561. else
  562. ieee802154_xmit_error(lp->hw, lp->tx_skb, ctx->trac);
  563. kfree(ctx);
  564. }
  565. static void
  566. at86rf230_tx_on(void *context)
  567. {
  568. struct at86rf230_state_change *ctx = context;
  569. struct at86rf230_local *lp = ctx->lp;
  570. at86rf230_async_state_change(lp, ctx, STATE_RX_AACK_ON,
  571. at86rf230_tx_complete);
  572. }
  573. static void
  574. at86rf230_tx_trac_check(void *context)
  575. {
  576. struct at86rf230_state_change *ctx = context;
  577. struct at86rf230_local *lp = ctx->lp;
  578. u8 trac = TRAC_MASK(ctx->buf[1]);
  579. switch (trac) {
  580. case TRAC_SUCCESS:
  581. case TRAC_SUCCESS_DATA_PENDING:
  582. ctx->trac = IEEE802154_SUCCESS;
  583. break;
  584. case TRAC_CHANNEL_ACCESS_FAILURE:
  585. ctx->trac = IEEE802154_CHANNEL_ACCESS_FAILURE;
  586. break;
  587. case TRAC_NO_ACK:
  588. ctx->trac = IEEE802154_NO_ACK;
  589. break;
  590. default:
  591. ctx->trac = IEEE802154_SYSTEM_ERROR;
  592. }
  593. at86rf230_async_state_change(lp, ctx, STATE_TX_ON, at86rf230_tx_on);
  594. }
  595. static void
  596. at86rf230_rx_read_frame_complete(void *context)
  597. {
  598. struct at86rf230_state_change *ctx = context;
  599. struct at86rf230_local *lp = ctx->lp;
  600. const u8 *buf = ctx->buf;
  601. struct sk_buff *skb;
  602. u8 len, lqi;
  603. len = buf[1];
  604. if (!ieee802154_is_valid_psdu_len(len)) {
  605. dev_vdbg(&lp->spi->dev, "corrupted frame received\n");
  606. len = IEEE802154_MTU;
  607. }
  608. lqi = buf[2 + len];
  609. skb = dev_alloc_skb(IEEE802154_MTU);
  610. if (!skb) {
  611. dev_vdbg(&lp->spi->dev, "failed to allocate sk_buff\n");
  612. kfree(ctx);
  613. return;
  614. }
  615. skb_put_data(skb, buf + 2, len);
  616. ieee802154_rx_irqsafe(lp->hw, skb, lqi);
  617. kfree(ctx);
  618. }
  619. static void
  620. at86rf230_rx_trac_check(void *context)
  621. {
  622. struct at86rf230_state_change *ctx = context;
  623. struct at86rf230_local *lp = ctx->lp;
  624. u8 *buf = ctx->buf;
  625. int rc;
  626. buf[0] = CMD_FB;
  627. ctx->trx.len = AT86RF2XX_MAX_BUF;
  628. ctx->msg.complete = at86rf230_rx_read_frame_complete;
  629. rc = spi_async(lp->spi, &ctx->msg);
  630. if (rc) {
  631. ctx->trx.len = 2;
  632. at86rf230_async_error(lp, ctx, rc);
  633. }
  634. }
  635. static void
  636. at86rf230_irq_trx_end(void *context)
  637. {
  638. struct at86rf230_state_change *ctx = context;
  639. struct at86rf230_local *lp = ctx->lp;
  640. if (lp->is_tx) {
  641. lp->is_tx = 0;
  642. at86rf230_async_read_reg(lp, RG_TRX_STATE, ctx,
  643. at86rf230_tx_trac_check);
  644. } else {
  645. at86rf230_async_read_reg(lp, RG_TRX_STATE, ctx,
  646. at86rf230_rx_trac_check);
  647. }
  648. }
  649. static void
  650. at86rf230_irq_status(void *context)
  651. {
  652. struct at86rf230_state_change *ctx = context;
  653. struct at86rf230_local *lp = ctx->lp;
  654. const u8 *buf = ctx->buf;
  655. u8 irq = buf[1];
  656. enable_irq(lp->spi->irq);
  657. if (irq & IRQ_TRX_END) {
  658. at86rf230_irq_trx_end(ctx);
  659. } else {
  660. dev_err(&lp->spi->dev, "not supported irq %02x received\n",
  661. irq);
  662. kfree(ctx);
  663. }
  664. }
  665. static void
  666. at86rf230_setup_spi_messages(struct at86rf230_local *lp,
  667. struct at86rf230_state_change *state)
  668. {
  669. state->lp = lp;
  670. state->irq = lp->spi->irq;
  671. spi_message_init(&state->msg);
  672. state->msg.context = state;
  673. state->trx.len = 2;
  674. state->trx.tx_buf = state->buf;
  675. state->trx.rx_buf = state->buf;
  676. spi_message_add_tail(&state->trx, &state->msg);
  677. hrtimer_init(&state->timer, CLOCK_MONOTONIC, HRTIMER_MODE_REL);
  678. state->timer.function = at86rf230_async_state_timer;
  679. }
  680. static irqreturn_t at86rf230_isr(int irq, void *data)
  681. {
  682. struct at86rf230_local *lp = data;
  683. struct at86rf230_state_change *ctx;
  684. int rc;
  685. disable_irq_nosync(irq);
  686. ctx = kzalloc(sizeof(*ctx), GFP_ATOMIC);
  687. if (!ctx) {
  688. enable_irq(irq);
  689. return IRQ_NONE;
  690. }
  691. at86rf230_setup_spi_messages(lp, ctx);
  692. /* tell on error handling to free ctx */
  693. ctx->free = true;
  694. ctx->buf[0] = (RG_IRQ_STATUS & CMD_REG_MASK) | CMD_REG;
  695. ctx->msg.complete = at86rf230_irq_status;
  696. rc = spi_async(lp->spi, &ctx->msg);
  697. if (rc) {
  698. at86rf230_async_error(lp, ctx, rc);
  699. enable_irq(irq);
  700. return IRQ_NONE;
  701. }
  702. return IRQ_HANDLED;
  703. }
  704. static void
  705. at86rf230_write_frame_complete(void *context)
  706. {
  707. struct at86rf230_state_change *ctx = context;
  708. struct at86rf230_local *lp = ctx->lp;
  709. ctx->trx.len = 2;
  710. if (gpio_is_valid(lp->slp_tr))
  711. at86rf230_slp_tr_rising_edge(lp);
  712. else
  713. at86rf230_async_write_reg(lp, RG_TRX_STATE, STATE_BUSY_TX, ctx,
  714. NULL);
  715. }
  716. static void
  717. at86rf230_write_frame(void *context)
  718. {
  719. struct at86rf230_state_change *ctx = context;
  720. struct at86rf230_local *lp = ctx->lp;
  721. struct sk_buff *skb = lp->tx_skb;
  722. u8 *buf = ctx->buf;
  723. int rc;
  724. lp->is_tx = 1;
  725. buf[0] = CMD_FB | CMD_WRITE;
  726. buf[1] = skb->len + 2;
  727. memcpy(buf + 2, skb->data, skb->len);
  728. ctx->trx.len = skb->len + 2;
  729. ctx->msg.complete = at86rf230_write_frame_complete;
  730. rc = spi_async(lp->spi, &ctx->msg);
  731. if (rc) {
  732. ctx->trx.len = 2;
  733. at86rf230_async_error(lp, ctx, rc);
  734. }
  735. }
  736. static void
  737. at86rf230_xmit_tx_on(void *context)
  738. {
  739. struct at86rf230_state_change *ctx = context;
  740. struct at86rf230_local *lp = ctx->lp;
  741. at86rf230_async_state_change(lp, ctx, STATE_TX_ARET_ON,
  742. at86rf230_write_frame);
  743. }
  744. static void
  745. at86rf230_xmit_start(void *context)
  746. {
  747. struct at86rf230_state_change *ctx = context;
  748. struct at86rf230_local *lp = ctx->lp;
  749. /* check if we change from off state */
  750. if (lp->is_tx_from_off)
  751. at86rf230_async_state_change(lp, ctx, STATE_TX_ARET_ON,
  752. at86rf230_write_frame);
  753. else
  754. at86rf230_async_state_change(lp, ctx, STATE_TX_ON,
  755. at86rf230_xmit_tx_on);
  756. }
  757. static int
  758. at86rf230_xmit(struct ieee802154_hw *hw, struct sk_buff *skb)
  759. {
  760. struct at86rf230_local *lp = hw->priv;
  761. struct at86rf230_state_change *ctx = &lp->tx;
  762. lp->tx_skb = skb;
  763. lp->tx_retry = 0;
  764. /* After 5 minutes in PLL and the same frequency we run again the
  765. * calibration loops which is recommended by at86rf2xx datasheets.
  766. *
  767. * The calibration is initiate by a state change from TRX_OFF
  768. * to TX_ON, the lp->cal_timeout should be reinit by state_delay
  769. * function then to start in the next 5 minutes.
  770. */
  771. if (time_is_before_jiffies(lp->cal_timeout)) {
  772. lp->is_tx_from_off = true;
  773. at86rf230_async_state_change(lp, ctx, STATE_TRX_OFF,
  774. at86rf230_xmit_start);
  775. } else {
  776. lp->is_tx_from_off = false;
  777. at86rf230_xmit_start(ctx);
  778. }
  779. return 0;
  780. }
  781. static int
  782. at86rf230_ed(struct ieee802154_hw *hw, u8 *level)
  783. {
  784. WARN_ON(!level);
  785. *level = 0xbe;
  786. return 0;
  787. }
  788. static int
  789. at86rf230_start(struct ieee802154_hw *hw)
  790. {
  791. struct at86rf230_local *lp = hw->priv;
  792. at86rf230_awake(lp);
  793. enable_irq(lp->spi->irq);
  794. return at86rf230_sync_state_change(lp, STATE_RX_AACK_ON);
  795. }
  796. static void
  797. at86rf230_stop(struct ieee802154_hw *hw)
  798. {
  799. struct at86rf230_local *lp = hw->priv;
  800. u8 csma_seed[2];
  801. at86rf230_sync_state_change(lp, STATE_FORCE_TRX_OFF);
  802. disable_irq(lp->spi->irq);
  803. /* It's recommended to set random new csma_seeds before sleep state.
  804. * Makes only sense in the stop callback, not doing this inside of
  805. * at86rf230_sleep, this is also used when we don't transmit afterwards
  806. * when calling start callback again.
  807. */
  808. get_random_bytes(csma_seed, ARRAY_SIZE(csma_seed));
  809. at86rf230_write_subreg(lp, SR_CSMA_SEED_0, csma_seed[0]);
  810. at86rf230_write_subreg(lp, SR_CSMA_SEED_1, csma_seed[1]);
  811. at86rf230_sleep(lp);
  812. }
  813. static int
  814. at86rf23x_set_channel(struct at86rf230_local *lp, u8 page, u8 channel)
  815. {
  816. return at86rf230_write_subreg(lp, SR_CHANNEL, channel);
  817. }
  818. #define AT86RF2XX_MAX_ED_LEVELS 0xF
  819. static const s32 at86rf233_ed_levels[AT86RF2XX_MAX_ED_LEVELS + 1] = {
  820. -9400, -9200, -9000, -8800, -8600, -8400, -8200, -8000, -7800, -7600,
  821. -7400, -7200, -7000, -6800, -6600, -6400,
  822. };
  823. static const s32 at86rf231_ed_levels[AT86RF2XX_MAX_ED_LEVELS + 1] = {
  824. -9100, -8900, -8700, -8500, -8300, -8100, -7900, -7700, -7500, -7300,
  825. -7100, -6900, -6700, -6500, -6300, -6100,
  826. };
  827. static const s32 at86rf212_ed_levels_100[AT86RF2XX_MAX_ED_LEVELS + 1] = {
  828. -10000, -9800, -9600, -9400, -9200, -9000, -8800, -8600, -8400, -8200,
  829. -8000, -7800, -7600, -7400, -7200, -7000,
  830. };
  831. static const s32 at86rf212_ed_levels_98[AT86RF2XX_MAX_ED_LEVELS + 1] = {
  832. -9800, -9600, -9400, -9200, -9000, -8800, -8600, -8400, -8200, -8000,
  833. -7800, -7600, -7400, -7200, -7000, -6800,
  834. };
  835. static inline int
  836. at86rf212_update_cca_ed_level(struct at86rf230_local *lp, int rssi_base_val)
  837. {
  838. unsigned int cca_ed_thres;
  839. int rc;
  840. rc = at86rf230_read_subreg(lp, SR_CCA_ED_THRES, &cca_ed_thres);
  841. if (rc < 0)
  842. return rc;
  843. switch (rssi_base_val) {
  844. case -98:
  845. lp->hw->phy->supported.cca_ed_levels = at86rf212_ed_levels_98;
  846. lp->hw->phy->supported.cca_ed_levels_size = ARRAY_SIZE(at86rf212_ed_levels_98);
  847. lp->hw->phy->cca_ed_level = at86rf212_ed_levels_98[cca_ed_thres];
  848. break;
  849. case -100:
  850. lp->hw->phy->supported.cca_ed_levels = at86rf212_ed_levels_100;
  851. lp->hw->phy->supported.cca_ed_levels_size = ARRAY_SIZE(at86rf212_ed_levels_100);
  852. lp->hw->phy->cca_ed_level = at86rf212_ed_levels_100[cca_ed_thres];
  853. break;
  854. default:
  855. WARN_ON(1);
  856. }
  857. return 0;
  858. }
  859. static int
  860. at86rf212_set_channel(struct at86rf230_local *lp, u8 page, u8 channel)
  861. {
  862. int rc;
  863. if (channel == 0)
  864. rc = at86rf230_write_subreg(lp, SR_SUB_MODE, 0);
  865. else
  866. rc = at86rf230_write_subreg(lp, SR_SUB_MODE, 1);
  867. if (rc < 0)
  868. return rc;
  869. if (page == 0) {
  870. rc = at86rf230_write_subreg(lp, SR_BPSK_QPSK, 0);
  871. lp->data->rssi_base_val = -100;
  872. } else {
  873. rc = at86rf230_write_subreg(lp, SR_BPSK_QPSK, 1);
  874. lp->data->rssi_base_val = -98;
  875. }
  876. if (rc < 0)
  877. return rc;
  878. rc = at86rf212_update_cca_ed_level(lp, lp->data->rssi_base_val);
  879. if (rc < 0)
  880. return rc;
  881. return at86rf230_write_subreg(lp, SR_CHANNEL, channel);
  882. }
  883. static int
  884. at86rf230_channel(struct ieee802154_hw *hw, u8 page, u8 channel)
  885. {
  886. struct at86rf230_local *lp = hw->priv;
  887. int rc;
  888. rc = lp->data->set_channel(lp, page, channel);
  889. /* Wait for PLL */
  890. usleep_range(lp->data->t_channel_switch,
  891. lp->data->t_channel_switch + 10);
  892. lp->cal_timeout = jiffies + AT86RF2XX_CAL_LOOP_TIMEOUT;
  893. return rc;
  894. }
  895. static int
  896. at86rf230_set_hw_addr_filt(struct ieee802154_hw *hw,
  897. struct ieee802154_hw_addr_filt *filt,
  898. unsigned long changed)
  899. {
  900. struct at86rf230_local *lp = hw->priv;
  901. if (changed & IEEE802154_AFILT_SADDR_CHANGED) {
  902. u16 addr = le16_to_cpu(filt->short_addr);
  903. dev_vdbg(&lp->spi->dev, "%s called for saddr\n", __func__);
  904. __at86rf230_write(lp, RG_SHORT_ADDR_0, addr);
  905. __at86rf230_write(lp, RG_SHORT_ADDR_1, addr >> 8);
  906. }
  907. if (changed & IEEE802154_AFILT_PANID_CHANGED) {
  908. u16 pan = le16_to_cpu(filt->pan_id);
  909. dev_vdbg(&lp->spi->dev, "%s called for pan id\n", __func__);
  910. __at86rf230_write(lp, RG_PAN_ID_0, pan);
  911. __at86rf230_write(lp, RG_PAN_ID_1, pan >> 8);
  912. }
  913. if (changed & IEEE802154_AFILT_IEEEADDR_CHANGED) {
  914. u8 i, addr[8];
  915. memcpy(addr, &filt->ieee_addr, 8);
  916. dev_vdbg(&lp->spi->dev, "%s called for IEEE addr\n", __func__);
  917. for (i = 0; i < 8; i++)
  918. __at86rf230_write(lp, RG_IEEE_ADDR_0 + i, addr[i]);
  919. }
  920. if (changed & IEEE802154_AFILT_PANC_CHANGED) {
  921. dev_vdbg(&lp->spi->dev, "%s called for panc change\n", __func__);
  922. if (filt->pan_coord)
  923. at86rf230_write_subreg(lp, SR_AACK_I_AM_COORD, 1);
  924. else
  925. at86rf230_write_subreg(lp, SR_AACK_I_AM_COORD, 0);
  926. }
  927. return 0;
  928. }
  929. #define AT86RF23X_MAX_TX_POWERS 0xF
  930. static const s32 at86rf233_powers[AT86RF23X_MAX_TX_POWERS + 1] = {
  931. 400, 370, 340, 300, 250, 200, 100, 0, -100, -200, -300, -400, -600,
  932. -800, -1200, -1700,
  933. };
  934. static const s32 at86rf231_powers[AT86RF23X_MAX_TX_POWERS + 1] = {
  935. 300, 280, 230, 180, 130, 70, 0, -100, -200, -300, -400, -500, -700,
  936. -900, -1200, -1700,
  937. };
  938. #define AT86RF212_MAX_TX_POWERS 0x1F
  939. static const s32 at86rf212_powers[AT86RF212_MAX_TX_POWERS + 1] = {
  940. 500, 400, 300, 200, 100, 0, -100, -200, -300, -400, -500, -600, -700,
  941. -800, -900, -1000, -1100, -1200, -1300, -1400, -1500, -1600, -1700,
  942. -1800, -1900, -2000, -2100, -2200, -2300, -2400, -2500, -2600,
  943. };
  944. static int
  945. at86rf23x_set_txpower(struct at86rf230_local *lp, s32 mbm)
  946. {
  947. u32 i;
  948. for (i = 0; i < lp->hw->phy->supported.tx_powers_size; i++) {
  949. if (lp->hw->phy->supported.tx_powers[i] == mbm)
  950. return at86rf230_write_subreg(lp, SR_TX_PWR_23X, i);
  951. }
  952. return -EINVAL;
  953. }
  954. static int
  955. at86rf212_set_txpower(struct at86rf230_local *lp, s32 mbm)
  956. {
  957. u32 i;
  958. for (i = 0; i < lp->hw->phy->supported.tx_powers_size; i++) {
  959. if (lp->hw->phy->supported.tx_powers[i] == mbm)
  960. return at86rf230_write_subreg(lp, SR_TX_PWR_212, i);
  961. }
  962. return -EINVAL;
  963. }
  964. static int
  965. at86rf230_set_txpower(struct ieee802154_hw *hw, s32 mbm)
  966. {
  967. struct at86rf230_local *lp = hw->priv;
  968. return lp->data->set_txpower(lp, mbm);
  969. }
  970. static int
  971. at86rf230_set_lbt(struct ieee802154_hw *hw, bool on)
  972. {
  973. struct at86rf230_local *lp = hw->priv;
  974. return at86rf230_write_subreg(lp, SR_CSMA_LBT_MODE, on);
  975. }
  976. static int
  977. at86rf230_set_cca_mode(struct ieee802154_hw *hw,
  978. const struct wpan_phy_cca *cca)
  979. {
  980. struct at86rf230_local *lp = hw->priv;
  981. u8 val;
  982. /* mapping 802.15.4 to driver spec */
  983. switch (cca->mode) {
  984. case NL802154_CCA_ENERGY:
  985. val = 1;
  986. break;
  987. case NL802154_CCA_CARRIER:
  988. val = 2;
  989. break;
  990. case NL802154_CCA_ENERGY_CARRIER:
  991. switch (cca->opt) {
  992. case NL802154_CCA_OPT_ENERGY_CARRIER_AND:
  993. val = 3;
  994. break;
  995. case NL802154_CCA_OPT_ENERGY_CARRIER_OR:
  996. val = 0;
  997. break;
  998. default:
  999. return -EINVAL;
  1000. }
  1001. break;
  1002. default:
  1003. return -EINVAL;
  1004. }
  1005. return at86rf230_write_subreg(lp, SR_CCA_MODE, val);
  1006. }
  1007. static int
  1008. at86rf230_set_cca_ed_level(struct ieee802154_hw *hw, s32 mbm)
  1009. {
  1010. struct at86rf230_local *lp = hw->priv;
  1011. u32 i;
  1012. for (i = 0; i < hw->phy->supported.cca_ed_levels_size; i++) {
  1013. if (hw->phy->supported.cca_ed_levels[i] == mbm)
  1014. return at86rf230_write_subreg(lp, SR_CCA_ED_THRES, i);
  1015. }
  1016. return -EINVAL;
  1017. }
  1018. static int
  1019. at86rf230_set_csma_params(struct ieee802154_hw *hw, u8 min_be, u8 max_be,
  1020. u8 retries)
  1021. {
  1022. struct at86rf230_local *lp = hw->priv;
  1023. int rc;
  1024. rc = at86rf230_write_subreg(lp, SR_MIN_BE, min_be);
  1025. if (rc)
  1026. return rc;
  1027. rc = at86rf230_write_subreg(lp, SR_MAX_BE, max_be);
  1028. if (rc)
  1029. return rc;
  1030. return at86rf230_write_subreg(lp, SR_MAX_CSMA_RETRIES, retries);
  1031. }
  1032. static int
  1033. at86rf230_set_frame_retries(struct ieee802154_hw *hw, s8 retries)
  1034. {
  1035. struct at86rf230_local *lp = hw->priv;
  1036. return at86rf230_write_subreg(lp, SR_MAX_FRAME_RETRIES, retries);
  1037. }
  1038. static int
  1039. at86rf230_set_promiscuous_mode(struct ieee802154_hw *hw, const bool on)
  1040. {
  1041. struct at86rf230_local *lp = hw->priv;
  1042. int rc;
  1043. if (on) {
  1044. rc = at86rf230_write_subreg(lp, SR_AACK_DIS_ACK, 1);
  1045. if (rc < 0)
  1046. return rc;
  1047. rc = at86rf230_write_subreg(lp, SR_AACK_PROM_MODE, 1);
  1048. if (rc < 0)
  1049. return rc;
  1050. } else {
  1051. rc = at86rf230_write_subreg(lp, SR_AACK_PROM_MODE, 0);
  1052. if (rc < 0)
  1053. return rc;
  1054. rc = at86rf230_write_subreg(lp, SR_AACK_DIS_ACK, 0);
  1055. if (rc < 0)
  1056. return rc;
  1057. }
  1058. return 0;
  1059. }
  1060. static const struct ieee802154_ops at86rf230_ops = {
  1061. .owner = THIS_MODULE,
  1062. .xmit_async = at86rf230_xmit,
  1063. .ed = at86rf230_ed,
  1064. .set_channel = at86rf230_channel,
  1065. .start = at86rf230_start,
  1066. .stop = at86rf230_stop,
  1067. .set_hw_addr_filt = at86rf230_set_hw_addr_filt,
  1068. .set_txpower = at86rf230_set_txpower,
  1069. .set_lbt = at86rf230_set_lbt,
  1070. .set_cca_mode = at86rf230_set_cca_mode,
  1071. .set_cca_ed_level = at86rf230_set_cca_ed_level,
  1072. .set_csma_params = at86rf230_set_csma_params,
  1073. .set_frame_retries = at86rf230_set_frame_retries,
  1074. .set_promiscuous_mode = at86rf230_set_promiscuous_mode,
  1075. };
  1076. static struct at86rf2xx_chip_data at86rf233_data = {
  1077. .t_sleep_cycle = 330,
  1078. .t_channel_switch = 11,
  1079. .t_reset_to_off = 26,
  1080. .t_off_to_aack = 80,
  1081. .t_off_to_tx_on = 80,
  1082. .t_off_to_sleep = 35,
  1083. .t_sleep_to_off = 1000,
  1084. .t_frame = 4096,
  1085. .t_p_ack = 545,
  1086. .rssi_base_val = -94,
  1087. .set_channel = at86rf23x_set_channel,
  1088. .set_txpower = at86rf23x_set_txpower,
  1089. };
  1090. static struct at86rf2xx_chip_data at86rf231_data = {
  1091. .t_sleep_cycle = 330,
  1092. .t_channel_switch = 24,
  1093. .t_reset_to_off = 37,
  1094. .t_off_to_aack = 110,
  1095. .t_off_to_tx_on = 110,
  1096. .t_off_to_sleep = 35,
  1097. .t_sleep_to_off = 1000,
  1098. .t_frame = 4096,
  1099. .t_p_ack = 545,
  1100. .rssi_base_val = -91,
  1101. .set_channel = at86rf23x_set_channel,
  1102. .set_txpower = at86rf23x_set_txpower,
  1103. };
  1104. static struct at86rf2xx_chip_data at86rf212_data = {
  1105. .t_sleep_cycle = 330,
  1106. .t_channel_switch = 11,
  1107. .t_reset_to_off = 26,
  1108. .t_off_to_aack = 200,
  1109. .t_off_to_tx_on = 200,
  1110. .t_off_to_sleep = 35,
  1111. .t_sleep_to_off = 1000,
  1112. .t_frame = 4096,
  1113. .t_p_ack = 545,
  1114. .rssi_base_val = -100,
  1115. .set_channel = at86rf212_set_channel,
  1116. .set_txpower = at86rf212_set_txpower,
  1117. };
  1118. static int at86rf230_hw_init(struct at86rf230_local *lp, u8 xtal_trim)
  1119. {
  1120. int rc, irq_type, irq_pol = IRQ_ACTIVE_HIGH;
  1121. unsigned int dvdd;
  1122. u8 csma_seed[2];
  1123. rc = at86rf230_sync_state_change(lp, STATE_FORCE_TRX_OFF);
  1124. if (rc)
  1125. return rc;
  1126. irq_type = irq_get_trigger_type(lp->spi->irq);
  1127. if (irq_type == IRQ_TYPE_EDGE_FALLING ||
  1128. irq_type == IRQ_TYPE_LEVEL_LOW)
  1129. irq_pol = IRQ_ACTIVE_LOW;
  1130. rc = at86rf230_write_subreg(lp, SR_IRQ_POLARITY, irq_pol);
  1131. if (rc)
  1132. return rc;
  1133. rc = at86rf230_write_subreg(lp, SR_RX_SAFE_MODE, 1);
  1134. if (rc)
  1135. return rc;
  1136. rc = at86rf230_write_subreg(lp, SR_IRQ_MASK, IRQ_TRX_END);
  1137. if (rc)
  1138. return rc;
  1139. /* reset values differs in at86rf231 and at86rf233 */
  1140. rc = at86rf230_write_subreg(lp, SR_IRQ_MASK_MODE, 0);
  1141. if (rc)
  1142. return rc;
  1143. get_random_bytes(csma_seed, ARRAY_SIZE(csma_seed));
  1144. rc = at86rf230_write_subreg(lp, SR_CSMA_SEED_0, csma_seed[0]);
  1145. if (rc)
  1146. return rc;
  1147. rc = at86rf230_write_subreg(lp, SR_CSMA_SEED_1, csma_seed[1]);
  1148. if (rc)
  1149. return rc;
  1150. /* CLKM changes are applied immediately */
  1151. rc = at86rf230_write_subreg(lp, SR_CLKM_SHA_SEL, 0x00);
  1152. if (rc)
  1153. return rc;
  1154. /* Turn CLKM Off */
  1155. rc = at86rf230_write_subreg(lp, SR_CLKM_CTRL, 0x00);
  1156. if (rc)
  1157. return rc;
  1158. /* Wait the next SLEEP cycle */
  1159. usleep_range(lp->data->t_sleep_cycle,
  1160. lp->data->t_sleep_cycle + 100);
  1161. /* xtal_trim value is calculated by:
  1162. * CL = 0.5 * (CX + CTRIM + CPAR)
  1163. *
  1164. * whereas:
  1165. * CL = capacitor of used crystal
  1166. * CX = connected capacitors at xtal pins
  1167. * CPAR = in all at86rf2xx datasheets this is a constant value 3 pF,
  1168. * but this is different on each board setup. You need to fine
  1169. * tuning this value via CTRIM.
  1170. * CTRIM = variable capacitor setting. Resolution is 0.3 pF range is
  1171. * 0 pF upto 4.5 pF.
  1172. *
  1173. * Examples:
  1174. * atben transceiver:
  1175. *
  1176. * CL = 8 pF
  1177. * CX = 12 pF
  1178. * CPAR = 3 pF (We assume the magic constant from datasheet)
  1179. * CTRIM = 0.9 pF
  1180. *
  1181. * (12+0.9+3)/2 = 7.95 which is nearly at 8 pF
  1182. *
  1183. * xtal_trim = 0x3
  1184. *
  1185. * openlabs transceiver:
  1186. *
  1187. * CL = 16 pF
  1188. * CX = 22 pF
  1189. * CPAR = 3 pF (We assume the magic constant from datasheet)
  1190. * CTRIM = 4.5 pF
  1191. *
  1192. * (22+4.5+3)/2 = 14.75 which is the nearest value to 16 pF
  1193. *
  1194. * xtal_trim = 0xf
  1195. */
  1196. rc = at86rf230_write_subreg(lp, SR_XTAL_TRIM, xtal_trim);
  1197. if (rc)
  1198. return rc;
  1199. rc = at86rf230_read_subreg(lp, SR_DVDD_OK, &dvdd);
  1200. if (rc)
  1201. return rc;
  1202. if (!dvdd) {
  1203. dev_err(&lp->spi->dev, "DVDD error\n");
  1204. return -EINVAL;
  1205. }
  1206. /* Force setting slotted operation bit to 0. Sometimes the atben
  1207. * sets this bit and I don't know why. We set this always force
  1208. * to zero while probing.
  1209. */
  1210. return at86rf230_write_subreg(lp, SR_SLOTTED_OPERATION, 0);
  1211. }
  1212. static int
  1213. at86rf230_get_pdata(struct spi_device *spi, int *rstn, int *slp_tr,
  1214. u8 *xtal_trim)
  1215. {
  1216. struct at86rf230_platform_data *pdata = spi->dev.platform_data;
  1217. int ret;
  1218. if (!IS_ENABLED(CONFIG_OF) || !spi->dev.of_node) {
  1219. if (!pdata)
  1220. return -ENOENT;
  1221. *rstn = pdata->rstn;
  1222. *slp_tr = pdata->slp_tr;
  1223. *xtal_trim = pdata->xtal_trim;
  1224. return 0;
  1225. }
  1226. *rstn = of_get_named_gpio(spi->dev.of_node, "reset-gpio", 0);
  1227. *slp_tr = of_get_named_gpio(spi->dev.of_node, "sleep-gpio", 0);
  1228. ret = of_property_read_u8(spi->dev.of_node, "xtal-trim", xtal_trim);
  1229. if (ret < 0 && ret != -EINVAL)
  1230. return ret;
  1231. return 0;
  1232. }
  1233. static int
  1234. at86rf230_detect_device(struct at86rf230_local *lp)
  1235. {
  1236. unsigned int part, version, val;
  1237. u16 man_id = 0;
  1238. const char *chip;
  1239. int rc;
  1240. rc = __at86rf230_read(lp, RG_MAN_ID_0, &val);
  1241. if (rc)
  1242. return rc;
  1243. man_id |= val;
  1244. rc = __at86rf230_read(lp, RG_MAN_ID_1, &val);
  1245. if (rc)
  1246. return rc;
  1247. man_id |= (val << 8);
  1248. rc = __at86rf230_read(lp, RG_PART_NUM, &part);
  1249. if (rc)
  1250. return rc;
  1251. rc = __at86rf230_read(lp, RG_VERSION_NUM, &version);
  1252. if (rc)
  1253. return rc;
  1254. if (man_id != 0x001f) {
  1255. dev_err(&lp->spi->dev, "Non-Atmel dev found (MAN_ID %02x %02x)\n",
  1256. man_id >> 8, man_id & 0xFF);
  1257. return -EINVAL;
  1258. }
  1259. lp->hw->flags = IEEE802154_HW_TX_OMIT_CKSUM |
  1260. IEEE802154_HW_CSMA_PARAMS |
  1261. IEEE802154_HW_FRAME_RETRIES | IEEE802154_HW_AFILT |
  1262. IEEE802154_HW_PROMISCUOUS;
  1263. lp->hw->phy->flags = WPAN_PHY_FLAG_TXPOWER |
  1264. WPAN_PHY_FLAG_CCA_ED_LEVEL |
  1265. WPAN_PHY_FLAG_CCA_MODE;
  1266. lp->hw->phy->supported.cca_modes = BIT(NL802154_CCA_ENERGY) |
  1267. BIT(NL802154_CCA_CARRIER) | BIT(NL802154_CCA_ENERGY_CARRIER);
  1268. lp->hw->phy->supported.cca_opts = BIT(NL802154_CCA_OPT_ENERGY_CARRIER_AND) |
  1269. BIT(NL802154_CCA_OPT_ENERGY_CARRIER_OR);
  1270. lp->hw->phy->cca.mode = NL802154_CCA_ENERGY;
  1271. switch (part) {
  1272. case 2:
  1273. chip = "at86rf230";
  1274. rc = -ENOTSUPP;
  1275. goto not_supp;
  1276. case 3:
  1277. chip = "at86rf231";
  1278. lp->data = &at86rf231_data;
  1279. lp->hw->phy->supported.channels[0] = 0x7FFF800;
  1280. lp->hw->phy->current_channel = 11;
  1281. lp->hw->phy->supported.tx_powers = at86rf231_powers;
  1282. lp->hw->phy->supported.tx_powers_size = ARRAY_SIZE(at86rf231_powers);
  1283. lp->hw->phy->supported.cca_ed_levels = at86rf231_ed_levels;
  1284. lp->hw->phy->supported.cca_ed_levels_size = ARRAY_SIZE(at86rf231_ed_levels);
  1285. break;
  1286. case 7:
  1287. chip = "at86rf212";
  1288. lp->data = &at86rf212_data;
  1289. lp->hw->flags |= IEEE802154_HW_LBT;
  1290. lp->hw->phy->supported.channels[0] = 0x00007FF;
  1291. lp->hw->phy->supported.channels[2] = 0x00007FF;
  1292. lp->hw->phy->current_channel = 5;
  1293. lp->hw->phy->supported.lbt = NL802154_SUPPORTED_BOOL_BOTH;
  1294. lp->hw->phy->supported.tx_powers = at86rf212_powers;
  1295. lp->hw->phy->supported.tx_powers_size = ARRAY_SIZE(at86rf212_powers);
  1296. lp->hw->phy->supported.cca_ed_levels = at86rf212_ed_levels_100;
  1297. lp->hw->phy->supported.cca_ed_levels_size = ARRAY_SIZE(at86rf212_ed_levels_100);
  1298. break;
  1299. case 11:
  1300. chip = "at86rf233";
  1301. lp->data = &at86rf233_data;
  1302. lp->hw->phy->supported.channels[0] = 0x7FFF800;
  1303. lp->hw->phy->current_channel = 13;
  1304. lp->hw->phy->supported.tx_powers = at86rf233_powers;
  1305. lp->hw->phy->supported.tx_powers_size = ARRAY_SIZE(at86rf233_powers);
  1306. lp->hw->phy->supported.cca_ed_levels = at86rf233_ed_levels;
  1307. lp->hw->phy->supported.cca_ed_levels_size = ARRAY_SIZE(at86rf233_ed_levels);
  1308. break;
  1309. default:
  1310. chip = "unknown";
  1311. rc = -ENOTSUPP;
  1312. goto not_supp;
  1313. }
  1314. lp->hw->phy->cca_ed_level = lp->hw->phy->supported.cca_ed_levels[7];
  1315. lp->hw->phy->transmit_power = lp->hw->phy->supported.tx_powers[0];
  1316. not_supp:
  1317. dev_info(&lp->spi->dev, "Detected %s chip version %d\n", chip, version);
  1318. return rc;
  1319. }
  1320. static int at86rf230_probe(struct spi_device *spi)
  1321. {
  1322. struct ieee802154_hw *hw;
  1323. struct at86rf230_local *lp;
  1324. unsigned int status;
  1325. int rc, irq_type, rstn, slp_tr;
  1326. u8 xtal_trim = 0;
  1327. if (!spi->irq) {
  1328. dev_err(&spi->dev, "no IRQ specified\n");
  1329. return -EINVAL;
  1330. }
  1331. rc = at86rf230_get_pdata(spi, &rstn, &slp_tr, &xtal_trim);
  1332. if (rc < 0) {
  1333. dev_err(&spi->dev, "failed to parse platform_data: %d\n", rc);
  1334. return rc;
  1335. }
  1336. if (gpio_is_valid(rstn)) {
  1337. rc = devm_gpio_request_one(&spi->dev, rstn,
  1338. GPIOF_OUT_INIT_HIGH, "rstn");
  1339. if (rc)
  1340. return rc;
  1341. }
  1342. if (gpio_is_valid(slp_tr)) {
  1343. rc = devm_gpio_request_one(&spi->dev, slp_tr,
  1344. GPIOF_OUT_INIT_LOW, "slp_tr");
  1345. if (rc)
  1346. return rc;
  1347. }
  1348. /* Reset */
  1349. if (gpio_is_valid(rstn)) {
  1350. udelay(1);
  1351. gpio_set_value_cansleep(rstn, 0);
  1352. udelay(1);
  1353. gpio_set_value_cansleep(rstn, 1);
  1354. usleep_range(120, 240);
  1355. }
  1356. hw = ieee802154_alloc_hw(sizeof(*lp), &at86rf230_ops);
  1357. if (!hw)
  1358. return -ENOMEM;
  1359. lp = hw->priv;
  1360. lp->hw = hw;
  1361. lp->spi = spi;
  1362. lp->slp_tr = slp_tr;
  1363. hw->parent = &spi->dev;
  1364. ieee802154_random_extended_addr(&hw->phy->perm_extended_addr);
  1365. lp->regmap = devm_regmap_init_spi(spi, &at86rf230_regmap_spi_config);
  1366. if (IS_ERR(lp->regmap)) {
  1367. rc = PTR_ERR(lp->regmap);
  1368. dev_err(&spi->dev, "Failed to allocate register map: %d\n",
  1369. rc);
  1370. goto free_dev;
  1371. }
  1372. at86rf230_setup_spi_messages(lp, &lp->state);
  1373. at86rf230_setup_spi_messages(lp, &lp->tx);
  1374. rc = at86rf230_detect_device(lp);
  1375. if (rc < 0)
  1376. goto free_dev;
  1377. init_completion(&lp->state_complete);
  1378. spi_set_drvdata(spi, lp);
  1379. rc = at86rf230_hw_init(lp, xtal_trim);
  1380. if (rc)
  1381. goto free_dev;
  1382. /* Read irq status register to reset irq line */
  1383. rc = at86rf230_read_subreg(lp, RG_IRQ_STATUS, 0xff, 0, &status);
  1384. if (rc)
  1385. goto free_dev;
  1386. irq_type = irq_get_trigger_type(spi->irq);
  1387. if (!irq_type)
  1388. irq_type = IRQF_TRIGGER_HIGH;
  1389. rc = devm_request_irq(&spi->dev, spi->irq, at86rf230_isr,
  1390. IRQF_SHARED | irq_type, dev_name(&spi->dev), lp);
  1391. if (rc)
  1392. goto free_dev;
  1393. /* disable_irq by default and wait for starting hardware */
  1394. disable_irq(spi->irq);
  1395. /* going into sleep by default */
  1396. at86rf230_sleep(lp);
  1397. rc = ieee802154_register_hw(lp->hw);
  1398. if (rc)
  1399. goto free_dev;
  1400. return rc;
  1401. free_dev:
  1402. ieee802154_free_hw(lp->hw);
  1403. return rc;
  1404. }
  1405. static void at86rf230_remove(struct spi_device *spi)
  1406. {
  1407. struct at86rf230_local *lp = spi_get_drvdata(spi);
  1408. /* mask all at86rf230 irq's */
  1409. at86rf230_write_subreg(lp, SR_IRQ_MASK, 0);
  1410. ieee802154_unregister_hw(lp->hw);
  1411. ieee802154_free_hw(lp->hw);
  1412. dev_dbg(&spi->dev, "unregistered at86rf230\n");
  1413. }
  1414. static const struct of_device_id at86rf230_of_match[] = {
  1415. { .compatible = "atmel,at86rf230", },
  1416. { .compatible = "atmel,at86rf231", },
  1417. { .compatible = "atmel,at86rf233", },
  1418. { .compatible = "atmel,at86rf212", },
  1419. { },
  1420. };
  1421. MODULE_DEVICE_TABLE(of, at86rf230_of_match);
  1422. static const struct spi_device_id at86rf230_device_id[] = {
  1423. { .name = "at86rf230", },
  1424. { .name = "at86rf231", },
  1425. { .name = "at86rf233", },
  1426. { .name = "at86rf212", },
  1427. { },
  1428. };
  1429. MODULE_DEVICE_TABLE(spi, at86rf230_device_id);
  1430. static struct spi_driver at86rf230_driver = {
  1431. .id_table = at86rf230_device_id,
  1432. .driver = {
  1433. .of_match_table = of_match_ptr(at86rf230_of_match),
  1434. .name = "at86rf230",
  1435. },
  1436. .probe = at86rf230_probe,
  1437. .remove = at86rf230_remove,
  1438. };
  1439. module_spi_driver(at86rf230_driver);
  1440. MODULE_DESCRIPTION("AT86RF230 Transceiver Driver");
  1441. MODULE_LICENSE("GPL v2");