command_submission.c 95 KB

1234567891011121314151617181920212223242526272829303132333435363738394041424344454647484950515253545556575859606162636465666768697071727374757677787980818283848586878889909192939495969798991001011021031041051061071081091101111121131141151161171181191201211221231241251261271281291301311321331341351361371381391401411421431441451461471481491501511521531541551561571581591601611621631641651661671681691701711721731741751761771781791801811821831841851861871881891901911921931941951961971981992002012022032042052062072082092102112122132142152162172182192202212222232242252262272282292302312322332342352362372382392402412422432442452462472482492502512522532542552562572582592602612622632642652662672682692702712722732742752762772782792802812822832842852862872882892902912922932942952962972982993003013023033043053063073083093103113123133143153163173183193203213223233243253263273283293303313323333343353363373383393403413423433443453463473483493503513523533543553563573583593603613623633643653663673683693703713723733743753763773783793803813823833843853863873883893903913923933943953963973983994004014024034044054064074084094104114124134144154164174184194204214224234244254264274284294304314324334344354364374384394404414424434444454464474484494504514524534544554564574584594604614624634644654664674684694704714724734744754764774784794804814824834844854864874884894904914924934944954964974984995005015025035045055065075085095105115125135145155165175185195205215225235245255265275285295305315325335345355365375385395405415425435445455465475485495505515525535545555565575585595605615625635645655665675685695705715725735745755765775785795805815825835845855865875885895905915925935945955965975985996006016026036046056066076086096106116126136146156166176186196206216226236246256266276286296306316326336346356366376386396406416426436446456466476486496506516526536546556566576586596606616626636646656666676686696706716726736746756766776786796806816826836846856866876886896906916926936946956966976986997007017027037047057067077087097107117127137147157167177187197207217227237247257267277287297307317327337347357367377387397407417427437447457467477487497507517527537547557567577587597607617627637647657667677687697707717727737747757767777787797807817827837847857867877887897907917927937947957967977987998008018028038048058068078088098108118128138148158168178188198208218228238248258268278288298308318328338348358368378388398408418428438448458468478488498508518528538548558568578588598608618628638648658668678688698708718728738748758768778788798808818828838848858868878888898908918928938948958968978988999009019029039049059069079089099109119129139149159169179189199209219229239249259269279289299309319329339349359369379389399409419429439449459469479489499509519529539549559569579589599609619629639649659669679689699709719729739749759769779789799809819829839849859869879889899909919929939949959969979989991000100110021003100410051006100710081009101010111012101310141015101610171018101910201021102210231024102510261027102810291030103110321033103410351036103710381039104010411042104310441045104610471048104910501051105210531054105510561057105810591060106110621063106410651066106710681069107010711072107310741075107610771078107910801081108210831084108510861087108810891090109110921093109410951096109710981099110011011102110311041105110611071108110911101111111211131114111511161117111811191120112111221123112411251126112711281129113011311132113311341135113611371138113911401141114211431144114511461147114811491150115111521153115411551156115711581159116011611162116311641165116611671168116911701171117211731174117511761177117811791180118111821183118411851186118711881189119011911192119311941195119611971198119912001201120212031204120512061207120812091210121112121213121412151216121712181219122012211222122312241225122612271228122912301231123212331234123512361237123812391240124112421243124412451246124712481249125012511252125312541255125612571258125912601261126212631264126512661267126812691270127112721273127412751276127712781279128012811282128312841285128612871288128912901291129212931294129512961297129812991300130113021303130413051306130713081309131013111312131313141315131613171318131913201321132213231324132513261327132813291330133113321333133413351336133713381339134013411342134313441345134613471348134913501351135213531354135513561357135813591360136113621363136413651366136713681369137013711372137313741375137613771378137913801381138213831384138513861387138813891390139113921393139413951396139713981399140014011402140314041405140614071408140914101411141214131414141514161417141814191420142114221423142414251426142714281429143014311432143314341435143614371438143914401441144214431444144514461447144814491450145114521453145414551456145714581459146014611462146314641465146614671468146914701471147214731474147514761477147814791480148114821483148414851486148714881489149014911492149314941495149614971498149915001501150215031504150515061507150815091510151115121513151415151516151715181519152015211522152315241525152615271528152915301531153215331534153515361537153815391540154115421543154415451546154715481549155015511552155315541555155615571558155915601561156215631564156515661567156815691570157115721573157415751576157715781579158015811582158315841585158615871588158915901591159215931594159515961597159815991600160116021603160416051606160716081609161016111612161316141615161616171618161916201621162216231624162516261627162816291630163116321633163416351636163716381639164016411642164316441645164616471648164916501651165216531654165516561657165816591660166116621663166416651666166716681669167016711672167316741675167616771678167916801681168216831684168516861687168816891690169116921693169416951696169716981699170017011702170317041705170617071708170917101711171217131714171517161717171817191720172117221723172417251726172717281729173017311732173317341735173617371738173917401741174217431744174517461747174817491750175117521753175417551756175717581759176017611762176317641765176617671768176917701771177217731774177517761777177817791780178117821783178417851786178717881789179017911792179317941795179617971798179918001801180218031804180518061807180818091810181118121813181418151816181718181819182018211822182318241825182618271828182918301831183218331834183518361837183818391840184118421843184418451846184718481849185018511852185318541855185618571858185918601861186218631864186518661867186818691870187118721873187418751876187718781879188018811882188318841885188618871888188918901891189218931894189518961897189818991900190119021903190419051906190719081909191019111912191319141915191619171918191919201921192219231924192519261927192819291930193119321933193419351936193719381939194019411942194319441945194619471948194919501951195219531954195519561957195819591960196119621963196419651966196719681969197019711972197319741975197619771978197919801981198219831984198519861987198819891990199119921993199419951996199719981999200020012002200320042005200620072008200920102011201220132014201520162017201820192020202120222023202420252026202720282029203020312032203320342035203620372038203920402041204220432044204520462047204820492050205120522053205420552056205720582059206020612062206320642065206620672068206920702071207220732074207520762077207820792080208120822083208420852086208720882089209020912092209320942095209620972098209921002101210221032104210521062107210821092110211121122113211421152116211721182119212021212122212321242125212621272128212921302131213221332134213521362137213821392140214121422143214421452146214721482149215021512152215321542155215621572158215921602161216221632164216521662167216821692170217121722173217421752176217721782179218021812182218321842185218621872188218921902191219221932194219521962197219821992200220122022203220422052206220722082209221022112212221322142215221622172218221922202221222222232224222522262227222822292230223122322233223422352236223722382239224022412242224322442245224622472248224922502251225222532254225522562257225822592260226122622263226422652266226722682269227022712272227322742275227622772278227922802281228222832284228522862287228822892290229122922293229422952296229722982299230023012302230323042305230623072308230923102311231223132314231523162317231823192320232123222323232423252326232723282329233023312332233323342335233623372338233923402341234223432344234523462347234823492350235123522353235423552356235723582359236023612362236323642365236623672368236923702371237223732374237523762377237823792380238123822383238423852386238723882389239023912392239323942395239623972398239924002401240224032404240524062407240824092410241124122413241424152416241724182419242024212422242324242425242624272428242924302431243224332434243524362437243824392440244124422443244424452446244724482449245024512452245324542455245624572458245924602461246224632464246524662467246824692470247124722473247424752476247724782479248024812482248324842485248624872488248924902491249224932494249524962497249824992500250125022503250425052506250725082509251025112512251325142515251625172518251925202521252225232524252525262527252825292530253125322533253425352536253725382539254025412542254325442545254625472548254925502551255225532554255525562557255825592560256125622563256425652566256725682569257025712572257325742575257625772578257925802581258225832584258525862587258825892590259125922593259425952596259725982599260026012602260326042605260626072608260926102611261226132614261526162617261826192620262126222623262426252626262726282629263026312632263326342635263626372638263926402641264226432644264526462647264826492650265126522653265426552656265726582659266026612662266326642665266626672668266926702671267226732674267526762677267826792680268126822683268426852686268726882689269026912692269326942695269626972698269927002701270227032704270527062707270827092710271127122713271427152716271727182719272027212722272327242725272627272728272927302731273227332734273527362737273827392740274127422743274427452746274727482749275027512752275327542755275627572758275927602761276227632764276527662767276827692770277127722773277427752776277727782779278027812782278327842785278627872788278927902791279227932794279527962797279827992800280128022803280428052806280728082809281028112812281328142815281628172818281928202821282228232824282528262827282828292830283128322833283428352836283728382839284028412842284328442845284628472848284928502851285228532854285528562857285828592860286128622863286428652866286728682869287028712872287328742875287628772878287928802881288228832884288528862887288828892890289128922893289428952896289728982899290029012902290329042905290629072908290929102911291229132914291529162917291829192920292129222923292429252926292729282929293029312932293329342935293629372938293929402941294229432944294529462947294829492950295129522953295429552956295729582959296029612962296329642965296629672968296929702971297229732974297529762977297829792980298129822983298429852986298729882989299029912992299329942995299629972998299930003001300230033004300530063007300830093010301130123013301430153016301730183019302030213022302330243025302630273028302930303031303230333034303530363037303830393040304130423043304430453046304730483049305030513052305330543055305630573058305930603061306230633064306530663067306830693070307130723073307430753076307730783079308030813082308330843085308630873088308930903091309230933094309530963097309830993100310131023103310431053106310731083109311031113112311331143115311631173118311931203121312231233124312531263127312831293130313131323133313431353136313731383139314031413142314331443145314631473148314931503151315231533154315531563157315831593160316131623163316431653166316731683169317031713172317331743175317631773178317931803181318231833184318531863187318831893190319131923193319431953196319731983199320032013202320332043205320632073208320932103211321232133214321532163217321832193220322132223223322432253226322732283229323032313232323332343235323632373238323932403241324232433244324532463247324832493250325132523253325432553256325732583259326032613262326332643265326632673268326932703271327232733274327532763277327832793280328132823283328432853286328732883289329032913292329332943295329632973298329933003301330233033304330533063307330833093310331133123313331433153316331733183319332033213322332333243325332633273328332933303331333233333334333533363337333833393340334133423343334433453346334733483349335033513352335333543355335633573358335933603361336233633364336533663367336833693370337133723373337433753376337733783379338033813382338333843385338633873388338933903391339233933394339533963397339833993400340134023403340434053406340734083409341034113412341334143415341634173418341934203421342234233424342534263427342834293430343134323433343434353436343734383439344034413442344334443445344634473448344934503451345234533454345534563457345834593460346134623463346434653466346734683469347034713472347334743475347634773478347934803481348234833484348534863487348834893490349134923493
  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Copyright 2016-2021 HabanaLabs, Ltd.
  4. * All Rights Reserved.
  5. */
  6. #include <uapi/misc/habanalabs.h>
  7. #include "habanalabs.h"
  8. #include <linux/uaccess.h>
  9. #include <linux/slab.h>
  10. #define HL_CS_FLAGS_TYPE_MASK (HL_CS_FLAGS_SIGNAL | HL_CS_FLAGS_WAIT | \
  11. HL_CS_FLAGS_COLLECTIVE_WAIT | HL_CS_FLAGS_RESERVE_SIGNALS_ONLY | \
  12. HL_CS_FLAGS_UNRESERVE_SIGNALS_ONLY | HL_CS_FLAGS_ENGINE_CORE_COMMAND)
  13. #define MAX_TS_ITER_NUM 10
  14. /**
  15. * enum hl_cs_wait_status - cs wait status
  16. * @CS_WAIT_STATUS_BUSY: cs was not completed yet
  17. * @CS_WAIT_STATUS_COMPLETED: cs completed
  18. * @CS_WAIT_STATUS_GONE: cs completed but fence is already gone
  19. */
  20. enum hl_cs_wait_status {
  21. CS_WAIT_STATUS_BUSY,
  22. CS_WAIT_STATUS_COMPLETED,
  23. CS_WAIT_STATUS_GONE
  24. };
  25. static void job_wq_completion(struct work_struct *work);
  26. static int _hl_cs_wait_ioctl(struct hl_device *hdev, struct hl_ctx *ctx, u64 timeout_us, u64 seq,
  27. enum hl_cs_wait_status *status, s64 *timestamp);
  28. static void cs_do_release(struct kref *ref);
  29. static void hl_push_cs_outcome(struct hl_device *hdev,
  30. struct hl_cs_outcome_store *outcome_store,
  31. u64 seq, ktime_t ts, int error)
  32. {
  33. struct hl_cs_outcome *node;
  34. unsigned long flags;
  35. /*
  36. * CS outcome store supports the following operations:
  37. * push outcome - store a recent CS outcome in the store
  38. * pop outcome - retrieve a SPECIFIC (by seq) CS outcome from the store
  39. * It uses 2 lists: used list and free list.
  40. * It has a pre-allocated amount of nodes, each node stores
  41. * a single CS outcome.
  42. * Initially, all the nodes are in the free list.
  43. * On push outcome, a node (any) is taken from the free list, its
  44. * information is filled in, and the node is moved to the used list.
  45. * It is possible, that there are no nodes left in the free list.
  46. * In this case, we will lose some information about old outcomes. We
  47. * will pop the OLDEST node from the used list, and make it free.
  48. * On pop, the node is searched for in the used list (using a search
  49. * index).
  50. * If found, the node is then removed from the used list, and moved
  51. * back to the free list. The outcome data that the node contained is
  52. * returned back to the user.
  53. */
  54. spin_lock_irqsave(&outcome_store->db_lock, flags);
  55. if (list_empty(&outcome_store->free_list)) {
  56. node = list_last_entry(&outcome_store->used_list,
  57. struct hl_cs_outcome, list_link);
  58. hash_del(&node->map_link);
  59. dev_dbg(hdev->dev, "CS %llu outcome was lost\n", node->seq);
  60. } else {
  61. node = list_last_entry(&outcome_store->free_list,
  62. struct hl_cs_outcome, list_link);
  63. }
  64. list_del_init(&node->list_link);
  65. node->seq = seq;
  66. node->ts = ts;
  67. node->error = error;
  68. list_add(&node->list_link, &outcome_store->used_list);
  69. hash_add(outcome_store->outcome_map, &node->map_link, node->seq);
  70. spin_unlock_irqrestore(&outcome_store->db_lock, flags);
  71. }
  72. static bool hl_pop_cs_outcome(struct hl_cs_outcome_store *outcome_store,
  73. u64 seq, ktime_t *ts, int *error)
  74. {
  75. struct hl_cs_outcome *node;
  76. unsigned long flags;
  77. spin_lock_irqsave(&outcome_store->db_lock, flags);
  78. hash_for_each_possible(outcome_store->outcome_map, node, map_link, seq)
  79. if (node->seq == seq) {
  80. *ts = node->ts;
  81. *error = node->error;
  82. hash_del(&node->map_link);
  83. list_del_init(&node->list_link);
  84. list_add(&node->list_link, &outcome_store->free_list);
  85. spin_unlock_irqrestore(&outcome_store->db_lock, flags);
  86. return true;
  87. }
  88. spin_unlock_irqrestore(&outcome_store->db_lock, flags);
  89. return false;
  90. }
  91. static void hl_sob_reset(struct kref *ref)
  92. {
  93. struct hl_hw_sob *hw_sob = container_of(ref, struct hl_hw_sob,
  94. kref);
  95. struct hl_device *hdev = hw_sob->hdev;
  96. dev_dbg(hdev->dev, "reset sob id %u\n", hw_sob->sob_id);
  97. hdev->asic_funcs->reset_sob(hdev, hw_sob);
  98. hw_sob->need_reset = false;
  99. }
  100. void hl_sob_reset_error(struct kref *ref)
  101. {
  102. struct hl_hw_sob *hw_sob = container_of(ref, struct hl_hw_sob,
  103. kref);
  104. struct hl_device *hdev = hw_sob->hdev;
  105. dev_crit(hdev->dev,
  106. "SOB release shouldn't be called here, q_idx: %d, sob_id: %d\n",
  107. hw_sob->q_idx, hw_sob->sob_id);
  108. }
  109. void hw_sob_put(struct hl_hw_sob *hw_sob)
  110. {
  111. if (hw_sob)
  112. kref_put(&hw_sob->kref, hl_sob_reset);
  113. }
  114. static void hw_sob_put_err(struct hl_hw_sob *hw_sob)
  115. {
  116. if (hw_sob)
  117. kref_put(&hw_sob->kref, hl_sob_reset_error);
  118. }
  119. void hw_sob_get(struct hl_hw_sob *hw_sob)
  120. {
  121. if (hw_sob)
  122. kref_get(&hw_sob->kref);
  123. }
  124. /**
  125. * hl_gen_sob_mask() - Generates a sob mask to be used in a monitor arm packet
  126. * @sob_base: sob base id
  127. * @sob_mask: sob user mask, each bit represents a sob offset from sob base
  128. * @mask: generated mask
  129. *
  130. * Return: 0 if given parameters are valid
  131. */
  132. int hl_gen_sob_mask(u16 sob_base, u8 sob_mask, u8 *mask)
  133. {
  134. int i;
  135. if (sob_mask == 0)
  136. return -EINVAL;
  137. if (sob_mask == 0x1) {
  138. *mask = ~(1 << (sob_base & 0x7));
  139. } else {
  140. /* find msb in order to verify sob range is valid */
  141. for (i = BITS_PER_BYTE - 1 ; i >= 0 ; i--)
  142. if (BIT(i) & sob_mask)
  143. break;
  144. if (i > (HL_MAX_SOBS_PER_MONITOR - (sob_base & 0x7) - 1))
  145. return -EINVAL;
  146. *mask = ~sob_mask;
  147. }
  148. return 0;
  149. }
  150. static void hl_fence_release(struct kref *kref)
  151. {
  152. struct hl_fence *fence =
  153. container_of(kref, struct hl_fence, refcount);
  154. struct hl_cs_compl *hl_cs_cmpl =
  155. container_of(fence, struct hl_cs_compl, base_fence);
  156. kfree(hl_cs_cmpl);
  157. }
  158. void hl_fence_put(struct hl_fence *fence)
  159. {
  160. if (IS_ERR_OR_NULL(fence))
  161. return;
  162. kref_put(&fence->refcount, hl_fence_release);
  163. }
  164. void hl_fences_put(struct hl_fence **fence, int len)
  165. {
  166. int i;
  167. for (i = 0; i < len; i++, fence++)
  168. hl_fence_put(*fence);
  169. }
  170. void hl_fence_get(struct hl_fence *fence)
  171. {
  172. if (fence)
  173. kref_get(&fence->refcount);
  174. }
  175. static void hl_fence_init(struct hl_fence *fence, u64 sequence)
  176. {
  177. kref_init(&fence->refcount);
  178. fence->cs_sequence = sequence;
  179. fence->error = 0;
  180. fence->timestamp = ktime_set(0, 0);
  181. fence->mcs_handling_done = false;
  182. init_completion(&fence->completion);
  183. }
  184. void cs_get(struct hl_cs *cs)
  185. {
  186. kref_get(&cs->refcount);
  187. }
  188. static int cs_get_unless_zero(struct hl_cs *cs)
  189. {
  190. return kref_get_unless_zero(&cs->refcount);
  191. }
  192. static void cs_put(struct hl_cs *cs)
  193. {
  194. kref_put(&cs->refcount, cs_do_release);
  195. }
  196. static void cs_job_do_release(struct kref *ref)
  197. {
  198. struct hl_cs_job *job = container_of(ref, struct hl_cs_job, refcount);
  199. kfree(job);
  200. }
  201. static void hl_cs_job_put(struct hl_cs_job *job)
  202. {
  203. kref_put(&job->refcount, cs_job_do_release);
  204. }
  205. bool cs_needs_completion(struct hl_cs *cs)
  206. {
  207. /* In case this is a staged CS, only the last CS in sequence should
  208. * get a completion, any non staged CS will always get a completion
  209. */
  210. if (cs->staged_cs && !cs->staged_last)
  211. return false;
  212. return true;
  213. }
  214. bool cs_needs_timeout(struct hl_cs *cs)
  215. {
  216. /* In case this is a staged CS, only the first CS in sequence should
  217. * get a timeout, any non staged CS will always get a timeout
  218. */
  219. if (cs->staged_cs && !cs->staged_first)
  220. return false;
  221. return true;
  222. }
  223. static bool is_cb_patched(struct hl_device *hdev, struct hl_cs_job *job)
  224. {
  225. /*
  226. * Patched CB is created for external queues jobs, and for H/W queues
  227. * jobs if the user CB was allocated by driver and MMU is disabled.
  228. */
  229. return (job->queue_type == QUEUE_TYPE_EXT ||
  230. (job->queue_type == QUEUE_TYPE_HW &&
  231. job->is_kernel_allocated_cb &&
  232. !hdev->mmu_enable));
  233. }
  234. /*
  235. * cs_parser - parse the user command submission
  236. *
  237. * @hpriv : pointer to the private data of the fd
  238. * @job : pointer to the job that holds the command submission info
  239. *
  240. * The function parses the command submission of the user. It calls the
  241. * ASIC specific parser, which returns a list of memory blocks to send
  242. * to the device as different command buffers
  243. *
  244. */
  245. static int cs_parser(struct hl_fpriv *hpriv, struct hl_cs_job *job)
  246. {
  247. struct hl_device *hdev = hpriv->hdev;
  248. struct hl_cs_parser parser;
  249. int rc;
  250. parser.ctx_id = job->cs->ctx->asid;
  251. parser.cs_sequence = job->cs->sequence;
  252. parser.job_id = job->id;
  253. parser.hw_queue_id = job->hw_queue_id;
  254. parser.job_userptr_list = &job->userptr_list;
  255. parser.patched_cb = NULL;
  256. parser.user_cb = job->user_cb;
  257. parser.user_cb_size = job->user_cb_size;
  258. parser.queue_type = job->queue_type;
  259. parser.is_kernel_allocated_cb = job->is_kernel_allocated_cb;
  260. job->patched_cb = NULL;
  261. parser.completion = cs_needs_completion(job->cs);
  262. rc = hdev->asic_funcs->cs_parser(hdev, &parser);
  263. if (is_cb_patched(hdev, job)) {
  264. if (!rc) {
  265. job->patched_cb = parser.patched_cb;
  266. job->job_cb_size = parser.patched_cb_size;
  267. job->contains_dma_pkt = parser.contains_dma_pkt;
  268. atomic_inc(&job->patched_cb->cs_cnt);
  269. }
  270. /*
  271. * Whether the parsing worked or not, we don't need the
  272. * original CB anymore because it was already parsed and
  273. * won't be accessed again for this CS
  274. */
  275. atomic_dec(&job->user_cb->cs_cnt);
  276. hl_cb_put(job->user_cb);
  277. job->user_cb = NULL;
  278. } else if (!rc) {
  279. job->job_cb_size = job->user_cb_size;
  280. }
  281. return rc;
  282. }
  283. static void hl_complete_job(struct hl_device *hdev, struct hl_cs_job *job)
  284. {
  285. struct hl_cs *cs = job->cs;
  286. if (is_cb_patched(hdev, job)) {
  287. hl_userptr_delete_list(hdev, &job->userptr_list);
  288. /*
  289. * We might arrive here from rollback and patched CB wasn't
  290. * created, so we need to check it's not NULL
  291. */
  292. if (job->patched_cb) {
  293. atomic_dec(&job->patched_cb->cs_cnt);
  294. hl_cb_put(job->patched_cb);
  295. }
  296. }
  297. /* For H/W queue jobs, if a user CB was allocated by driver and MMU is
  298. * enabled, the user CB isn't released in cs_parser() and thus should be
  299. * released here. This is also true for INT queues jobs which were
  300. * allocated by driver.
  301. */
  302. if ((job->is_kernel_allocated_cb &&
  303. ((job->queue_type == QUEUE_TYPE_HW && hdev->mmu_enable) ||
  304. job->queue_type == QUEUE_TYPE_INT))) {
  305. atomic_dec(&job->user_cb->cs_cnt);
  306. hl_cb_put(job->user_cb);
  307. }
  308. /*
  309. * This is the only place where there can be multiple threads
  310. * modifying the list at the same time
  311. */
  312. spin_lock(&cs->job_lock);
  313. list_del(&job->cs_node);
  314. spin_unlock(&cs->job_lock);
  315. hl_debugfs_remove_job(hdev, job);
  316. /* We decrement reference only for a CS that gets completion
  317. * because the reference was incremented only for this kind of CS
  318. * right before it was scheduled.
  319. *
  320. * In staged submission, only the last CS marked as 'staged_last'
  321. * gets completion, hence its release function will be called from here.
  322. * As for all the rest CS's in the staged submission which do not get
  323. * completion, their CS reference will be decremented by the
  324. * 'staged_last' CS during the CS release flow.
  325. * All relevant PQ CI counters will be incremented during the CS release
  326. * flow by calling 'hl_hw_queue_update_ci'.
  327. */
  328. if (cs_needs_completion(cs) &&
  329. (job->queue_type == QUEUE_TYPE_EXT || job->queue_type == QUEUE_TYPE_HW))
  330. cs_put(cs);
  331. hl_cs_job_put(job);
  332. }
  333. /*
  334. * hl_staged_cs_find_first - locate the first CS in this staged submission
  335. *
  336. * @hdev: pointer to device structure
  337. * @cs_seq: staged submission sequence number
  338. *
  339. * @note: This function must be called under 'hdev->cs_mirror_lock'
  340. *
  341. * Find and return a CS pointer with the given sequence
  342. */
  343. struct hl_cs *hl_staged_cs_find_first(struct hl_device *hdev, u64 cs_seq)
  344. {
  345. struct hl_cs *cs;
  346. list_for_each_entry_reverse(cs, &hdev->cs_mirror_list, mirror_node)
  347. if (cs->staged_cs && cs->staged_first &&
  348. cs->sequence == cs_seq)
  349. return cs;
  350. return NULL;
  351. }
  352. /*
  353. * is_staged_cs_last_exists - returns true if the last CS in sequence exists
  354. *
  355. * @hdev: pointer to device structure
  356. * @cs: staged submission member
  357. *
  358. */
  359. bool is_staged_cs_last_exists(struct hl_device *hdev, struct hl_cs *cs)
  360. {
  361. struct hl_cs *last_entry;
  362. last_entry = list_last_entry(&cs->staged_cs_node, struct hl_cs,
  363. staged_cs_node);
  364. if (last_entry->staged_last)
  365. return true;
  366. return false;
  367. }
  368. /*
  369. * staged_cs_get - get CS reference if this CS is a part of a staged CS
  370. *
  371. * @hdev: pointer to device structure
  372. * @cs: current CS
  373. * @cs_seq: staged submission sequence number
  374. *
  375. * Increment CS reference for every CS in this staged submission except for
  376. * the CS which get completion.
  377. */
  378. static void staged_cs_get(struct hl_device *hdev, struct hl_cs *cs)
  379. {
  380. /* Only the last CS in this staged submission will get a completion.
  381. * We must increment the reference for all other CS's in this
  382. * staged submission.
  383. * Once we get a completion we will release the whole staged submission.
  384. */
  385. if (!cs->staged_last)
  386. cs_get(cs);
  387. }
  388. /*
  389. * staged_cs_put - put a CS in case it is part of staged submission
  390. *
  391. * @hdev: pointer to device structure
  392. * @cs: CS to put
  393. *
  394. * This function decrements a CS reference (for a non completion CS)
  395. */
  396. static void staged_cs_put(struct hl_device *hdev, struct hl_cs *cs)
  397. {
  398. /* We release all CS's in a staged submission except the last
  399. * CS which we have never incremented its reference.
  400. */
  401. if (!cs_needs_completion(cs))
  402. cs_put(cs);
  403. }
  404. static void cs_handle_tdr(struct hl_device *hdev, struct hl_cs *cs)
  405. {
  406. struct hl_cs *next = NULL, *iter, *first_cs;
  407. if (!cs_needs_timeout(cs))
  408. return;
  409. spin_lock(&hdev->cs_mirror_lock);
  410. /* We need to handle tdr only once for the complete staged submission.
  411. * Hence, we choose the CS that reaches this function first which is
  412. * the CS marked as 'staged_last'.
  413. * In case single staged cs was submitted which has both first and last
  414. * indications, then "cs_find_first" below will return NULL, since we
  415. * removed the cs node from the list before getting here,
  416. * in such cases just continue with the cs to cancel it's TDR work.
  417. */
  418. if (cs->staged_cs && cs->staged_last) {
  419. first_cs = hl_staged_cs_find_first(hdev, cs->staged_sequence);
  420. if (first_cs)
  421. cs = first_cs;
  422. }
  423. spin_unlock(&hdev->cs_mirror_lock);
  424. /* Don't cancel TDR in case this CS was timedout because we might be
  425. * running from the TDR context
  426. */
  427. if (cs->timedout || hdev->timeout_jiffies == MAX_SCHEDULE_TIMEOUT)
  428. return;
  429. if (cs->tdr_active)
  430. cancel_delayed_work_sync(&cs->work_tdr);
  431. spin_lock(&hdev->cs_mirror_lock);
  432. /* queue TDR for next CS */
  433. list_for_each_entry(iter, &hdev->cs_mirror_list, mirror_node)
  434. if (cs_needs_timeout(iter)) {
  435. next = iter;
  436. break;
  437. }
  438. if (next && !next->tdr_active) {
  439. next->tdr_active = true;
  440. schedule_delayed_work(&next->work_tdr, next->timeout_jiffies);
  441. }
  442. spin_unlock(&hdev->cs_mirror_lock);
  443. }
  444. /*
  445. * force_complete_multi_cs - complete all contexts that wait on multi-CS
  446. *
  447. * @hdev: pointer to habanalabs device structure
  448. */
  449. static void force_complete_multi_cs(struct hl_device *hdev)
  450. {
  451. int i;
  452. for (i = 0; i < MULTI_CS_MAX_USER_CTX; i++) {
  453. struct multi_cs_completion *mcs_compl;
  454. mcs_compl = &hdev->multi_cs_completion[i];
  455. spin_lock(&mcs_compl->lock);
  456. if (!mcs_compl->used) {
  457. spin_unlock(&mcs_compl->lock);
  458. continue;
  459. }
  460. /* when calling force complete no context should be waiting on
  461. * multi-cS.
  462. * We are calling the function as a protection for such case
  463. * to free any pending context and print error message
  464. */
  465. dev_err(hdev->dev,
  466. "multi-CS completion context %d still waiting when calling force completion\n",
  467. i);
  468. complete_all(&mcs_compl->completion);
  469. spin_unlock(&mcs_compl->lock);
  470. }
  471. }
  472. /*
  473. * complete_multi_cs - complete all waiting entities on multi-CS
  474. *
  475. * @hdev: pointer to habanalabs device structure
  476. * @cs: CS structure
  477. * The function signals a waiting entity that has an overlapping stream masters
  478. * with the completed CS.
  479. * For example:
  480. * - a completed CS worked on stream master QID 4, multi CS completion
  481. * is actively waiting on stream master QIDs 3, 5. don't send signal as no
  482. * common stream master QID
  483. * - a completed CS worked on stream master QID 4, multi CS completion
  484. * is actively waiting on stream master QIDs 3, 4. send signal as stream
  485. * master QID 4 is common
  486. */
  487. static void complete_multi_cs(struct hl_device *hdev, struct hl_cs *cs)
  488. {
  489. struct hl_fence *fence = cs->fence;
  490. int i;
  491. /* in case of multi CS check for completion only for the first CS */
  492. if (cs->staged_cs && !cs->staged_first)
  493. return;
  494. for (i = 0; i < MULTI_CS_MAX_USER_CTX; i++) {
  495. struct multi_cs_completion *mcs_compl;
  496. mcs_compl = &hdev->multi_cs_completion[i];
  497. if (!mcs_compl->used)
  498. continue;
  499. spin_lock(&mcs_compl->lock);
  500. /*
  501. * complete if:
  502. * 1. still waiting for completion
  503. * 2. the completed CS has at least one overlapping stream
  504. * master with the stream masters in the completion
  505. */
  506. if (mcs_compl->used &&
  507. (fence->stream_master_qid_map &
  508. mcs_compl->stream_master_qid_map)) {
  509. /* extract the timestamp only of first completed CS */
  510. if (!mcs_compl->timestamp)
  511. mcs_compl->timestamp = ktime_to_ns(fence->timestamp);
  512. complete_all(&mcs_compl->completion);
  513. /*
  514. * Setting mcs_handling_done inside the lock ensures
  515. * at least one fence have mcs_handling_done set to
  516. * true before wait for mcs finish. This ensures at
  517. * least one CS will be set as completed when polling
  518. * mcs fences.
  519. */
  520. fence->mcs_handling_done = true;
  521. }
  522. spin_unlock(&mcs_compl->lock);
  523. }
  524. /* In case CS completed without mcs completion initialized */
  525. fence->mcs_handling_done = true;
  526. }
  527. static inline void cs_release_sob_reset_handler(struct hl_device *hdev,
  528. struct hl_cs *cs,
  529. struct hl_cs_compl *hl_cs_cmpl)
  530. {
  531. /* Skip this handler if the cs wasn't submitted, to avoid putting
  532. * the hw_sob twice, since this case already handled at this point,
  533. * also skip if the hw_sob pointer wasn't set.
  534. */
  535. if (!hl_cs_cmpl->hw_sob || !cs->submitted)
  536. return;
  537. spin_lock(&hl_cs_cmpl->lock);
  538. /*
  539. * we get refcount upon reservation of signals or signal/wait cs for the
  540. * hw_sob object, and need to put it when the first staged cs
  541. * (which cotains the encaps signals) or cs signal/wait is completed.
  542. */
  543. if ((hl_cs_cmpl->type == CS_TYPE_SIGNAL) ||
  544. (hl_cs_cmpl->type == CS_TYPE_WAIT) ||
  545. (hl_cs_cmpl->type == CS_TYPE_COLLECTIVE_WAIT) ||
  546. (!!hl_cs_cmpl->encaps_signals)) {
  547. dev_dbg(hdev->dev,
  548. "CS 0x%llx type %d finished, sob_id: %d, sob_val: %u\n",
  549. hl_cs_cmpl->cs_seq,
  550. hl_cs_cmpl->type,
  551. hl_cs_cmpl->hw_sob->sob_id,
  552. hl_cs_cmpl->sob_val);
  553. hw_sob_put(hl_cs_cmpl->hw_sob);
  554. if (hl_cs_cmpl->type == CS_TYPE_COLLECTIVE_WAIT)
  555. hdev->asic_funcs->reset_sob_group(hdev,
  556. hl_cs_cmpl->sob_group);
  557. }
  558. spin_unlock(&hl_cs_cmpl->lock);
  559. }
  560. static void cs_do_release(struct kref *ref)
  561. {
  562. struct hl_cs *cs = container_of(ref, struct hl_cs, refcount);
  563. struct hl_device *hdev = cs->ctx->hdev;
  564. struct hl_cs_job *job, *tmp;
  565. struct hl_cs_compl *hl_cs_cmpl =
  566. container_of(cs->fence, struct hl_cs_compl, base_fence);
  567. cs->completed = true;
  568. /*
  569. * Although if we reached here it means that all external jobs have
  570. * finished, because each one of them took refcnt to CS, we still
  571. * need to go over the internal jobs and complete them. Otherwise, we
  572. * will have leaked memory and what's worse, the CS object (and
  573. * potentially the CTX object) could be released, while the JOB
  574. * still holds a pointer to them (but no reference).
  575. */
  576. list_for_each_entry_safe(job, tmp, &cs->job_list, cs_node)
  577. hl_complete_job(hdev, job);
  578. if (!cs->submitted) {
  579. /*
  580. * In case the wait for signal CS was submitted, the fence put
  581. * occurs in init_signal_wait_cs() or collective_wait_init_cs()
  582. * right before hanging on the PQ.
  583. */
  584. if (cs->type == CS_TYPE_WAIT ||
  585. cs->type == CS_TYPE_COLLECTIVE_WAIT)
  586. hl_fence_put(cs->signal_fence);
  587. goto out;
  588. }
  589. /* Need to update CI for all queue jobs that does not get completion */
  590. hl_hw_queue_update_ci(cs);
  591. /* remove CS from CS mirror list */
  592. spin_lock(&hdev->cs_mirror_lock);
  593. list_del_init(&cs->mirror_node);
  594. spin_unlock(&hdev->cs_mirror_lock);
  595. cs_handle_tdr(hdev, cs);
  596. if (cs->staged_cs) {
  597. /* the completion CS decrements reference for the entire
  598. * staged submission
  599. */
  600. if (cs->staged_last) {
  601. struct hl_cs *staged_cs, *tmp_cs;
  602. list_for_each_entry_safe(staged_cs, tmp_cs,
  603. &cs->staged_cs_node, staged_cs_node)
  604. staged_cs_put(hdev, staged_cs);
  605. }
  606. /* A staged CS will be a member in the list only after it
  607. * was submitted. We used 'cs_mirror_lock' when inserting
  608. * it to list so we will use it again when removing it
  609. */
  610. if (cs->submitted) {
  611. spin_lock(&hdev->cs_mirror_lock);
  612. list_del(&cs->staged_cs_node);
  613. spin_unlock(&hdev->cs_mirror_lock);
  614. }
  615. /* decrement refcount to handle when first staged cs
  616. * with encaps signals is completed.
  617. */
  618. if (hl_cs_cmpl->encaps_signals)
  619. kref_put(&hl_cs_cmpl->encaps_sig_hdl->refcount,
  620. hl_encaps_handle_do_release);
  621. }
  622. if ((cs->type == CS_TYPE_WAIT || cs->type == CS_TYPE_COLLECTIVE_WAIT)
  623. && cs->encaps_signals)
  624. kref_put(&cs->encaps_sig_hdl->refcount,
  625. hl_encaps_handle_do_release);
  626. out:
  627. /* Must be called before hl_ctx_put because inside we use ctx to get
  628. * the device
  629. */
  630. hl_debugfs_remove_cs(cs);
  631. hdev->shadow_cs_queue[cs->sequence & (hdev->asic_prop.max_pending_cs - 1)] = NULL;
  632. /* We need to mark an error for not submitted because in that case
  633. * the hl fence release flow is different. Mainly, we don't need
  634. * to handle hw_sob for signal/wait
  635. */
  636. if (cs->timedout)
  637. cs->fence->error = -ETIMEDOUT;
  638. else if (cs->aborted)
  639. cs->fence->error = -EIO;
  640. else if (!cs->submitted)
  641. cs->fence->error = -EBUSY;
  642. if (unlikely(cs->skip_reset_on_timeout)) {
  643. dev_err(hdev->dev,
  644. "Command submission %llu completed after %llu (s)\n",
  645. cs->sequence,
  646. div_u64(jiffies - cs->submission_time_jiffies, HZ));
  647. }
  648. if (cs->timestamp) {
  649. cs->fence->timestamp = ktime_get();
  650. hl_push_cs_outcome(hdev, &cs->ctx->outcome_store, cs->sequence,
  651. cs->fence->timestamp, cs->fence->error);
  652. }
  653. hl_ctx_put(cs->ctx);
  654. complete_all(&cs->fence->completion);
  655. complete_multi_cs(hdev, cs);
  656. cs_release_sob_reset_handler(hdev, cs, hl_cs_cmpl);
  657. hl_fence_put(cs->fence);
  658. kfree(cs->jobs_in_queue_cnt);
  659. kfree(cs);
  660. }
  661. static void cs_timedout(struct work_struct *work)
  662. {
  663. struct hl_device *hdev;
  664. u64 event_mask;
  665. int rc;
  666. struct hl_cs *cs = container_of(work, struct hl_cs,
  667. work_tdr.work);
  668. bool skip_reset_on_timeout = cs->skip_reset_on_timeout, device_reset = false;
  669. rc = cs_get_unless_zero(cs);
  670. if (!rc)
  671. return;
  672. if ((!cs->submitted) || (cs->completed)) {
  673. cs_put(cs);
  674. return;
  675. }
  676. hdev = cs->ctx->hdev;
  677. if (likely(!skip_reset_on_timeout)) {
  678. if (hdev->reset_on_lockup)
  679. device_reset = true;
  680. else
  681. hdev->reset_info.needs_reset = true;
  682. /* Mark the CS is timed out so we won't try to cancel its TDR */
  683. cs->timedout = true;
  684. }
  685. /* Save only the first CS timeout parameters */
  686. rc = atomic_cmpxchg(&hdev->captured_err_info.cs_timeout.write_enable, 1, 0);
  687. if (rc) {
  688. hdev->captured_err_info.cs_timeout.timestamp = ktime_get();
  689. hdev->captured_err_info.cs_timeout.seq = cs->sequence;
  690. event_mask = device_reset ? (HL_NOTIFIER_EVENT_CS_TIMEOUT |
  691. HL_NOTIFIER_EVENT_DEVICE_RESET) : HL_NOTIFIER_EVENT_CS_TIMEOUT;
  692. hl_notifier_event_send_all(hdev, event_mask);
  693. }
  694. switch (cs->type) {
  695. case CS_TYPE_SIGNAL:
  696. dev_err(hdev->dev,
  697. "Signal command submission %llu has not finished in time!\n",
  698. cs->sequence);
  699. break;
  700. case CS_TYPE_WAIT:
  701. dev_err(hdev->dev,
  702. "Wait command submission %llu has not finished in time!\n",
  703. cs->sequence);
  704. break;
  705. case CS_TYPE_COLLECTIVE_WAIT:
  706. dev_err(hdev->dev,
  707. "Collective Wait command submission %llu has not finished in time!\n",
  708. cs->sequence);
  709. break;
  710. default:
  711. dev_err(hdev->dev,
  712. "Command submission %llu has not finished in time!\n",
  713. cs->sequence);
  714. break;
  715. }
  716. rc = hl_state_dump(hdev);
  717. if (rc)
  718. dev_err(hdev->dev, "Error during system state dump %d\n", rc);
  719. cs_put(cs);
  720. if (device_reset)
  721. hl_device_reset(hdev, HL_DRV_RESET_TDR);
  722. }
  723. static int allocate_cs(struct hl_device *hdev, struct hl_ctx *ctx,
  724. enum hl_cs_type cs_type, u64 user_sequence,
  725. struct hl_cs **cs_new, u32 flags, u32 timeout)
  726. {
  727. struct hl_cs_counters_atomic *cntr;
  728. struct hl_fence *other = NULL;
  729. struct hl_cs_compl *cs_cmpl;
  730. struct hl_cs *cs;
  731. int rc;
  732. cntr = &hdev->aggregated_cs_counters;
  733. cs = kzalloc(sizeof(*cs), GFP_ATOMIC);
  734. if (!cs)
  735. cs = kzalloc(sizeof(*cs), GFP_KERNEL);
  736. if (!cs) {
  737. atomic64_inc(&ctx->cs_counters.out_of_mem_drop_cnt);
  738. atomic64_inc(&cntr->out_of_mem_drop_cnt);
  739. return -ENOMEM;
  740. }
  741. /* increment refcnt for context */
  742. hl_ctx_get(ctx);
  743. cs->ctx = ctx;
  744. cs->submitted = false;
  745. cs->completed = false;
  746. cs->type = cs_type;
  747. cs->timestamp = !!(flags & HL_CS_FLAGS_TIMESTAMP);
  748. cs->encaps_signals = !!(flags & HL_CS_FLAGS_ENCAP_SIGNALS);
  749. cs->timeout_jiffies = timeout;
  750. cs->skip_reset_on_timeout =
  751. hdev->reset_info.skip_reset_on_timeout ||
  752. !!(flags & HL_CS_FLAGS_SKIP_RESET_ON_TIMEOUT);
  753. cs->submission_time_jiffies = jiffies;
  754. INIT_LIST_HEAD(&cs->job_list);
  755. INIT_DELAYED_WORK(&cs->work_tdr, cs_timedout);
  756. kref_init(&cs->refcount);
  757. spin_lock_init(&cs->job_lock);
  758. cs_cmpl = kzalloc(sizeof(*cs_cmpl), GFP_ATOMIC);
  759. if (!cs_cmpl)
  760. cs_cmpl = kzalloc(sizeof(*cs_cmpl), GFP_KERNEL);
  761. if (!cs_cmpl) {
  762. atomic64_inc(&ctx->cs_counters.out_of_mem_drop_cnt);
  763. atomic64_inc(&cntr->out_of_mem_drop_cnt);
  764. rc = -ENOMEM;
  765. goto free_cs;
  766. }
  767. cs->jobs_in_queue_cnt = kcalloc(hdev->asic_prop.max_queues,
  768. sizeof(*cs->jobs_in_queue_cnt), GFP_ATOMIC);
  769. if (!cs->jobs_in_queue_cnt)
  770. cs->jobs_in_queue_cnt = kcalloc(hdev->asic_prop.max_queues,
  771. sizeof(*cs->jobs_in_queue_cnt), GFP_KERNEL);
  772. if (!cs->jobs_in_queue_cnt) {
  773. atomic64_inc(&ctx->cs_counters.out_of_mem_drop_cnt);
  774. atomic64_inc(&cntr->out_of_mem_drop_cnt);
  775. rc = -ENOMEM;
  776. goto free_cs_cmpl;
  777. }
  778. cs_cmpl->hdev = hdev;
  779. cs_cmpl->type = cs->type;
  780. spin_lock_init(&cs_cmpl->lock);
  781. cs->fence = &cs_cmpl->base_fence;
  782. spin_lock(&ctx->cs_lock);
  783. cs_cmpl->cs_seq = ctx->cs_sequence;
  784. other = ctx->cs_pending[cs_cmpl->cs_seq &
  785. (hdev->asic_prop.max_pending_cs - 1)];
  786. if (other && !completion_done(&other->completion)) {
  787. /* If the following statement is true, it means we have reached
  788. * a point in which only part of the staged submission was
  789. * submitted and we don't have enough room in the 'cs_pending'
  790. * array for the rest of the submission.
  791. * This causes a deadlock because this CS will never be
  792. * completed as it depends on future CS's for completion.
  793. */
  794. if (other->cs_sequence == user_sequence)
  795. dev_crit_ratelimited(hdev->dev,
  796. "Staged CS %llu deadlock due to lack of resources",
  797. user_sequence);
  798. dev_dbg_ratelimited(hdev->dev,
  799. "Rejecting CS because of too many in-flights CS\n");
  800. atomic64_inc(&ctx->cs_counters.max_cs_in_flight_drop_cnt);
  801. atomic64_inc(&cntr->max_cs_in_flight_drop_cnt);
  802. rc = -EAGAIN;
  803. goto free_fence;
  804. }
  805. /* init hl_fence */
  806. hl_fence_init(&cs_cmpl->base_fence, cs_cmpl->cs_seq);
  807. cs->sequence = cs_cmpl->cs_seq;
  808. ctx->cs_pending[cs_cmpl->cs_seq &
  809. (hdev->asic_prop.max_pending_cs - 1)] =
  810. &cs_cmpl->base_fence;
  811. ctx->cs_sequence++;
  812. hl_fence_get(&cs_cmpl->base_fence);
  813. hl_fence_put(other);
  814. spin_unlock(&ctx->cs_lock);
  815. *cs_new = cs;
  816. return 0;
  817. free_fence:
  818. spin_unlock(&ctx->cs_lock);
  819. kfree(cs->jobs_in_queue_cnt);
  820. free_cs_cmpl:
  821. kfree(cs_cmpl);
  822. free_cs:
  823. kfree(cs);
  824. hl_ctx_put(ctx);
  825. return rc;
  826. }
  827. static void cs_rollback(struct hl_device *hdev, struct hl_cs *cs)
  828. {
  829. struct hl_cs_job *job, *tmp;
  830. staged_cs_put(hdev, cs);
  831. list_for_each_entry_safe(job, tmp, &cs->job_list, cs_node)
  832. hl_complete_job(hdev, job);
  833. }
  834. void hl_cs_rollback_all(struct hl_device *hdev, bool skip_wq_flush)
  835. {
  836. int i;
  837. struct hl_cs *cs, *tmp;
  838. if (!skip_wq_flush) {
  839. flush_workqueue(hdev->ts_free_obj_wq);
  840. /* flush all completions before iterating over the CS mirror list in
  841. * order to avoid a race with the release functions
  842. */
  843. for (i = 0 ; i < hdev->asic_prop.completion_queues_count ; i++)
  844. flush_workqueue(hdev->cq_wq[i]);
  845. flush_workqueue(hdev->cs_cmplt_wq);
  846. }
  847. /* Make sure we don't have leftovers in the CS mirror list */
  848. list_for_each_entry_safe(cs, tmp, &hdev->cs_mirror_list, mirror_node) {
  849. cs_get(cs);
  850. cs->aborted = true;
  851. dev_warn_ratelimited(hdev->dev, "Killing CS %d.%llu\n",
  852. cs->ctx->asid, cs->sequence);
  853. cs_rollback(hdev, cs);
  854. cs_put(cs);
  855. }
  856. force_complete_multi_cs(hdev);
  857. }
  858. static void
  859. wake_pending_user_interrupt_threads(struct hl_user_interrupt *interrupt)
  860. {
  861. struct hl_user_pending_interrupt *pend, *temp;
  862. unsigned long flags;
  863. spin_lock_irqsave(&interrupt->wait_list_lock, flags);
  864. list_for_each_entry_safe(pend, temp, &interrupt->wait_list_head, wait_list_node) {
  865. if (pend->ts_reg_info.buf) {
  866. list_del(&pend->wait_list_node);
  867. hl_mmap_mem_buf_put(pend->ts_reg_info.buf);
  868. hl_cb_put(pend->ts_reg_info.cq_cb);
  869. } else {
  870. pend->fence.error = -EIO;
  871. complete_all(&pend->fence.completion);
  872. }
  873. }
  874. spin_unlock_irqrestore(&interrupt->wait_list_lock, flags);
  875. }
  876. void hl_release_pending_user_interrupts(struct hl_device *hdev)
  877. {
  878. struct asic_fixed_properties *prop = &hdev->asic_prop;
  879. struct hl_user_interrupt *interrupt;
  880. int i;
  881. if (!prop->user_interrupt_count)
  882. return;
  883. /* We iterate through the user interrupt requests and waking up all
  884. * user threads waiting for interrupt completion. We iterate the
  885. * list under a lock, this is why all user threads, once awake,
  886. * will wait on the same lock and will release the waiting object upon
  887. * unlock.
  888. */
  889. for (i = 0 ; i < prop->user_interrupt_count ; i++) {
  890. interrupt = &hdev->user_interrupt[i];
  891. wake_pending_user_interrupt_threads(interrupt);
  892. }
  893. interrupt = &hdev->common_user_cq_interrupt;
  894. wake_pending_user_interrupt_threads(interrupt);
  895. interrupt = &hdev->common_decoder_interrupt;
  896. wake_pending_user_interrupt_threads(interrupt);
  897. }
  898. static void job_wq_completion(struct work_struct *work)
  899. {
  900. struct hl_cs_job *job = container_of(work, struct hl_cs_job,
  901. finish_work);
  902. struct hl_cs *cs = job->cs;
  903. struct hl_device *hdev = cs->ctx->hdev;
  904. /* job is no longer needed */
  905. hl_complete_job(hdev, job);
  906. }
  907. static void cs_completion(struct work_struct *work)
  908. {
  909. struct hl_cs *cs = container_of(work, struct hl_cs, finish_work);
  910. struct hl_device *hdev = cs->ctx->hdev;
  911. struct hl_cs_job *job, *tmp;
  912. list_for_each_entry_safe(job, tmp, &cs->job_list, cs_node)
  913. hl_complete_job(hdev, job);
  914. }
  915. static int validate_queue_index(struct hl_device *hdev,
  916. struct hl_cs_chunk *chunk,
  917. enum hl_queue_type *queue_type,
  918. bool *is_kernel_allocated_cb)
  919. {
  920. struct asic_fixed_properties *asic = &hdev->asic_prop;
  921. struct hw_queue_properties *hw_queue_prop;
  922. /* This must be checked here to prevent out-of-bounds access to
  923. * hw_queues_props array
  924. */
  925. if (chunk->queue_index >= asic->max_queues) {
  926. dev_err(hdev->dev, "Queue index %d is invalid\n",
  927. chunk->queue_index);
  928. return -EINVAL;
  929. }
  930. hw_queue_prop = &asic->hw_queues_props[chunk->queue_index];
  931. if (hw_queue_prop->type == QUEUE_TYPE_NA) {
  932. dev_err(hdev->dev, "Queue index %d is not applicable\n",
  933. chunk->queue_index);
  934. return -EINVAL;
  935. }
  936. if (hw_queue_prop->binned) {
  937. dev_err(hdev->dev, "Queue index %d is binned out\n",
  938. chunk->queue_index);
  939. return -EINVAL;
  940. }
  941. if (hw_queue_prop->driver_only) {
  942. dev_err(hdev->dev,
  943. "Queue index %d is restricted for the kernel driver\n",
  944. chunk->queue_index);
  945. return -EINVAL;
  946. }
  947. /* When hw queue type isn't QUEUE_TYPE_HW,
  948. * USER_ALLOC_CB flag shall be referred as "don't care".
  949. */
  950. if (hw_queue_prop->type == QUEUE_TYPE_HW) {
  951. if (chunk->cs_chunk_flags & HL_CS_CHUNK_FLAGS_USER_ALLOC_CB) {
  952. if (!(hw_queue_prop->cb_alloc_flags & CB_ALLOC_USER)) {
  953. dev_err(hdev->dev,
  954. "Queue index %d doesn't support user CB\n",
  955. chunk->queue_index);
  956. return -EINVAL;
  957. }
  958. *is_kernel_allocated_cb = false;
  959. } else {
  960. if (!(hw_queue_prop->cb_alloc_flags &
  961. CB_ALLOC_KERNEL)) {
  962. dev_err(hdev->dev,
  963. "Queue index %d doesn't support kernel CB\n",
  964. chunk->queue_index);
  965. return -EINVAL;
  966. }
  967. *is_kernel_allocated_cb = true;
  968. }
  969. } else {
  970. *is_kernel_allocated_cb = !!(hw_queue_prop->cb_alloc_flags
  971. & CB_ALLOC_KERNEL);
  972. }
  973. *queue_type = hw_queue_prop->type;
  974. return 0;
  975. }
  976. static struct hl_cb *get_cb_from_cs_chunk(struct hl_device *hdev,
  977. struct hl_mem_mgr *mmg,
  978. struct hl_cs_chunk *chunk)
  979. {
  980. struct hl_cb *cb;
  981. cb = hl_cb_get(mmg, chunk->cb_handle);
  982. if (!cb) {
  983. dev_err(hdev->dev, "CB handle 0x%llx invalid\n", chunk->cb_handle);
  984. return NULL;
  985. }
  986. if ((chunk->cb_size < 8) || (chunk->cb_size > cb->size)) {
  987. dev_err(hdev->dev, "CB size %u invalid\n", chunk->cb_size);
  988. goto release_cb;
  989. }
  990. atomic_inc(&cb->cs_cnt);
  991. return cb;
  992. release_cb:
  993. hl_cb_put(cb);
  994. return NULL;
  995. }
  996. struct hl_cs_job *hl_cs_allocate_job(struct hl_device *hdev,
  997. enum hl_queue_type queue_type, bool is_kernel_allocated_cb)
  998. {
  999. struct hl_cs_job *job;
  1000. job = kzalloc(sizeof(*job), GFP_ATOMIC);
  1001. if (!job)
  1002. job = kzalloc(sizeof(*job), GFP_KERNEL);
  1003. if (!job)
  1004. return NULL;
  1005. kref_init(&job->refcount);
  1006. job->queue_type = queue_type;
  1007. job->is_kernel_allocated_cb = is_kernel_allocated_cb;
  1008. if (is_cb_patched(hdev, job))
  1009. INIT_LIST_HEAD(&job->userptr_list);
  1010. if (job->queue_type == QUEUE_TYPE_EXT)
  1011. INIT_WORK(&job->finish_work, job_wq_completion);
  1012. return job;
  1013. }
  1014. static enum hl_cs_type hl_cs_get_cs_type(u32 cs_type_flags)
  1015. {
  1016. if (cs_type_flags & HL_CS_FLAGS_SIGNAL)
  1017. return CS_TYPE_SIGNAL;
  1018. else if (cs_type_flags & HL_CS_FLAGS_WAIT)
  1019. return CS_TYPE_WAIT;
  1020. else if (cs_type_flags & HL_CS_FLAGS_COLLECTIVE_WAIT)
  1021. return CS_TYPE_COLLECTIVE_WAIT;
  1022. else if (cs_type_flags & HL_CS_FLAGS_RESERVE_SIGNALS_ONLY)
  1023. return CS_RESERVE_SIGNALS;
  1024. else if (cs_type_flags & HL_CS_FLAGS_UNRESERVE_SIGNALS_ONLY)
  1025. return CS_UNRESERVE_SIGNALS;
  1026. else if (cs_type_flags & HL_CS_FLAGS_ENGINE_CORE_COMMAND)
  1027. return CS_TYPE_ENGINE_CORE;
  1028. else
  1029. return CS_TYPE_DEFAULT;
  1030. }
  1031. static int hl_cs_sanity_checks(struct hl_fpriv *hpriv, union hl_cs_args *args)
  1032. {
  1033. struct hl_device *hdev = hpriv->hdev;
  1034. struct hl_ctx *ctx = hpriv->ctx;
  1035. u32 cs_type_flags, num_chunks;
  1036. enum hl_device_status status;
  1037. enum hl_cs_type cs_type;
  1038. bool is_sync_stream;
  1039. if (!hl_device_operational(hdev, &status)) {
  1040. return -EBUSY;
  1041. }
  1042. if ((args->in.cs_flags & HL_CS_FLAGS_STAGED_SUBMISSION) &&
  1043. !hdev->supports_staged_submission) {
  1044. dev_err(hdev->dev, "staged submission not supported");
  1045. return -EPERM;
  1046. }
  1047. cs_type_flags = args->in.cs_flags & HL_CS_FLAGS_TYPE_MASK;
  1048. if (unlikely(cs_type_flags && !is_power_of_2(cs_type_flags))) {
  1049. dev_err(hdev->dev,
  1050. "CS type flags are mutually exclusive, context %d\n",
  1051. ctx->asid);
  1052. return -EINVAL;
  1053. }
  1054. cs_type = hl_cs_get_cs_type(cs_type_flags);
  1055. num_chunks = args->in.num_chunks_execute;
  1056. is_sync_stream = (cs_type == CS_TYPE_SIGNAL || cs_type == CS_TYPE_WAIT ||
  1057. cs_type == CS_TYPE_COLLECTIVE_WAIT);
  1058. if (unlikely(is_sync_stream && !hdev->supports_sync_stream)) {
  1059. dev_err(hdev->dev, "Sync stream CS is not supported\n");
  1060. return -EINVAL;
  1061. }
  1062. if (cs_type == CS_TYPE_DEFAULT) {
  1063. if (!num_chunks) {
  1064. dev_err(hdev->dev, "Got execute CS with 0 chunks, context %d\n", ctx->asid);
  1065. return -EINVAL;
  1066. }
  1067. } else if (is_sync_stream && num_chunks != 1) {
  1068. dev_err(hdev->dev,
  1069. "Sync stream CS mandates one chunk only, context %d\n",
  1070. ctx->asid);
  1071. return -EINVAL;
  1072. }
  1073. return 0;
  1074. }
  1075. static int hl_cs_copy_chunk_array(struct hl_device *hdev,
  1076. struct hl_cs_chunk **cs_chunk_array,
  1077. void __user *chunks, u32 num_chunks,
  1078. struct hl_ctx *ctx)
  1079. {
  1080. u32 size_to_copy;
  1081. if (num_chunks > HL_MAX_JOBS_PER_CS) {
  1082. atomic64_inc(&ctx->cs_counters.validation_drop_cnt);
  1083. atomic64_inc(&hdev->aggregated_cs_counters.validation_drop_cnt);
  1084. dev_err(hdev->dev,
  1085. "Number of chunks can NOT be larger than %d\n",
  1086. HL_MAX_JOBS_PER_CS);
  1087. return -EINVAL;
  1088. }
  1089. *cs_chunk_array = kmalloc_array(num_chunks, sizeof(**cs_chunk_array),
  1090. GFP_ATOMIC);
  1091. if (!*cs_chunk_array)
  1092. *cs_chunk_array = kmalloc_array(num_chunks,
  1093. sizeof(**cs_chunk_array), GFP_KERNEL);
  1094. if (!*cs_chunk_array) {
  1095. atomic64_inc(&ctx->cs_counters.out_of_mem_drop_cnt);
  1096. atomic64_inc(&hdev->aggregated_cs_counters.out_of_mem_drop_cnt);
  1097. return -ENOMEM;
  1098. }
  1099. size_to_copy = num_chunks * sizeof(struct hl_cs_chunk);
  1100. if (copy_from_user(*cs_chunk_array, chunks, size_to_copy)) {
  1101. atomic64_inc(&ctx->cs_counters.validation_drop_cnt);
  1102. atomic64_inc(&hdev->aggregated_cs_counters.validation_drop_cnt);
  1103. dev_err(hdev->dev, "Failed to copy cs chunk array from user\n");
  1104. kfree(*cs_chunk_array);
  1105. return -EFAULT;
  1106. }
  1107. return 0;
  1108. }
  1109. static int cs_staged_submission(struct hl_device *hdev, struct hl_cs *cs,
  1110. u64 sequence, u32 flags,
  1111. u32 encaps_signal_handle)
  1112. {
  1113. if (!(flags & HL_CS_FLAGS_STAGED_SUBMISSION))
  1114. return 0;
  1115. cs->staged_last = !!(flags & HL_CS_FLAGS_STAGED_SUBMISSION_LAST);
  1116. cs->staged_first = !!(flags & HL_CS_FLAGS_STAGED_SUBMISSION_FIRST);
  1117. if (cs->staged_first) {
  1118. /* Staged CS sequence is the first CS sequence */
  1119. INIT_LIST_HEAD(&cs->staged_cs_node);
  1120. cs->staged_sequence = cs->sequence;
  1121. if (cs->encaps_signals)
  1122. cs->encaps_sig_hdl_id = encaps_signal_handle;
  1123. } else {
  1124. /* User sequence will be validated in 'hl_hw_queue_schedule_cs'
  1125. * under the cs_mirror_lock
  1126. */
  1127. cs->staged_sequence = sequence;
  1128. }
  1129. /* Increment CS reference if needed */
  1130. staged_cs_get(hdev, cs);
  1131. cs->staged_cs = true;
  1132. return 0;
  1133. }
  1134. static u32 get_stream_master_qid_mask(struct hl_device *hdev, u32 qid)
  1135. {
  1136. int i;
  1137. for (i = 0; i < hdev->stream_master_qid_arr_size; i++)
  1138. if (qid == hdev->stream_master_qid_arr[i])
  1139. return BIT(i);
  1140. return 0;
  1141. }
  1142. static int cs_ioctl_default(struct hl_fpriv *hpriv, void __user *chunks,
  1143. u32 num_chunks, u64 *cs_seq, u32 flags,
  1144. u32 encaps_signals_handle, u32 timeout,
  1145. u16 *signal_initial_sob_count)
  1146. {
  1147. bool staged_mid, int_queues_only = true, using_hw_queues = false;
  1148. struct hl_device *hdev = hpriv->hdev;
  1149. struct hl_cs_chunk *cs_chunk_array;
  1150. struct hl_cs_counters_atomic *cntr;
  1151. struct hl_ctx *ctx = hpriv->ctx;
  1152. struct hl_cs_job *job;
  1153. struct hl_cs *cs;
  1154. struct hl_cb *cb;
  1155. u64 user_sequence;
  1156. u8 stream_master_qid_map = 0;
  1157. int rc, i;
  1158. cntr = &hdev->aggregated_cs_counters;
  1159. user_sequence = *cs_seq;
  1160. *cs_seq = ULLONG_MAX;
  1161. rc = hl_cs_copy_chunk_array(hdev, &cs_chunk_array, chunks, num_chunks,
  1162. hpriv->ctx);
  1163. if (rc)
  1164. goto out;
  1165. if ((flags & HL_CS_FLAGS_STAGED_SUBMISSION) &&
  1166. !(flags & HL_CS_FLAGS_STAGED_SUBMISSION_FIRST))
  1167. staged_mid = true;
  1168. else
  1169. staged_mid = false;
  1170. rc = allocate_cs(hdev, hpriv->ctx, CS_TYPE_DEFAULT,
  1171. staged_mid ? user_sequence : ULLONG_MAX, &cs, flags,
  1172. timeout);
  1173. if (rc)
  1174. goto free_cs_chunk_array;
  1175. *cs_seq = cs->sequence;
  1176. hl_debugfs_add_cs(cs);
  1177. rc = cs_staged_submission(hdev, cs, user_sequence, flags,
  1178. encaps_signals_handle);
  1179. if (rc)
  1180. goto free_cs_object;
  1181. /* If this is a staged submission we must return the staged sequence
  1182. * rather than the internal CS sequence
  1183. */
  1184. if (cs->staged_cs)
  1185. *cs_seq = cs->staged_sequence;
  1186. /* Validate ALL the CS chunks before submitting the CS */
  1187. for (i = 0 ; i < num_chunks ; i++) {
  1188. struct hl_cs_chunk *chunk = &cs_chunk_array[i];
  1189. enum hl_queue_type queue_type;
  1190. bool is_kernel_allocated_cb;
  1191. rc = validate_queue_index(hdev, chunk, &queue_type,
  1192. &is_kernel_allocated_cb);
  1193. if (rc) {
  1194. atomic64_inc(&ctx->cs_counters.validation_drop_cnt);
  1195. atomic64_inc(&cntr->validation_drop_cnt);
  1196. goto free_cs_object;
  1197. }
  1198. if (is_kernel_allocated_cb) {
  1199. cb = get_cb_from_cs_chunk(hdev, &hpriv->mem_mgr, chunk);
  1200. if (!cb) {
  1201. atomic64_inc(
  1202. &ctx->cs_counters.validation_drop_cnt);
  1203. atomic64_inc(&cntr->validation_drop_cnt);
  1204. rc = -EINVAL;
  1205. goto free_cs_object;
  1206. }
  1207. } else {
  1208. cb = (struct hl_cb *) (uintptr_t) chunk->cb_handle;
  1209. }
  1210. if (queue_type == QUEUE_TYPE_EXT ||
  1211. queue_type == QUEUE_TYPE_HW) {
  1212. int_queues_only = false;
  1213. /*
  1214. * store which stream are being used for external/HW
  1215. * queues of this CS
  1216. */
  1217. if (hdev->supports_wait_for_multi_cs)
  1218. stream_master_qid_map |=
  1219. get_stream_master_qid_mask(hdev,
  1220. chunk->queue_index);
  1221. }
  1222. if (queue_type == QUEUE_TYPE_HW)
  1223. using_hw_queues = true;
  1224. job = hl_cs_allocate_job(hdev, queue_type,
  1225. is_kernel_allocated_cb);
  1226. if (!job) {
  1227. atomic64_inc(&ctx->cs_counters.out_of_mem_drop_cnt);
  1228. atomic64_inc(&cntr->out_of_mem_drop_cnt);
  1229. dev_err(hdev->dev, "Failed to allocate a new job\n");
  1230. rc = -ENOMEM;
  1231. if (is_kernel_allocated_cb)
  1232. goto release_cb;
  1233. goto free_cs_object;
  1234. }
  1235. job->id = i + 1;
  1236. job->cs = cs;
  1237. job->user_cb = cb;
  1238. job->user_cb_size = chunk->cb_size;
  1239. job->hw_queue_id = chunk->queue_index;
  1240. cs->jobs_in_queue_cnt[job->hw_queue_id]++;
  1241. cs->jobs_cnt++;
  1242. list_add_tail(&job->cs_node, &cs->job_list);
  1243. /*
  1244. * Increment CS reference. When CS reference is 0, CS is
  1245. * done and can be signaled to user and free all its resources
  1246. * Only increment for JOB on external or H/W queues, because
  1247. * only for those JOBs we get completion
  1248. */
  1249. if (cs_needs_completion(cs) &&
  1250. (job->queue_type == QUEUE_TYPE_EXT ||
  1251. job->queue_type == QUEUE_TYPE_HW))
  1252. cs_get(cs);
  1253. hl_debugfs_add_job(hdev, job);
  1254. rc = cs_parser(hpriv, job);
  1255. if (rc) {
  1256. atomic64_inc(&ctx->cs_counters.parsing_drop_cnt);
  1257. atomic64_inc(&cntr->parsing_drop_cnt);
  1258. dev_err(hdev->dev,
  1259. "Failed to parse JOB %d.%llu.%d, err %d, rejecting the CS\n",
  1260. cs->ctx->asid, cs->sequence, job->id, rc);
  1261. goto free_cs_object;
  1262. }
  1263. }
  1264. /* We allow a CS with any queue type combination as long as it does
  1265. * not get a completion
  1266. */
  1267. if (int_queues_only && cs_needs_completion(cs)) {
  1268. atomic64_inc(&ctx->cs_counters.validation_drop_cnt);
  1269. atomic64_inc(&cntr->validation_drop_cnt);
  1270. dev_err(hdev->dev,
  1271. "Reject CS %d.%llu since it contains only internal queues jobs and needs completion\n",
  1272. cs->ctx->asid, cs->sequence);
  1273. rc = -EINVAL;
  1274. goto free_cs_object;
  1275. }
  1276. if (using_hw_queues)
  1277. INIT_WORK(&cs->finish_work, cs_completion);
  1278. /*
  1279. * store the (external/HW queues) streams used by the CS in the
  1280. * fence object for multi-CS completion
  1281. */
  1282. if (hdev->supports_wait_for_multi_cs)
  1283. cs->fence->stream_master_qid_map = stream_master_qid_map;
  1284. rc = hl_hw_queue_schedule_cs(cs);
  1285. if (rc) {
  1286. if (rc != -EAGAIN)
  1287. dev_err(hdev->dev,
  1288. "Failed to submit CS %d.%llu to H/W queues, error %d\n",
  1289. cs->ctx->asid, cs->sequence, rc);
  1290. goto free_cs_object;
  1291. }
  1292. *signal_initial_sob_count = cs->initial_sob_count;
  1293. rc = HL_CS_STATUS_SUCCESS;
  1294. goto put_cs;
  1295. release_cb:
  1296. atomic_dec(&cb->cs_cnt);
  1297. hl_cb_put(cb);
  1298. free_cs_object:
  1299. cs_rollback(hdev, cs);
  1300. *cs_seq = ULLONG_MAX;
  1301. /* The path below is both for good and erroneous exits */
  1302. put_cs:
  1303. /* We finished with the CS in this function, so put the ref */
  1304. cs_put(cs);
  1305. free_cs_chunk_array:
  1306. kfree(cs_chunk_array);
  1307. out:
  1308. return rc;
  1309. }
  1310. static int hl_cs_ctx_switch(struct hl_fpriv *hpriv, union hl_cs_args *args,
  1311. u64 *cs_seq)
  1312. {
  1313. struct hl_device *hdev = hpriv->hdev;
  1314. struct hl_ctx *ctx = hpriv->ctx;
  1315. bool need_soft_reset = false;
  1316. int rc = 0, do_ctx_switch = 0;
  1317. void __user *chunks;
  1318. u32 num_chunks, tmp;
  1319. u16 sob_count;
  1320. int ret;
  1321. if (hdev->supports_ctx_switch)
  1322. do_ctx_switch = atomic_cmpxchg(&ctx->thread_ctx_switch_token, 1, 0);
  1323. if (do_ctx_switch || (args->in.cs_flags & HL_CS_FLAGS_FORCE_RESTORE)) {
  1324. mutex_lock(&hpriv->restore_phase_mutex);
  1325. if (do_ctx_switch) {
  1326. rc = hdev->asic_funcs->context_switch(hdev, ctx->asid);
  1327. if (rc) {
  1328. dev_err_ratelimited(hdev->dev,
  1329. "Failed to switch to context %d, rejecting CS! %d\n",
  1330. ctx->asid, rc);
  1331. /*
  1332. * If we timedout, or if the device is not IDLE
  1333. * while we want to do context-switch (-EBUSY),
  1334. * we need to soft-reset because QMAN is
  1335. * probably stuck. However, we can't call to
  1336. * reset here directly because of deadlock, so
  1337. * need to do it at the very end of this
  1338. * function
  1339. */
  1340. if ((rc == -ETIMEDOUT) || (rc == -EBUSY))
  1341. need_soft_reset = true;
  1342. mutex_unlock(&hpriv->restore_phase_mutex);
  1343. goto out;
  1344. }
  1345. }
  1346. hdev->asic_funcs->restore_phase_topology(hdev);
  1347. chunks = (void __user *) (uintptr_t) args->in.chunks_restore;
  1348. num_chunks = args->in.num_chunks_restore;
  1349. if (!num_chunks) {
  1350. dev_dbg(hdev->dev,
  1351. "Need to run restore phase but restore CS is empty\n");
  1352. rc = 0;
  1353. } else {
  1354. rc = cs_ioctl_default(hpriv, chunks, num_chunks,
  1355. cs_seq, 0, 0, hdev->timeout_jiffies, &sob_count);
  1356. }
  1357. mutex_unlock(&hpriv->restore_phase_mutex);
  1358. if (rc) {
  1359. dev_err(hdev->dev,
  1360. "Failed to submit restore CS for context %d (%d)\n",
  1361. ctx->asid, rc);
  1362. goto out;
  1363. }
  1364. /* Need to wait for restore completion before execution phase */
  1365. if (num_chunks) {
  1366. enum hl_cs_wait_status status;
  1367. wait_again:
  1368. ret = _hl_cs_wait_ioctl(hdev, ctx,
  1369. jiffies_to_usecs(hdev->timeout_jiffies),
  1370. *cs_seq, &status, NULL);
  1371. if (ret) {
  1372. if (ret == -ERESTARTSYS) {
  1373. usleep_range(100, 200);
  1374. goto wait_again;
  1375. }
  1376. dev_err(hdev->dev,
  1377. "Restore CS for context %d failed to complete %d\n",
  1378. ctx->asid, ret);
  1379. rc = -ENOEXEC;
  1380. goto out;
  1381. }
  1382. }
  1383. if (hdev->supports_ctx_switch)
  1384. ctx->thread_ctx_switch_wait_token = 1;
  1385. } else if (hdev->supports_ctx_switch && !ctx->thread_ctx_switch_wait_token) {
  1386. rc = hl_poll_timeout_memory(hdev,
  1387. &ctx->thread_ctx_switch_wait_token, tmp, (tmp == 1),
  1388. 100, jiffies_to_usecs(hdev->timeout_jiffies), false);
  1389. if (rc == -ETIMEDOUT) {
  1390. dev_err(hdev->dev,
  1391. "context switch phase timeout (%d)\n", tmp);
  1392. goto out;
  1393. }
  1394. }
  1395. out:
  1396. if ((rc == -ETIMEDOUT || rc == -EBUSY) && (need_soft_reset))
  1397. hl_device_reset(hdev, 0);
  1398. return rc;
  1399. }
  1400. /*
  1401. * hl_cs_signal_sob_wraparound_handler: handle SOB value wrapaound case.
  1402. * if the SOB value reaches the max value move to the other SOB reserved
  1403. * to the queue.
  1404. * @hdev: pointer to device structure
  1405. * @q_idx: stream queue index
  1406. * @hw_sob: the H/W SOB used in this signal CS.
  1407. * @count: signals count
  1408. * @encaps_sig: tells whether it's reservation for encaps signals or not.
  1409. *
  1410. * Note that this function must be called while hw_queues_lock is taken.
  1411. */
  1412. int hl_cs_signal_sob_wraparound_handler(struct hl_device *hdev, u32 q_idx,
  1413. struct hl_hw_sob **hw_sob, u32 count, bool encaps_sig)
  1414. {
  1415. struct hl_sync_stream_properties *prop;
  1416. struct hl_hw_sob *sob = *hw_sob, *other_sob;
  1417. u8 other_sob_offset;
  1418. prop = &hdev->kernel_queues[q_idx].sync_stream_prop;
  1419. hw_sob_get(sob);
  1420. /* check for wraparound */
  1421. if (prop->next_sob_val + count >= HL_MAX_SOB_VAL) {
  1422. /*
  1423. * Decrement as we reached the max value.
  1424. * The release function won't be called here as we've
  1425. * just incremented the refcount right before calling this
  1426. * function.
  1427. */
  1428. hw_sob_put_err(sob);
  1429. /*
  1430. * check the other sob value, if it still in use then fail
  1431. * otherwise make the switch
  1432. */
  1433. other_sob_offset = (prop->curr_sob_offset + 1) % HL_RSVD_SOBS;
  1434. other_sob = &prop->hw_sob[other_sob_offset];
  1435. if (kref_read(&other_sob->kref) != 1) {
  1436. dev_err(hdev->dev, "error: Cannot switch SOBs q_idx: %d\n",
  1437. q_idx);
  1438. return -EINVAL;
  1439. }
  1440. /*
  1441. * next_sob_val always points to the next available signal
  1442. * in the sob, so in encaps signals it will be the next one
  1443. * after reserving the required amount.
  1444. */
  1445. if (encaps_sig)
  1446. prop->next_sob_val = count + 1;
  1447. else
  1448. prop->next_sob_val = count;
  1449. /* only two SOBs are currently in use */
  1450. prop->curr_sob_offset = other_sob_offset;
  1451. *hw_sob = other_sob;
  1452. /*
  1453. * check if other_sob needs reset, then do it before using it
  1454. * for the reservation or the next signal cs.
  1455. * we do it here, and for both encaps and regular signal cs
  1456. * cases in order to avoid possible races of two kref_put
  1457. * of the sob which can occur at the same time if we move the
  1458. * sob reset(kref_put) to cs_do_release function.
  1459. * in addition, if we have combination of cs signal and
  1460. * encaps, and at the point we need to reset the sob there was
  1461. * no more reservations and only signal cs keep coming,
  1462. * in such case we need signal_cs to put the refcount and
  1463. * reset the sob.
  1464. */
  1465. if (other_sob->need_reset)
  1466. hw_sob_put(other_sob);
  1467. if (encaps_sig) {
  1468. /* set reset indication for the sob */
  1469. sob->need_reset = true;
  1470. hw_sob_get(other_sob);
  1471. }
  1472. dev_dbg(hdev->dev, "switched to SOB %d, q_idx: %d\n",
  1473. prop->curr_sob_offset, q_idx);
  1474. } else {
  1475. prop->next_sob_val += count;
  1476. }
  1477. return 0;
  1478. }
  1479. static int cs_ioctl_extract_signal_seq(struct hl_device *hdev,
  1480. struct hl_cs_chunk *chunk, u64 *signal_seq, struct hl_ctx *ctx,
  1481. bool encaps_signals)
  1482. {
  1483. u64 *signal_seq_arr = NULL;
  1484. u32 size_to_copy, signal_seq_arr_len;
  1485. int rc = 0;
  1486. if (encaps_signals) {
  1487. *signal_seq = chunk->encaps_signal_seq;
  1488. return 0;
  1489. }
  1490. signal_seq_arr_len = chunk->num_signal_seq_arr;
  1491. /* currently only one signal seq is supported */
  1492. if (signal_seq_arr_len != 1) {
  1493. atomic64_inc(&ctx->cs_counters.validation_drop_cnt);
  1494. atomic64_inc(&hdev->aggregated_cs_counters.validation_drop_cnt);
  1495. dev_err(hdev->dev,
  1496. "Wait for signal CS supports only one signal CS seq\n");
  1497. return -EINVAL;
  1498. }
  1499. signal_seq_arr = kmalloc_array(signal_seq_arr_len,
  1500. sizeof(*signal_seq_arr),
  1501. GFP_ATOMIC);
  1502. if (!signal_seq_arr)
  1503. signal_seq_arr = kmalloc_array(signal_seq_arr_len,
  1504. sizeof(*signal_seq_arr),
  1505. GFP_KERNEL);
  1506. if (!signal_seq_arr) {
  1507. atomic64_inc(&ctx->cs_counters.out_of_mem_drop_cnt);
  1508. atomic64_inc(&hdev->aggregated_cs_counters.out_of_mem_drop_cnt);
  1509. return -ENOMEM;
  1510. }
  1511. size_to_copy = signal_seq_arr_len * sizeof(*signal_seq_arr);
  1512. if (copy_from_user(signal_seq_arr,
  1513. u64_to_user_ptr(chunk->signal_seq_arr),
  1514. size_to_copy)) {
  1515. atomic64_inc(&ctx->cs_counters.validation_drop_cnt);
  1516. atomic64_inc(&hdev->aggregated_cs_counters.validation_drop_cnt);
  1517. dev_err(hdev->dev,
  1518. "Failed to copy signal seq array from user\n");
  1519. rc = -EFAULT;
  1520. goto out;
  1521. }
  1522. /* currently it is guaranteed to have only one signal seq */
  1523. *signal_seq = signal_seq_arr[0];
  1524. out:
  1525. kfree(signal_seq_arr);
  1526. return rc;
  1527. }
  1528. static int cs_ioctl_signal_wait_create_jobs(struct hl_device *hdev,
  1529. struct hl_ctx *ctx, struct hl_cs *cs,
  1530. enum hl_queue_type q_type, u32 q_idx, u32 encaps_signal_offset)
  1531. {
  1532. struct hl_cs_counters_atomic *cntr;
  1533. struct hl_cs_job *job;
  1534. struct hl_cb *cb;
  1535. u32 cb_size;
  1536. cntr = &hdev->aggregated_cs_counters;
  1537. job = hl_cs_allocate_job(hdev, q_type, true);
  1538. if (!job) {
  1539. atomic64_inc(&ctx->cs_counters.out_of_mem_drop_cnt);
  1540. atomic64_inc(&cntr->out_of_mem_drop_cnt);
  1541. dev_err(hdev->dev, "Failed to allocate a new job\n");
  1542. return -ENOMEM;
  1543. }
  1544. if (cs->type == CS_TYPE_WAIT)
  1545. cb_size = hdev->asic_funcs->get_wait_cb_size(hdev);
  1546. else
  1547. cb_size = hdev->asic_funcs->get_signal_cb_size(hdev);
  1548. cb = hl_cb_kernel_create(hdev, cb_size,
  1549. q_type == QUEUE_TYPE_HW && hdev->mmu_enable);
  1550. if (!cb) {
  1551. atomic64_inc(&ctx->cs_counters.out_of_mem_drop_cnt);
  1552. atomic64_inc(&cntr->out_of_mem_drop_cnt);
  1553. kfree(job);
  1554. return -EFAULT;
  1555. }
  1556. job->id = 0;
  1557. job->cs = cs;
  1558. job->user_cb = cb;
  1559. atomic_inc(&job->user_cb->cs_cnt);
  1560. job->user_cb_size = cb_size;
  1561. job->hw_queue_id = q_idx;
  1562. if ((cs->type == CS_TYPE_WAIT || cs->type == CS_TYPE_COLLECTIVE_WAIT)
  1563. && cs->encaps_signals)
  1564. job->encaps_sig_wait_offset = encaps_signal_offset;
  1565. /*
  1566. * No need in parsing, user CB is the patched CB.
  1567. * We call hl_cb_destroy() out of two reasons - we don't need the CB in
  1568. * the CB idr anymore and to decrement its refcount as it was
  1569. * incremented inside hl_cb_kernel_create().
  1570. */
  1571. job->patched_cb = job->user_cb;
  1572. job->job_cb_size = job->user_cb_size;
  1573. hl_cb_destroy(&hdev->kernel_mem_mgr, cb->buf->handle);
  1574. /* increment refcount as for external queues we get completion */
  1575. cs_get(cs);
  1576. cs->jobs_in_queue_cnt[job->hw_queue_id]++;
  1577. cs->jobs_cnt++;
  1578. list_add_tail(&job->cs_node, &cs->job_list);
  1579. hl_debugfs_add_job(hdev, job);
  1580. return 0;
  1581. }
  1582. static int cs_ioctl_reserve_signals(struct hl_fpriv *hpriv,
  1583. u32 q_idx, u32 count,
  1584. u32 *handle_id, u32 *sob_addr,
  1585. u32 *signals_count)
  1586. {
  1587. struct hw_queue_properties *hw_queue_prop;
  1588. struct hl_sync_stream_properties *prop;
  1589. struct hl_device *hdev = hpriv->hdev;
  1590. struct hl_cs_encaps_sig_handle *handle;
  1591. struct hl_encaps_signals_mgr *mgr;
  1592. struct hl_hw_sob *hw_sob;
  1593. int hdl_id;
  1594. int rc = 0;
  1595. if (count >= HL_MAX_SOB_VAL) {
  1596. dev_err(hdev->dev, "signals count(%u) exceeds the max SOB value\n",
  1597. count);
  1598. rc = -EINVAL;
  1599. goto out;
  1600. }
  1601. if (q_idx >= hdev->asic_prop.max_queues) {
  1602. dev_err(hdev->dev, "Queue index %d is invalid\n",
  1603. q_idx);
  1604. rc = -EINVAL;
  1605. goto out;
  1606. }
  1607. hw_queue_prop = &hdev->asic_prop.hw_queues_props[q_idx];
  1608. if (!hw_queue_prop->supports_sync_stream) {
  1609. dev_err(hdev->dev,
  1610. "Queue index %d does not support sync stream operations\n",
  1611. q_idx);
  1612. rc = -EINVAL;
  1613. goto out;
  1614. }
  1615. prop = &hdev->kernel_queues[q_idx].sync_stream_prop;
  1616. handle = kzalloc(sizeof(*handle), GFP_KERNEL);
  1617. if (!handle) {
  1618. rc = -ENOMEM;
  1619. goto out;
  1620. }
  1621. handle->count = count;
  1622. hl_ctx_get(hpriv->ctx);
  1623. handle->ctx = hpriv->ctx;
  1624. mgr = &hpriv->ctx->sig_mgr;
  1625. spin_lock(&mgr->lock);
  1626. hdl_id = idr_alloc(&mgr->handles, handle, 1, 0, GFP_ATOMIC);
  1627. spin_unlock(&mgr->lock);
  1628. if (hdl_id < 0) {
  1629. dev_err(hdev->dev, "Failed to allocate IDR for a new signal reservation\n");
  1630. rc = -EINVAL;
  1631. goto put_ctx;
  1632. }
  1633. handle->id = hdl_id;
  1634. handle->q_idx = q_idx;
  1635. handle->hdev = hdev;
  1636. kref_init(&handle->refcount);
  1637. hdev->asic_funcs->hw_queues_lock(hdev);
  1638. hw_sob = &prop->hw_sob[prop->curr_sob_offset];
  1639. /*
  1640. * Increment the SOB value by count by user request
  1641. * to reserve those signals
  1642. * check if the signals amount to reserve is not exceeding the max sob
  1643. * value, if yes then switch sob.
  1644. */
  1645. rc = hl_cs_signal_sob_wraparound_handler(hdev, q_idx, &hw_sob, count,
  1646. true);
  1647. if (rc) {
  1648. dev_err(hdev->dev, "Failed to switch SOB\n");
  1649. hdev->asic_funcs->hw_queues_unlock(hdev);
  1650. rc = -EINVAL;
  1651. goto remove_idr;
  1652. }
  1653. /* set the hw_sob to the handle after calling the sob wraparound handler
  1654. * since sob could have changed.
  1655. */
  1656. handle->hw_sob = hw_sob;
  1657. /* store the current sob value for unreserve validity check, and
  1658. * signal offset support
  1659. */
  1660. handle->pre_sob_val = prop->next_sob_val - handle->count;
  1661. *signals_count = prop->next_sob_val;
  1662. hdev->asic_funcs->hw_queues_unlock(hdev);
  1663. *sob_addr = handle->hw_sob->sob_addr;
  1664. *handle_id = hdl_id;
  1665. dev_dbg(hdev->dev,
  1666. "Signals reserved, sob_id: %d, sob addr: 0x%x, last sob_val: %u, q_idx: %d, hdl_id: %d\n",
  1667. hw_sob->sob_id, handle->hw_sob->sob_addr,
  1668. prop->next_sob_val - 1, q_idx, hdl_id);
  1669. goto out;
  1670. remove_idr:
  1671. spin_lock(&mgr->lock);
  1672. idr_remove(&mgr->handles, hdl_id);
  1673. spin_unlock(&mgr->lock);
  1674. put_ctx:
  1675. hl_ctx_put(handle->ctx);
  1676. kfree(handle);
  1677. out:
  1678. return rc;
  1679. }
  1680. static int cs_ioctl_unreserve_signals(struct hl_fpriv *hpriv, u32 handle_id)
  1681. {
  1682. struct hl_cs_encaps_sig_handle *encaps_sig_hdl;
  1683. struct hl_sync_stream_properties *prop;
  1684. struct hl_device *hdev = hpriv->hdev;
  1685. struct hl_encaps_signals_mgr *mgr;
  1686. struct hl_hw_sob *hw_sob;
  1687. u32 q_idx, sob_addr;
  1688. int rc = 0;
  1689. mgr = &hpriv->ctx->sig_mgr;
  1690. spin_lock(&mgr->lock);
  1691. encaps_sig_hdl = idr_find(&mgr->handles, handle_id);
  1692. if (encaps_sig_hdl) {
  1693. dev_dbg(hdev->dev, "unreserve signals, handle: %u, SOB:0x%x, count: %u\n",
  1694. handle_id, encaps_sig_hdl->hw_sob->sob_addr,
  1695. encaps_sig_hdl->count);
  1696. hdev->asic_funcs->hw_queues_lock(hdev);
  1697. q_idx = encaps_sig_hdl->q_idx;
  1698. prop = &hdev->kernel_queues[q_idx].sync_stream_prop;
  1699. hw_sob = &prop->hw_sob[prop->curr_sob_offset];
  1700. sob_addr = hdev->asic_funcs->get_sob_addr(hdev, hw_sob->sob_id);
  1701. /* Check if sob_val got out of sync due to other
  1702. * signal submission requests which were handled
  1703. * between the reserve-unreserve calls or SOB switch
  1704. * upon reaching SOB max value.
  1705. */
  1706. if (encaps_sig_hdl->pre_sob_val + encaps_sig_hdl->count
  1707. != prop->next_sob_val ||
  1708. sob_addr != encaps_sig_hdl->hw_sob->sob_addr) {
  1709. dev_err(hdev->dev, "Cannot unreserve signals, SOB val ran out of sync, expected: %u, actual val: %u\n",
  1710. encaps_sig_hdl->pre_sob_val,
  1711. (prop->next_sob_val - encaps_sig_hdl->count));
  1712. hdev->asic_funcs->hw_queues_unlock(hdev);
  1713. rc = -EINVAL;
  1714. goto out;
  1715. }
  1716. /*
  1717. * Decrement the SOB value by count by user request
  1718. * to unreserve those signals
  1719. */
  1720. prop->next_sob_val -= encaps_sig_hdl->count;
  1721. hdev->asic_funcs->hw_queues_unlock(hdev);
  1722. hw_sob_put(hw_sob);
  1723. /* Release the id and free allocated memory of the handle */
  1724. idr_remove(&mgr->handles, handle_id);
  1725. hl_ctx_put(encaps_sig_hdl->ctx);
  1726. kfree(encaps_sig_hdl);
  1727. } else {
  1728. rc = -EINVAL;
  1729. dev_err(hdev->dev, "failed to unreserve signals, cannot find handler\n");
  1730. }
  1731. out:
  1732. spin_unlock(&mgr->lock);
  1733. return rc;
  1734. }
  1735. static int cs_ioctl_signal_wait(struct hl_fpriv *hpriv, enum hl_cs_type cs_type,
  1736. void __user *chunks, u32 num_chunks,
  1737. u64 *cs_seq, u32 flags, u32 timeout,
  1738. u32 *signal_sob_addr_offset, u16 *signal_initial_sob_count)
  1739. {
  1740. struct hl_cs_encaps_sig_handle *encaps_sig_hdl = NULL;
  1741. bool handle_found = false, is_wait_cs = false,
  1742. wait_cs_submitted = false,
  1743. cs_encaps_signals = false;
  1744. struct hl_cs_chunk *cs_chunk_array, *chunk;
  1745. bool staged_cs_with_encaps_signals = false;
  1746. struct hw_queue_properties *hw_queue_prop;
  1747. struct hl_device *hdev = hpriv->hdev;
  1748. struct hl_cs_compl *sig_waitcs_cmpl;
  1749. u32 q_idx, collective_engine_id = 0;
  1750. struct hl_cs_counters_atomic *cntr;
  1751. struct hl_fence *sig_fence = NULL;
  1752. struct hl_ctx *ctx = hpriv->ctx;
  1753. enum hl_queue_type q_type;
  1754. struct hl_cs *cs;
  1755. u64 signal_seq;
  1756. int rc;
  1757. cntr = &hdev->aggregated_cs_counters;
  1758. *cs_seq = ULLONG_MAX;
  1759. rc = hl_cs_copy_chunk_array(hdev, &cs_chunk_array, chunks, num_chunks,
  1760. ctx);
  1761. if (rc)
  1762. goto out;
  1763. /* currently it is guaranteed to have only one chunk */
  1764. chunk = &cs_chunk_array[0];
  1765. if (chunk->queue_index >= hdev->asic_prop.max_queues) {
  1766. atomic64_inc(&ctx->cs_counters.validation_drop_cnt);
  1767. atomic64_inc(&cntr->validation_drop_cnt);
  1768. dev_err(hdev->dev, "Queue index %d is invalid\n",
  1769. chunk->queue_index);
  1770. rc = -EINVAL;
  1771. goto free_cs_chunk_array;
  1772. }
  1773. q_idx = chunk->queue_index;
  1774. hw_queue_prop = &hdev->asic_prop.hw_queues_props[q_idx];
  1775. q_type = hw_queue_prop->type;
  1776. if (!hw_queue_prop->supports_sync_stream) {
  1777. atomic64_inc(&ctx->cs_counters.validation_drop_cnt);
  1778. atomic64_inc(&cntr->validation_drop_cnt);
  1779. dev_err(hdev->dev,
  1780. "Queue index %d does not support sync stream operations\n",
  1781. q_idx);
  1782. rc = -EINVAL;
  1783. goto free_cs_chunk_array;
  1784. }
  1785. if (cs_type == CS_TYPE_COLLECTIVE_WAIT) {
  1786. if (!(hw_queue_prop->collective_mode == HL_COLLECTIVE_MASTER)) {
  1787. atomic64_inc(&ctx->cs_counters.validation_drop_cnt);
  1788. atomic64_inc(&cntr->validation_drop_cnt);
  1789. dev_err(hdev->dev,
  1790. "Queue index %d is invalid\n", q_idx);
  1791. rc = -EINVAL;
  1792. goto free_cs_chunk_array;
  1793. }
  1794. if (!hdev->nic_ports_mask) {
  1795. atomic64_inc(&ctx->cs_counters.validation_drop_cnt);
  1796. atomic64_inc(&cntr->validation_drop_cnt);
  1797. dev_err(hdev->dev,
  1798. "Collective operations not supported when NIC ports are disabled");
  1799. rc = -EINVAL;
  1800. goto free_cs_chunk_array;
  1801. }
  1802. collective_engine_id = chunk->collective_engine_id;
  1803. }
  1804. is_wait_cs = !!(cs_type == CS_TYPE_WAIT ||
  1805. cs_type == CS_TYPE_COLLECTIVE_WAIT);
  1806. cs_encaps_signals = !!(flags & HL_CS_FLAGS_ENCAP_SIGNALS);
  1807. if (is_wait_cs) {
  1808. rc = cs_ioctl_extract_signal_seq(hdev, chunk, &signal_seq,
  1809. ctx, cs_encaps_signals);
  1810. if (rc)
  1811. goto free_cs_chunk_array;
  1812. if (cs_encaps_signals) {
  1813. /* check if cs sequence has encapsulated
  1814. * signals handle
  1815. */
  1816. struct idr *idp;
  1817. u32 id;
  1818. spin_lock(&ctx->sig_mgr.lock);
  1819. idp = &ctx->sig_mgr.handles;
  1820. idr_for_each_entry(idp, encaps_sig_hdl, id) {
  1821. if (encaps_sig_hdl->cs_seq == signal_seq) {
  1822. /* get refcount to protect removing this handle from idr,
  1823. * needed when multiple wait cs are used with offset
  1824. * to wait on reserved encaps signals.
  1825. * Since kref_put of this handle is executed outside the
  1826. * current lock, it is possible that the handle refcount
  1827. * is 0 but it yet to be removed from the list. In this
  1828. * case need to consider the handle as not valid.
  1829. */
  1830. if (kref_get_unless_zero(&encaps_sig_hdl->refcount))
  1831. handle_found = true;
  1832. break;
  1833. }
  1834. }
  1835. spin_unlock(&ctx->sig_mgr.lock);
  1836. if (!handle_found) {
  1837. /* treat as signal CS already finished */
  1838. dev_dbg(hdev->dev, "Cannot find encapsulated signals handle for seq 0x%llx\n",
  1839. signal_seq);
  1840. rc = 0;
  1841. goto free_cs_chunk_array;
  1842. }
  1843. /* validate also the signal offset value */
  1844. if (chunk->encaps_signal_offset >
  1845. encaps_sig_hdl->count) {
  1846. dev_err(hdev->dev, "offset(%u) value exceed max reserved signals count(%u)!\n",
  1847. chunk->encaps_signal_offset,
  1848. encaps_sig_hdl->count);
  1849. rc = -EINVAL;
  1850. goto free_cs_chunk_array;
  1851. }
  1852. }
  1853. sig_fence = hl_ctx_get_fence(ctx, signal_seq);
  1854. if (IS_ERR(sig_fence)) {
  1855. atomic64_inc(&ctx->cs_counters.validation_drop_cnt);
  1856. atomic64_inc(&cntr->validation_drop_cnt);
  1857. dev_err(hdev->dev,
  1858. "Failed to get signal CS with seq 0x%llx\n",
  1859. signal_seq);
  1860. rc = PTR_ERR(sig_fence);
  1861. goto free_cs_chunk_array;
  1862. }
  1863. if (!sig_fence) {
  1864. /* signal CS already finished */
  1865. rc = 0;
  1866. goto free_cs_chunk_array;
  1867. }
  1868. sig_waitcs_cmpl =
  1869. container_of(sig_fence, struct hl_cs_compl, base_fence);
  1870. staged_cs_with_encaps_signals = !!
  1871. (sig_waitcs_cmpl->type == CS_TYPE_DEFAULT &&
  1872. (flags & HL_CS_FLAGS_ENCAP_SIGNALS));
  1873. if (sig_waitcs_cmpl->type != CS_TYPE_SIGNAL &&
  1874. !staged_cs_with_encaps_signals) {
  1875. atomic64_inc(&ctx->cs_counters.validation_drop_cnt);
  1876. atomic64_inc(&cntr->validation_drop_cnt);
  1877. dev_err(hdev->dev,
  1878. "CS seq 0x%llx is not of a signal/encaps-signal CS\n",
  1879. signal_seq);
  1880. hl_fence_put(sig_fence);
  1881. rc = -EINVAL;
  1882. goto free_cs_chunk_array;
  1883. }
  1884. if (completion_done(&sig_fence->completion)) {
  1885. /* signal CS already finished */
  1886. hl_fence_put(sig_fence);
  1887. rc = 0;
  1888. goto free_cs_chunk_array;
  1889. }
  1890. }
  1891. rc = allocate_cs(hdev, ctx, cs_type, ULLONG_MAX, &cs, flags, timeout);
  1892. if (rc) {
  1893. if (is_wait_cs)
  1894. hl_fence_put(sig_fence);
  1895. goto free_cs_chunk_array;
  1896. }
  1897. /*
  1898. * Save the signal CS fence for later initialization right before
  1899. * hanging the wait CS on the queue.
  1900. * for encaps signals case, we save the cs sequence and handle pointer
  1901. * for later initialization.
  1902. */
  1903. if (is_wait_cs) {
  1904. cs->signal_fence = sig_fence;
  1905. /* store the handle pointer, so we don't have to
  1906. * look for it again, later on the flow
  1907. * when we need to set SOB info in hw_queue.
  1908. */
  1909. if (cs->encaps_signals)
  1910. cs->encaps_sig_hdl = encaps_sig_hdl;
  1911. }
  1912. hl_debugfs_add_cs(cs);
  1913. *cs_seq = cs->sequence;
  1914. if (cs_type == CS_TYPE_WAIT || cs_type == CS_TYPE_SIGNAL)
  1915. rc = cs_ioctl_signal_wait_create_jobs(hdev, ctx, cs, q_type,
  1916. q_idx, chunk->encaps_signal_offset);
  1917. else if (cs_type == CS_TYPE_COLLECTIVE_WAIT)
  1918. rc = hdev->asic_funcs->collective_wait_create_jobs(hdev, ctx,
  1919. cs, q_idx, collective_engine_id,
  1920. chunk->encaps_signal_offset);
  1921. else {
  1922. atomic64_inc(&ctx->cs_counters.validation_drop_cnt);
  1923. atomic64_inc(&cntr->validation_drop_cnt);
  1924. rc = -EINVAL;
  1925. }
  1926. if (rc)
  1927. goto free_cs_object;
  1928. if (q_type == QUEUE_TYPE_HW)
  1929. INIT_WORK(&cs->finish_work, cs_completion);
  1930. rc = hl_hw_queue_schedule_cs(cs);
  1931. if (rc) {
  1932. /* In case wait cs failed here, it means the signal cs
  1933. * already completed. we want to free all it's related objects
  1934. * but we don't want to fail the ioctl.
  1935. */
  1936. if (is_wait_cs)
  1937. rc = 0;
  1938. else if (rc != -EAGAIN)
  1939. dev_err(hdev->dev,
  1940. "Failed to submit CS %d.%llu to H/W queues, error %d\n",
  1941. ctx->asid, cs->sequence, rc);
  1942. goto free_cs_object;
  1943. }
  1944. *signal_sob_addr_offset = cs->sob_addr_offset;
  1945. *signal_initial_sob_count = cs->initial_sob_count;
  1946. rc = HL_CS_STATUS_SUCCESS;
  1947. if (is_wait_cs)
  1948. wait_cs_submitted = true;
  1949. goto put_cs;
  1950. free_cs_object:
  1951. cs_rollback(hdev, cs);
  1952. *cs_seq = ULLONG_MAX;
  1953. /* The path below is both for good and erroneous exits */
  1954. put_cs:
  1955. /* We finished with the CS in this function, so put the ref */
  1956. cs_put(cs);
  1957. free_cs_chunk_array:
  1958. if (!wait_cs_submitted && cs_encaps_signals && handle_found &&
  1959. is_wait_cs)
  1960. kref_put(&encaps_sig_hdl->refcount,
  1961. hl_encaps_handle_do_release);
  1962. kfree(cs_chunk_array);
  1963. out:
  1964. return rc;
  1965. }
  1966. static int cs_ioctl_engine_cores(struct hl_fpriv *hpriv, u64 engine_cores,
  1967. u32 num_engine_cores, u32 core_command)
  1968. {
  1969. int rc;
  1970. struct hl_device *hdev = hpriv->hdev;
  1971. void __user *engine_cores_arr;
  1972. u32 *cores;
  1973. if (!num_engine_cores || num_engine_cores > hdev->asic_prop.num_engine_cores) {
  1974. dev_err(hdev->dev, "Number of engine cores %d is invalid\n", num_engine_cores);
  1975. return -EINVAL;
  1976. }
  1977. if (core_command != HL_ENGINE_CORE_RUN && core_command != HL_ENGINE_CORE_HALT) {
  1978. dev_err(hdev->dev, "Engine core command is invalid\n");
  1979. return -EINVAL;
  1980. }
  1981. engine_cores_arr = (void __user *) (uintptr_t) engine_cores;
  1982. cores = kmalloc_array(num_engine_cores, sizeof(u32), GFP_KERNEL);
  1983. if (!cores)
  1984. return -ENOMEM;
  1985. if (copy_from_user(cores, engine_cores_arr, num_engine_cores * sizeof(u32))) {
  1986. dev_err(hdev->dev, "Failed to copy core-ids array from user\n");
  1987. kfree(cores);
  1988. return -EFAULT;
  1989. }
  1990. rc = hdev->asic_funcs->set_engine_cores(hdev, cores, num_engine_cores, core_command);
  1991. kfree(cores);
  1992. return rc;
  1993. }
  1994. int hl_cs_ioctl(struct hl_fpriv *hpriv, void *data)
  1995. {
  1996. union hl_cs_args *args = data;
  1997. enum hl_cs_type cs_type = 0;
  1998. u64 cs_seq = ULONG_MAX;
  1999. void __user *chunks;
  2000. u32 num_chunks, flags, timeout,
  2001. signals_count = 0, sob_addr = 0, handle_id = 0;
  2002. u16 sob_initial_count = 0;
  2003. int rc;
  2004. rc = hl_cs_sanity_checks(hpriv, args);
  2005. if (rc)
  2006. goto out;
  2007. rc = hl_cs_ctx_switch(hpriv, args, &cs_seq);
  2008. if (rc)
  2009. goto out;
  2010. cs_type = hl_cs_get_cs_type(args->in.cs_flags &
  2011. ~HL_CS_FLAGS_FORCE_RESTORE);
  2012. chunks = (void __user *) (uintptr_t) args->in.chunks_execute;
  2013. num_chunks = args->in.num_chunks_execute;
  2014. flags = args->in.cs_flags;
  2015. /* In case this is a staged CS, user should supply the CS sequence */
  2016. if ((flags & HL_CS_FLAGS_STAGED_SUBMISSION) &&
  2017. !(flags & HL_CS_FLAGS_STAGED_SUBMISSION_FIRST))
  2018. cs_seq = args->in.seq;
  2019. timeout = flags & HL_CS_FLAGS_CUSTOM_TIMEOUT
  2020. ? msecs_to_jiffies(args->in.timeout * 1000)
  2021. : hpriv->hdev->timeout_jiffies;
  2022. switch (cs_type) {
  2023. case CS_TYPE_SIGNAL:
  2024. case CS_TYPE_WAIT:
  2025. case CS_TYPE_COLLECTIVE_WAIT:
  2026. rc = cs_ioctl_signal_wait(hpriv, cs_type, chunks, num_chunks,
  2027. &cs_seq, args->in.cs_flags, timeout,
  2028. &sob_addr, &sob_initial_count);
  2029. break;
  2030. case CS_RESERVE_SIGNALS:
  2031. rc = cs_ioctl_reserve_signals(hpriv,
  2032. args->in.encaps_signals_q_idx,
  2033. args->in.encaps_signals_count,
  2034. &handle_id, &sob_addr, &signals_count);
  2035. break;
  2036. case CS_UNRESERVE_SIGNALS:
  2037. rc = cs_ioctl_unreserve_signals(hpriv,
  2038. args->in.encaps_sig_handle_id);
  2039. break;
  2040. case CS_TYPE_ENGINE_CORE:
  2041. rc = cs_ioctl_engine_cores(hpriv, args->in.engine_cores,
  2042. args->in.num_engine_cores, args->in.core_command);
  2043. break;
  2044. default:
  2045. rc = cs_ioctl_default(hpriv, chunks, num_chunks, &cs_seq,
  2046. args->in.cs_flags,
  2047. args->in.encaps_sig_handle_id,
  2048. timeout, &sob_initial_count);
  2049. break;
  2050. }
  2051. out:
  2052. if (rc != -EAGAIN) {
  2053. memset(args, 0, sizeof(*args));
  2054. switch (cs_type) {
  2055. case CS_RESERVE_SIGNALS:
  2056. args->out.handle_id = handle_id;
  2057. args->out.sob_base_addr_offset = sob_addr;
  2058. args->out.count = signals_count;
  2059. break;
  2060. case CS_TYPE_SIGNAL:
  2061. args->out.sob_base_addr_offset = sob_addr;
  2062. args->out.sob_count_before_submission = sob_initial_count;
  2063. args->out.seq = cs_seq;
  2064. break;
  2065. case CS_TYPE_DEFAULT:
  2066. args->out.sob_count_before_submission = sob_initial_count;
  2067. args->out.seq = cs_seq;
  2068. break;
  2069. default:
  2070. args->out.seq = cs_seq;
  2071. break;
  2072. }
  2073. args->out.status = rc;
  2074. }
  2075. return rc;
  2076. }
  2077. static int hl_wait_for_fence(struct hl_ctx *ctx, u64 seq, struct hl_fence *fence,
  2078. enum hl_cs_wait_status *status, u64 timeout_us, s64 *timestamp)
  2079. {
  2080. struct hl_device *hdev = ctx->hdev;
  2081. ktime_t timestamp_kt;
  2082. long completion_rc;
  2083. int rc = 0, error;
  2084. if (IS_ERR(fence)) {
  2085. rc = PTR_ERR(fence);
  2086. if (rc == -EINVAL)
  2087. dev_notice_ratelimited(hdev->dev,
  2088. "Can't wait on CS %llu because current CS is at seq %llu\n",
  2089. seq, ctx->cs_sequence);
  2090. return rc;
  2091. }
  2092. if (!fence) {
  2093. if (!hl_pop_cs_outcome(&ctx->outcome_store, seq, &timestamp_kt, &error)) {
  2094. dev_dbg(hdev->dev,
  2095. "Can't wait on seq %llu because current CS is at seq %llu (Fence is gone)\n",
  2096. seq, ctx->cs_sequence);
  2097. *status = CS_WAIT_STATUS_GONE;
  2098. return 0;
  2099. }
  2100. completion_rc = 1;
  2101. goto report_results;
  2102. }
  2103. if (!timeout_us) {
  2104. completion_rc = completion_done(&fence->completion);
  2105. } else {
  2106. unsigned long timeout;
  2107. timeout = (timeout_us == MAX_SCHEDULE_TIMEOUT) ?
  2108. timeout_us : usecs_to_jiffies(timeout_us);
  2109. completion_rc =
  2110. wait_for_completion_interruptible_timeout(
  2111. &fence->completion, timeout);
  2112. }
  2113. error = fence->error;
  2114. timestamp_kt = fence->timestamp;
  2115. report_results:
  2116. if (completion_rc > 0) {
  2117. *status = CS_WAIT_STATUS_COMPLETED;
  2118. if (timestamp)
  2119. *timestamp = ktime_to_ns(timestamp_kt);
  2120. } else {
  2121. *status = CS_WAIT_STATUS_BUSY;
  2122. }
  2123. if (error == -ETIMEDOUT || error == -EIO)
  2124. rc = error;
  2125. return rc;
  2126. }
  2127. /*
  2128. * hl_cs_poll_fences - iterate CS fences to check for CS completion
  2129. *
  2130. * @mcs_data: multi-CS internal data
  2131. * @mcs_compl: multi-CS completion structure
  2132. *
  2133. * @return 0 on success, otherwise non 0 error code
  2134. *
  2135. * The function iterates on all CS sequence in the list and set bit in
  2136. * completion_bitmap for each completed CS.
  2137. * While iterating, the function sets the stream map of each fence in the fence
  2138. * array in the completion QID stream map to be used by CSs to perform
  2139. * completion to the multi-CS context.
  2140. * This function shall be called after taking context ref
  2141. */
  2142. static int hl_cs_poll_fences(struct multi_cs_data *mcs_data, struct multi_cs_completion *mcs_compl)
  2143. {
  2144. struct hl_fence **fence_ptr = mcs_data->fence_arr;
  2145. struct hl_device *hdev = mcs_data->ctx->hdev;
  2146. int i, rc, arr_len = mcs_data->arr_len;
  2147. u64 *seq_arr = mcs_data->seq_arr;
  2148. ktime_t max_ktime, first_cs_time;
  2149. enum hl_cs_wait_status status;
  2150. memset(fence_ptr, 0, arr_len * sizeof(struct hl_fence *));
  2151. /* get all fences under the same lock */
  2152. rc = hl_ctx_get_fences(mcs_data->ctx, seq_arr, fence_ptr, arr_len);
  2153. if (rc)
  2154. return rc;
  2155. /*
  2156. * re-initialize the completion here to handle 2 possible cases:
  2157. * 1. CS will complete the multi-CS prior clearing the completion. in which
  2158. * case the fence iteration is guaranteed to catch the CS completion.
  2159. * 2. the completion will occur after re-init of the completion.
  2160. * in which case we will wake up immediately in wait_for_completion.
  2161. */
  2162. reinit_completion(&mcs_compl->completion);
  2163. /*
  2164. * set to maximum time to verify timestamp is valid: if at the end
  2165. * this value is maintained- no timestamp was updated
  2166. */
  2167. max_ktime = ktime_set(KTIME_SEC_MAX, 0);
  2168. first_cs_time = max_ktime;
  2169. for (i = 0; i < arr_len; i++, fence_ptr++) {
  2170. struct hl_fence *fence = *fence_ptr;
  2171. /*
  2172. * In order to prevent case where we wait until timeout even though a CS associated
  2173. * with the multi-CS actually completed we do things in the below order:
  2174. * 1. for each fence set it's QID map in the multi-CS completion QID map. This way
  2175. * any CS can, potentially, complete the multi CS for the specific QID (note
  2176. * that once completion is initialized, calling complete* and then wait on the
  2177. * completion will cause it to return at once)
  2178. * 2. only after allowing multi-CS completion for the specific QID we check whether
  2179. * the specific CS already completed (and thus the wait for completion part will
  2180. * be skipped). if the CS not completed it is guaranteed that completing CS will
  2181. * wake up the completion.
  2182. */
  2183. if (fence)
  2184. mcs_compl->stream_master_qid_map |= fence->stream_master_qid_map;
  2185. /*
  2186. * function won't sleep as it is called with timeout 0 (i.e.
  2187. * poll the fence)
  2188. */
  2189. rc = hl_wait_for_fence(mcs_data->ctx, seq_arr[i], fence, &status, 0, NULL);
  2190. if (rc) {
  2191. dev_err(hdev->dev,
  2192. "wait_for_fence error :%d for CS seq %llu\n",
  2193. rc, seq_arr[i]);
  2194. break;
  2195. }
  2196. switch (status) {
  2197. case CS_WAIT_STATUS_BUSY:
  2198. /* CS did not finished, QID to wait on already stored */
  2199. break;
  2200. case CS_WAIT_STATUS_COMPLETED:
  2201. /*
  2202. * Using mcs_handling_done to avoid possibility of mcs_data
  2203. * returns to user indicating CS completed before it finished
  2204. * all of its mcs handling, to avoid race the next time the
  2205. * user waits for mcs.
  2206. * note: when reaching this case fence is definitely not NULL
  2207. * but NULL check was added to overcome static analysis
  2208. */
  2209. if (fence && !fence->mcs_handling_done) {
  2210. /*
  2211. * in case multi CS is completed but MCS handling not done
  2212. * we "complete" the multi CS to prevent it from waiting
  2213. * until time-out and the "multi-CS handling done" will have
  2214. * another chance at the next iteration
  2215. */
  2216. complete_all(&mcs_compl->completion);
  2217. break;
  2218. }
  2219. mcs_data->completion_bitmap |= BIT(i);
  2220. /*
  2221. * For all completed CSs we take the earliest timestamp.
  2222. * For this we have to validate that the timestamp is
  2223. * earliest of all timestamps so far.
  2224. */
  2225. if (fence && mcs_data->update_ts &&
  2226. (ktime_compare(fence->timestamp, first_cs_time) < 0))
  2227. first_cs_time = fence->timestamp;
  2228. break;
  2229. case CS_WAIT_STATUS_GONE:
  2230. mcs_data->update_ts = false;
  2231. mcs_data->gone_cs = true;
  2232. /*
  2233. * It is possible to get an old sequence numbers from user
  2234. * which related to already completed CSs and their fences
  2235. * already gone. In this case, CS set as completed but
  2236. * no need to consider its QID for mcs completion.
  2237. */
  2238. mcs_data->completion_bitmap |= BIT(i);
  2239. break;
  2240. default:
  2241. dev_err(hdev->dev, "Invalid fence status\n");
  2242. return -EINVAL;
  2243. }
  2244. }
  2245. hl_fences_put(mcs_data->fence_arr, arr_len);
  2246. if (mcs_data->update_ts &&
  2247. (ktime_compare(first_cs_time, max_ktime) != 0))
  2248. mcs_data->timestamp = ktime_to_ns(first_cs_time);
  2249. return rc;
  2250. }
  2251. static int _hl_cs_wait_ioctl(struct hl_device *hdev, struct hl_ctx *ctx, u64 timeout_us, u64 seq,
  2252. enum hl_cs_wait_status *status, s64 *timestamp)
  2253. {
  2254. struct hl_fence *fence;
  2255. int rc = 0;
  2256. if (timestamp)
  2257. *timestamp = 0;
  2258. hl_ctx_get(ctx);
  2259. fence = hl_ctx_get_fence(ctx, seq);
  2260. rc = hl_wait_for_fence(ctx, seq, fence, status, timeout_us, timestamp);
  2261. hl_fence_put(fence);
  2262. hl_ctx_put(ctx);
  2263. return rc;
  2264. }
  2265. static inline unsigned long hl_usecs64_to_jiffies(const u64 usecs)
  2266. {
  2267. if (usecs <= U32_MAX)
  2268. return usecs_to_jiffies(usecs);
  2269. /*
  2270. * If the value in nanoseconds is larger than 64 bit, use the largest
  2271. * 64 bit value.
  2272. */
  2273. if (usecs >= ((u64)(U64_MAX / NSEC_PER_USEC)))
  2274. return nsecs_to_jiffies(U64_MAX);
  2275. return nsecs_to_jiffies(usecs * NSEC_PER_USEC);
  2276. }
  2277. /*
  2278. * hl_wait_multi_cs_completion_init - init completion structure
  2279. *
  2280. * @hdev: pointer to habanalabs device structure
  2281. * @stream_master_bitmap: stream master QIDs map, set bit indicates stream
  2282. * master QID to wait on
  2283. *
  2284. * @return valid completion struct pointer on success, otherwise error pointer
  2285. *
  2286. * up to MULTI_CS_MAX_USER_CTX calls can be done concurrently to the driver.
  2287. * the function gets the first available completion (by marking it "used")
  2288. * and initialize its values.
  2289. */
  2290. static struct multi_cs_completion *hl_wait_multi_cs_completion_init(struct hl_device *hdev)
  2291. {
  2292. struct multi_cs_completion *mcs_compl;
  2293. int i;
  2294. /* find free multi_cs completion structure */
  2295. for (i = 0; i < MULTI_CS_MAX_USER_CTX; i++) {
  2296. mcs_compl = &hdev->multi_cs_completion[i];
  2297. spin_lock(&mcs_compl->lock);
  2298. if (!mcs_compl->used) {
  2299. mcs_compl->used = 1;
  2300. mcs_compl->timestamp = 0;
  2301. /*
  2302. * init QID map to 0 to avoid completion by CSs. the actual QID map
  2303. * to multi-CS CSs will be set incrementally at a later stage
  2304. */
  2305. mcs_compl->stream_master_qid_map = 0;
  2306. spin_unlock(&mcs_compl->lock);
  2307. break;
  2308. }
  2309. spin_unlock(&mcs_compl->lock);
  2310. }
  2311. if (i == MULTI_CS_MAX_USER_CTX) {
  2312. dev_err(hdev->dev, "no available multi-CS completion structure\n");
  2313. return ERR_PTR(-ENOMEM);
  2314. }
  2315. return mcs_compl;
  2316. }
  2317. /*
  2318. * hl_wait_multi_cs_completion_fini - return completion structure and set as
  2319. * unused
  2320. *
  2321. * @mcs_compl: pointer to the completion structure
  2322. */
  2323. static void hl_wait_multi_cs_completion_fini(
  2324. struct multi_cs_completion *mcs_compl)
  2325. {
  2326. /*
  2327. * free completion structure, do it under lock to be in-sync with the
  2328. * thread that signals completion
  2329. */
  2330. spin_lock(&mcs_compl->lock);
  2331. mcs_compl->used = 0;
  2332. spin_unlock(&mcs_compl->lock);
  2333. }
  2334. /*
  2335. * hl_wait_multi_cs_completion - wait for first CS to complete
  2336. *
  2337. * @mcs_data: multi-CS internal data
  2338. *
  2339. * @return 0 on success, otherwise non 0 error code
  2340. */
  2341. static int hl_wait_multi_cs_completion(struct multi_cs_data *mcs_data,
  2342. struct multi_cs_completion *mcs_compl)
  2343. {
  2344. long completion_rc;
  2345. completion_rc = wait_for_completion_interruptible_timeout(&mcs_compl->completion,
  2346. mcs_data->timeout_jiffies);
  2347. /* update timestamp */
  2348. if (completion_rc > 0)
  2349. mcs_data->timestamp = mcs_compl->timestamp;
  2350. mcs_data->wait_status = completion_rc;
  2351. return 0;
  2352. }
  2353. /*
  2354. * hl_multi_cs_completion_init - init array of multi-CS completion structures
  2355. *
  2356. * @hdev: pointer to habanalabs device structure
  2357. */
  2358. void hl_multi_cs_completion_init(struct hl_device *hdev)
  2359. {
  2360. struct multi_cs_completion *mcs_cmpl;
  2361. int i;
  2362. for (i = 0; i < MULTI_CS_MAX_USER_CTX; i++) {
  2363. mcs_cmpl = &hdev->multi_cs_completion[i];
  2364. mcs_cmpl->used = 0;
  2365. spin_lock_init(&mcs_cmpl->lock);
  2366. init_completion(&mcs_cmpl->completion);
  2367. }
  2368. }
  2369. /*
  2370. * hl_multi_cs_wait_ioctl - implementation of the multi-CS wait ioctl
  2371. *
  2372. * @hpriv: pointer to the private data of the fd
  2373. * @data: pointer to multi-CS wait ioctl in/out args
  2374. *
  2375. */
  2376. static int hl_multi_cs_wait_ioctl(struct hl_fpriv *hpriv, void *data)
  2377. {
  2378. struct multi_cs_completion *mcs_compl;
  2379. struct hl_device *hdev = hpriv->hdev;
  2380. struct multi_cs_data mcs_data = {};
  2381. union hl_wait_cs_args *args = data;
  2382. struct hl_ctx *ctx = hpriv->ctx;
  2383. struct hl_fence **fence_arr;
  2384. void __user *seq_arr;
  2385. u32 size_to_copy;
  2386. u64 *cs_seq_arr;
  2387. u8 seq_arr_len;
  2388. int rc;
  2389. if (!hdev->supports_wait_for_multi_cs) {
  2390. dev_err(hdev->dev, "Wait for multi CS is not supported\n");
  2391. return -EPERM;
  2392. }
  2393. seq_arr_len = args->in.seq_arr_len;
  2394. if (seq_arr_len > HL_WAIT_MULTI_CS_LIST_MAX_LEN) {
  2395. dev_err(hdev->dev, "Can wait only up to %d CSs, input sequence is of length %u\n",
  2396. HL_WAIT_MULTI_CS_LIST_MAX_LEN, seq_arr_len);
  2397. return -EINVAL;
  2398. }
  2399. /* allocate memory for sequence array */
  2400. cs_seq_arr =
  2401. kmalloc_array(seq_arr_len, sizeof(*cs_seq_arr), GFP_KERNEL);
  2402. if (!cs_seq_arr)
  2403. return -ENOMEM;
  2404. /* copy CS sequence array from user */
  2405. seq_arr = (void __user *) (uintptr_t) args->in.seq;
  2406. size_to_copy = seq_arr_len * sizeof(*cs_seq_arr);
  2407. if (copy_from_user(cs_seq_arr, seq_arr, size_to_copy)) {
  2408. dev_err(hdev->dev, "Failed to copy multi-cs sequence array from user\n");
  2409. rc = -EFAULT;
  2410. goto free_seq_arr;
  2411. }
  2412. /* allocate array for the fences */
  2413. fence_arr = kmalloc_array(seq_arr_len, sizeof(struct hl_fence *), GFP_KERNEL);
  2414. if (!fence_arr) {
  2415. rc = -ENOMEM;
  2416. goto free_seq_arr;
  2417. }
  2418. /* initialize the multi-CS internal data */
  2419. mcs_data.ctx = ctx;
  2420. mcs_data.seq_arr = cs_seq_arr;
  2421. mcs_data.fence_arr = fence_arr;
  2422. mcs_data.arr_len = seq_arr_len;
  2423. hl_ctx_get(ctx);
  2424. /* wait (with timeout) for the first CS to be completed */
  2425. mcs_data.timeout_jiffies = hl_usecs64_to_jiffies(args->in.timeout_us);
  2426. mcs_compl = hl_wait_multi_cs_completion_init(hdev);
  2427. if (IS_ERR(mcs_compl)) {
  2428. rc = PTR_ERR(mcs_compl);
  2429. goto put_ctx;
  2430. }
  2431. /* poll all CS fences, extract timestamp */
  2432. mcs_data.update_ts = true;
  2433. rc = hl_cs_poll_fences(&mcs_data, mcs_compl);
  2434. /*
  2435. * skip wait for CS completion when one of the below is true:
  2436. * - an error on the poll function
  2437. * - one or more CS in the list completed
  2438. * - the user called ioctl with timeout 0
  2439. */
  2440. if (rc || mcs_data.completion_bitmap || !args->in.timeout_us)
  2441. goto completion_fini;
  2442. while (true) {
  2443. rc = hl_wait_multi_cs_completion(&mcs_data, mcs_compl);
  2444. if (rc || (mcs_data.wait_status == 0))
  2445. break;
  2446. /*
  2447. * poll fences once again to update the CS map.
  2448. * no timestamp should be updated this time.
  2449. */
  2450. mcs_data.update_ts = false;
  2451. rc = hl_cs_poll_fences(&mcs_data, mcs_compl);
  2452. if (rc || mcs_data.completion_bitmap)
  2453. break;
  2454. /*
  2455. * if hl_wait_multi_cs_completion returned before timeout (i.e.
  2456. * it got a completion) it either got completed by CS in the multi CS list
  2457. * (in which case the indication will be non empty completion_bitmap) or it
  2458. * got completed by CS submitted to one of the shared stream master but
  2459. * not in the multi CS list (in which case we should wait again but modify
  2460. * the timeout and set timestamp as zero to let a CS related to the current
  2461. * multi-CS set a new, relevant, timestamp)
  2462. */
  2463. mcs_data.timeout_jiffies = mcs_data.wait_status;
  2464. mcs_compl->timestamp = 0;
  2465. }
  2466. completion_fini:
  2467. hl_wait_multi_cs_completion_fini(mcs_compl);
  2468. put_ctx:
  2469. hl_ctx_put(ctx);
  2470. kfree(fence_arr);
  2471. free_seq_arr:
  2472. kfree(cs_seq_arr);
  2473. if (rc)
  2474. return rc;
  2475. if (mcs_data.wait_status == -ERESTARTSYS) {
  2476. dev_err_ratelimited(hdev->dev,
  2477. "user process got signal while waiting for Multi-CS\n");
  2478. return -EINTR;
  2479. }
  2480. /* update output args */
  2481. memset(args, 0, sizeof(*args));
  2482. if (mcs_data.completion_bitmap) {
  2483. args->out.status = HL_WAIT_CS_STATUS_COMPLETED;
  2484. args->out.cs_completion_map = mcs_data.completion_bitmap;
  2485. /* if timestamp not 0- it's valid */
  2486. if (mcs_data.timestamp) {
  2487. args->out.timestamp_nsec = mcs_data.timestamp;
  2488. args->out.flags |= HL_WAIT_CS_STATUS_FLAG_TIMESTAMP_VLD;
  2489. }
  2490. /* update if some CS was gone */
  2491. if (!mcs_data.timestamp)
  2492. args->out.flags |= HL_WAIT_CS_STATUS_FLAG_GONE;
  2493. } else {
  2494. args->out.status = HL_WAIT_CS_STATUS_BUSY;
  2495. }
  2496. return 0;
  2497. }
  2498. static int hl_cs_wait_ioctl(struct hl_fpriv *hpriv, void *data)
  2499. {
  2500. struct hl_device *hdev = hpriv->hdev;
  2501. union hl_wait_cs_args *args = data;
  2502. enum hl_cs_wait_status status;
  2503. u64 seq = args->in.seq;
  2504. s64 timestamp;
  2505. int rc;
  2506. rc = _hl_cs_wait_ioctl(hdev, hpriv->ctx, args->in.timeout_us, seq, &status, &timestamp);
  2507. if (rc == -ERESTARTSYS) {
  2508. dev_err_ratelimited(hdev->dev,
  2509. "user process got signal while waiting for CS handle %llu\n",
  2510. seq);
  2511. return -EINTR;
  2512. }
  2513. memset(args, 0, sizeof(*args));
  2514. if (rc) {
  2515. if (rc == -ETIMEDOUT) {
  2516. dev_err_ratelimited(hdev->dev,
  2517. "CS %llu has timed-out while user process is waiting for it\n",
  2518. seq);
  2519. args->out.status = HL_WAIT_CS_STATUS_TIMEDOUT;
  2520. } else if (rc == -EIO) {
  2521. dev_err_ratelimited(hdev->dev,
  2522. "CS %llu has been aborted while user process is waiting for it\n",
  2523. seq);
  2524. args->out.status = HL_WAIT_CS_STATUS_ABORTED;
  2525. }
  2526. return rc;
  2527. }
  2528. if (timestamp) {
  2529. args->out.flags |= HL_WAIT_CS_STATUS_FLAG_TIMESTAMP_VLD;
  2530. args->out.timestamp_nsec = timestamp;
  2531. }
  2532. switch (status) {
  2533. case CS_WAIT_STATUS_GONE:
  2534. args->out.flags |= HL_WAIT_CS_STATUS_FLAG_GONE;
  2535. fallthrough;
  2536. case CS_WAIT_STATUS_COMPLETED:
  2537. args->out.status = HL_WAIT_CS_STATUS_COMPLETED;
  2538. break;
  2539. case CS_WAIT_STATUS_BUSY:
  2540. default:
  2541. args->out.status = HL_WAIT_CS_STATUS_BUSY;
  2542. break;
  2543. }
  2544. return 0;
  2545. }
  2546. static int ts_buff_get_kernel_ts_record(struct hl_mmap_mem_buf *buf,
  2547. struct hl_cb *cq_cb,
  2548. u64 ts_offset, u64 cq_offset, u64 target_value,
  2549. spinlock_t *wait_list_lock,
  2550. struct hl_user_pending_interrupt **pend)
  2551. {
  2552. struct hl_ts_buff *ts_buff = buf->private;
  2553. struct hl_user_pending_interrupt *requested_offset_record =
  2554. (struct hl_user_pending_interrupt *)ts_buff->kernel_buff_address +
  2555. ts_offset;
  2556. struct hl_user_pending_interrupt *cb_last =
  2557. (struct hl_user_pending_interrupt *)ts_buff->kernel_buff_address +
  2558. (ts_buff->kernel_buff_size / sizeof(struct hl_user_pending_interrupt));
  2559. unsigned long flags, iter_counter = 0;
  2560. u64 current_cq_counter;
  2561. /* Validate ts_offset not exceeding last max */
  2562. if (requested_offset_record >= cb_last) {
  2563. dev_err(buf->mmg->dev, "Ts offset exceeds max CB offset(0x%llx)\n",
  2564. (u64)(uintptr_t)cb_last);
  2565. return -EINVAL;
  2566. }
  2567. start_over:
  2568. spin_lock_irqsave(wait_list_lock, flags);
  2569. /* Unregister only if we didn't reach the target value
  2570. * since in this case there will be no handling in irq context
  2571. * and then it's safe to delete the node out of the interrupt list
  2572. * then re-use it on other interrupt
  2573. */
  2574. if (requested_offset_record->ts_reg_info.in_use) {
  2575. current_cq_counter = *requested_offset_record->cq_kernel_addr;
  2576. if (current_cq_counter < requested_offset_record->cq_target_value) {
  2577. list_del(&requested_offset_record->wait_list_node);
  2578. spin_unlock_irqrestore(wait_list_lock, flags);
  2579. hl_mmap_mem_buf_put(requested_offset_record->ts_reg_info.buf);
  2580. hl_cb_put(requested_offset_record->ts_reg_info.cq_cb);
  2581. dev_dbg(buf->mmg->dev,
  2582. "ts node removed from interrupt list now can re-use\n");
  2583. } else {
  2584. dev_dbg(buf->mmg->dev,
  2585. "ts node in middle of irq handling\n");
  2586. /* irq handling in the middle give it time to finish */
  2587. spin_unlock_irqrestore(wait_list_lock, flags);
  2588. usleep_range(1, 10);
  2589. if (++iter_counter == MAX_TS_ITER_NUM) {
  2590. dev_err(buf->mmg->dev,
  2591. "handling registration interrupt took too long!!\n");
  2592. return -EINVAL;
  2593. }
  2594. goto start_over;
  2595. }
  2596. } else {
  2597. /* Fill up the new registration node info */
  2598. requested_offset_record->ts_reg_info.buf = buf;
  2599. requested_offset_record->ts_reg_info.cq_cb = cq_cb;
  2600. requested_offset_record->ts_reg_info.timestamp_kernel_addr =
  2601. (u64 *) ts_buff->user_buff_address + ts_offset;
  2602. requested_offset_record->cq_kernel_addr =
  2603. (u64 *) cq_cb->kernel_address + cq_offset;
  2604. requested_offset_record->cq_target_value = target_value;
  2605. spin_unlock_irqrestore(wait_list_lock, flags);
  2606. }
  2607. *pend = requested_offset_record;
  2608. dev_dbg(buf->mmg->dev, "Found available node in TS kernel CB %p\n",
  2609. requested_offset_record);
  2610. return 0;
  2611. }
  2612. static int _hl_interrupt_wait_ioctl(struct hl_device *hdev, struct hl_ctx *ctx,
  2613. struct hl_mem_mgr *cb_mmg, struct hl_mem_mgr *mmg,
  2614. u64 timeout_us, u64 cq_counters_handle, u64 cq_counters_offset,
  2615. u64 target_value, struct hl_user_interrupt *interrupt,
  2616. bool register_ts_record, u64 ts_handle, u64 ts_offset,
  2617. u32 *status, u64 *timestamp)
  2618. {
  2619. struct hl_user_pending_interrupt *pend;
  2620. struct hl_mmap_mem_buf *buf;
  2621. struct hl_cb *cq_cb;
  2622. unsigned long timeout, flags;
  2623. long completion_rc;
  2624. int rc = 0;
  2625. timeout = hl_usecs64_to_jiffies(timeout_us);
  2626. hl_ctx_get(ctx);
  2627. cq_cb = hl_cb_get(cb_mmg, cq_counters_handle);
  2628. if (!cq_cb) {
  2629. rc = -EINVAL;
  2630. goto put_ctx;
  2631. }
  2632. /* Validate the cq offset */
  2633. if (((u64 *) cq_cb->kernel_address + cq_counters_offset) >=
  2634. ((u64 *) cq_cb->kernel_address + (cq_cb->size / sizeof(u64)))) {
  2635. rc = -EINVAL;
  2636. goto put_cq_cb;
  2637. }
  2638. if (register_ts_record) {
  2639. dev_dbg(hdev->dev, "Timestamp registration: interrupt id: %u, ts offset: %llu, cq_offset: %llu\n",
  2640. interrupt->interrupt_id, ts_offset, cq_counters_offset);
  2641. buf = hl_mmap_mem_buf_get(mmg, ts_handle);
  2642. if (!buf) {
  2643. rc = -EINVAL;
  2644. goto put_cq_cb;
  2645. }
  2646. /* get ts buffer record */
  2647. rc = ts_buff_get_kernel_ts_record(buf, cq_cb, ts_offset,
  2648. cq_counters_offset, target_value,
  2649. &interrupt->wait_list_lock, &pend);
  2650. if (rc)
  2651. goto put_ts_buff;
  2652. } else {
  2653. pend = kzalloc(sizeof(*pend), GFP_KERNEL);
  2654. if (!pend) {
  2655. rc = -ENOMEM;
  2656. goto put_cq_cb;
  2657. }
  2658. hl_fence_init(&pend->fence, ULONG_MAX);
  2659. pend->cq_kernel_addr = (u64 *) cq_cb->kernel_address + cq_counters_offset;
  2660. pend->cq_target_value = target_value;
  2661. }
  2662. spin_lock_irqsave(&interrupt->wait_list_lock, flags);
  2663. /* We check for completion value as interrupt could have been received
  2664. * before we added the node to the wait list
  2665. */
  2666. if (*pend->cq_kernel_addr >= target_value) {
  2667. if (register_ts_record)
  2668. pend->ts_reg_info.in_use = 0;
  2669. spin_unlock_irqrestore(&interrupt->wait_list_lock, flags);
  2670. *status = HL_WAIT_CS_STATUS_COMPLETED;
  2671. if (register_ts_record) {
  2672. *pend->ts_reg_info.timestamp_kernel_addr = ktime_get_ns();
  2673. goto put_ts_buff;
  2674. } else {
  2675. pend->fence.timestamp = ktime_get();
  2676. goto set_timestamp;
  2677. }
  2678. } else if (!timeout_us) {
  2679. spin_unlock_irqrestore(&interrupt->wait_list_lock, flags);
  2680. *status = HL_WAIT_CS_STATUS_BUSY;
  2681. pend->fence.timestamp = ktime_get();
  2682. goto set_timestamp;
  2683. }
  2684. /* Add pending user interrupt to relevant list for the interrupt
  2685. * handler to monitor.
  2686. * Note that we cannot have sorted list by target value,
  2687. * in order to shorten the list pass loop, since
  2688. * same list could have nodes for different cq counter handle.
  2689. * Note:
  2690. * Mark ts buff offset as in use here in the spinlock protection area
  2691. * to avoid getting in the re-use section in ts_buff_get_kernel_ts_record
  2692. * before adding the node to the list. this scenario might happen when
  2693. * multiple threads are racing on same offset and one thread could
  2694. * set the ts buff in ts_buff_get_kernel_ts_record then the other thread
  2695. * takes over and get to ts_buff_get_kernel_ts_record and then we will try
  2696. * to re-use the same ts buff offset, and will try to delete a non existing
  2697. * node from the list.
  2698. */
  2699. if (register_ts_record)
  2700. pend->ts_reg_info.in_use = 1;
  2701. list_add_tail(&pend->wait_list_node, &interrupt->wait_list_head);
  2702. spin_unlock_irqrestore(&interrupt->wait_list_lock, flags);
  2703. if (register_ts_record) {
  2704. rc = *status = HL_WAIT_CS_STATUS_COMPLETED;
  2705. goto ts_registration_exit;
  2706. }
  2707. /* Wait for interrupt handler to signal completion */
  2708. completion_rc = wait_for_completion_interruptible_timeout(&pend->fence.completion,
  2709. timeout);
  2710. if (completion_rc > 0) {
  2711. *status = HL_WAIT_CS_STATUS_COMPLETED;
  2712. } else {
  2713. if (completion_rc == -ERESTARTSYS) {
  2714. dev_err_ratelimited(hdev->dev,
  2715. "user process got signal while waiting for interrupt ID %d\n",
  2716. interrupt->interrupt_id);
  2717. rc = -EINTR;
  2718. *status = HL_WAIT_CS_STATUS_ABORTED;
  2719. } else {
  2720. if (pend->fence.error == -EIO) {
  2721. dev_err_ratelimited(hdev->dev,
  2722. "interrupt based wait ioctl aborted(error:%d) due to a reset cycle initiated\n",
  2723. pend->fence.error);
  2724. rc = -EIO;
  2725. *status = HL_WAIT_CS_STATUS_ABORTED;
  2726. } else {
  2727. /* The wait has timed-out. We don't know anything beyond that
  2728. * because the workload wasn't submitted through the driver.
  2729. * Therefore, from driver's perspective, the workload is still
  2730. * executing.
  2731. */
  2732. rc = 0;
  2733. *status = HL_WAIT_CS_STATUS_BUSY;
  2734. }
  2735. }
  2736. }
  2737. /*
  2738. * We keep removing the node from list here, and not at the irq handler
  2739. * for completion timeout case. and if it's a registration
  2740. * for ts record, the node will be deleted in the irq handler after
  2741. * we reach the target value.
  2742. */
  2743. spin_lock_irqsave(&interrupt->wait_list_lock, flags);
  2744. list_del(&pend->wait_list_node);
  2745. spin_unlock_irqrestore(&interrupt->wait_list_lock, flags);
  2746. set_timestamp:
  2747. *timestamp = ktime_to_ns(pend->fence.timestamp);
  2748. kfree(pend);
  2749. hl_cb_put(cq_cb);
  2750. ts_registration_exit:
  2751. hl_ctx_put(ctx);
  2752. return rc;
  2753. put_ts_buff:
  2754. hl_mmap_mem_buf_put(buf);
  2755. put_cq_cb:
  2756. hl_cb_put(cq_cb);
  2757. put_ctx:
  2758. hl_ctx_put(ctx);
  2759. return rc;
  2760. }
  2761. static int _hl_interrupt_wait_ioctl_user_addr(struct hl_device *hdev, struct hl_ctx *ctx,
  2762. u64 timeout_us, u64 user_address,
  2763. u64 target_value, struct hl_user_interrupt *interrupt,
  2764. u32 *status,
  2765. u64 *timestamp)
  2766. {
  2767. struct hl_user_pending_interrupt *pend;
  2768. unsigned long timeout, flags;
  2769. u64 completion_value;
  2770. long completion_rc;
  2771. int rc = 0;
  2772. timeout = hl_usecs64_to_jiffies(timeout_us);
  2773. hl_ctx_get(ctx);
  2774. pend = kzalloc(sizeof(*pend), GFP_KERNEL);
  2775. if (!pend) {
  2776. hl_ctx_put(ctx);
  2777. return -ENOMEM;
  2778. }
  2779. hl_fence_init(&pend->fence, ULONG_MAX);
  2780. /* Add pending user interrupt to relevant list for the interrupt
  2781. * handler to monitor
  2782. */
  2783. spin_lock_irqsave(&interrupt->wait_list_lock, flags);
  2784. list_add_tail(&pend->wait_list_node, &interrupt->wait_list_head);
  2785. spin_unlock_irqrestore(&interrupt->wait_list_lock, flags);
  2786. /* We check for completion value as interrupt could have been received
  2787. * before we added the node to the wait list
  2788. */
  2789. if (copy_from_user(&completion_value, u64_to_user_ptr(user_address), 8)) {
  2790. dev_err(hdev->dev, "Failed to copy completion value from user\n");
  2791. rc = -EFAULT;
  2792. goto remove_pending_user_interrupt;
  2793. }
  2794. if (completion_value >= target_value) {
  2795. *status = HL_WAIT_CS_STATUS_COMPLETED;
  2796. /* There was no interrupt, we assume the completion is now. */
  2797. pend->fence.timestamp = ktime_get();
  2798. } else {
  2799. *status = HL_WAIT_CS_STATUS_BUSY;
  2800. }
  2801. if (!timeout_us || (*status == HL_WAIT_CS_STATUS_COMPLETED))
  2802. goto remove_pending_user_interrupt;
  2803. wait_again:
  2804. /* Wait for interrupt handler to signal completion */
  2805. completion_rc = wait_for_completion_interruptible_timeout(&pend->fence.completion,
  2806. timeout);
  2807. /* If timeout did not expire we need to perform the comparison.
  2808. * If comparison fails, keep waiting until timeout expires
  2809. */
  2810. if (completion_rc > 0) {
  2811. spin_lock_irqsave(&interrupt->wait_list_lock, flags);
  2812. /* reinit_completion must be called before we check for user
  2813. * completion value, otherwise, if interrupt is received after
  2814. * the comparison and before the next wait_for_completion,
  2815. * we will reach timeout and fail
  2816. */
  2817. reinit_completion(&pend->fence.completion);
  2818. spin_unlock_irqrestore(&interrupt->wait_list_lock, flags);
  2819. if (copy_from_user(&completion_value, u64_to_user_ptr(user_address), 8)) {
  2820. dev_err(hdev->dev, "Failed to copy completion value from user\n");
  2821. rc = -EFAULT;
  2822. goto remove_pending_user_interrupt;
  2823. }
  2824. if (completion_value >= target_value) {
  2825. *status = HL_WAIT_CS_STATUS_COMPLETED;
  2826. } else if (pend->fence.error) {
  2827. dev_err_ratelimited(hdev->dev,
  2828. "interrupt based wait ioctl aborted(error:%d) due to a reset cycle initiated\n",
  2829. pend->fence.error);
  2830. /* set the command completion status as ABORTED */
  2831. *status = HL_WAIT_CS_STATUS_ABORTED;
  2832. } else {
  2833. timeout = completion_rc;
  2834. goto wait_again;
  2835. }
  2836. } else if (completion_rc == -ERESTARTSYS) {
  2837. dev_err_ratelimited(hdev->dev,
  2838. "user process got signal while waiting for interrupt ID %d\n",
  2839. interrupt->interrupt_id);
  2840. rc = -EINTR;
  2841. } else {
  2842. /* The wait has timed-out. We don't know anything beyond that
  2843. * because the workload wasn't submitted through the driver.
  2844. * Therefore, from driver's perspective, the workload is still
  2845. * executing.
  2846. */
  2847. rc = 0;
  2848. *status = HL_WAIT_CS_STATUS_BUSY;
  2849. }
  2850. remove_pending_user_interrupt:
  2851. spin_lock_irqsave(&interrupt->wait_list_lock, flags);
  2852. list_del(&pend->wait_list_node);
  2853. spin_unlock_irqrestore(&interrupt->wait_list_lock, flags);
  2854. *timestamp = ktime_to_ns(pend->fence.timestamp);
  2855. kfree(pend);
  2856. hl_ctx_put(ctx);
  2857. return rc;
  2858. }
  2859. static int hl_interrupt_wait_ioctl(struct hl_fpriv *hpriv, void *data)
  2860. {
  2861. u16 interrupt_id, first_interrupt, last_interrupt;
  2862. struct hl_device *hdev = hpriv->hdev;
  2863. struct asic_fixed_properties *prop;
  2864. struct hl_user_interrupt *interrupt;
  2865. union hl_wait_cs_args *args = data;
  2866. u32 status = HL_WAIT_CS_STATUS_BUSY;
  2867. u64 timestamp = 0;
  2868. int rc, int_idx;
  2869. prop = &hdev->asic_prop;
  2870. if (!(prop->user_interrupt_count + prop->user_dec_intr_count)) {
  2871. dev_err(hdev->dev, "no user interrupts allowed");
  2872. return -EPERM;
  2873. }
  2874. interrupt_id = FIELD_GET(HL_WAIT_CS_FLAGS_INTERRUPT_MASK, args->in.flags);
  2875. first_interrupt = prop->first_available_user_interrupt;
  2876. last_interrupt = prop->first_available_user_interrupt + prop->user_interrupt_count - 1;
  2877. if (interrupt_id < prop->user_dec_intr_count) {
  2878. /* Check if the requested core is enabled */
  2879. if (!(prop->decoder_enabled_mask & BIT(interrupt_id))) {
  2880. dev_err(hdev->dev, "interrupt on a disabled core(%u) not allowed",
  2881. interrupt_id);
  2882. return -EINVAL;
  2883. }
  2884. interrupt = &hdev->user_interrupt[interrupt_id];
  2885. } else if (interrupt_id >= first_interrupt && interrupt_id <= last_interrupt) {
  2886. int_idx = interrupt_id - first_interrupt + prop->user_dec_intr_count;
  2887. interrupt = &hdev->user_interrupt[int_idx];
  2888. } else if (interrupt_id == HL_COMMON_USER_CQ_INTERRUPT_ID) {
  2889. interrupt = &hdev->common_user_cq_interrupt;
  2890. } else if (interrupt_id == HL_COMMON_DEC_INTERRUPT_ID) {
  2891. interrupt = &hdev->common_decoder_interrupt;
  2892. } else {
  2893. dev_err(hdev->dev, "invalid user interrupt %u", interrupt_id);
  2894. return -EINVAL;
  2895. }
  2896. if (args->in.flags & HL_WAIT_CS_FLAGS_INTERRUPT_KERNEL_CQ)
  2897. rc = _hl_interrupt_wait_ioctl(hdev, hpriv->ctx, &hpriv->mem_mgr, &hpriv->mem_mgr,
  2898. args->in.interrupt_timeout_us, args->in.cq_counters_handle,
  2899. args->in.cq_counters_offset,
  2900. args->in.target, interrupt,
  2901. !!(args->in.flags & HL_WAIT_CS_FLAGS_REGISTER_INTERRUPT),
  2902. args->in.timestamp_handle, args->in.timestamp_offset,
  2903. &status, &timestamp);
  2904. else
  2905. rc = _hl_interrupt_wait_ioctl_user_addr(hdev, hpriv->ctx,
  2906. args->in.interrupt_timeout_us, args->in.addr,
  2907. args->in.target, interrupt, &status,
  2908. &timestamp);
  2909. if (rc)
  2910. return rc;
  2911. memset(args, 0, sizeof(*args));
  2912. args->out.status = status;
  2913. if (timestamp) {
  2914. args->out.timestamp_nsec = timestamp;
  2915. args->out.flags |= HL_WAIT_CS_STATUS_FLAG_TIMESTAMP_VLD;
  2916. }
  2917. return 0;
  2918. }
  2919. int hl_wait_ioctl(struct hl_fpriv *hpriv, void *data)
  2920. {
  2921. union hl_wait_cs_args *args = data;
  2922. u32 flags = args->in.flags;
  2923. int rc;
  2924. /* If the device is not operational, no point in waiting for any command submission or
  2925. * user interrupt
  2926. */
  2927. if (!hl_device_operational(hpriv->hdev, NULL))
  2928. return -EBUSY;
  2929. if (flags & HL_WAIT_CS_FLAGS_INTERRUPT)
  2930. rc = hl_interrupt_wait_ioctl(hpriv, data);
  2931. else if (flags & HL_WAIT_CS_FLAGS_MULTI_CS)
  2932. rc = hl_multi_cs_wait_ioctl(hpriv, data);
  2933. else
  2934. rc = hl_cs_wait_ioctl(hpriv, data);
  2935. return rc;
  2936. }