rts5209.c 7.2 KB

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  1. // SPDX-License-Identifier: GPL-2.0-or-later
  2. /* Driver for Realtek PCI-Express card reader
  3. *
  4. * Copyright(c) 2009-2013 Realtek Semiconductor Corp. All rights reserved.
  5. *
  6. * Author:
  7. * Wei WANG <[email protected]>
  8. */
  9. #include <linux/module.h>
  10. #include <linux/delay.h>
  11. #include <linux/rtsx_pci.h>
  12. #include "rtsx_pcr.h"
  13. static u8 rts5209_get_ic_version(struct rtsx_pcr *pcr)
  14. {
  15. u8 val;
  16. val = rtsx_pci_readb(pcr, 0x1C);
  17. return val & 0x0F;
  18. }
  19. static void rts5209_fetch_vendor_settings(struct rtsx_pcr *pcr)
  20. {
  21. struct pci_dev *pdev = pcr->pci;
  22. u32 reg;
  23. pci_read_config_dword(pdev, PCR_SETTING_REG1, &reg);
  24. pcr_dbg(pcr, "Cfg 0x%x: 0x%x\n", PCR_SETTING_REG1, reg);
  25. if (rts5209_vendor_setting1_valid(reg)) {
  26. if (rts5209_reg_check_ms_pmos(reg))
  27. pcr->flags |= PCR_MS_PMOS;
  28. pcr->aspm_en = rts5209_reg_to_aspm(reg);
  29. }
  30. pci_read_config_dword(pdev, PCR_SETTING_REG2, &reg);
  31. pcr_dbg(pcr, "Cfg 0x%x: 0x%x\n", PCR_SETTING_REG2, reg);
  32. if (rts5209_vendor_setting2_valid(reg)) {
  33. pcr->sd30_drive_sel_1v8 =
  34. rts5209_reg_to_sd30_drive_sel_1v8(reg);
  35. pcr->sd30_drive_sel_3v3 =
  36. rts5209_reg_to_sd30_drive_sel_3v3(reg);
  37. pcr->card_drive_sel = rts5209_reg_to_card_drive_sel(reg);
  38. }
  39. }
  40. static void rts5209_force_power_down(struct rtsx_pcr *pcr, u8 pm_state, bool runtime)
  41. {
  42. rtsx_pci_write_register(pcr, FPDCTL, 0x07, 0x07);
  43. }
  44. static int rts5209_extra_init_hw(struct rtsx_pcr *pcr)
  45. {
  46. rtsx_pci_init_cmd(pcr);
  47. /* Turn off LED */
  48. rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CARD_GPIO, 0xFF, 0x03);
  49. /* Reset ASPM state to default value */
  50. rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, ASPM_FORCE_CTL, 0x3F, 0);
  51. /* Force CLKREQ# PIN to drive 0 to request clock */
  52. rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, PETXCFG, 0x08, 0x08);
  53. /* Configure GPIO as output */
  54. rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CARD_GPIO_DIR, 0xFF, 0x03);
  55. /* Configure driving */
  56. rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD30_DRIVE_SEL,
  57. 0xFF, pcr->sd30_drive_sel_3v3);
  58. return rtsx_pci_send_cmd(pcr, 100);
  59. }
  60. static int rts5209_optimize_phy(struct rtsx_pcr *pcr)
  61. {
  62. return rtsx_pci_write_phy_register(pcr, 0x00, 0xB966);
  63. }
  64. static int rts5209_turn_on_led(struct rtsx_pcr *pcr)
  65. {
  66. return rtsx_pci_write_register(pcr, CARD_GPIO, 0x01, 0x00);
  67. }
  68. static int rts5209_turn_off_led(struct rtsx_pcr *pcr)
  69. {
  70. return rtsx_pci_write_register(pcr, CARD_GPIO, 0x01, 0x01);
  71. }
  72. static int rts5209_enable_auto_blink(struct rtsx_pcr *pcr)
  73. {
  74. return rtsx_pci_write_register(pcr, CARD_AUTO_BLINK, 0xFF, 0x0D);
  75. }
  76. static int rts5209_disable_auto_blink(struct rtsx_pcr *pcr)
  77. {
  78. return rtsx_pci_write_register(pcr, CARD_AUTO_BLINK, 0x08, 0x00);
  79. }
  80. static int rts5209_card_power_on(struct rtsx_pcr *pcr, int card)
  81. {
  82. int err;
  83. u8 pwr_mask, partial_pwr_on, pwr_on;
  84. pwr_mask = SD_POWER_MASK;
  85. partial_pwr_on = SD_PARTIAL_POWER_ON;
  86. pwr_on = SD_POWER_ON;
  87. if ((pcr->flags & PCR_MS_PMOS) && (card == RTSX_MS_CARD)) {
  88. pwr_mask = MS_POWER_MASK;
  89. partial_pwr_on = MS_PARTIAL_POWER_ON;
  90. pwr_on = MS_POWER_ON;
  91. }
  92. rtsx_pci_init_cmd(pcr);
  93. rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CARD_PWR_CTL,
  94. pwr_mask, partial_pwr_on);
  95. rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, PWR_GATE_CTRL,
  96. LDO3318_PWR_MASK, 0x04);
  97. err = rtsx_pci_send_cmd(pcr, 100);
  98. if (err < 0)
  99. return err;
  100. /* To avoid too large in-rush current */
  101. udelay(150);
  102. rtsx_pci_init_cmd(pcr);
  103. rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CARD_PWR_CTL, pwr_mask, pwr_on);
  104. rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, PWR_GATE_CTRL,
  105. LDO3318_PWR_MASK, 0x00);
  106. return rtsx_pci_send_cmd(pcr, 100);
  107. }
  108. static int rts5209_card_power_off(struct rtsx_pcr *pcr, int card)
  109. {
  110. u8 pwr_mask, pwr_off;
  111. pwr_mask = SD_POWER_MASK;
  112. pwr_off = SD_POWER_OFF;
  113. if ((pcr->flags & PCR_MS_PMOS) && (card == RTSX_MS_CARD)) {
  114. pwr_mask = MS_POWER_MASK;
  115. pwr_off = MS_POWER_OFF;
  116. }
  117. rtsx_pci_init_cmd(pcr);
  118. rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CARD_PWR_CTL,
  119. pwr_mask | PMOS_STRG_MASK, pwr_off | PMOS_STRG_400mA);
  120. rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, PWR_GATE_CTRL,
  121. LDO3318_PWR_MASK, 0x06);
  122. return rtsx_pci_send_cmd(pcr, 100);
  123. }
  124. static int rts5209_switch_output_voltage(struct rtsx_pcr *pcr, u8 voltage)
  125. {
  126. int err;
  127. if (voltage == OUTPUT_3V3) {
  128. err = rtsx_pci_write_register(pcr,
  129. SD30_DRIVE_SEL, 0x07, pcr->sd30_drive_sel_3v3);
  130. if (err < 0)
  131. return err;
  132. err = rtsx_pci_write_phy_register(pcr, 0x08, 0x4FC0 | 0x24);
  133. if (err < 0)
  134. return err;
  135. } else if (voltage == OUTPUT_1V8) {
  136. err = rtsx_pci_write_register(pcr,
  137. SD30_DRIVE_SEL, 0x07, pcr->sd30_drive_sel_1v8);
  138. if (err < 0)
  139. return err;
  140. err = rtsx_pci_write_phy_register(pcr, 0x08, 0x4C40 | 0x24);
  141. if (err < 0)
  142. return err;
  143. } else {
  144. return -EINVAL;
  145. }
  146. return 0;
  147. }
  148. static const struct pcr_ops rts5209_pcr_ops = {
  149. .fetch_vendor_settings = rts5209_fetch_vendor_settings,
  150. .extra_init_hw = rts5209_extra_init_hw,
  151. .optimize_phy = rts5209_optimize_phy,
  152. .turn_on_led = rts5209_turn_on_led,
  153. .turn_off_led = rts5209_turn_off_led,
  154. .enable_auto_blink = rts5209_enable_auto_blink,
  155. .disable_auto_blink = rts5209_disable_auto_blink,
  156. .card_power_on = rts5209_card_power_on,
  157. .card_power_off = rts5209_card_power_off,
  158. .switch_output_voltage = rts5209_switch_output_voltage,
  159. .cd_deglitch = NULL,
  160. .conv_clk_and_div_n = NULL,
  161. .force_power_down = rts5209_force_power_down,
  162. };
  163. /* SD Pull Control Enable:
  164. * SD_DAT[3:0] ==> pull up
  165. * SD_CD ==> pull up
  166. * SD_WP ==> pull up
  167. * SD_CMD ==> pull up
  168. * SD_CLK ==> pull down
  169. */
  170. static const u32 rts5209_sd_pull_ctl_enable_tbl[] = {
  171. RTSX_REG_PAIR(CARD_PULL_CTL1, 0xAA),
  172. RTSX_REG_PAIR(CARD_PULL_CTL2, 0xAA),
  173. RTSX_REG_PAIR(CARD_PULL_CTL3, 0xE9),
  174. 0,
  175. };
  176. /* SD Pull Control Disable:
  177. * SD_DAT[3:0] ==> pull down
  178. * SD_CD ==> pull up
  179. * SD_WP ==> pull down
  180. * SD_CMD ==> pull down
  181. * SD_CLK ==> pull down
  182. */
  183. static const u32 rts5209_sd_pull_ctl_disable_tbl[] = {
  184. RTSX_REG_PAIR(CARD_PULL_CTL1, 0x55),
  185. RTSX_REG_PAIR(CARD_PULL_CTL2, 0x55),
  186. RTSX_REG_PAIR(CARD_PULL_CTL3, 0xD5),
  187. 0,
  188. };
  189. /* MS Pull Control Enable:
  190. * MS CD ==> pull up
  191. * others ==> pull down
  192. */
  193. static const u32 rts5209_ms_pull_ctl_enable_tbl[] = {
  194. RTSX_REG_PAIR(CARD_PULL_CTL4, 0x55),
  195. RTSX_REG_PAIR(CARD_PULL_CTL5, 0x55),
  196. RTSX_REG_PAIR(CARD_PULL_CTL6, 0x15),
  197. 0,
  198. };
  199. /* MS Pull Control Disable:
  200. * MS CD ==> pull up
  201. * others ==> pull down
  202. */
  203. static const u32 rts5209_ms_pull_ctl_disable_tbl[] = {
  204. RTSX_REG_PAIR(CARD_PULL_CTL4, 0x55),
  205. RTSX_REG_PAIR(CARD_PULL_CTL5, 0x55),
  206. RTSX_REG_PAIR(CARD_PULL_CTL6, 0x15),
  207. 0,
  208. };
  209. void rts5209_init_params(struct rtsx_pcr *pcr)
  210. {
  211. pcr->extra_caps = EXTRA_CAPS_SD_SDR50 |
  212. EXTRA_CAPS_SD_SDR104 | EXTRA_CAPS_MMC_8BIT;
  213. pcr->num_slots = 2;
  214. pcr->ops = &rts5209_pcr_ops;
  215. pcr->flags = 0;
  216. pcr->card_drive_sel = RTS5209_CARD_DRIVE_DEFAULT;
  217. pcr->sd30_drive_sel_1v8 = DRIVER_TYPE_B;
  218. pcr->sd30_drive_sel_3v3 = DRIVER_TYPE_D;
  219. pcr->aspm_en = ASPM_L1_EN;
  220. pcr->aspm_mode = ASPM_MODE_CFG;
  221. pcr->tx_initial_phase = SET_CLOCK_PHASE(27, 27, 16);
  222. pcr->rx_initial_phase = SET_CLOCK_PHASE(24, 6, 5);
  223. pcr->ic_version = rts5209_get_ic_version(pcr);
  224. pcr->sd_pull_ctl_enable_tbl = rts5209_sd_pull_ctl_enable_tbl;
  225. pcr->sd_pull_ctl_disable_tbl = rts5209_sd_pull_ctl_disable_tbl;
  226. pcr->ms_pull_ctl_enable_tbl = rts5209_ms_pull_ctl_enable_tbl;
  227. pcr->ms_pull_ctl_disable_tbl = rts5209_ms_pull_ctl_disable_tbl;
  228. }