t7l66xb.c 10 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. *
  4. * Toshiba T7L66XB core mfd support
  5. *
  6. * Copyright (c) 2005, 2007, 2008 Ian Molton
  7. * Copyright (c) 2008 Dmitry Baryshkov
  8. *
  9. * T7L66 features:
  10. *
  11. * Supported in this driver:
  12. * SD/MMC
  13. * SM/NAND flash controller
  14. *
  15. * As yet not supported
  16. * GPIO interface (on NAND pins)
  17. * Serial interface
  18. * TFT 'interface converter'
  19. * PCMCIA interface logic
  20. */
  21. #include <linux/kernel.h>
  22. #include <linux/module.h>
  23. #include <linux/err.h>
  24. #include <linux/io.h>
  25. #include <linux/slab.h>
  26. #include <linux/irq.h>
  27. #include <linux/clk.h>
  28. #include <linux/platform_device.h>
  29. #include <linux/mfd/core.h>
  30. #include <linux/mfd/tmio.h>
  31. #include <linux/mfd/t7l66xb.h>
  32. enum {
  33. T7L66XB_CELL_NAND,
  34. T7L66XB_CELL_MMC,
  35. };
  36. static const struct resource t7l66xb_mmc_resources[] = {
  37. DEFINE_RES_MEM(0x800, 0x200),
  38. DEFINE_RES_IRQ(IRQ_T7L66XB_MMC)
  39. };
  40. #define SCR_REVID 0x08 /* b Revision ID */
  41. #define SCR_IMR 0x42 /* b Interrupt Mask */
  42. #define SCR_DEV_CTL 0xe0 /* b Device control */
  43. #define SCR_ISR 0xe1 /* b Interrupt Status */
  44. #define SCR_GPO_OC 0xf0 /* b GPO output control */
  45. #define SCR_GPO_OS 0xf1 /* b GPO output enable */
  46. #define SCR_GPI_S 0xf2 /* w GPI status */
  47. #define SCR_APDC 0xf8 /* b Active pullup down ctrl */
  48. #define SCR_DEV_CTL_USB BIT(0) /* USB enable */
  49. #define SCR_DEV_CTL_MMC BIT(1) /* MMC enable */
  50. /*--------------------------------------------------------------------------*/
  51. struct t7l66xb {
  52. void __iomem *scr;
  53. /* Lock to protect registers requiring read/modify/write ops. */
  54. raw_spinlock_t lock;
  55. struct resource rscr;
  56. struct clk *clk48m;
  57. struct clk *clk32k;
  58. int irq;
  59. int irq_base;
  60. };
  61. /*--------------------------------------------------------------------------*/
  62. static int t7l66xb_mmc_enable(struct platform_device *mmc)
  63. {
  64. struct t7l66xb *t7l66xb = dev_get_drvdata(mmc->dev.parent);
  65. unsigned long flags;
  66. u8 dev_ctl;
  67. int ret;
  68. ret = clk_prepare_enable(t7l66xb->clk32k);
  69. if (ret)
  70. return ret;
  71. raw_spin_lock_irqsave(&t7l66xb->lock, flags);
  72. dev_ctl = tmio_ioread8(t7l66xb->scr + SCR_DEV_CTL);
  73. dev_ctl |= SCR_DEV_CTL_MMC;
  74. tmio_iowrite8(dev_ctl, t7l66xb->scr + SCR_DEV_CTL);
  75. raw_spin_unlock_irqrestore(&t7l66xb->lock, flags);
  76. tmio_core_mmc_enable(t7l66xb->scr + 0x200, 0,
  77. t7l66xb_mmc_resources[0].start & 0xfffe);
  78. return 0;
  79. }
  80. static int t7l66xb_mmc_disable(struct platform_device *mmc)
  81. {
  82. struct t7l66xb *t7l66xb = dev_get_drvdata(mmc->dev.parent);
  83. unsigned long flags;
  84. u8 dev_ctl;
  85. raw_spin_lock_irqsave(&t7l66xb->lock, flags);
  86. dev_ctl = tmio_ioread8(t7l66xb->scr + SCR_DEV_CTL);
  87. dev_ctl &= ~SCR_DEV_CTL_MMC;
  88. tmio_iowrite8(dev_ctl, t7l66xb->scr + SCR_DEV_CTL);
  89. raw_spin_unlock_irqrestore(&t7l66xb->lock, flags);
  90. clk_disable_unprepare(t7l66xb->clk32k);
  91. return 0;
  92. }
  93. static void t7l66xb_mmc_pwr(struct platform_device *mmc, int state)
  94. {
  95. struct t7l66xb *t7l66xb = dev_get_drvdata(mmc->dev.parent);
  96. tmio_core_mmc_pwr(t7l66xb->scr + 0x200, 0, state);
  97. }
  98. static void t7l66xb_mmc_clk_div(struct platform_device *mmc, int state)
  99. {
  100. struct t7l66xb *t7l66xb = dev_get_drvdata(mmc->dev.parent);
  101. tmio_core_mmc_clk_div(t7l66xb->scr + 0x200, 0, state);
  102. }
  103. /*--------------------------------------------------------------------------*/
  104. static struct tmio_mmc_data t7166xb_mmc_data = {
  105. .hclk = 24000000,
  106. .set_pwr = t7l66xb_mmc_pwr,
  107. .set_clk_div = t7l66xb_mmc_clk_div,
  108. };
  109. static const struct resource t7l66xb_nand_resources[] = {
  110. {
  111. .start = 0xc00,
  112. .end = 0xc07,
  113. .flags = IORESOURCE_MEM,
  114. },
  115. {
  116. .start = 0x0100,
  117. .end = 0x01ff,
  118. .flags = IORESOURCE_MEM,
  119. },
  120. {
  121. .start = IRQ_T7L66XB_NAND,
  122. .end = IRQ_T7L66XB_NAND,
  123. .flags = IORESOURCE_IRQ,
  124. },
  125. };
  126. static struct mfd_cell t7l66xb_cells[] = {
  127. [T7L66XB_CELL_MMC] = {
  128. .name = "tmio-mmc",
  129. .enable = t7l66xb_mmc_enable,
  130. .disable = t7l66xb_mmc_disable,
  131. .platform_data = &t7166xb_mmc_data,
  132. .pdata_size = sizeof(t7166xb_mmc_data),
  133. .num_resources = ARRAY_SIZE(t7l66xb_mmc_resources),
  134. .resources = t7l66xb_mmc_resources,
  135. },
  136. [T7L66XB_CELL_NAND] = {
  137. .name = "tmio-nand",
  138. .num_resources = ARRAY_SIZE(t7l66xb_nand_resources),
  139. .resources = t7l66xb_nand_resources,
  140. },
  141. };
  142. /*--------------------------------------------------------------------------*/
  143. /* Handle the T7L66XB interrupt mux */
  144. static void t7l66xb_irq(struct irq_desc *desc)
  145. {
  146. struct t7l66xb *t7l66xb = irq_desc_get_handler_data(desc);
  147. unsigned int isr;
  148. unsigned int i, irq_base;
  149. irq_base = t7l66xb->irq_base;
  150. while ((isr = tmio_ioread8(t7l66xb->scr + SCR_ISR) &
  151. ~tmio_ioread8(t7l66xb->scr + SCR_IMR)))
  152. for (i = 0; i < T7L66XB_NR_IRQS; i++)
  153. if (isr & (1 << i))
  154. generic_handle_irq(irq_base + i);
  155. }
  156. static void t7l66xb_irq_mask(struct irq_data *data)
  157. {
  158. struct t7l66xb *t7l66xb = irq_data_get_irq_chip_data(data);
  159. unsigned long flags;
  160. u8 imr;
  161. raw_spin_lock_irqsave(&t7l66xb->lock, flags);
  162. imr = tmio_ioread8(t7l66xb->scr + SCR_IMR);
  163. imr |= 1 << (data->irq - t7l66xb->irq_base);
  164. tmio_iowrite8(imr, t7l66xb->scr + SCR_IMR);
  165. raw_spin_unlock_irqrestore(&t7l66xb->lock, flags);
  166. }
  167. static void t7l66xb_irq_unmask(struct irq_data *data)
  168. {
  169. struct t7l66xb *t7l66xb = irq_data_get_irq_chip_data(data);
  170. unsigned long flags;
  171. u8 imr;
  172. raw_spin_lock_irqsave(&t7l66xb->lock, flags);
  173. imr = tmio_ioread8(t7l66xb->scr + SCR_IMR);
  174. imr &= ~(1 << (data->irq - t7l66xb->irq_base));
  175. tmio_iowrite8(imr, t7l66xb->scr + SCR_IMR);
  176. raw_spin_unlock_irqrestore(&t7l66xb->lock, flags);
  177. }
  178. static struct irq_chip t7l66xb_chip = {
  179. .name = "t7l66xb",
  180. .irq_ack = t7l66xb_irq_mask,
  181. .irq_mask = t7l66xb_irq_mask,
  182. .irq_unmask = t7l66xb_irq_unmask,
  183. };
  184. /*--------------------------------------------------------------------------*/
  185. /* Install the IRQ handler */
  186. static void t7l66xb_attach_irq(struct platform_device *dev)
  187. {
  188. struct t7l66xb *t7l66xb = platform_get_drvdata(dev);
  189. unsigned int irq, irq_base;
  190. irq_base = t7l66xb->irq_base;
  191. for (irq = irq_base; irq < irq_base + T7L66XB_NR_IRQS; irq++) {
  192. irq_set_chip_and_handler(irq, &t7l66xb_chip, handle_level_irq);
  193. irq_set_chip_data(irq, t7l66xb);
  194. }
  195. irq_set_irq_type(t7l66xb->irq, IRQ_TYPE_EDGE_FALLING);
  196. irq_set_chained_handler_and_data(t7l66xb->irq, t7l66xb_irq, t7l66xb);
  197. }
  198. static void t7l66xb_detach_irq(struct platform_device *dev)
  199. {
  200. struct t7l66xb *t7l66xb = platform_get_drvdata(dev);
  201. unsigned int irq, irq_base;
  202. irq_base = t7l66xb->irq_base;
  203. irq_set_chained_handler_and_data(t7l66xb->irq, NULL, NULL);
  204. for (irq = irq_base; irq < irq_base + T7L66XB_NR_IRQS; irq++) {
  205. irq_set_chip(irq, NULL);
  206. irq_set_chip_data(irq, NULL);
  207. }
  208. }
  209. /*--------------------------------------------------------------------------*/
  210. #ifdef CONFIG_PM
  211. static int t7l66xb_suspend(struct platform_device *dev, pm_message_t state)
  212. {
  213. struct t7l66xb *t7l66xb = platform_get_drvdata(dev);
  214. struct t7l66xb_platform_data *pdata = dev_get_platdata(&dev->dev);
  215. if (pdata && pdata->suspend)
  216. pdata->suspend(dev);
  217. clk_disable_unprepare(t7l66xb->clk48m);
  218. return 0;
  219. }
  220. static int t7l66xb_resume(struct platform_device *dev)
  221. {
  222. struct t7l66xb *t7l66xb = platform_get_drvdata(dev);
  223. struct t7l66xb_platform_data *pdata = dev_get_platdata(&dev->dev);
  224. int ret;
  225. ret = clk_prepare_enable(t7l66xb->clk48m);
  226. if (ret)
  227. return ret;
  228. if (pdata && pdata->resume)
  229. pdata->resume(dev);
  230. tmio_core_mmc_enable(t7l66xb->scr + 0x200, 0,
  231. t7l66xb_mmc_resources[0].start & 0xfffe);
  232. return 0;
  233. }
  234. #else
  235. #define t7l66xb_suspend NULL
  236. #define t7l66xb_resume NULL
  237. #endif
  238. /*--------------------------------------------------------------------------*/
  239. static int t7l66xb_probe(struct platform_device *dev)
  240. {
  241. struct t7l66xb_platform_data *pdata = dev_get_platdata(&dev->dev);
  242. struct t7l66xb *t7l66xb;
  243. struct resource *iomem, *rscr;
  244. int ret;
  245. if (!pdata)
  246. return -EINVAL;
  247. iomem = platform_get_resource(dev, IORESOURCE_MEM, 0);
  248. if (!iomem)
  249. return -EINVAL;
  250. t7l66xb = kzalloc(sizeof *t7l66xb, GFP_KERNEL);
  251. if (!t7l66xb)
  252. return -ENOMEM;
  253. raw_spin_lock_init(&t7l66xb->lock);
  254. platform_set_drvdata(dev, t7l66xb);
  255. ret = platform_get_irq(dev, 0);
  256. if (ret >= 0)
  257. t7l66xb->irq = ret;
  258. else
  259. goto err_noirq;
  260. t7l66xb->irq_base = pdata->irq_base;
  261. t7l66xb->clk32k = clk_get(&dev->dev, "CLK_CK32K");
  262. if (IS_ERR(t7l66xb->clk32k)) {
  263. ret = PTR_ERR(t7l66xb->clk32k);
  264. goto err_clk32k_get;
  265. }
  266. t7l66xb->clk48m = clk_get(&dev->dev, "CLK_CK48M");
  267. if (IS_ERR(t7l66xb->clk48m)) {
  268. ret = PTR_ERR(t7l66xb->clk48m);
  269. goto err_clk48m_get;
  270. }
  271. rscr = &t7l66xb->rscr;
  272. rscr->name = "t7l66xb-core";
  273. rscr->start = iomem->start;
  274. rscr->end = iomem->start + 0xff;
  275. rscr->flags = IORESOURCE_MEM;
  276. ret = request_resource(iomem, rscr);
  277. if (ret)
  278. goto err_request_scr;
  279. t7l66xb->scr = ioremap(rscr->start, resource_size(rscr));
  280. if (!t7l66xb->scr) {
  281. ret = -ENOMEM;
  282. goto err_ioremap;
  283. }
  284. ret = clk_prepare_enable(t7l66xb->clk48m);
  285. if (ret)
  286. goto err_clk_enable;
  287. if (pdata->enable)
  288. pdata->enable(dev);
  289. /* Mask all interrupts */
  290. tmio_iowrite8(0xbf, t7l66xb->scr + SCR_IMR);
  291. printk(KERN_INFO "%s rev %d @ 0x%08lx, irq %d\n",
  292. dev->name, tmio_ioread8(t7l66xb->scr + SCR_REVID),
  293. (unsigned long)iomem->start, t7l66xb->irq);
  294. t7l66xb_attach_irq(dev);
  295. t7l66xb_cells[T7L66XB_CELL_NAND].platform_data = pdata->nand_data;
  296. t7l66xb_cells[T7L66XB_CELL_NAND].pdata_size = sizeof(*pdata->nand_data);
  297. ret = mfd_add_devices(&dev->dev, dev->id,
  298. t7l66xb_cells, ARRAY_SIZE(t7l66xb_cells),
  299. iomem, t7l66xb->irq_base, NULL);
  300. if (!ret)
  301. return 0;
  302. t7l66xb_detach_irq(dev);
  303. clk_disable_unprepare(t7l66xb->clk48m);
  304. err_clk_enable:
  305. iounmap(t7l66xb->scr);
  306. err_ioremap:
  307. release_resource(&t7l66xb->rscr);
  308. err_request_scr:
  309. clk_put(t7l66xb->clk48m);
  310. err_clk48m_get:
  311. clk_put(t7l66xb->clk32k);
  312. err_clk32k_get:
  313. err_noirq:
  314. kfree(t7l66xb);
  315. return ret;
  316. }
  317. static int t7l66xb_remove(struct platform_device *dev)
  318. {
  319. struct t7l66xb *t7l66xb = platform_get_drvdata(dev);
  320. clk_disable_unprepare(t7l66xb->clk48m);
  321. clk_put(t7l66xb->clk48m);
  322. clk_disable_unprepare(t7l66xb->clk32k);
  323. clk_put(t7l66xb->clk32k);
  324. t7l66xb_detach_irq(dev);
  325. iounmap(t7l66xb->scr);
  326. release_resource(&t7l66xb->rscr);
  327. mfd_remove_devices(&dev->dev);
  328. kfree(t7l66xb);
  329. return 0;
  330. }
  331. static struct platform_driver t7l66xb_platform_driver = {
  332. .driver = {
  333. .name = "t7l66xb",
  334. },
  335. .suspend = t7l66xb_suspend,
  336. .resume = t7l66xb_resume,
  337. .probe = t7l66xb_probe,
  338. .remove = t7l66xb_remove,
  339. };
  340. /*--------------------------------------------------------------------------*/
  341. module_platform_driver(t7l66xb_platform_driver);
  342. MODULE_DESCRIPTION("Toshiba T7L66XB core driver");
  343. MODULE_LICENSE("GPL v2");
  344. MODULE_AUTHOR("Ian Molton");
  345. MODULE_ALIAS("platform:t7l66xb");