stw481x.c 6.6 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Core driver for STw4810/STw4811
  4. *
  5. * Copyright (C) 2013 ST-Ericsson SA
  6. * Written on behalf of Linaro for ST-Ericsson
  7. *
  8. * Author: Linus Walleij <[email protected]>
  9. */
  10. #include <linux/err.h>
  11. #include <linux/i2c.h>
  12. #include <linux/init.h>
  13. #include <linux/mfd/core.h>
  14. #include <linux/mfd/stw481x.h>
  15. #include <linux/module.h>
  16. #include <linux/regmap.h>
  17. #include <linux/spinlock.h>
  18. #include <linux/slab.h>
  19. /*
  20. * This driver can only access the non-USB portions of STw4811, the register
  21. * range 0x00-0x10 dealing with USB is bound to the two special I2C pins used
  22. * for USB control.
  23. */
  24. /* Registers inside the power control address space */
  25. #define STW_PC_VCORE_SEL 0x05U
  26. #define STW_PC_VAUX_SEL 0x06U
  27. #define STW_PC_VPLL_SEL 0x07U
  28. /**
  29. * stw481x_get_pctl_reg() - get a power control register
  30. * @stw481x: handle to the stw481x chip
  31. * @reg: power control register to fetch
  32. *
  33. * The power control registers is a set of one-time-programmable registers
  34. * in its own register space, accessed by writing addess bits to these
  35. * two registers: bits 7,6,5 of PCTL_REG_LO corresponds to the 3 LSBs of
  36. * the address and bits 8,9 of PCTL_REG_HI corresponds to the 2 MSBs of
  37. * the address, forming an address space of 5 bits, i.e. 32 registers
  38. * 0x00 ... 0x1f can be obtained.
  39. */
  40. static int stw481x_get_pctl_reg(struct stw481x *stw481x, u8 reg)
  41. {
  42. u8 msb = (reg >> 3) & 0x03;
  43. u8 lsb = (reg << 5) & 0xe0;
  44. unsigned int val;
  45. u8 vrfy;
  46. int ret;
  47. ret = regmap_write(stw481x->map, STW_PCTL_REG_HI, msb);
  48. if (ret)
  49. return ret;
  50. ret = regmap_write(stw481x->map, STW_PCTL_REG_LO, lsb);
  51. if (ret)
  52. return ret;
  53. ret = regmap_read(stw481x->map, STW_PCTL_REG_HI, &val);
  54. if (ret)
  55. return ret;
  56. vrfy = (val & 0x03) << 3;
  57. ret = regmap_read(stw481x->map, STW_PCTL_REG_LO, &val);
  58. if (ret)
  59. return ret;
  60. vrfy |= ((val >> 5) & 0x07);
  61. if (vrfy != reg)
  62. return -EIO;
  63. return (val >> 1) & 0x0f;
  64. }
  65. static int stw481x_startup(struct stw481x *stw481x)
  66. {
  67. /* Voltages multiplied by 100 */
  68. static const u8 vcore_val[] = {
  69. 100, 105, 110, 115, 120, 122, 124, 126, 128,
  70. 130, 132, 134, 136, 138, 140, 145
  71. };
  72. static const u8 vpll_val[] = { 105, 120, 130, 180 };
  73. static const u8 vaux_val[] = { 15, 18, 25, 28 };
  74. u8 vcore;
  75. u8 vcore_slp;
  76. u8 vpll;
  77. u8 vaux;
  78. bool vaux_en;
  79. bool it_warn;
  80. int ret;
  81. unsigned int val;
  82. ret = regmap_read(stw481x->map, STW_CONF1, &val);
  83. if (ret)
  84. return ret;
  85. vaux_en = !!(val & STW_CONF1_PDN_VAUX);
  86. it_warn = !!(val & STW_CONF1_IT_WARN);
  87. dev_info(&stw481x->client->dev, "voltages %s\n",
  88. (val & STW_CONF1_V_MONITORING) ? "OK" : "LOW");
  89. dev_info(&stw481x->client->dev, "MMC level shifter %s\n",
  90. (val & STW_CONF1_MMC_LS_STATUS) ? "high impedance" : "ON");
  91. dev_info(&stw481x->client->dev, "VMMC: %s\n",
  92. (val & STW_CONF1_PDN_VMMC) ? "ON" : "disabled");
  93. dev_info(&stw481x->client->dev, "STw481x power control registers:\n");
  94. ret = stw481x_get_pctl_reg(stw481x, STW_PC_VCORE_SEL);
  95. if (ret < 0)
  96. return ret;
  97. vcore = ret & 0x0f;
  98. ret = stw481x_get_pctl_reg(stw481x, STW_PC_VAUX_SEL);
  99. if (ret < 0)
  100. return ret;
  101. vaux = (ret >> 2) & 3;
  102. vpll = (ret >> 4) & 1; /* Save bit 4 */
  103. ret = stw481x_get_pctl_reg(stw481x, STW_PC_VPLL_SEL);
  104. if (ret < 0)
  105. return ret;
  106. vpll |= (ret >> 1) & 2;
  107. dev_info(&stw481x->client->dev, "VCORE: %u.%uV %s\n",
  108. vcore_val[vcore] / 100, vcore_val[vcore] % 100,
  109. (ret & 4) ? "ON" : "OFF");
  110. dev_info(&stw481x->client->dev, "VPLL: %u.%uV %s\n",
  111. vpll_val[vpll] / 100, vpll_val[vpll] % 100,
  112. (ret & 0x10) ? "ON" : "OFF");
  113. dev_info(&stw481x->client->dev, "VAUX: %u.%uV %s\n",
  114. vaux_val[vaux] / 10, vaux_val[vaux] % 10,
  115. vaux_en ? "ON" : "OFF");
  116. ret = regmap_read(stw481x->map, STW_CONF2, &val);
  117. if (ret)
  118. return ret;
  119. dev_info(&stw481x->client->dev, "TWARN: %s threshold, %s\n",
  120. it_warn ? "below" : "above",
  121. (val & STW_CONF2_MASK_TWARN) ?
  122. "enabled" : "mask through VDDOK");
  123. dev_info(&stw481x->client->dev, "VMMC: %s\n",
  124. (val & STW_CONF2_VMMC_EXT) ? "internal" : "external");
  125. dev_info(&stw481x->client->dev, "IT WAKE UP: %s\n",
  126. (val & STW_CONF2_MASK_IT_WAKE_UP) ? "enabled" : "masked");
  127. dev_info(&stw481x->client->dev, "GPO1: %s\n",
  128. (val & STW_CONF2_GPO1) ? "low" : "high impedance");
  129. dev_info(&stw481x->client->dev, "GPO2: %s\n",
  130. (val & STW_CONF2_GPO2) ? "low" : "high impedance");
  131. ret = regmap_read(stw481x->map, STW_VCORE_SLEEP, &val);
  132. if (ret)
  133. return ret;
  134. vcore_slp = val & 0x0f;
  135. dev_info(&stw481x->client->dev, "VCORE SLEEP: %u.%uV\n",
  136. vcore_val[vcore_slp] / 100, vcore_val[vcore_slp] % 100);
  137. return 0;
  138. }
  139. /*
  140. * MFD cells - we have one cell which is selected operation
  141. * mode, and we always have a GPIO cell.
  142. */
  143. static struct mfd_cell stw481x_cells[] = {
  144. {
  145. .of_compatible = "st,stw481x-vmmc",
  146. .name = "stw481x-vmmc-regulator",
  147. .id = -1,
  148. },
  149. };
  150. static const struct regmap_config stw481x_regmap_config = {
  151. .reg_bits = 8,
  152. .val_bits = 8,
  153. };
  154. static int stw481x_probe(struct i2c_client *client,
  155. const struct i2c_device_id *id)
  156. {
  157. struct stw481x *stw481x;
  158. int ret;
  159. int i;
  160. stw481x = devm_kzalloc(&client->dev, sizeof(*stw481x), GFP_KERNEL);
  161. if (!stw481x)
  162. return -ENOMEM;
  163. i2c_set_clientdata(client, stw481x);
  164. stw481x->client = client;
  165. stw481x->map = devm_regmap_init_i2c(client, &stw481x_regmap_config);
  166. if (IS_ERR(stw481x->map)) {
  167. ret = PTR_ERR(stw481x->map);
  168. dev_err(&client->dev, "Failed to allocate register map: %d\n",
  169. ret);
  170. return ret;
  171. }
  172. ret = stw481x_startup(stw481x);
  173. if (ret) {
  174. dev_err(&client->dev, "chip initialization failed\n");
  175. return ret;
  176. }
  177. /* Set up and register the platform devices. */
  178. for (i = 0; i < ARRAY_SIZE(stw481x_cells); i++) {
  179. /* One state holder for all drivers, this is simple */
  180. stw481x_cells[i].platform_data = stw481x;
  181. stw481x_cells[i].pdata_size = sizeof(*stw481x);
  182. }
  183. ret = devm_mfd_add_devices(&client->dev, 0, stw481x_cells,
  184. ARRAY_SIZE(stw481x_cells), NULL, 0, NULL);
  185. if (ret)
  186. return ret;
  187. dev_info(&client->dev, "initialized STw481x device\n");
  188. return ret;
  189. }
  190. /*
  191. * This ID table is completely unused, as this is a pure
  192. * device-tree probed driver, but it has to be here due to
  193. * the structure of the I2C core.
  194. */
  195. static const struct i2c_device_id stw481x_id[] = {
  196. { "stw481x", 0 },
  197. { },
  198. };
  199. MODULE_DEVICE_TABLE(i2c, stw481x_id);
  200. static const struct of_device_id stw481x_match[] = {
  201. { .compatible = "st,stw4810", },
  202. { .compatible = "st,stw4811", },
  203. { },
  204. };
  205. MODULE_DEVICE_TABLE(of, stw481x_match);
  206. static struct i2c_driver stw481x_driver = {
  207. .driver = {
  208. .name = "stw481x",
  209. .of_match_table = stw481x_match,
  210. },
  211. .probe = stw481x_probe,
  212. .id_table = stw481x_id,
  213. };
  214. module_i2c_driver(stw481x_driver);
  215. MODULE_AUTHOR("Linus Walleij");
  216. MODULE_DESCRIPTION("STw481x PMIC driver");
  217. MODULE_LICENSE("GPL v2");