omap-usb-tll.c 13 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * omap-usb-tll.c - The USB TLL driver for OMAP EHCI & OHCI
  4. *
  5. * Copyright (C) 2012-2013 Texas Instruments Incorporated - https://www.ti.com
  6. * Author: Keshava Munegowda <[email protected]>
  7. * Author: Roger Quadros <[email protected]>
  8. */
  9. #include <linux/kernel.h>
  10. #include <linux/module.h>
  11. #include <linux/types.h>
  12. #include <linux/slab.h>
  13. #include <linux/spinlock.h>
  14. #include <linux/platform_device.h>
  15. #include <linux/clk.h>
  16. #include <linux/io.h>
  17. #include <linux/err.h>
  18. #include <linux/pm_runtime.h>
  19. #include <linux/platform_data/usb-omap.h>
  20. #include <linux/of.h>
  21. #include "omap-usb.h"
  22. #define USBTLL_DRIVER_NAME "usbhs_tll"
  23. /* TLL Register Set */
  24. #define OMAP_USBTLL_REVISION (0x00)
  25. #define OMAP_USBTLL_SYSCONFIG (0x10)
  26. #define OMAP_USBTLL_SYSCONFIG_CACTIVITY (1 << 8)
  27. #define OMAP_USBTLL_SYSCONFIG_SIDLEMODE (1 << 3)
  28. #define OMAP_USBTLL_SYSCONFIG_ENAWAKEUP (1 << 2)
  29. #define OMAP_USBTLL_SYSCONFIG_SOFTRESET (1 << 1)
  30. #define OMAP_USBTLL_SYSCONFIG_AUTOIDLE (1 << 0)
  31. #define OMAP_USBTLL_SYSSTATUS (0x14)
  32. #define OMAP_USBTLL_SYSSTATUS_RESETDONE (1 << 0)
  33. #define OMAP_USBTLL_IRQSTATUS (0x18)
  34. #define OMAP_USBTLL_IRQENABLE (0x1C)
  35. #define OMAP_TLL_SHARED_CONF (0x30)
  36. #define OMAP_TLL_SHARED_CONF_USB_90D_DDR_EN (1 << 6)
  37. #define OMAP_TLL_SHARED_CONF_USB_180D_SDR_EN (1 << 5)
  38. #define OMAP_TLL_SHARED_CONF_USB_DIVRATION (1 << 2)
  39. #define OMAP_TLL_SHARED_CONF_FCLK_REQ (1 << 1)
  40. #define OMAP_TLL_SHARED_CONF_FCLK_IS_ON (1 << 0)
  41. #define OMAP_TLL_CHANNEL_CONF(num) (0x040 + 0x004 * num)
  42. #define OMAP_TLL_CHANNEL_CONF_FSLSMODE_SHIFT 24
  43. #define OMAP_TLL_CHANNEL_CONF_DRVVBUS (1 << 16)
  44. #define OMAP_TLL_CHANNEL_CONF_CHRGVBUS (1 << 15)
  45. #define OMAP_TLL_CHANNEL_CONF_ULPINOBITSTUFF (1 << 11)
  46. #define OMAP_TLL_CHANNEL_CONF_ULPI_ULPIAUTOIDLE (1 << 10)
  47. #define OMAP_TLL_CHANNEL_CONF_UTMIAUTOIDLE (1 << 9)
  48. #define OMAP_TLL_CHANNEL_CONF_ULPIDDRMODE (1 << 8)
  49. #define OMAP_TLL_CHANNEL_CONF_MODE_TRANSPARENT_UTMI (2 << 1)
  50. #define OMAP_TLL_CHANNEL_CONF_CHANMODE_FSLS (1 << 1)
  51. #define OMAP_TLL_CHANNEL_CONF_CHANEN (1 << 0)
  52. #define OMAP_TLL_FSLSMODE_6PIN_PHY_DAT_SE0 0x0
  53. #define OMAP_TLL_FSLSMODE_6PIN_PHY_DP_DM 0x1
  54. #define OMAP_TLL_FSLSMODE_3PIN_PHY 0x2
  55. #define OMAP_TLL_FSLSMODE_4PIN_PHY 0x3
  56. #define OMAP_TLL_FSLSMODE_6PIN_TLL_DAT_SE0 0x4
  57. #define OMAP_TLL_FSLSMODE_6PIN_TLL_DP_DM 0x5
  58. #define OMAP_TLL_FSLSMODE_3PIN_TLL 0x6
  59. #define OMAP_TLL_FSLSMODE_4PIN_TLL 0x7
  60. #define OMAP_TLL_FSLSMODE_2PIN_TLL_DAT_SE0 0xA
  61. #define OMAP_TLL_FSLSMODE_2PIN_DAT_DP_DM 0xB
  62. #define OMAP_TLL_ULPI_FUNCTION_CTRL(num) (0x804 + 0x100 * num)
  63. #define OMAP_TLL_ULPI_INTERFACE_CTRL(num) (0x807 + 0x100 * num)
  64. #define OMAP_TLL_ULPI_OTG_CTRL(num) (0x80A + 0x100 * num)
  65. #define OMAP_TLL_ULPI_INT_EN_RISE(num) (0x80D + 0x100 * num)
  66. #define OMAP_TLL_ULPI_INT_EN_FALL(num) (0x810 + 0x100 * num)
  67. #define OMAP_TLL_ULPI_INT_STATUS(num) (0x813 + 0x100 * num)
  68. #define OMAP_TLL_ULPI_INT_LATCH(num) (0x814 + 0x100 * num)
  69. #define OMAP_TLL_ULPI_DEBUG(num) (0x815 + 0x100 * num)
  70. #define OMAP_TLL_ULPI_SCRATCH_REGISTER(num) (0x816 + 0x100 * num)
  71. #define OMAP_REV2_TLL_CHANNEL_COUNT 2
  72. #define OMAP_TLL_CHANNEL_COUNT 3
  73. #define OMAP_TLL_CHANNEL_1_EN_MASK (1 << 0)
  74. #define OMAP_TLL_CHANNEL_2_EN_MASK (1 << 1)
  75. #define OMAP_TLL_CHANNEL_3_EN_MASK (1 << 2)
  76. /* Values of USBTLL_REVISION - Note: these are not given in the TRM */
  77. #define OMAP_USBTLL_REV1 0x00000015 /* OMAP3 */
  78. #define OMAP_USBTLL_REV2 0x00000018 /* OMAP 3630 */
  79. #define OMAP_USBTLL_REV3 0x00000004 /* OMAP4 */
  80. #define OMAP_USBTLL_REV4 0x00000006 /* OMAP5 */
  81. #define is_ehci_tll_mode(x) (x == OMAP_EHCI_PORT_MODE_TLL)
  82. /* only PHY and UNUSED modes don't need TLL */
  83. #define omap_usb_mode_needs_tll(x) ((x) != OMAP_USBHS_PORT_MODE_UNUSED &&\
  84. (x) != OMAP_EHCI_PORT_MODE_PHY)
  85. struct usbtll_omap {
  86. void __iomem *base;
  87. int nch; /* num. of channels */
  88. struct clk *ch_clk[]; /* must be the last member */
  89. };
  90. /*-------------------------------------------------------------------------*/
  91. static const char usbtll_driver_name[] = USBTLL_DRIVER_NAME;
  92. static struct device *tll_dev;
  93. static DEFINE_SPINLOCK(tll_lock); /* serialize access to tll_dev */
  94. /*-------------------------------------------------------------------------*/
  95. static inline void usbtll_write(void __iomem *base, u32 reg, u32 val)
  96. {
  97. writel_relaxed(val, base + reg);
  98. }
  99. static inline u32 usbtll_read(void __iomem *base, u32 reg)
  100. {
  101. return readl_relaxed(base + reg);
  102. }
  103. static inline void usbtll_writeb(void __iomem *base, u32 reg, u8 val)
  104. {
  105. writeb_relaxed(val, base + reg);
  106. }
  107. static inline u8 usbtll_readb(void __iomem *base, u32 reg)
  108. {
  109. return readb_relaxed(base + reg);
  110. }
  111. /*-------------------------------------------------------------------------*/
  112. static bool is_ohci_port(enum usbhs_omap_port_mode pmode)
  113. {
  114. switch (pmode) {
  115. case OMAP_OHCI_PORT_MODE_PHY_6PIN_DATSE0:
  116. case OMAP_OHCI_PORT_MODE_PHY_6PIN_DPDM:
  117. case OMAP_OHCI_PORT_MODE_PHY_3PIN_DATSE0:
  118. case OMAP_OHCI_PORT_MODE_PHY_4PIN_DPDM:
  119. case OMAP_OHCI_PORT_MODE_TLL_6PIN_DATSE0:
  120. case OMAP_OHCI_PORT_MODE_TLL_6PIN_DPDM:
  121. case OMAP_OHCI_PORT_MODE_TLL_3PIN_DATSE0:
  122. case OMAP_OHCI_PORT_MODE_TLL_4PIN_DPDM:
  123. case OMAP_OHCI_PORT_MODE_TLL_2PIN_DATSE0:
  124. case OMAP_OHCI_PORT_MODE_TLL_2PIN_DPDM:
  125. return true;
  126. default:
  127. return false;
  128. }
  129. }
  130. /*
  131. * convert the port-mode enum to a value we can use in the FSLSMODE
  132. * field of USBTLL_CHANNEL_CONF
  133. */
  134. static unsigned ohci_omap3_fslsmode(enum usbhs_omap_port_mode mode)
  135. {
  136. switch (mode) {
  137. case OMAP_USBHS_PORT_MODE_UNUSED:
  138. case OMAP_OHCI_PORT_MODE_PHY_6PIN_DATSE0:
  139. return OMAP_TLL_FSLSMODE_6PIN_PHY_DAT_SE0;
  140. case OMAP_OHCI_PORT_MODE_PHY_6PIN_DPDM:
  141. return OMAP_TLL_FSLSMODE_6PIN_PHY_DP_DM;
  142. case OMAP_OHCI_PORT_MODE_PHY_3PIN_DATSE0:
  143. return OMAP_TLL_FSLSMODE_3PIN_PHY;
  144. case OMAP_OHCI_PORT_MODE_PHY_4PIN_DPDM:
  145. return OMAP_TLL_FSLSMODE_4PIN_PHY;
  146. case OMAP_OHCI_PORT_MODE_TLL_6PIN_DATSE0:
  147. return OMAP_TLL_FSLSMODE_6PIN_TLL_DAT_SE0;
  148. case OMAP_OHCI_PORT_MODE_TLL_6PIN_DPDM:
  149. return OMAP_TLL_FSLSMODE_6PIN_TLL_DP_DM;
  150. case OMAP_OHCI_PORT_MODE_TLL_3PIN_DATSE0:
  151. return OMAP_TLL_FSLSMODE_3PIN_TLL;
  152. case OMAP_OHCI_PORT_MODE_TLL_4PIN_DPDM:
  153. return OMAP_TLL_FSLSMODE_4PIN_TLL;
  154. case OMAP_OHCI_PORT_MODE_TLL_2PIN_DATSE0:
  155. return OMAP_TLL_FSLSMODE_2PIN_TLL_DAT_SE0;
  156. case OMAP_OHCI_PORT_MODE_TLL_2PIN_DPDM:
  157. return OMAP_TLL_FSLSMODE_2PIN_DAT_DP_DM;
  158. default:
  159. pr_warn("Invalid port mode, using default\n");
  160. return OMAP_TLL_FSLSMODE_6PIN_PHY_DAT_SE0;
  161. }
  162. }
  163. /**
  164. * usbtll_omap_probe - initialize TI-based HCDs
  165. *
  166. * Allocates basic resources for this USB host controller.
  167. *
  168. * @pdev: Pointer to this device's platform device structure
  169. */
  170. static int usbtll_omap_probe(struct platform_device *pdev)
  171. {
  172. struct device *dev = &pdev->dev;
  173. struct resource *res;
  174. struct usbtll_omap *tll;
  175. void __iomem *base;
  176. int i, nch, ver;
  177. dev_dbg(dev, "starting TI HSUSB TLL Controller\n");
  178. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  179. base = devm_ioremap_resource(dev, res);
  180. if (IS_ERR(base))
  181. return PTR_ERR(base);
  182. pm_runtime_enable(dev);
  183. pm_runtime_get_sync(dev);
  184. ver = usbtll_read(base, OMAP_USBTLL_REVISION);
  185. switch (ver) {
  186. case OMAP_USBTLL_REV1:
  187. case OMAP_USBTLL_REV4:
  188. nch = OMAP_TLL_CHANNEL_COUNT;
  189. break;
  190. case OMAP_USBTLL_REV2:
  191. case OMAP_USBTLL_REV3:
  192. nch = OMAP_REV2_TLL_CHANNEL_COUNT;
  193. break;
  194. default:
  195. nch = OMAP_TLL_CHANNEL_COUNT;
  196. dev_dbg(dev, "rev 0x%x not recognized, assuming %d channels\n",
  197. ver, nch);
  198. break;
  199. }
  200. tll = devm_kzalloc(dev, sizeof(*tll) + sizeof(tll->ch_clk[nch]),
  201. GFP_KERNEL);
  202. if (!tll) {
  203. pm_runtime_put_sync(dev);
  204. pm_runtime_disable(dev);
  205. return -ENOMEM;
  206. }
  207. tll->base = base;
  208. tll->nch = nch;
  209. platform_set_drvdata(pdev, tll);
  210. for (i = 0; i < nch; i++) {
  211. char clkname[] = "usb_tll_hs_usb_chx_clk";
  212. snprintf(clkname, sizeof(clkname),
  213. "usb_tll_hs_usb_ch%d_clk", i);
  214. tll->ch_clk[i] = clk_get(dev, clkname);
  215. if (IS_ERR(tll->ch_clk[i]))
  216. dev_dbg(dev, "can't get clock : %s\n", clkname);
  217. else
  218. clk_prepare(tll->ch_clk[i]);
  219. }
  220. pm_runtime_put_sync(dev);
  221. /* only after this can omap_tll_enable/disable work */
  222. spin_lock(&tll_lock);
  223. tll_dev = dev;
  224. spin_unlock(&tll_lock);
  225. return 0;
  226. }
  227. /**
  228. * usbtll_omap_remove - shutdown processing for UHH & TLL HCDs
  229. * @pdev: USB Host Controller being removed
  230. *
  231. * Reverses the effect of usbtll_omap_probe().
  232. */
  233. static int usbtll_omap_remove(struct platform_device *pdev)
  234. {
  235. struct usbtll_omap *tll = platform_get_drvdata(pdev);
  236. int i;
  237. spin_lock(&tll_lock);
  238. tll_dev = NULL;
  239. spin_unlock(&tll_lock);
  240. for (i = 0; i < tll->nch; i++) {
  241. if (!IS_ERR(tll->ch_clk[i])) {
  242. clk_unprepare(tll->ch_clk[i]);
  243. clk_put(tll->ch_clk[i]);
  244. }
  245. }
  246. pm_runtime_disable(&pdev->dev);
  247. return 0;
  248. }
  249. static const struct of_device_id usbtll_omap_dt_ids[] = {
  250. { .compatible = "ti,usbhs-tll" },
  251. { }
  252. };
  253. MODULE_DEVICE_TABLE(of, usbtll_omap_dt_ids);
  254. static struct platform_driver usbtll_omap_driver = {
  255. .driver = {
  256. .name = usbtll_driver_name,
  257. .of_match_table = usbtll_omap_dt_ids,
  258. },
  259. .probe = usbtll_omap_probe,
  260. .remove = usbtll_omap_remove,
  261. };
  262. int omap_tll_init(struct usbhs_omap_platform_data *pdata)
  263. {
  264. int i;
  265. bool needs_tll;
  266. unsigned reg;
  267. struct usbtll_omap *tll;
  268. if (!tll_dev)
  269. return -ENODEV;
  270. pm_runtime_get_sync(tll_dev);
  271. spin_lock(&tll_lock);
  272. tll = dev_get_drvdata(tll_dev);
  273. needs_tll = false;
  274. for (i = 0; i < tll->nch; i++)
  275. needs_tll |= omap_usb_mode_needs_tll(pdata->port_mode[i]);
  276. if (needs_tll) {
  277. void __iomem *base = tll->base;
  278. /* Program Common TLL register */
  279. reg = usbtll_read(base, OMAP_TLL_SHARED_CONF);
  280. reg |= (OMAP_TLL_SHARED_CONF_FCLK_IS_ON
  281. | OMAP_TLL_SHARED_CONF_USB_DIVRATION);
  282. reg &= ~OMAP_TLL_SHARED_CONF_USB_90D_DDR_EN;
  283. reg &= ~OMAP_TLL_SHARED_CONF_USB_180D_SDR_EN;
  284. usbtll_write(base, OMAP_TLL_SHARED_CONF, reg);
  285. /* Enable channels now */
  286. for (i = 0; i < tll->nch; i++) {
  287. reg = usbtll_read(base, OMAP_TLL_CHANNEL_CONF(i));
  288. if (is_ohci_port(pdata->port_mode[i])) {
  289. reg |= ohci_omap3_fslsmode(pdata->port_mode[i])
  290. << OMAP_TLL_CHANNEL_CONF_FSLSMODE_SHIFT;
  291. reg |= OMAP_TLL_CHANNEL_CONF_CHANMODE_FSLS;
  292. } else if (pdata->port_mode[i] ==
  293. OMAP_EHCI_PORT_MODE_TLL) {
  294. /*
  295. * Disable UTMI AutoIdle, BitStuffing
  296. * and use SDR Mode. Enable ULPI AutoIdle.
  297. */
  298. reg &= ~(OMAP_TLL_CHANNEL_CONF_UTMIAUTOIDLE
  299. | OMAP_TLL_CHANNEL_CONF_ULPIDDRMODE);
  300. reg |= OMAP_TLL_CHANNEL_CONF_ULPINOBITSTUFF;
  301. reg |= OMAP_TLL_CHANNEL_CONF_ULPI_ULPIAUTOIDLE;
  302. } else if (pdata->port_mode[i] ==
  303. OMAP_EHCI_PORT_MODE_HSIC) {
  304. /*
  305. * HSIC Mode requires UTMI port configurations
  306. */
  307. reg |= OMAP_TLL_CHANNEL_CONF_DRVVBUS
  308. | OMAP_TLL_CHANNEL_CONF_CHRGVBUS
  309. | OMAP_TLL_CHANNEL_CONF_MODE_TRANSPARENT_UTMI
  310. | OMAP_TLL_CHANNEL_CONF_ULPINOBITSTUFF;
  311. } else {
  312. continue;
  313. }
  314. reg |= OMAP_TLL_CHANNEL_CONF_CHANEN;
  315. usbtll_write(base, OMAP_TLL_CHANNEL_CONF(i), reg);
  316. usbtll_writeb(base,
  317. OMAP_TLL_ULPI_SCRATCH_REGISTER(i),
  318. 0xbe);
  319. }
  320. }
  321. spin_unlock(&tll_lock);
  322. pm_runtime_put_sync(tll_dev);
  323. return 0;
  324. }
  325. EXPORT_SYMBOL_GPL(omap_tll_init);
  326. int omap_tll_enable(struct usbhs_omap_platform_data *pdata)
  327. {
  328. int i;
  329. struct usbtll_omap *tll;
  330. if (!tll_dev)
  331. return -ENODEV;
  332. pm_runtime_get_sync(tll_dev);
  333. spin_lock(&tll_lock);
  334. tll = dev_get_drvdata(tll_dev);
  335. for (i = 0; i < tll->nch; i++) {
  336. if (omap_usb_mode_needs_tll(pdata->port_mode[i])) {
  337. int r;
  338. if (IS_ERR(tll->ch_clk[i]))
  339. continue;
  340. r = clk_enable(tll->ch_clk[i]);
  341. if (r) {
  342. dev_err(tll_dev,
  343. "Error enabling ch %d clock: %d\n", i, r);
  344. }
  345. }
  346. }
  347. spin_unlock(&tll_lock);
  348. return 0;
  349. }
  350. EXPORT_SYMBOL_GPL(omap_tll_enable);
  351. int omap_tll_disable(struct usbhs_omap_platform_data *pdata)
  352. {
  353. int i;
  354. struct usbtll_omap *tll;
  355. if (!tll_dev)
  356. return -ENODEV;
  357. spin_lock(&tll_lock);
  358. tll = dev_get_drvdata(tll_dev);
  359. for (i = 0; i < tll->nch; i++) {
  360. if (omap_usb_mode_needs_tll(pdata->port_mode[i])) {
  361. if (!IS_ERR(tll->ch_clk[i]))
  362. clk_disable(tll->ch_clk[i]);
  363. }
  364. }
  365. spin_unlock(&tll_lock);
  366. pm_runtime_put_sync(tll_dev);
  367. return 0;
  368. }
  369. EXPORT_SYMBOL_GPL(omap_tll_disable);
  370. MODULE_AUTHOR("Keshava Munegowda <[email protected]>");
  371. MODULE_AUTHOR("Roger Quadros <[email protected]>");
  372. MODULE_LICENSE("GPL v2");
  373. MODULE_DESCRIPTION("usb tll driver for TI OMAP EHCI and OHCI controllers");
  374. static int __init omap_usbtll_drvinit(void)
  375. {
  376. return platform_driver_register(&usbtll_omap_driver);
  377. }
  378. /*
  379. * init before usbhs core driver;
  380. * The usbtll driver should be initialized before
  381. * the usbhs core driver probe function is called.
  382. */
  383. fs_initcall(omap_usbtll_drvinit);
  384. static void __exit omap_usbtll_drvexit(void)
  385. {
  386. platform_driver_unregister(&usbtll_omap_driver);
  387. }
  388. module_exit(omap_usbtll_drvexit);