w6692.c 35 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * w6692.c mISDN driver for Winbond w6692 based cards
  4. *
  5. * Author Karsten Keil <[email protected]>
  6. * based on the w6692 I4L driver from Petr Novak <[email protected]>
  7. *
  8. * Copyright 2009 by Karsten Keil <[email protected]>
  9. */
  10. #include <linux/interrupt.h>
  11. #include <linux/module.h>
  12. #include <linux/pci.h>
  13. #include <linux/delay.h>
  14. #include <linux/mISDNhw.h>
  15. #include <linux/slab.h>
  16. #include "w6692.h"
  17. #define W6692_REV "2.0"
  18. #define DBUSY_TIMER_VALUE 80
  19. enum {
  20. W6692_ASUS,
  21. W6692_WINBOND,
  22. W6692_USR
  23. };
  24. /* private data in the PCI devices list */
  25. struct w6692map {
  26. u_int subtype;
  27. char *name;
  28. };
  29. static const struct w6692map w6692_map[] =
  30. {
  31. {W6692_ASUS, "Dynalink/AsusCom IS64PH"},
  32. {W6692_WINBOND, "Winbond W6692"},
  33. {W6692_USR, "USR W6692"}
  34. };
  35. #define PCI_DEVICE_ID_USR_6692 0x3409
  36. struct w6692_ch {
  37. struct bchannel bch;
  38. u32 addr;
  39. struct timer_list timer;
  40. u8 b_mode;
  41. };
  42. struct w6692_hw {
  43. struct list_head list;
  44. struct pci_dev *pdev;
  45. char name[MISDN_MAX_IDLEN];
  46. u32 irq;
  47. u32 irqcnt;
  48. u32 addr;
  49. u32 fmask; /* feature mask - bit set per card nr */
  50. int subtype;
  51. spinlock_t lock; /* hw lock */
  52. u8 imask;
  53. u8 pctl;
  54. u8 xaddr;
  55. u8 xdata;
  56. u8 state;
  57. struct w6692_ch bc[2];
  58. struct dchannel dch;
  59. char log[64];
  60. };
  61. static LIST_HEAD(Cards);
  62. static DEFINE_RWLOCK(card_lock); /* protect Cards */
  63. static int w6692_cnt;
  64. static int debug;
  65. static u32 led;
  66. static u32 pots;
  67. static void
  68. _set_debug(struct w6692_hw *card)
  69. {
  70. card->dch.debug = debug;
  71. card->bc[0].bch.debug = debug;
  72. card->bc[1].bch.debug = debug;
  73. }
  74. static int
  75. set_debug(const char *val, const struct kernel_param *kp)
  76. {
  77. int ret;
  78. struct w6692_hw *card;
  79. ret = param_set_uint(val, kp);
  80. if (!ret) {
  81. read_lock(&card_lock);
  82. list_for_each_entry(card, &Cards, list)
  83. _set_debug(card);
  84. read_unlock(&card_lock);
  85. }
  86. return ret;
  87. }
  88. MODULE_AUTHOR("Karsten Keil");
  89. MODULE_LICENSE("GPL v2");
  90. MODULE_VERSION(W6692_REV);
  91. module_param_call(debug, set_debug, param_get_uint, &debug, S_IRUGO | S_IWUSR);
  92. MODULE_PARM_DESC(debug, "W6692 debug mask");
  93. module_param(led, uint, S_IRUGO | S_IWUSR);
  94. MODULE_PARM_DESC(led, "W6692 LED support bitmask (one bit per card)");
  95. module_param(pots, uint, S_IRUGO | S_IWUSR);
  96. MODULE_PARM_DESC(pots, "W6692 POTS support bitmask (one bit per card)");
  97. static inline u8
  98. ReadW6692(struct w6692_hw *card, u8 offset)
  99. {
  100. return inb(card->addr + offset);
  101. }
  102. static inline void
  103. WriteW6692(struct w6692_hw *card, u8 offset, u8 value)
  104. {
  105. outb(value, card->addr + offset);
  106. }
  107. static inline u8
  108. ReadW6692B(struct w6692_ch *bc, u8 offset)
  109. {
  110. return inb(bc->addr + offset);
  111. }
  112. static inline void
  113. WriteW6692B(struct w6692_ch *bc, u8 offset, u8 value)
  114. {
  115. outb(value, bc->addr + offset);
  116. }
  117. static void
  118. enable_hwirq(struct w6692_hw *card)
  119. {
  120. WriteW6692(card, W_IMASK, card->imask);
  121. }
  122. static void
  123. disable_hwirq(struct w6692_hw *card)
  124. {
  125. WriteW6692(card, W_IMASK, 0xff);
  126. }
  127. static const char *W6692Ver[] = {"V00", "V01", "V10", "V11"};
  128. static void
  129. W6692Version(struct w6692_hw *card)
  130. {
  131. int val;
  132. val = ReadW6692(card, W_D_RBCH);
  133. pr_notice("%s: Winbond W6692 version: %s\n", card->name,
  134. W6692Ver[(val >> 6) & 3]);
  135. }
  136. static void
  137. w6692_led_handler(struct w6692_hw *card, int on)
  138. {
  139. if ((!(card->fmask & led)) || card->subtype == W6692_USR)
  140. return;
  141. if (on) {
  142. card->xdata &= 0xfb; /* LED ON */
  143. WriteW6692(card, W_XDATA, card->xdata);
  144. } else {
  145. card->xdata |= 0x04; /* LED OFF */
  146. WriteW6692(card, W_XDATA, card->xdata);
  147. }
  148. }
  149. static void
  150. ph_command(struct w6692_hw *card, u8 cmd)
  151. {
  152. pr_debug("%s: ph_command %x\n", card->name, cmd);
  153. WriteW6692(card, W_CIX, cmd);
  154. }
  155. static void
  156. W6692_new_ph(struct w6692_hw *card)
  157. {
  158. if (card->state == W_L1CMD_RST)
  159. ph_command(card, W_L1CMD_DRC);
  160. schedule_event(&card->dch, FLG_PHCHANGE);
  161. }
  162. static void
  163. W6692_ph_bh(struct dchannel *dch)
  164. {
  165. struct w6692_hw *card = dch->hw;
  166. switch (card->state) {
  167. case W_L1CMD_RST:
  168. dch->state = 0;
  169. l1_event(dch->l1, HW_RESET_IND);
  170. break;
  171. case W_L1IND_CD:
  172. dch->state = 3;
  173. l1_event(dch->l1, HW_DEACT_CNF);
  174. break;
  175. case W_L1IND_DRD:
  176. dch->state = 3;
  177. l1_event(dch->l1, HW_DEACT_IND);
  178. break;
  179. case W_L1IND_CE:
  180. dch->state = 4;
  181. l1_event(dch->l1, HW_POWERUP_IND);
  182. break;
  183. case W_L1IND_LD:
  184. if (dch->state <= 5) {
  185. dch->state = 5;
  186. l1_event(dch->l1, ANYSIGNAL);
  187. } else {
  188. dch->state = 8;
  189. l1_event(dch->l1, LOSTFRAMING);
  190. }
  191. break;
  192. case W_L1IND_ARD:
  193. dch->state = 6;
  194. l1_event(dch->l1, INFO2);
  195. break;
  196. case W_L1IND_AI8:
  197. dch->state = 7;
  198. l1_event(dch->l1, INFO4_P8);
  199. break;
  200. case W_L1IND_AI10:
  201. dch->state = 7;
  202. l1_event(dch->l1, INFO4_P10);
  203. break;
  204. default:
  205. pr_debug("%s: TE unknown state %02x dch state %02x\n",
  206. card->name, card->state, dch->state);
  207. break;
  208. }
  209. pr_debug("%s: TE newstate %02x\n", card->name, dch->state);
  210. }
  211. static void
  212. W6692_empty_Dfifo(struct w6692_hw *card, int count)
  213. {
  214. struct dchannel *dch = &card->dch;
  215. u8 *ptr;
  216. pr_debug("%s: empty_Dfifo %d\n", card->name, count);
  217. if (!dch->rx_skb) {
  218. dch->rx_skb = mI_alloc_skb(card->dch.maxlen, GFP_ATOMIC);
  219. if (!dch->rx_skb) {
  220. pr_info("%s: D receive out of memory\n", card->name);
  221. WriteW6692(card, W_D_CMDR, W_D_CMDR_RACK);
  222. return;
  223. }
  224. }
  225. if ((dch->rx_skb->len + count) >= dch->maxlen) {
  226. pr_debug("%s: empty_Dfifo overrun %d\n", card->name,
  227. dch->rx_skb->len + count);
  228. WriteW6692(card, W_D_CMDR, W_D_CMDR_RACK);
  229. return;
  230. }
  231. ptr = skb_put(dch->rx_skb, count);
  232. insb(card->addr + W_D_RFIFO, ptr, count);
  233. WriteW6692(card, W_D_CMDR, W_D_CMDR_RACK);
  234. if (debug & DEBUG_HW_DFIFO) {
  235. snprintf(card->log, 63, "D-recv %s %d ",
  236. card->name, count);
  237. print_hex_dump_bytes(card->log, DUMP_PREFIX_OFFSET, ptr, count);
  238. }
  239. }
  240. static void
  241. W6692_fill_Dfifo(struct w6692_hw *card)
  242. {
  243. struct dchannel *dch = &card->dch;
  244. int count;
  245. u8 *ptr;
  246. u8 cmd = W_D_CMDR_XMS;
  247. pr_debug("%s: fill_Dfifo\n", card->name);
  248. if (!dch->tx_skb)
  249. return;
  250. count = dch->tx_skb->len - dch->tx_idx;
  251. if (count <= 0)
  252. return;
  253. if (count > W_D_FIFO_THRESH)
  254. count = W_D_FIFO_THRESH;
  255. else
  256. cmd |= W_D_CMDR_XME;
  257. ptr = dch->tx_skb->data + dch->tx_idx;
  258. dch->tx_idx += count;
  259. outsb(card->addr + W_D_XFIFO, ptr, count);
  260. WriteW6692(card, W_D_CMDR, cmd);
  261. if (test_and_set_bit(FLG_BUSY_TIMER, &dch->Flags)) {
  262. pr_debug("%s: fill_Dfifo dbusytimer running\n", card->name);
  263. del_timer(&dch->timer);
  264. }
  265. dch->timer.expires = jiffies + ((DBUSY_TIMER_VALUE * HZ) / 1000);
  266. add_timer(&dch->timer);
  267. if (debug & DEBUG_HW_DFIFO) {
  268. snprintf(card->log, 63, "D-send %s %d ",
  269. card->name, count);
  270. print_hex_dump_bytes(card->log, DUMP_PREFIX_OFFSET, ptr, count);
  271. }
  272. }
  273. static void
  274. d_retransmit(struct w6692_hw *card)
  275. {
  276. struct dchannel *dch = &card->dch;
  277. if (test_and_clear_bit(FLG_BUSY_TIMER, &dch->Flags))
  278. del_timer(&dch->timer);
  279. #ifdef FIXME
  280. if (test_and_clear_bit(FLG_L1_BUSY, &dch->Flags))
  281. dchannel_sched_event(dch, D_CLEARBUSY);
  282. #endif
  283. if (test_bit(FLG_TX_BUSY, &dch->Flags)) {
  284. /* Restart frame */
  285. dch->tx_idx = 0;
  286. W6692_fill_Dfifo(card);
  287. } else if (dch->tx_skb) { /* should not happen */
  288. pr_info("%s: %s without TX_BUSY\n", card->name, __func__);
  289. test_and_set_bit(FLG_TX_BUSY, &dch->Flags);
  290. dch->tx_idx = 0;
  291. W6692_fill_Dfifo(card);
  292. } else {
  293. pr_info("%s: XDU no TX_BUSY\n", card->name);
  294. if (get_next_dframe(dch))
  295. W6692_fill_Dfifo(card);
  296. }
  297. }
  298. static void
  299. handle_rxD(struct w6692_hw *card) {
  300. u8 stat;
  301. int count;
  302. stat = ReadW6692(card, W_D_RSTA);
  303. if (stat & (W_D_RSTA_RDOV | W_D_RSTA_CRCE | W_D_RSTA_RMB)) {
  304. if (stat & W_D_RSTA_RDOV) {
  305. pr_debug("%s: D-channel RDOV\n", card->name);
  306. #ifdef ERROR_STATISTIC
  307. card->dch.err_rx++;
  308. #endif
  309. }
  310. if (stat & W_D_RSTA_CRCE) {
  311. pr_debug("%s: D-channel CRC error\n", card->name);
  312. #ifdef ERROR_STATISTIC
  313. card->dch.err_crc++;
  314. #endif
  315. }
  316. if (stat & W_D_RSTA_RMB) {
  317. pr_debug("%s: D-channel ABORT\n", card->name);
  318. #ifdef ERROR_STATISTIC
  319. card->dch.err_rx++;
  320. #endif
  321. }
  322. dev_kfree_skb(card->dch.rx_skb);
  323. card->dch.rx_skb = NULL;
  324. WriteW6692(card, W_D_CMDR, W_D_CMDR_RACK | W_D_CMDR_RRST);
  325. } else {
  326. count = ReadW6692(card, W_D_RBCL) & (W_D_FIFO_THRESH - 1);
  327. if (count == 0)
  328. count = W_D_FIFO_THRESH;
  329. W6692_empty_Dfifo(card, count);
  330. recv_Dchannel(&card->dch);
  331. }
  332. }
  333. static void
  334. handle_txD(struct w6692_hw *card) {
  335. if (test_and_clear_bit(FLG_BUSY_TIMER, &card->dch.Flags))
  336. del_timer(&card->dch.timer);
  337. if (card->dch.tx_skb && card->dch.tx_idx < card->dch.tx_skb->len) {
  338. W6692_fill_Dfifo(card);
  339. } else {
  340. dev_kfree_skb(card->dch.tx_skb);
  341. if (get_next_dframe(&card->dch))
  342. W6692_fill_Dfifo(card);
  343. }
  344. }
  345. static void
  346. handle_statusD(struct w6692_hw *card)
  347. {
  348. struct dchannel *dch = &card->dch;
  349. u8 exval, v1, cir;
  350. exval = ReadW6692(card, W_D_EXIR);
  351. pr_debug("%s: D_EXIR %02x\n", card->name, exval);
  352. if (exval & (W_D_EXI_XDUN | W_D_EXI_XCOL)) {
  353. /* Transmit underrun/collision */
  354. pr_debug("%s: D-channel underrun/collision\n", card->name);
  355. #ifdef ERROR_STATISTIC
  356. dch->err_tx++;
  357. #endif
  358. d_retransmit(card);
  359. }
  360. if (exval & W_D_EXI_RDOV) { /* RDOV */
  361. pr_debug("%s: D-channel RDOV\n", card->name);
  362. WriteW6692(card, W_D_CMDR, W_D_CMDR_RRST);
  363. }
  364. if (exval & W_D_EXI_TIN2) /* TIN2 - never */
  365. pr_debug("%s: spurious TIN2 interrupt\n", card->name);
  366. if (exval & W_D_EXI_MOC) { /* MOC - not supported */
  367. v1 = ReadW6692(card, W_MOSR);
  368. pr_debug("%s: spurious MOC interrupt MOSR %02x\n",
  369. card->name, v1);
  370. }
  371. if (exval & W_D_EXI_ISC) { /* ISC - Level1 change */
  372. cir = ReadW6692(card, W_CIR);
  373. pr_debug("%s: ISC CIR %02X\n", card->name, cir);
  374. if (cir & W_CIR_ICC) {
  375. v1 = cir & W_CIR_COD_MASK;
  376. pr_debug("%s: ph_state_change %x -> %x\n", card->name,
  377. dch->state, v1);
  378. card->state = v1;
  379. if (card->fmask & led) {
  380. switch (v1) {
  381. case W_L1IND_AI8:
  382. case W_L1IND_AI10:
  383. w6692_led_handler(card, 1);
  384. break;
  385. default:
  386. w6692_led_handler(card, 0);
  387. break;
  388. }
  389. }
  390. W6692_new_ph(card);
  391. }
  392. if (cir & W_CIR_SCC) {
  393. v1 = ReadW6692(card, W_SQR);
  394. pr_debug("%s: SCC SQR %02X\n", card->name, v1);
  395. }
  396. }
  397. if (exval & W_D_EXI_WEXP)
  398. pr_debug("%s: spurious WEXP interrupt!\n", card->name);
  399. if (exval & W_D_EXI_TEXP)
  400. pr_debug("%s: spurious TEXP interrupt!\n", card->name);
  401. }
  402. static void
  403. W6692_empty_Bfifo(struct w6692_ch *wch, int count)
  404. {
  405. struct w6692_hw *card = wch->bch.hw;
  406. u8 *ptr;
  407. int maxlen;
  408. pr_debug("%s: empty_Bfifo %d\n", card->name, count);
  409. if (unlikely(wch->bch.state == ISDN_P_NONE)) {
  410. pr_debug("%s: empty_Bfifo ISDN_P_NONE\n", card->name);
  411. WriteW6692B(wch, W_B_CMDR, W_B_CMDR_RACK | W_B_CMDR_RACT);
  412. if (wch->bch.rx_skb)
  413. skb_trim(wch->bch.rx_skb, 0);
  414. return;
  415. }
  416. if (test_bit(FLG_RX_OFF, &wch->bch.Flags)) {
  417. wch->bch.dropcnt += count;
  418. WriteW6692B(wch, W_B_CMDR, W_B_CMDR_RACK | W_B_CMDR_RACT);
  419. return;
  420. }
  421. maxlen = bchannel_get_rxbuf(&wch->bch, count);
  422. if (maxlen < 0) {
  423. WriteW6692B(wch, W_B_CMDR, W_B_CMDR_RACK | W_B_CMDR_RACT);
  424. if (wch->bch.rx_skb)
  425. skb_trim(wch->bch.rx_skb, 0);
  426. pr_warn("%s.B%d: No bufferspace for %d bytes\n",
  427. card->name, wch->bch.nr, count);
  428. return;
  429. }
  430. ptr = skb_put(wch->bch.rx_skb, count);
  431. insb(wch->addr + W_B_RFIFO, ptr, count);
  432. WriteW6692B(wch, W_B_CMDR, W_B_CMDR_RACK | W_B_CMDR_RACT);
  433. if (debug & DEBUG_HW_DFIFO) {
  434. snprintf(card->log, 63, "B%1d-recv %s %d ",
  435. wch->bch.nr, card->name, count);
  436. print_hex_dump_bytes(card->log, DUMP_PREFIX_OFFSET, ptr, count);
  437. }
  438. }
  439. static void
  440. W6692_fill_Bfifo(struct w6692_ch *wch)
  441. {
  442. struct w6692_hw *card = wch->bch.hw;
  443. int count, fillempty = 0;
  444. u8 *ptr, cmd = W_B_CMDR_RACT | W_B_CMDR_XMS;
  445. pr_debug("%s: fill Bfifo\n", card->name);
  446. if (!wch->bch.tx_skb) {
  447. if (!test_bit(FLG_TX_EMPTY, &wch->bch.Flags))
  448. return;
  449. ptr = wch->bch.fill;
  450. count = W_B_FIFO_THRESH;
  451. fillempty = 1;
  452. } else {
  453. count = wch->bch.tx_skb->len - wch->bch.tx_idx;
  454. if (count <= 0)
  455. return;
  456. ptr = wch->bch.tx_skb->data + wch->bch.tx_idx;
  457. }
  458. if (count > W_B_FIFO_THRESH)
  459. count = W_B_FIFO_THRESH;
  460. else if (test_bit(FLG_HDLC, &wch->bch.Flags))
  461. cmd |= W_B_CMDR_XME;
  462. pr_debug("%s: fill Bfifo%d/%d\n", card->name,
  463. count, wch->bch.tx_idx);
  464. wch->bch.tx_idx += count;
  465. if (fillempty) {
  466. while (count > 0) {
  467. outsb(wch->addr + W_B_XFIFO, ptr, MISDN_BCH_FILL_SIZE);
  468. count -= MISDN_BCH_FILL_SIZE;
  469. }
  470. } else {
  471. outsb(wch->addr + W_B_XFIFO, ptr, count);
  472. }
  473. WriteW6692B(wch, W_B_CMDR, cmd);
  474. if ((debug & DEBUG_HW_BFIFO) && !fillempty) {
  475. snprintf(card->log, 63, "B%1d-send %s %d ",
  476. wch->bch.nr, card->name, count);
  477. print_hex_dump_bytes(card->log, DUMP_PREFIX_OFFSET, ptr, count);
  478. }
  479. }
  480. #if 0
  481. static int
  482. setvolume(struct w6692_ch *wch, int mic, struct sk_buff *skb)
  483. {
  484. struct w6692_hw *card = wch->bch.hw;
  485. u16 *vol = (u16 *)skb->data;
  486. u8 val;
  487. if ((!(card->fmask & pots)) ||
  488. !test_bit(FLG_TRANSPARENT, &wch->bch.Flags))
  489. return -ENODEV;
  490. if (skb->len < 2)
  491. return -EINVAL;
  492. if (*vol > 7)
  493. return -EINVAL;
  494. val = *vol & 7;
  495. val = 7 - val;
  496. if (mic) {
  497. val <<= 3;
  498. card->xaddr &= 0xc7;
  499. } else {
  500. card->xaddr &= 0xf8;
  501. }
  502. card->xaddr |= val;
  503. WriteW6692(card, W_XADDR, card->xaddr);
  504. return 0;
  505. }
  506. static int
  507. enable_pots(struct w6692_ch *wch)
  508. {
  509. struct w6692_hw *card = wch->bch.hw;
  510. if ((!(card->fmask & pots)) ||
  511. !test_bit(FLG_TRANSPARENT, &wch->bch.Flags))
  512. return -ENODEV;
  513. wch->b_mode |= W_B_MODE_EPCM | W_B_MODE_BSW0;
  514. WriteW6692B(wch, W_B_MODE, wch->b_mode);
  515. WriteW6692B(wch, W_B_CMDR, W_B_CMDR_RRST | W_B_CMDR_XRST);
  516. card->pctl |= ((wch->bch.nr & 2) ? W_PCTL_PCX : 0);
  517. WriteW6692(card, W_PCTL, card->pctl);
  518. return 0;
  519. }
  520. #endif
  521. static int
  522. disable_pots(struct w6692_ch *wch)
  523. {
  524. struct w6692_hw *card = wch->bch.hw;
  525. if (!(card->fmask & pots))
  526. return -ENODEV;
  527. wch->b_mode &= ~(W_B_MODE_EPCM | W_B_MODE_BSW0);
  528. WriteW6692B(wch, W_B_MODE, wch->b_mode);
  529. WriteW6692B(wch, W_B_CMDR, W_B_CMDR_RRST | W_B_CMDR_RACT |
  530. W_B_CMDR_XRST);
  531. return 0;
  532. }
  533. static int
  534. w6692_mode(struct w6692_ch *wch, u32 pr)
  535. {
  536. struct w6692_hw *card;
  537. card = wch->bch.hw;
  538. pr_debug("%s: B%d protocol %x-->%x\n", card->name,
  539. wch->bch.nr, wch->bch.state, pr);
  540. switch (pr) {
  541. case ISDN_P_NONE:
  542. if ((card->fmask & pots) && (wch->b_mode & W_B_MODE_EPCM))
  543. disable_pots(wch);
  544. wch->b_mode = 0;
  545. mISDN_clear_bchannel(&wch->bch);
  546. WriteW6692B(wch, W_B_MODE, wch->b_mode);
  547. WriteW6692B(wch, W_B_CMDR, W_B_CMDR_RRST | W_B_CMDR_XRST);
  548. test_and_clear_bit(FLG_HDLC, &wch->bch.Flags);
  549. test_and_clear_bit(FLG_TRANSPARENT, &wch->bch.Flags);
  550. break;
  551. case ISDN_P_B_RAW:
  552. wch->b_mode = W_B_MODE_MMS;
  553. WriteW6692B(wch, W_B_MODE, wch->b_mode);
  554. WriteW6692B(wch, W_B_EXIM, 0);
  555. WriteW6692B(wch, W_B_CMDR, W_B_CMDR_RRST | W_B_CMDR_RACT |
  556. W_B_CMDR_XRST);
  557. test_and_set_bit(FLG_TRANSPARENT, &wch->bch.Flags);
  558. break;
  559. case ISDN_P_B_HDLC:
  560. wch->b_mode = W_B_MODE_ITF;
  561. WriteW6692B(wch, W_B_MODE, wch->b_mode);
  562. WriteW6692B(wch, W_B_ADM1, 0xff);
  563. WriteW6692B(wch, W_B_ADM2, 0xff);
  564. WriteW6692B(wch, W_B_EXIM, 0);
  565. WriteW6692B(wch, W_B_CMDR, W_B_CMDR_RRST | W_B_CMDR_RACT |
  566. W_B_CMDR_XRST);
  567. test_and_set_bit(FLG_HDLC, &wch->bch.Flags);
  568. break;
  569. default:
  570. pr_info("%s: protocol %x not known\n", card->name, pr);
  571. return -ENOPROTOOPT;
  572. }
  573. wch->bch.state = pr;
  574. return 0;
  575. }
  576. static void
  577. send_next(struct w6692_ch *wch)
  578. {
  579. if (wch->bch.tx_skb && wch->bch.tx_idx < wch->bch.tx_skb->len) {
  580. W6692_fill_Bfifo(wch);
  581. } else {
  582. dev_kfree_skb(wch->bch.tx_skb);
  583. if (get_next_bframe(&wch->bch)) {
  584. W6692_fill_Bfifo(wch);
  585. test_and_clear_bit(FLG_TX_EMPTY, &wch->bch.Flags);
  586. } else if (test_bit(FLG_TX_EMPTY, &wch->bch.Flags)) {
  587. W6692_fill_Bfifo(wch);
  588. }
  589. }
  590. }
  591. static void
  592. W6692B_interrupt(struct w6692_hw *card, int ch)
  593. {
  594. struct w6692_ch *wch = &card->bc[ch];
  595. int count;
  596. u8 stat, star = 0;
  597. stat = ReadW6692B(wch, W_B_EXIR);
  598. pr_debug("%s: B%d EXIR %02x\n", card->name, wch->bch.nr, stat);
  599. if (stat & W_B_EXI_RME) {
  600. star = ReadW6692B(wch, W_B_STAR);
  601. if (star & (W_B_STAR_RDOV | W_B_STAR_CRCE | W_B_STAR_RMB)) {
  602. if ((star & W_B_STAR_RDOV) &&
  603. test_bit(FLG_ACTIVE, &wch->bch.Flags)) {
  604. pr_debug("%s: B%d RDOV proto=%x\n", card->name,
  605. wch->bch.nr, wch->bch.state);
  606. #ifdef ERROR_STATISTIC
  607. wch->bch.err_rdo++;
  608. #endif
  609. }
  610. if (test_bit(FLG_HDLC, &wch->bch.Flags)) {
  611. if (star & W_B_STAR_CRCE) {
  612. pr_debug("%s: B%d CRC error\n",
  613. card->name, wch->bch.nr);
  614. #ifdef ERROR_STATISTIC
  615. wch->bch.err_crc++;
  616. #endif
  617. }
  618. if (star & W_B_STAR_RMB) {
  619. pr_debug("%s: B%d message abort\n",
  620. card->name, wch->bch.nr);
  621. #ifdef ERROR_STATISTIC
  622. wch->bch.err_inv++;
  623. #endif
  624. }
  625. }
  626. WriteW6692B(wch, W_B_CMDR, W_B_CMDR_RACK |
  627. W_B_CMDR_RRST | W_B_CMDR_RACT);
  628. if (wch->bch.rx_skb)
  629. skb_trim(wch->bch.rx_skb, 0);
  630. } else {
  631. count = ReadW6692B(wch, W_B_RBCL) &
  632. (W_B_FIFO_THRESH - 1);
  633. if (count == 0)
  634. count = W_B_FIFO_THRESH;
  635. W6692_empty_Bfifo(wch, count);
  636. recv_Bchannel(&wch->bch, 0, false);
  637. }
  638. }
  639. if (stat & W_B_EXI_RMR) {
  640. if (!(stat & W_B_EXI_RME))
  641. star = ReadW6692B(wch, W_B_STAR);
  642. if (star & W_B_STAR_RDOV) {
  643. pr_debug("%s: B%d RDOV proto=%x\n", card->name,
  644. wch->bch.nr, wch->bch.state);
  645. #ifdef ERROR_STATISTIC
  646. wch->bch.err_rdo++;
  647. #endif
  648. WriteW6692B(wch, W_B_CMDR, W_B_CMDR_RACK |
  649. W_B_CMDR_RRST | W_B_CMDR_RACT);
  650. } else {
  651. W6692_empty_Bfifo(wch, W_B_FIFO_THRESH);
  652. if (test_bit(FLG_TRANSPARENT, &wch->bch.Flags))
  653. recv_Bchannel(&wch->bch, 0, false);
  654. }
  655. }
  656. if (stat & W_B_EXI_RDOV) {
  657. /* only if it is not handled yet */
  658. if (!(star & W_B_STAR_RDOV)) {
  659. pr_debug("%s: B%d RDOV IRQ proto=%x\n", card->name,
  660. wch->bch.nr, wch->bch.state);
  661. #ifdef ERROR_STATISTIC
  662. wch->bch.err_rdo++;
  663. #endif
  664. WriteW6692B(wch, W_B_CMDR, W_B_CMDR_RACK |
  665. W_B_CMDR_RRST | W_B_CMDR_RACT);
  666. }
  667. }
  668. if (stat & W_B_EXI_XFR) {
  669. if (!(stat & (W_B_EXI_RME | W_B_EXI_RMR))) {
  670. star = ReadW6692B(wch, W_B_STAR);
  671. pr_debug("%s: B%d star %02x\n", card->name,
  672. wch->bch.nr, star);
  673. }
  674. if (star & W_B_STAR_XDOW) {
  675. pr_warn("%s: B%d XDOW proto=%x\n", card->name,
  676. wch->bch.nr, wch->bch.state);
  677. #ifdef ERROR_STATISTIC
  678. wch->bch.err_xdu++;
  679. #endif
  680. WriteW6692B(wch, W_B_CMDR, W_B_CMDR_XRST |
  681. W_B_CMDR_RACT);
  682. /* resend */
  683. if (wch->bch.tx_skb) {
  684. if (!test_bit(FLG_TRANSPARENT, &wch->bch.Flags))
  685. wch->bch.tx_idx = 0;
  686. }
  687. }
  688. send_next(wch);
  689. if (star & W_B_STAR_XDOW)
  690. return; /* handle XDOW only once */
  691. }
  692. if (stat & W_B_EXI_XDUN) {
  693. pr_warn("%s: B%d XDUN proto=%x\n", card->name,
  694. wch->bch.nr, wch->bch.state);
  695. #ifdef ERROR_STATISTIC
  696. wch->bch.err_xdu++;
  697. #endif
  698. /* resend - no XRST needed */
  699. if (wch->bch.tx_skb) {
  700. if (!test_bit(FLG_TRANSPARENT, &wch->bch.Flags))
  701. wch->bch.tx_idx = 0;
  702. } else if (test_bit(FLG_FILLEMPTY, &wch->bch.Flags)) {
  703. test_and_set_bit(FLG_TX_EMPTY, &wch->bch.Flags);
  704. }
  705. send_next(wch);
  706. }
  707. }
  708. static irqreturn_t
  709. w6692_irq(int intno, void *dev_id)
  710. {
  711. struct w6692_hw *card = dev_id;
  712. u8 ista;
  713. spin_lock(&card->lock);
  714. ista = ReadW6692(card, W_ISTA);
  715. if ((ista | card->imask) == card->imask) {
  716. /* possible a shared IRQ reqest */
  717. spin_unlock(&card->lock);
  718. return IRQ_NONE;
  719. }
  720. card->irqcnt++;
  721. pr_debug("%s: ista %02x\n", card->name, ista);
  722. ista &= ~card->imask;
  723. if (ista & W_INT_B1_EXI)
  724. W6692B_interrupt(card, 0);
  725. if (ista & W_INT_B2_EXI)
  726. W6692B_interrupt(card, 1);
  727. if (ista & W_INT_D_RME)
  728. handle_rxD(card);
  729. if (ista & W_INT_D_RMR)
  730. W6692_empty_Dfifo(card, W_D_FIFO_THRESH);
  731. if (ista & W_INT_D_XFR)
  732. handle_txD(card);
  733. if (ista & W_INT_D_EXI)
  734. handle_statusD(card);
  735. if (ista & (W_INT_XINT0 | W_INT_XINT1)) /* XINT0/1 - never */
  736. pr_debug("%s: W6692 spurious XINT!\n", card->name);
  737. /* End IRQ Handler */
  738. spin_unlock(&card->lock);
  739. return IRQ_HANDLED;
  740. }
  741. static void
  742. dbusy_timer_handler(struct timer_list *t)
  743. {
  744. struct dchannel *dch = from_timer(dch, t, timer);
  745. struct w6692_hw *card = dch->hw;
  746. int rbch, star;
  747. u_long flags;
  748. if (test_bit(FLG_BUSY_TIMER, &dch->Flags)) {
  749. spin_lock_irqsave(&card->lock, flags);
  750. rbch = ReadW6692(card, W_D_RBCH);
  751. star = ReadW6692(card, W_D_STAR);
  752. pr_debug("%s: D-Channel Busy RBCH %02x STAR %02x\n",
  753. card->name, rbch, star);
  754. if (star & W_D_STAR_XBZ) /* D-Channel Busy */
  755. test_and_set_bit(FLG_L1_BUSY, &dch->Flags);
  756. else {
  757. /* discard frame; reset transceiver */
  758. test_and_clear_bit(FLG_BUSY_TIMER, &dch->Flags);
  759. if (dch->tx_idx)
  760. dch->tx_idx = 0;
  761. else
  762. pr_info("%s: W6692 D-Channel Busy no tx_idx\n",
  763. card->name);
  764. /* Transmitter reset */
  765. WriteW6692(card, W_D_CMDR, W_D_CMDR_XRST);
  766. }
  767. spin_unlock_irqrestore(&card->lock, flags);
  768. }
  769. }
  770. static void initW6692(struct w6692_hw *card)
  771. {
  772. u8 val;
  773. timer_setup(&card->dch.timer, dbusy_timer_handler, 0);
  774. w6692_mode(&card->bc[0], ISDN_P_NONE);
  775. w6692_mode(&card->bc[1], ISDN_P_NONE);
  776. WriteW6692(card, W_D_CTL, 0x00);
  777. disable_hwirq(card);
  778. WriteW6692(card, W_D_SAM, 0xff);
  779. WriteW6692(card, W_D_TAM, 0xff);
  780. WriteW6692(card, W_D_MODE, W_D_MODE_RACT);
  781. card->state = W_L1CMD_RST;
  782. ph_command(card, W_L1CMD_RST);
  783. ph_command(card, W_L1CMD_ECK);
  784. /* enable all IRQ but extern */
  785. card->imask = 0x18;
  786. WriteW6692(card, W_D_EXIM, 0x00);
  787. WriteW6692B(&card->bc[0], W_B_EXIM, 0);
  788. WriteW6692B(&card->bc[1], W_B_EXIM, 0);
  789. /* Reset D-chan receiver and transmitter */
  790. WriteW6692(card, W_D_CMDR, W_D_CMDR_RRST | W_D_CMDR_XRST);
  791. /* Reset B-chan receiver and transmitter */
  792. WriteW6692B(&card->bc[0], W_B_CMDR, W_B_CMDR_RRST | W_B_CMDR_XRST);
  793. WriteW6692B(&card->bc[1], W_B_CMDR, W_B_CMDR_RRST | W_B_CMDR_XRST);
  794. /* enable peripheral */
  795. if (card->subtype == W6692_USR) {
  796. /* seems that USR implemented some power control features
  797. * Pin 79 is connected to the oscilator circuit so we
  798. * have to handle it here
  799. */
  800. card->pctl = 0x80;
  801. card->xdata = 0;
  802. WriteW6692(card, W_PCTL, card->pctl);
  803. WriteW6692(card, W_XDATA, card->xdata);
  804. } else {
  805. card->pctl = W_PCTL_OE5 | W_PCTL_OE4 | W_PCTL_OE2 |
  806. W_PCTL_OE1 | W_PCTL_OE0;
  807. card->xaddr = 0x00;/* all sw off */
  808. if (card->fmask & pots)
  809. card->xdata |= 0x06; /* POWER UP/ LED OFF / ALAW */
  810. if (card->fmask & led)
  811. card->xdata |= 0x04; /* LED OFF */
  812. if ((card->fmask & pots) || (card->fmask & led)) {
  813. WriteW6692(card, W_PCTL, card->pctl);
  814. WriteW6692(card, W_XADDR, card->xaddr);
  815. WriteW6692(card, W_XDATA, card->xdata);
  816. val = ReadW6692(card, W_XADDR);
  817. if (debug & DEBUG_HW)
  818. pr_notice("%s: W_XADDR=%02x\n",
  819. card->name, val);
  820. }
  821. }
  822. }
  823. static void
  824. reset_w6692(struct w6692_hw *card)
  825. {
  826. WriteW6692(card, W_D_CTL, W_D_CTL_SRST);
  827. mdelay(10);
  828. WriteW6692(card, W_D_CTL, 0);
  829. }
  830. static int
  831. init_card(struct w6692_hw *card)
  832. {
  833. int cnt = 3;
  834. u_long flags;
  835. spin_lock_irqsave(&card->lock, flags);
  836. disable_hwirq(card);
  837. spin_unlock_irqrestore(&card->lock, flags);
  838. if (request_irq(card->irq, w6692_irq, IRQF_SHARED, card->name, card)) {
  839. pr_info("%s: couldn't get interrupt %d\n", card->name,
  840. card->irq);
  841. return -EIO;
  842. }
  843. while (cnt--) {
  844. spin_lock_irqsave(&card->lock, flags);
  845. initW6692(card);
  846. enable_hwirq(card);
  847. spin_unlock_irqrestore(&card->lock, flags);
  848. /* Timeout 10ms */
  849. msleep_interruptible(10);
  850. if (debug & DEBUG_HW)
  851. pr_notice("%s: IRQ %d count %d\n", card->name,
  852. card->irq, card->irqcnt);
  853. if (!card->irqcnt) {
  854. pr_info("%s: IRQ(%d) getting no IRQs during init %d\n",
  855. card->name, card->irq, 3 - cnt);
  856. reset_w6692(card);
  857. } else
  858. return 0;
  859. }
  860. free_irq(card->irq, card);
  861. return -EIO;
  862. }
  863. static int
  864. w6692_l2l1B(struct mISDNchannel *ch, struct sk_buff *skb)
  865. {
  866. struct bchannel *bch = container_of(ch, struct bchannel, ch);
  867. struct w6692_ch *bc = container_of(bch, struct w6692_ch, bch);
  868. struct w6692_hw *card = bch->hw;
  869. int ret = -EINVAL;
  870. struct mISDNhead *hh = mISDN_HEAD_P(skb);
  871. unsigned long flags;
  872. switch (hh->prim) {
  873. case PH_DATA_REQ:
  874. spin_lock_irqsave(&card->lock, flags);
  875. ret = bchannel_senddata(bch, skb);
  876. if (ret > 0) { /* direct TX */
  877. ret = 0;
  878. W6692_fill_Bfifo(bc);
  879. }
  880. spin_unlock_irqrestore(&card->lock, flags);
  881. return ret;
  882. case PH_ACTIVATE_REQ:
  883. spin_lock_irqsave(&card->lock, flags);
  884. if (!test_and_set_bit(FLG_ACTIVE, &bch->Flags))
  885. ret = w6692_mode(bc, ch->protocol);
  886. else
  887. ret = 0;
  888. spin_unlock_irqrestore(&card->lock, flags);
  889. if (!ret)
  890. _queue_data(ch, PH_ACTIVATE_IND, MISDN_ID_ANY, 0,
  891. NULL, GFP_KERNEL);
  892. break;
  893. case PH_DEACTIVATE_REQ:
  894. spin_lock_irqsave(&card->lock, flags);
  895. mISDN_clear_bchannel(bch);
  896. w6692_mode(bc, ISDN_P_NONE);
  897. spin_unlock_irqrestore(&card->lock, flags);
  898. _queue_data(ch, PH_DEACTIVATE_IND, MISDN_ID_ANY, 0,
  899. NULL, GFP_KERNEL);
  900. ret = 0;
  901. break;
  902. default:
  903. pr_info("%s: %s unknown prim(%x,%x)\n",
  904. card->name, __func__, hh->prim, hh->id);
  905. ret = -EINVAL;
  906. }
  907. if (!ret)
  908. dev_kfree_skb(skb);
  909. return ret;
  910. }
  911. static int
  912. channel_bctrl(struct bchannel *bch, struct mISDN_ctrl_req *cq)
  913. {
  914. return mISDN_ctrl_bchannel(bch, cq);
  915. }
  916. static int
  917. open_bchannel(struct w6692_hw *card, struct channel_req *rq)
  918. {
  919. struct bchannel *bch;
  920. if (rq->adr.channel == 0 || rq->adr.channel > 2)
  921. return -EINVAL;
  922. if (rq->protocol == ISDN_P_NONE)
  923. return -EINVAL;
  924. bch = &card->bc[rq->adr.channel - 1].bch;
  925. if (test_and_set_bit(FLG_OPEN, &bch->Flags))
  926. return -EBUSY; /* b-channel can be only open once */
  927. bch->ch.protocol = rq->protocol;
  928. rq->ch = &bch->ch;
  929. return 0;
  930. }
  931. static int
  932. channel_ctrl(struct w6692_hw *card, struct mISDN_ctrl_req *cq)
  933. {
  934. int ret = 0;
  935. switch (cq->op) {
  936. case MISDN_CTRL_GETOP:
  937. cq->op = MISDN_CTRL_L1_TIMER3;
  938. break;
  939. case MISDN_CTRL_L1_TIMER3:
  940. ret = l1_event(card->dch.l1, HW_TIMER3_VALUE | (cq->p1 & 0xff));
  941. break;
  942. default:
  943. pr_info("%s: unknown CTRL OP %x\n", card->name, cq->op);
  944. ret = -EINVAL;
  945. break;
  946. }
  947. return ret;
  948. }
  949. static int
  950. w6692_bctrl(struct mISDNchannel *ch, u32 cmd, void *arg)
  951. {
  952. struct bchannel *bch = container_of(ch, struct bchannel, ch);
  953. struct w6692_ch *bc = container_of(bch, struct w6692_ch, bch);
  954. struct w6692_hw *card = bch->hw;
  955. int ret = -EINVAL;
  956. u_long flags;
  957. pr_debug("%s: %s cmd:%x %p\n", card->name, __func__, cmd, arg);
  958. switch (cmd) {
  959. case CLOSE_CHANNEL:
  960. test_and_clear_bit(FLG_OPEN, &bch->Flags);
  961. cancel_work_sync(&bch->workq);
  962. spin_lock_irqsave(&card->lock, flags);
  963. mISDN_clear_bchannel(bch);
  964. w6692_mode(bc, ISDN_P_NONE);
  965. spin_unlock_irqrestore(&card->lock, flags);
  966. ch->protocol = ISDN_P_NONE;
  967. ch->peer = NULL;
  968. module_put(THIS_MODULE);
  969. ret = 0;
  970. break;
  971. case CONTROL_CHANNEL:
  972. ret = channel_bctrl(bch, arg);
  973. break;
  974. default:
  975. pr_info("%s: %s unknown prim(%x)\n",
  976. card->name, __func__, cmd);
  977. }
  978. return ret;
  979. }
  980. static int
  981. w6692_l2l1D(struct mISDNchannel *ch, struct sk_buff *skb)
  982. {
  983. struct mISDNdevice *dev = container_of(ch, struct mISDNdevice, D);
  984. struct dchannel *dch = container_of(dev, struct dchannel, dev);
  985. struct w6692_hw *card = container_of(dch, struct w6692_hw, dch);
  986. int ret = -EINVAL;
  987. struct mISDNhead *hh = mISDN_HEAD_P(skb);
  988. u32 id;
  989. u_long flags;
  990. switch (hh->prim) {
  991. case PH_DATA_REQ:
  992. spin_lock_irqsave(&card->lock, flags);
  993. ret = dchannel_senddata(dch, skb);
  994. if (ret > 0) { /* direct TX */
  995. id = hh->id; /* skb can be freed */
  996. W6692_fill_Dfifo(card);
  997. ret = 0;
  998. spin_unlock_irqrestore(&card->lock, flags);
  999. queue_ch_frame(ch, PH_DATA_CNF, id, NULL);
  1000. } else
  1001. spin_unlock_irqrestore(&card->lock, flags);
  1002. return ret;
  1003. case PH_ACTIVATE_REQ:
  1004. ret = l1_event(dch->l1, hh->prim);
  1005. break;
  1006. case PH_DEACTIVATE_REQ:
  1007. test_and_clear_bit(FLG_L2_ACTIVATED, &dch->Flags);
  1008. ret = l1_event(dch->l1, hh->prim);
  1009. break;
  1010. }
  1011. if (!ret)
  1012. dev_kfree_skb(skb);
  1013. return ret;
  1014. }
  1015. static int
  1016. w6692_l1callback(struct dchannel *dch, u32 cmd)
  1017. {
  1018. struct w6692_hw *card = container_of(dch, struct w6692_hw, dch);
  1019. u_long flags;
  1020. pr_debug("%s: cmd(%x) state(%02x)\n", card->name, cmd, card->state);
  1021. switch (cmd) {
  1022. case INFO3_P8:
  1023. spin_lock_irqsave(&card->lock, flags);
  1024. ph_command(card, W_L1CMD_AR8);
  1025. spin_unlock_irqrestore(&card->lock, flags);
  1026. break;
  1027. case INFO3_P10:
  1028. spin_lock_irqsave(&card->lock, flags);
  1029. ph_command(card, W_L1CMD_AR10);
  1030. spin_unlock_irqrestore(&card->lock, flags);
  1031. break;
  1032. case HW_RESET_REQ:
  1033. spin_lock_irqsave(&card->lock, flags);
  1034. if (card->state != W_L1IND_DRD)
  1035. ph_command(card, W_L1CMD_RST);
  1036. ph_command(card, W_L1CMD_ECK);
  1037. spin_unlock_irqrestore(&card->lock, flags);
  1038. break;
  1039. case HW_DEACT_REQ:
  1040. skb_queue_purge(&dch->squeue);
  1041. if (dch->tx_skb) {
  1042. dev_kfree_skb(dch->tx_skb);
  1043. dch->tx_skb = NULL;
  1044. }
  1045. dch->tx_idx = 0;
  1046. if (dch->rx_skb) {
  1047. dev_kfree_skb(dch->rx_skb);
  1048. dch->rx_skb = NULL;
  1049. }
  1050. test_and_clear_bit(FLG_TX_BUSY, &dch->Flags);
  1051. if (test_and_clear_bit(FLG_BUSY_TIMER, &dch->Flags))
  1052. del_timer(&dch->timer);
  1053. break;
  1054. case HW_POWERUP_REQ:
  1055. spin_lock_irqsave(&card->lock, flags);
  1056. ph_command(card, W_L1CMD_ECK);
  1057. spin_unlock_irqrestore(&card->lock, flags);
  1058. break;
  1059. case PH_ACTIVATE_IND:
  1060. test_and_set_bit(FLG_ACTIVE, &dch->Flags);
  1061. _queue_data(&dch->dev.D, cmd, MISDN_ID_ANY, 0, NULL,
  1062. GFP_ATOMIC);
  1063. break;
  1064. case PH_DEACTIVATE_IND:
  1065. test_and_clear_bit(FLG_ACTIVE, &dch->Flags);
  1066. _queue_data(&dch->dev.D, cmd, MISDN_ID_ANY, 0, NULL,
  1067. GFP_ATOMIC);
  1068. break;
  1069. default:
  1070. pr_debug("%s: %s unknown command %x\n", card->name,
  1071. __func__, cmd);
  1072. return -1;
  1073. }
  1074. return 0;
  1075. }
  1076. static int
  1077. open_dchannel(struct w6692_hw *card, struct channel_req *rq, void *caller)
  1078. {
  1079. pr_debug("%s: %s dev(%d) open from %p\n", card->name, __func__,
  1080. card->dch.dev.id, caller);
  1081. if (rq->protocol != ISDN_P_TE_S0)
  1082. return -EINVAL;
  1083. if (rq->adr.channel == 1)
  1084. /* E-Channel not supported */
  1085. return -EINVAL;
  1086. rq->ch = &card->dch.dev.D;
  1087. rq->ch->protocol = rq->protocol;
  1088. if (card->dch.state == 7)
  1089. _queue_data(rq->ch, PH_ACTIVATE_IND, MISDN_ID_ANY,
  1090. 0, NULL, GFP_KERNEL);
  1091. return 0;
  1092. }
  1093. static int
  1094. w6692_dctrl(struct mISDNchannel *ch, u32 cmd, void *arg)
  1095. {
  1096. struct mISDNdevice *dev = container_of(ch, struct mISDNdevice, D);
  1097. struct dchannel *dch = container_of(dev, struct dchannel, dev);
  1098. struct w6692_hw *card = container_of(dch, struct w6692_hw, dch);
  1099. struct channel_req *rq;
  1100. int err = 0;
  1101. pr_debug("%s: DCTRL: %x %p\n", card->name, cmd, arg);
  1102. switch (cmd) {
  1103. case OPEN_CHANNEL:
  1104. rq = arg;
  1105. if (rq->protocol == ISDN_P_TE_S0)
  1106. err = open_dchannel(card, rq, __builtin_return_address(0));
  1107. else
  1108. err = open_bchannel(card, rq);
  1109. if (err)
  1110. break;
  1111. if (!try_module_get(THIS_MODULE))
  1112. pr_info("%s: cannot get module\n", card->name);
  1113. break;
  1114. case CLOSE_CHANNEL:
  1115. pr_debug("%s: dev(%d) close from %p\n", card->name,
  1116. dch->dev.id, __builtin_return_address(0));
  1117. module_put(THIS_MODULE);
  1118. break;
  1119. case CONTROL_CHANNEL:
  1120. err = channel_ctrl(card, arg);
  1121. break;
  1122. default:
  1123. pr_debug("%s: unknown DCTRL command %x\n", card->name, cmd);
  1124. return -EINVAL;
  1125. }
  1126. return err;
  1127. }
  1128. static int
  1129. setup_w6692(struct w6692_hw *card)
  1130. {
  1131. u32 val;
  1132. if (!request_region(card->addr, 256, card->name)) {
  1133. pr_info("%s: config port %x-%x already in use\n", card->name,
  1134. card->addr, card->addr + 255);
  1135. return -EIO;
  1136. }
  1137. W6692Version(card);
  1138. card->bc[0].addr = card->addr;
  1139. card->bc[1].addr = card->addr + 0x40;
  1140. val = ReadW6692(card, W_ISTA);
  1141. if (debug & DEBUG_HW)
  1142. pr_notice("%s ISTA=%02x\n", card->name, val);
  1143. val = ReadW6692(card, W_IMASK);
  1144. if (debug & DEBUG_HW)
  1145. pr_notice("%s IMASK=%02x\n", card->name, val);
  1146. val = ReadW6692(card, W_D_EXIR);
  1147. if (debug & DEBUG_HW)
  1148. pr_notice("%s D_EXIR=%02x\n", card->name, val);
  1149. val = ReadW6692(card, W_D_EXIM);
  1150. if (debug & DEBUG_HW)
  1151. pr_notice("%s D_EXIM=%02x\n", card->name, val);
  1152. val = ReadW6692(card, W_D_RSTA);
  1153. if (debug & DEBUG_HW)
  1154. pr_notice("%s D_RSTA=%02x\n", card->name, val);
  1155. return 0;
  1156. }
  1157. static void
  1158. release_card(struct w6692_hw *card)
  1159. {
  1160. u_long flags;
  1161. spin_lock_irqsave(&card->lock, flags);
  1162. disable_hwirq(card);
  1163. w6692_mode(&card->bc[0], ISDN_P_NONE);
  1164. w6692_mode(&card->bc[1], ISDN_P_NONE);
  1165. if ((card->fmask & led) || card->subtype == W6692_USR) {
  1166. card->xdata |= 0x04; /* LED OFF */
  1167. WriteW6692(card, W_XDATA, card->xdata);
  1168. }
  1169. spin_unlock_irqrestore(&card->lock, flags);
  1170. free_irq(card->irq, card);
  1171. l1_event(card->dch.l1, CLOSE_CHANNEL);
  1172. mISDN_unregister_device(&card->dch.dev);
  1173. release_region(card->addr, 256);
  1174. mISDN_freebchannel(&card->bc[1].bch);
  1175. mISDN_freebchannel(&card->bc[0].bch);
  1176. mISDN_freedchannel(&card->dch);
  1177. write_lock_irqsave(&card_lock, flags);
  1178. list_del(&card->list);
  1179. write_unlock_irqrestore(&card_lock, flags);
  1180. pci_disable_device(card->pdev);
  1181. pci_set_drvdata(card->pdev, NULL);
  1182. kfree(card);
  1183. }
  1184. static int
  1185. setup_instance(struct w6692_hw *card)
  1186. {
  1187. int i, err;
  1188. u_long flags;
  1189. snprintf(card->name, MISDN_MAX_IDLEN - 1, "w6692.%d", w6692_cnt + 1);
  1190. write_lock_irqsave(&card_lock, flags);
  1191. list_add_tail(&card->list, &Cards);
  1192. write_unlock_irqrestore(&card_lock, flags);
  1193. card->fmask = (1 << w6692_cnt);
  1194. _set_debug(card);
  1195. spin_lock_init(&card->lock);
  1196. mISDN_initdchannel(&card->dch, MAX_DFRAME_LEN_L1, W6692_ph_bh);
  1197. card->dch.dev.Dprotocols = (1 << ISDN_P_TE_S0);
  1198. card->dch.dev.D.send = w6692_l2l1D;
  1199. card->dch.dev.D.ctrl = w6692_dctrl;
  1200. card->dch.dev.Bprotocols = (1 << (ISDN_P_B_RAW & ISDN_P_B_MASK)) |
  1201. (1 << (ISDN_P_B_HDLC & ISDN_P_B_MASK));
  1202. card->dch.hw = card;
  1203. card->dch.dev.nrbchan = 2;
  1204. for (i = 0; i < 2; i++) {
  1205. mISDN_initbchannel(&card->bc[i].bch, MAX_DATA_MEM,
  1206. W_B_FIFO_THRESH);
  1207. card->bc[i].bch.hw = card;
  1208. card->bc[i].bch.nr = i + 1;
  1209. card->bc[i].bch.ch.nr = i + 1;
  1210. card->bc[i].bch.ch.send = w6692_l2l1B;
  1211. card->bc[i].bch.ch.ctrl = w6692_bctrl;
  1212. set_channelmap(i + 1, card->dch.dev.channelmap);
  1213. list_add(&card->bc[i].bch.ch.list, &card->dch.dev.bchannels);
  1214. }
  1215. err = setup_w6692(card);
  1216. if (err)
  1217. goto error_setup;
  1218. err = mISDN_register_device(&card->dch.dev, &card->pdev->dev,
  1219. card->name);
  1220. if (err)
  1221. goto error_reg;
  1222. err = init_card(card);
  1223. if (err)
  1224. goto error_init;
  1225. err = create_l1(&card->dch, w6692_l1callback);
  1226. if (!err) {
  1227. w6692_cnt++;
  1228. pr_notice("W6692 %d cards installed\n", w6692_cnt);
  1229. return 0;
  1230. }
  1231. free_irq(card->irq, card);
  1232. error_init:
  1233. mISDN_unregister_device(&card->dch.dev);
  1234. error_reg:
  1235. release_region(card->addr, 256);
  1236. error_setup:
  1237. mISDN_freebchannel(&card->bc[1].bch);
  1238. mISDN_freebchannel(&card->bc[0].bch);
  1239. mISDN_freedchannel(&card->dch);
  1240. write_lock_irqsave(&card_lock, flags);
  1241. list_del(&card->list);
  1242. write_unlock_irqrestore(&card_lock, flags);
  1243. kfree(card);
  1244. return err;
  1245. }
  1246. static int
  1247. w6692_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
  1248. {
  1249. int err = -ENOMEM;
  1250. struct w6692_hw *card;
  1251. struct w6692map *m = (struct w6692map *)ent->driver_data;
  1252. card = kzalloc(sizeof(struct w6692_hw), GFP_KERNEL);
  1253. if (!card) {
  1254. pr_info("No kmem for w6692 card\n");
  1255. return err;
  1256. }
  1257. card->pdev = pdev;
  1258. card->subtype = m->subtype;
  1259. err = pci_enable_device(pdev);
  1260. if (err) {
  1261. kfree(card);
  1262. return err;
  1263. }
  1264. printk(KERN_INFO "mISDN_w6692: found adapter %s at %s\n",
  1265. m->name, pci_name(pdev));
  1266. card->addr = pci_resource_start(pdev, 1);
  1267. card->irq = pdev->irq;
  1268. pci_set_drvdata(pdev, card);
  1269. err = setup_instance(card);
  1270. if (err)
  1271. pci_set_drvdata(pdev, NULL);
  1272. return err;
  1273. }
  1274. static void
  1275. w6692_remove_pci(struct pci_dev *pdev)
  1276. {
  1277. struct w6692_hw *card = pci_get_drvdata(pdev);
  1278. if (card)
  1279. release_card(card);
  1280. else
  1281. if (debug)
  1282. pr_notice("%s: drvdata already removed\n", __func__);
  1283. }
  1284. static const struct pci_device_id w6692_ids[] = {
  1285. { PCI_VENDOR_ID_DYNALINK, PCI_DEVICE_ID_DYNALINK_IS64PH,
  1286. PCI_ANY_ID, PCI_ANY_ID, 0, 0, (ulong)&w6692_map[0]},
  1287. { PCI_VENDOR_ID_WINBOND2, PCI_DEVICE_ID_WINBOND2_6692,
  1288. PCI_VENDOR_ID_USR, PCI_DEVICE_ID_USR_6692, 0, 0,
  1289. (ulong)&w6692_map[2]},
  1290. { PCI_VENDOR_ID_WINBOND2, PCI_DEVICE_ID_WINBOND2_6692,
  1291. PCI_ANY_ID, PCI_ANY_ID, 0, 0, (ulong)&w6692_map[1]},
  1292. { }
  1293. };
  1294. MODULE_DEVICE_TABLE(pci, w6692_ids);
  1295. static struct pci_driver w6692_driver = {
  1296. .name = "w6692",
  1297. .probe = w6692_probe,
  1298. .remove = w6692_remove_pci,
  1299. .id_table = w6692_ids,
  1300. };
  1301. static int __init w6692_init(void)
  1302. {
  1303. int err;
  1304. pr_notice("Winbond W6692 PCI driver Rev. %s\n", W6692_REV);
  1305. err = pci_register_driver(&w6692_driver);
  1306. return err;
  1307. }
  1308. static void __exit w6692_cleanup(void)
  1309. {
  1310. pci_unregister_driver(&w6692_driver);
  1311. }
  1312. module_init(w6692_init);
  1313. module_exit(w6692_cleanup);