bmc150_magn.c 27 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Bosch BMC150 three-axis magnetic field sensor driver
  4. *
  5. * Copyright (c) 2015, Intel Corporation.
  6. *
  7. * This code is based on bmm050_api.c authored by [email protected]:
  8. *
  9. * (C) Copyright 2011~2014 Bosch Sensortec GmbH All Rights Reserved
  10. */
  11. #include <linux/module.h>
  12. #include <linux/i2c.h>
  13. #include <linux/interrupt.h>
  14. #include <linux/delay.h>
  15. #include <linux/slab.h>
  16. #include <linux/acpi.h>
  17. #include <linux/pm.h>
  18. #include <linux/pm_runtime.h>
  19. #include <linux/iio/iio.h>
  20. #include <linux/iio/sysfs.h>
  21. #include <linux/iio/buffer.h>
  22. #include <linux/iio/events.h>
  23. #include <linux/iio/trigger.h>
  24. #include <linux/iio/trigger_consumer.h>
  25. #include <linux/iio/triggered_buffer.h>
  26. #include <linux/regmap.h>
  27. #include <linux/regulator/consumer.h>
  28. #include "bmc150_magn.h"
  29. #define BMC150_MAGN_DRV_NAME "bmc150_magn"
  30. #define BMC150_MAGN_IRQ_NAME "bmc150_magn_event"
  31. #define BMC150_MAGN_REG_CHIP_ID 0x40
  32. #define BMC150_MAGN_CHIP_ID_VAL 0x32
  33. #define BMC150_MAGN_REG_X_L 0x42
  34. #define BMC150_MAGN_REG_X_M 0x43
  35. #define BMC150_MAGN_REG_Y_L 0x44
  36. #define BMC150_MAGN_REG_Y_M 0x45
  37. #define BMC150_MAGN_SHIFT_XY_L 3
  38. #define BMC150_MAGN_REG_Z_L 0x46
  39. #define BMC150_MAGN_REG_Z_M 0x47
  40. #define BMC150_MAGN_SHIFT_Z_L 1
  41. #define BMC150_MAGN_REG_RHALL_L 0x48
  42. #define BMC150_MAGN_REG_RHALL_M 0x49
  43. #define BMC150_MAGN_SHIFT_RHALL_L 2
  44. #define BMC150_MAGN_REG_INT_STATUS 0x4A
  45. #define BMC150_MAGN_REG_POWER 0x4B
  46. #define BMC150_MAGN_MASK_POWER_CTL BIT(0)
  47. #define BMC150_MAGN_REG_OPMODE_ODR 0x4C
  48. #define BMC150_MAGN_MASK_OPMODE GENMASK(2, 1)
  49. #define BMC150_MAGN_SHIFT_OPMODE 1
  50. #define BMC150_MAGN_MODE_NORMAL 0x00
  51. #define BMC150_MAGN_MODE_FORCED 0x01
  52. #define BMC150_MAGN_MODE_SLEEP 0x03
  53. #define BMC150_MAGN_MASK_ODR GENMASK(5, 3)
  54. #define BMC150_MAGN_SHIFT_ODR 3
  55. #define BMC150_MAGN_REG_INT 0x4D
  56. #define BMC150_MAGN_REG_INT_DRDY 0x4E
  57. #define BMC150_MAGN_MASK_DRDY_EN BIT(7)
  58. #define BMC150_MAGN_SHIFT_DRDY_EN 7
  59. #define BMC150_MAGN_MASK_DRDY_INT3 BIT(6)
  60. #define BMC150_MAGN_MASK_DRDY_Z_EN BIT(5)
  61. #define BMC150_MAGN_MASK_DRDY_Y_EN BIT(4)
  62. #define BMC150_MAGN_MASK_DRDY_X_EN BIT(3)
  63. #define BMC150_MAGN_MASK_DRDY_DR_POLARITY BIT(2)
  64. #define BMC150_MAGN_MASK_DRDY_LATCHING BIT(1)
  65. #define BMC150_MAGN_MASK_DRDY_INT3_POLARITY BIT(0)
  66. #define BMC150_MAGN_REG_LOW_THRESH 0x4F
  67. #define BMC150_MAGN_REG_HIGH_THRESH 0x50
  68. #define BMC150_MAGN_REG_REP_XY 0x51
  69. #define BMC150_MAGN_REG_REP_Z 0x52
  70. #define BMC150_MAGN_REG_REP_DATAMASK GENMASK(7, 0)
  71. #define BMC150_MAGN_REG_TRIM_START 0x5D
  72. #define BMC150_MAGN_REG_TRIM_END 0x71
  73. #define BMC150_MAGN_XY_OVERFLOW_VAL -4096
  74. #define BMC150_MAGN_Z_OVERFLOW_VAL -16384
  75. /* Time from SUSPEND to SLEEP */
  76. #define BMC150_MAGN_START_UP_TIME_MS 3
  77. #define BMC150_MAGN_AUTO_SUSPEND_DELAY_MS 2000
  78. #define BMC150_MAGN_REGVAL_TO_REPXY(regval) (((regval) * 2) + 1)
  79. #define BMC150_MAGN_REGVAL_TO_REPZ(regval) ((regval) + 1)
  80. #define BMC150_MAGN_REPXY_TO_REGVAL(rep) (((rep) - 1) / 2)
  81. #define BMC150_MAGN_REPZ_TO_REGVAL(rep) ((rep) - 1)
  82. enum bmc150_magn_axis {
  83. AXIS_X,
  84. AXIS_Y,
  85. AXIS_Z,
  86. RHALL,
  87. AXIS_XYZ_MAX = RHALL,
  88. AXIS_XYZR_MAX,
  89. };
  90. enum bmc150_magn_power_modes {
  91. BMC150_MAGN_POWER_MODE_SUSPEND,
  92. BMC150_MAGN_POWER_MODE_SLEEP,
  93. BMC150_MAGN_POWER_MODE_NORMAL,
  94. };
  95. struct bmc150_magn_trim_regs {
  96. s8 x1;
  97. s8 y1;
  98. __le16 reserved1;
  99. u8 reserved2;
  100. __le16 z4;
  101. s8 x2;
  102. s8 y2;
  103. __le16 reserved3;
  104. __le16 z2;
  105. __le16 z1;
  106. __le16 xyz1;
  107. __le16 z3;
  108. s8 xy2;
  109. u8 xy1;
  110. } __packed;
  111. struct bmc150_magn_data {
  112. struct device *dev;
  113. /*
  114. * 1. Protect this structure.
  115. * 2. Serialize sequences that power on/off the device and access HW.
  116. */
  117. struct mutex mutex;
  118. struct regmap *regmap;
  119. struct regulator_bulk_data regulators[2];
  120. struct iio_mount_matrix orientation;
  121. /* Ensure timestamp is naturally aligned */
  122. struct {
  123. s32 chans[3];
  124. s64 timestamp __aligned(8);
  125. } scan;
  126. struct iio_trigger *dready_trig;
  127. bool dready_trigger_on;
  128. int max_odr;
  129. int irq;
  130. };
  131. static const struct {
  132. int freq;
  133. u8 reg_val;
  134. } bmc150_magn_samp_freq_table[] = { {2, 0x01},
  135. {6, 0x02},
  136. {8, 0x03},
  137. {10, 0x00},
  138. {15, 0x04},
  139. {20, 0x05},
  140. {25, 0x06},
  141. {30, 0x07} };
  142. enum bmc150_magn_presets {
  143. LOW_POWER_PRESET,
  144. REGULAR_PRESET,
  145. ENHANCED_REGULAR_PRESET,
  146. HIGH_ACCURACY_PRESET
  147. };
  148. static const struct bmc150_magn_preset {
  149. u8 rep_xy;
  150. u8 rep_z;
  151. u8 odr;
  152. } bmc150_magn_presets_table[] = {
  153. [LOW_POWER_PRESET] = {3, 3, 10},
  154. [REGULAR_PRESET] = {9, 15, 10},
  155. [ENHANCED_REGULAR_PRESET] = {15, 27, 10},
  156. [HIGH_ACCURACY_PRESET] = {47, 83, 20},
  157. };
  158. #define BMC150_MAGN_DEFAULT_PRESET REGULAR_PRESET
  159. static bool bmc150_magn_is_writeable_reg(struct device *dev, unsigned int reg)
  160. {
  161. switch (reg) {
  162. case BMC150_MAGN_REG_POWER:
  163. case BMC150_MAGN_REG_OPMODE_ODR:
  164. case BMC150_MAGN_REG_INT:
  165. case BMC150_MAGN_REG_INT_DRDY:
  166. case BMC150_MAGN_REG_LOW_THRESH:
  167. case BMC150_MAGN_REG_HIGH_THRESH:
  168. case BMC150_MAGN_REG_REP_XY:
  169. case BMC150_MAGN_REG_REP_Z:
  170. return true;
  171. default:
  172. return false;
  173. }
  174. }
  175. static bool bmc150_magn_is_volatile_reg(struct device *dev, unsigned int reg)
  176. {
  177. switch (reg) {
  178. case BMC150_MAGN_REG_X_L:
  179. case BMC150_MAGN_REG_X_M:
  180. case BMC150_MAGN_REG_Y_L:
  181. case BMC150_MAGN_REG_Y_M:
  182. case BMC150_MAGN_REG_Z_L:
  183. case BMC150_MAGN_REG_Z_M:
  184. case BMC150_MAGN_REG_RHALL_L:
  185. case BMC150_MAGN_REG_RHALL_M:
  186. case BMC150_MAGN_REG_INT_STATUS:
  187. return true;
  188. default:
  189. return false;
  190. }
  191. }
  192. const struct regmap_config bmc150_magn_regmap_config = {
  193. .reg_bits = 8,
  194. .val_bits = 8,
  195. .max_register = BMC150_MAGN_REG_TRIM_END,
  196. .cache_type = REGCACHE_RBTREE,
  197. .writeable_reg = bmc150_magn_is_writeable_reg,
  198. .volatile_reg = bmc150_magn_is_volatile_reg,
  199. };
  200. EXPORT_SYMBOL_NS(bmc150_magn_regmap_config, IIO_BMC150_MAGN);
  201. static int bmc150_magn_set_power_mode(struct bmc150_magn_data *data,
  202. enum bmc150_magn_power_modes mode,
  203. bool state)
  204. {
  205. int ret;
  206. switch (mode) {
  207. case BMC150_MAGN_POWER_MODE_SUSPEND:
  208. ret = regmap_update_bits(data->regmap, BMC150_MAGN_REG_POWER,
  209. BMC150_MAGN_MASK_POWER_CTL, !state);
  210. if (ret < 0)
  211. return ret;
  212. usleep_range(BMC150_MAGN_START_UP_TIME_MS * 1000, 20000);
  213. return 0;
  214. case BMC150_MAGN_POWER_MODE_SLEEP:
  215. return regmap_update_bits(data->regmap,
  216. BMC150_MAGN_REG_OPMODE_ODR,
  217. BMC150_MAGN_MASK_OPMODE,
  218. BMC150_MAGN_MODE_SLEEP <<
  219. BMC150_MAGN_SHIFT_OPMODE);
  220. case BMC150_MAGN_POWER_MODE_NORMAL:
  221. return regmap_update_bits(data->regmap,
  222. BMC150_MAGN_REG_OPMODE_ODR,
  223. BMC150_MAGN_MASK_OPMODE,
  224. BMC150_MAGN_MODE_NORMAL <<
  225. BMC150_MAGN_SHIFT_OPMODE);
  226. }
  227. return -EINVAL;
  228. }
  229. static int bmc150_magn_set_power_state(struct bmc150_magn_data *data, bool on)
  230. {
  231. #ifdef CONFIG_PM
  232. int ret;
  233. if (on) {
  234. ret = pm_runtime_resume_and_get(data->dev);
  235. } else {
  236. pm_runtime_mark_last_busy(data->dev);
  237. ret = pm_runtime_put_autosuspend(data->dev);
  238. }
  239. if (ret < 0) {
  240. dev_err(data->dev,
  241. "failed to change power state to %d\n", on);
  242. return ret;
  243. }
  244. #endif
  245. return 0;
  246. }
  247. static int bmc150_magn_get_odr(struct bmc150_magn_data *data, int *val)
  248. {
  249. int ret, reg_val;
  250. u8 i, odr_val;
  251. ret = regmap_read(data->regmap, BMC150_MAGN_REG_OPMODE_ODR, &reg_val);
  252. if (ret < 0)
  253. return ret;
  254. odr_val = (reg_val & BMC150_MAGN_MASK_ODR) >> BMC150_MAGN_SHIFT_ODR;
  255. for (i = 0; i < ARRAY_SIZE(bmc150_magn_samp_freq_table); i++)
  256. if (bmc150_magn_samp_freq_table[i].reg_val == odr_val) {
  257. *val = bmc150_magn_samp_freq_table[i].freq;
  258. return 0;
  259. }
  260. return -EINVAL;
  261. }
  262. static int bmc150_magn_set_odr(struct bmc150_magn_data *data, int val)
  263. {
  264. int ret;
  265. u8 i;
  266. for (i = 0; i < ARRAY_SIZE(bmc150_magn_samp_freq_table); i++) {
  267. if (bmc150_magn_samp_freq_table[i].freq == val) {
  268. ret = regmap_update_bits(data->regmap,
  269. BMC150_MAGN_REG_OPMODE_ODR,
  270. BMC150_MAGN_MASK_ODR,
  271. bmc150_magn_samp_freq_table[i].
  272. reg_val <<
  273. BMC150_MAGN_SHIFT_ODR);
  274. if (ret < 0)
  275. return ret;
  276. return 0;
  277. }
  278. }
  279. return -EINVAL;
  280. }
  281. static int bmc150_magn_set_max_odr(struct bmc150_magn_data *data, int rep_xy,
  282. int rep_z, int odr)
  283. {
  284. int ret, reg_val, max_odr;
  285. if (rep_xy <= 0) {
  286. ret = regmap_read(data->regmap, BMC150_MAGN_REG_REP_XY,
  287. &reg_val);
  288. if (ret < 0)
  289. return ret;
  290. rep_xy = BMC150_MAGN_REGVAL_TO_REPXY(reg_val);
  291. }
  292. if (rep_z <= 0) {
  293. ret = regmap_read(data->regmap, BMC150_MAGN_REG_REP_Z,
  294. &reg_val);
  295. if (ret < 0)
  296. return ret;
  297. rep_z = BMC150_MAGN_REGVAL_TO_REPZ(reg_val);
  298. }
  299. if (odr <= 0) {
  300. ret = bmc150_magn_get_odr(data, &odr);
  301. if (ret < 0)
  302. return ret;
  303. }
  304. /* the maximum selectable read-out frequency from datasheet */
  305. max_odr = 1000000 / (145 * rep_xy + 500 * rep_z + 980);
  306. if (odr > max_odr) {
  307. dev_err(data->dev,
  308. "Can't set oversampling with sampling freq %d\n",
  309. odr);
  310. return -EINVAL;
  311. }
  312. data->max_odr = max_odr;
  313. return 0;
  314. }
  315. static s32 bmc150_magn_compensate_x(struct bmc150_magn_trim_regs *tregs, s16 x,
  316. u16 rhall)
  317. {
  318. s16 val;
  319. u16 xyz1 = le16_to_cpu(tregs->xyz1);
  320. if (x == BMC150_MAGN_XY_OVERFLOW_VAL)
  321. return S32_MIN;
  322. if (!rhall)
  323. rhall = xyz1;
  324. val = ((s16)(((u16)((((s32)xyz1) << 14) / rhall)) - ((u16)0x4000)));
  325. val = ((s16)((((s32)x) * ((((((((s32)tregs->xy2) * ((((s32)val) *
  326. ((s32)val)) >> 7)) + (((s32)val) *
  327. ((s32)(((s16)tregs->xy1) << 7)))) >> 9) + ((s32)0x100000)) *
  328. ((s32)(((s16)tregs->x2) + ((s16)0xA0)))) >> 12)) >> 13)) +
  329. (((s16)tregs->x1) << 3);
  330. return (s32)val;
  331. }
  332. static s32 bmc150_magn_compensate_y(struct bmc150_magn_trim_regs *tregs, s16 y,
  333. u16 rhall)
  334. {
  335. s16 val;
  336. u16 xyz1 = le16_to_cpu(tregs->xyz1);
  337. if (y == BMC150_MAGN_XY_OVERFLOW_VAL)
  338. return S32_MIN;
  339. if (!rhall)
  340. rhall = xyz1;
  341. val = ((s16)(((u16)((((s32)xyz1) << 14) / rhall)) - ((u16)0x4000)));
  342. val = ((s16)((((s32)y) * ((((((((s32)tregs->xy2) * ((((s32)val) *
  343. ((s32)val)) >> 7)) + (((s32)val) *
  344. ((s32)(((s16)tregs->xy1) << 7)))) >> 9) + ((s32)0x100000)) *
  345. ((s32)(((s16)tregs->y2) + ((s16)0xA0)))) >> 12)) >> 13)) +
  346. (((s16)tregs->y1) << 3);
  347. return (s32)val;
  348. }
  349. static s32 bmc150_magn_compensate_z(struct bmc150_magn_trim_regs *tregs, s16 z,
  350. u16 rhall)
  351. {
  352. s32 val;
  353. u16 xyz1 = le16_to_cpu(tregs->xyz1);
  354. u16 z1 = le16_to_cpu(tregs->z1);
  355. s16 z2 = le16_to_cpu(tregs->z2);
  356. s16 z3 = le16_to_cpu(tregs->z3);
  357. s16 z4 = le16_to_cpu(tregs->z4);
  358. if (z == BMC150_MAGN_Z_OVERFLOW_VAL)
  359. return S32_MIN;
  360. val = (((((s32)(z - z4)) << 15) - ((((s32)z3) * ((s32)(((s16)rhall) -
  361. ((s16)xyz1)))) >> 2)) / (z2 + ((s16)(((((s32)z1) *
  362. ((((s16)rhall) << 1))) + (1 << 15)) >> 16))));
  363. return val;
  364. }
  365. static int bmc150_magn_read_xyz(struct bmc150_magn_data *data, s32 *buffer)
  366. {
  367. int ret;
  368. __le16 values[AXIS_XYZR_MAX];
  369. s16 raw_x, raw_y, raw_z;
  370. u16 rhall;
  371. struct bmc150_magn_trim_regs tregs;
  372. ret = regmap_bulk_read(data->regmap, BMC150_MAGN_REG_X_L,
  373. values, sizeof(values));
  374. if (ret < 0)
  375. return ret;
  376. raw_x = (s16)le16_to_cpu(values[AXIS_X]) >> BMC150_MAGN_SHIFT_XY_L;
  377. raw_y = (s16)le16_to_cpu(values[AXIS_Y]) >> BMC150_MAGN_SHIFT_XY_L;
  378. raw_z = (s16)le16_to_cpu(values[AXIS_Z]) >> BMC150_MAGN_SHIFT_Z_L;
  379. rhall = le16_to_cpu(values[RHALL]) >> BMC150_MAGN_SHIFT_RHALL_L;
  380. ret = regmap_bulk_read(data->regmap, BMC150_MAGN_REG_TRIM_START,
  381. &tregs, sizeof(tregs));
  382. if (ret < 0)
  383. return ret;
  384. buffer[AXIS_X] = bmc150_magn_compensate_x(&tregs, raw_x, rhall);
  385. buffer[AXIS_Y] = bmc150_magn_compensate_y(&tregs, raw_y, rhall);
  386. buffer[AXIS_Z] = bmc150_magn_compensate_z(&tregs, raw_z, rhall);
  387. return 0;
  388. }
  389. static int bmc150_magn_read_raw(struct iio_dev *indio_dev,
  390. struct iio_chan_spec const *chan,
  391. int *val, int *val2, long mask)
  392. {
  393. struct bmc150_magn_data *data = iio_priv(indio_dev);
  394. int ret, tmp;
  395. s32 values[AXIS_XYZ_MAX];
  396. switch (mask) {
  397. case IIO_CHAN_INFO_RAW:
  398. if (iio_buffer_enabled(indio_dev))
  399. return -EBUSY;
  400. mutex_lock(&data->mutex);
  401. ret = bmc150_magn_set_power_state(data, true);
  402. if (ret < 0) {
  403. mutex_unlock(&data->mutex);
  404. return ret;
  405. }
  406. ret = bmc150_magn_read_xyz(data, values);
  407. if (ret < 0) {
  408. bmc150_magn_set_power_state(data, false);
  409. mutex_unlock(&data->mutex);
  410. return ret;
  411. }
  412. *val = values[chan->scan_index];
  413. ret = bmc150_magn_set_power_state(data, false);
  414. if (ret < 0) {
  415. mutex_unlock(&data->mutex);
  416. return ret;
  417. }
  418. mutex_unlock(&data->mutex);
  419. return IIO_VAL_INT;
  420. case IIO_CHAN_INFO_SCALE:
  421. /*
  422. * The API/driver performs an off-chip temperature
  423. * compensation and outputs x/y/z magnetic field data in
  424. * 16 LSB/uT to the upper application layer.
  425. */
  426. *val = 0;
  427. *val2 = 625;
  428. return IIO_VAL_INT_PLUS_MICRO;
  429. case IIO_CHAN_INFO_SAMP_FREQ:
  430. ret = bmc150_magn_get_odr(data, val);
  431. if (ret < 0)
  432. return ret;
  433. return IIO_VAL_INT;
  434. case IIO_CHAN_INFO_OVERSAMPLING_RATIO:
  435. switch (chan->channel2) {
  436. case IIO_MOD_X:
  437. case IIO_MOD_Y:
  438. ret = regmap_read(data->regmap, BMC150_MAGN_REG_REP_XY,
  439. &tmp);
  440. if (ret < 0)
  441. return ret;
  442. *val = BMC150_MAGN_REGVAL_TO_REPXY(tmp);
  443. return IIO_VAL_INT;
  444. case IIO_MOD_Z:
  445. ret = regmap_read(data->regmap, BMC150_MAGN_REG_REP_Z,
  446. &tmp);
  447. if (ret < 0)
  448. return ret;
  449. *val = BMC150_MAGN_REGVAL_TO_REPZ(tmp);
  450. return IIO_VAL_INT;
  451. default:
  452. return -EINVAL;
  453. }
  454. default:
  455. return -EINVAL;
  456. }
  457. }
  458. static int bmc150_magn_write_raw(struct iio_dev *indio_dev,
  459. struct iio_chan_spec const *chan,
  460. int val, int val2, long mask)
  461. {
  462. struct bmc150_magn_data *data = iio_priv(indio_dev);
  463. int ret;
  464. switch (mask) {
  465. case IIO_CHAN_INFO_SAMP_FREQ:
  466. if (val > data->max_odr)
  467. return -EINVAL;
  468. mutex_lock(&data->mutex);
  469. ret = bmc150_magn_set_odr(data, val);
  470. mutex_unlock(&data->mutex);
  471. return ret;
  472. case IIO_CHAN_INFO_OVERSAMPLING_RATIO:
  473. switch (chan->channel2) {
  474. case IIO_MOD_X:
  475. case IIO_MOD_Y:
  476. if (val < 1 || val > 511)
  477. return -EINVAL;
  478. mutex_lock(&data->mutex);
  479. ret = bmc150_magn_set_max_odr(data, val, 0, 0);
  480. if (ret < 0) {
  481. mutex_unlock(&data->mutex);
  482. return ret;
  483. }
  484. ret = regmap_update_bits(data->regmap,
  485. BMC150_MAGN_REG_REP_XY,
  486. BMC150_MAGN_REG_REP_DATAMASK,
  487. BMC150_MAGN_REPXY_TO_REGVAL
  488. (val));
  489. mutex_unlock(&data->mutex);
  490. return ret;
  491. case IIO_MOD_Z:
  492. if (val < 1 || val > 256)
  493. return -EINVAL;
  494. mutex_lock(&data->mutex);
  495. ret = bmc150_magn_set_max_odr(data, 0, val, 0);
  496. if (ret < 0) {
  497. mutex_unlock(&data->mutex);
  498. return ret;
  499. }
  500. ret = regmap_update_bits(data->regmap,
  501. BMC150_MAGN_REG_REP_Z,
  502. BMC150_MAGN_REG_REP_DATAMASK,
  503. BMC150_MAGN_REPZ_TO_REGVAL
  504. (val));
  505. mutex_unlock(&data->mutex);
  506. return ret;
  507. default:
  508. return -EINVAL;
  509. }
  510. default:
  511. return -EINVAL;
  512. }
  513. }
  514. static ssize_t bmc150_magn_show_samp_freq_avail(struct device *dev,
  515. struct device_attribute *attr,
  516. char *buf)
  517. {
  518. struct iio_dev *indio_dev = dev_to_iio_dev(dev);
  519. struct bmc150_magn_data *data = iio_priv(indio_dev);
  520. size_t len = 0;
  521. u8 i;
  522. for (i = 0; i < ARRAY_SIZE(bmc150_magn_samp_freq_table); i++) {
  523. if (bmc150_magn_samp_freq_table[i].freq > data->max_odr)
  524. break;
  525. len += scnprintf(buf + len, PAGE_SIZE - len, "%d ",
  526. bmc150_magn_samp_freq_table[i].freq);
  527. }
  528. /* replace last space with a newline */
  529. buf[len - 1] = '\n';
  530. return len;
  531. }
  532. static const struct iio_mount_matrix *
  533. bmc150_magn_get_mount_matrix(const struct iio_dev *indio_dev,
  534. const struct iio_chan_spec *chan)
  535. {
  536. struct bmc150_magn_data *data = iio_priv(indio_dev);
  537. return &data->orientation;
  538. }
  539. static const struct iio_chan_spec_ext_info bmc150_magn_ext_info[] = {
  540. IIO_MOUNT_MATRIX(IIO_SHARED_BY_DIR, bmc150_magn_get_mount_matrix),
  541. { }
  542. };
  543. static IIO_DEV_ATTR_SAMP_FREQ_AVAIL(bmc150_magn_show_samp_freq_avail);
  544. static struct attribute *bmc150_magn_attributes[] = {
  545. &iio_dev_attr_sampling_frequency_available.dev_attr.attr,
  546. NULL,
  547. };
  548. static const struct attribute_group bmc150_magn_attrs_group = {
  549. .attrs = bmc150_magn_attributes,
  550. };
  551. #define BMC150_MAGN_CHANNEL(_axis) { \
  552. .type = IIO_MAGN, \
  553. .modified = 1, \
  554. .channel2 = IIO_MOD_##_axis, \
  555. .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \
  556. BIT(IIO_CHAN_INFO_OVERSAMPLING_RATIO), \
  557. .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SAMP_FREQ) | \
  558. BIT(IIO_CHAN_INFO_SCALE), \
  559. .scan_index = AXIS_##_axis, \
  560. .scan_type = { \
  561. .sign = 's', \
  562. .realbits = 32, \
  563. .storagebits = 32, \
  564. .endianness = IIO_LE \
  565. }, \
  566. .ext_info = bmc150_magn_ext_info, \
  567. }
  568. static const struct iio_chan_spec bmc150_magn_channels[] = {
  569. BMC150_MAGN_CHANNEL(X),
  570. BMC150_MAGN_CHANNEL(Y),
  571. BMC150_MAGN_CHANNEL(Z),
  572. IIO_CHAN_SOFT_TIMESTAMP(3),
  573. };
  574. static const struct iio_info bmc150_magn_info = {
  575. .attrs = &bmc150_magn_attrs_group,
  576. .read_raw = bmc150_magn_read_raw,
  577. .write_raw = bmc150_magn_write_raw,
  578. };
  579. static const unsigned long bmc150_magn_scan_masks[] = {
  580. BIT(AXIS_X) | BIT(AXIS_Y) | BIT(AXIS_Z),
  581. 0};
  582. static irqreturn_t bmc150_magn_trigger_handler(int irq, void *p)
  583. {
  584. struct iio_poll_func *pf = p;
  585. struct iio_dev *indio_dev = pf->indio_dev;
  586. struct bmc150_magn_data *data = iio_priv(indio_dev);
  587. int ret;
  588. mutex_lock(&data->mutex);
  589. ret = bmc150_magn_read_xyz(data, data->scan.chans);
  590. if (ret < 0)
  591. goto err;
  592. iio_push_to_buffers_with_timestamp(indio_dev, &data->scan,
  593. pf->timestamp);
  594. err:
  595. mutex_unlock(&data->mutex);
  596. iio_trigger_notify_done(indio_dev->trig);
  597. return IRQ_HANDLED;
  598. }
  599. static int bmc150_magn_init(struct bmc150_magn_data *data)
  600. {
  601. int ret, chip_id;
  602. struct bmc150_magn_preset preset;
  603. ret = regulator_bulk_enable(ARRAY_SIZE(data->regulators),
  604. data->regulators);
  605. if (ret < 0) {
  606. dev_err(data->dev, "Failed to enable regulators: %d\n", ret);
  607. return ret;
  608. }
  609. /*
  610. * 3ms power-on time according to datasheet, let's better
  611. * be safe than sorry and set this delay to 5ms.
  612. */
  613. msleep(5);
  614. ret = bmc150_magn_set_power_mode(data, BMC150_MAGN_POWER_MODE_SUSPEND,
  615. false);
  616. if (ret < 0) {
  617. dev_err(data->dev,
  618. "Failed to bring up device from suspend mode\n");
  619. goto err_regulator_disable;
  620. }
  621. ret = regmap_read(data->regmap, BMC150_MAGN_REG_CHIP_ID, &chip_id);
  622. if (ret < 0) {
  623. dev_err(data->dev, "Failed reading chip id\n");
  624. goto err_poweroff;
  625. }
  626. if (chip_id != BMC150_MAGN_CHIP_ID_VAL) {
  627. dev_err(data->dev, "Invalid chip id 0x%x\n", chip_id);
  628. ret = -ENODEV;
  629. goto err_poweroff;
  630. }
  631. dev_dbg(data->dev, "Chip id %x\n", chip_id);
  632. preset = bmc150_magn_presets_table[BMC150_MAGN_DEFAULT_PRESET];
  633. ret = bmc150_magn_set_odr(data, preset.odr);
  634. if (ret < 0) {
  635. dev_err(data->dev, "Failed to set ODR to %d\n",
  636. preset.odr);
  637. goto err_poweroff;
  638. }
  639. ret = regmap_write(data->regmap, BMC150_MAGN_REG_REP_XY,
  640. BMC150_MAGN_REPXY_TO_REGVAL(preset.rep_xy));
  641. if (ret < 0) {
  642. dev_err(data->dev, "Failed to set REP XY to %d\n",
  643. preset.rep_xy);
  644. goto err_poweroff;
  645. }
  646. ret = regmap_write(data->regmap, BMC150_MAGN_REG_REP_Z,
  647. BMC150_MAGN_REPZ_TO_REGVAL(preset.rep_z));
  648. if (ret < 0) {
  649. dev_err(data->dev, "Failed to set REP Z to %d\n",
  650. preset.rep_z);
  651. goto err_poweroff;
  652. }
  653. ret = bmc150_magn_set_max_odr(data, preset.rep_xy, preset.rep_z,
  654. preset.odr);
  655. if (ret < 0)
  656. goto err_poweroff;
  657. ret = bmc150_magn_set_power_mode(data, BMC150_MAGN_POWER_MODE_NORMAL,
  658. true);
  659. if (ret < 0) {
  660. dev_err(data->dev, "Failed to power on device\n");
  661. goto err_poweroff;
  662. }
  663. return 0;
  664. err_poweroff:
  665. bmc150_magn_set_power_mode(data, BMC150_MAGN_POWER_MODE_SUSPEND, true);
  666. err_regulator_disable:
  667. regulator_bulk_disable(ARRAY_SIZE(data->regulators), data->regulators);
  668. return ret;
  669. }
  670. static int bmc150_magn_reset_intr(struct bmc150_magn_data *data)
  671. {
  672. int tmp;
  673. /*
  674. * Data Ready (DRDY) is always cleared after
  675. * readout of data registers ends.
  676. */
  677. return regmap_read(data->regmap, BMC150_MAGN_REG_X_L, &tmp);
  678. }
  679. static void bmc150_magn_trig_reen(struct iio_trigger *trig)
  680. {
  681. struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig);
  682. struct bmc150_magn_data *data = iio_priv(indio_dev);
  683. int ret;
  684. if (!data->dready_trigger_on)
  685. return;
  686. mutex_lock(&data->mutex);
  687. ret = bmc150_magn_reset_intr(data);
  688. mutex_unlock(&data->mutex);
  689. if (ret)
  690. dev_err(data->dev, "Failed to reset interrupt\n");
  691. }
  692. static int bmc150_magn_data_rdy_trigger_set_state(struct iio_trigger *trig,
  693. bool state)
  694. {
  695. struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig);
  696. struct bmc150_magn_data *data = iio_priv(indio_dev);
  697. int ret = 0;
  698. mutex_lock(&data->mutex);
  699. if (state == data->dready_trigger_on)
  700. goto err_unlock;
  701. ret = regmap_update_bits(data->regmap, BMC150_MAGN_REG_INT_DRDY,
  702. BMC150_MAGN_MASK_DRDY_EN,
  703. state << BMC150_MAGN_SHIFT_DRDY_EN);
  704. if (ret < 0)
  705. goto err_unlock;
  706. data->dready_trigger_on = state;
  707. if (state) {
  708. ret = bmc150_magn_reset_intr(data);
  709. if (ret < 0)
  710. goto err_unlock;
  711. }
  712. mutex_unlock(&data->mutex);
  713. return 0;
  714. err_unlock:
  715. mutex_unlock(&data->mutex);
  716. return ret;
  717. }
  718. static const struct iio_trigger_ops bmc150_magn_trigger_ops = {
  719. .set_trigger_state = bmc150_magn_data_rdy_trigger_set_state,
  720. .reenable = bmc150_magn_trig_reen,
  721. };
  722. static int bmc150_magn_buffer_preenable(struct iio_dev *indio_dev)
  723. {
  724. struct bmc150_magn_data *data = iio_priv(indio_dev);
  725. return bmc150_magn_set_power_state(data, true);
  726. }
  727. static int bmc150_magn_buffer_postdisable(struct iio_dev *indio_dev)
  728. {
  729. struct bmc150_magn_data *data = iio_priv(indio_dev);
  730. return bmc150_magn_set_power_state(data, false);
  731. }
  732. static const struct iio_buffer_setup_ops bmc150_magn_buffer_setup_ops = {
  733. .preenable = bmc150_magn_buffer_preenable,
  734. .postdisable = bmc150_magn_buffer_postdisable,
  735. };
  736. static const char *bmc150_magn_match_acpi_device(struct device *dev)
  737. {
  738. const struct acpi_device_id *id;
  739. id = acpi_match_device(dev->driver->acpi_match_table, dev);
  740. if (!id)
  741. return NULL;
  742. return dev_name(dev);
  743. }
  744. int bmc150_magn_probe(struct device *dev, struct regmap *regmap,
  745. int irq, const char *name)
  746. {
  747. struct bmc150_magn_data *data;
  748. struct iio_dev *indio_dev;
  749. int ret;
  750. indio_dev = devm_iio_device_alloc(dev, sizeof(*data));
  751. if (!indio_dev)
  752. return -ENOMEM;
  753. data = iio_priv(indio_dev);
  754. dev_set_drvdata(dev, indio_dev);
  755. data->regmap = regmap;
  756. data->irq = irq;
  757. data->dev = dev;
  758. data->regulators[0].supply = "vdd";
  759. data->regulators[1].supply = "vddio";
  760. ret = devm_regulator_bulk_get(dev, ARRAY_SIZE(data->regulators),
  761. data->regulators);
  762. if (ret)
  763. return dev_err_probe(dev, ret, "failed to get regulators\n");
  764. ret = iio_read_mount_matrix(dev, &data->orientation);
  765. if (ret)
  766. return ret;
  767. if (!name && ACPI_HANDLE(dev))
  768. name = bmc150_magn_match_acpi_device(dev);
  769. mutex_init(&data->mutex);
  770. ret = bmc150_magn_init(data);
  771. if (ret < 0)
  772. return ret;
  773. indio_dev->channels = bmc150_magn_channels;
  774. indio_dev->num_channels = ARRAY_SIZE(bmc150_magn_channels);
  775. indio_dev->available_scan_masks = bmc150_magn_scan_masks;
  776. indio_dev->name = name;
  777. indio_dev->modes = INDIO_DIRECT_MODE;
  778. indio_dev->info = &bmc150_magn_info;
  779. if (irq > 0) {
  780. data->dready_trig = devm_iio_trigger_alloc(dev,
  781. "%s-dev%d",
  782. indio_dev->name,
  783. iio_device_id(indio_dev));
  784. if (!data->dready_trig) {
  785. ret = -ENOMEM;
  786. dev_err(dev, "iio trigger alloc failed\n");
  787. goto err_poweroff;
  788. }
  789. data->dready_trig->ops = &bmc150_magn_trigger_ops;
  790. iio_trigger_set_drvdata(data->dready_trig, indio_dev);
  791. ret = iio_trigger_register(data->dready_trig);
  792. if (ret) {
  793. dev_err(dev, "iio trigger register failed\n");
  794. goto err_poweroff;
  795. }
  796. ret = request_threaded_irq(irq,
  797. iio_trigger_generic_data_rdy_poll,
  798. NULL,
  799. IRQF_TRIGGER_RISING | IRQF_ONESHOT,
  800. BMC150_MAGN_IRQ_NAME,
  801. data->dready_trig);
  802. if (ret < 0) {
  803. dev_err(dev, "request irq %d failed\n", irq);
  804. goto err_trigger_unregister;
  805. }
  806. }
  807. ret = iio_triggered_buffer_setup(indio_dev,
  808. iio_pollfunc_store_time,
  809. bmc150_magn_trigger_handler,
  810. &bmc150_magn_buffer_setup_ops);
  811. if (ret < 0) {
  812. dev_err(dev, "iio triggered buffer setup failed\n");
  813. goto err_free_irq;
  814. }
  815. ret = pm_runtime_set_active(dev);
  816. if (ret)
  817. goto err_buffer_cleanup;
  818. pm_runtime_enable(dev);
  819. pm_runtime_set_autosuspend_delay(dev,
  820. BMC150_MAGN_AUTO_SUSPEND_DELAY_MS);
  821. pm_runtime_use_autosuspend(dev);
  822. ret = iio_device_register(indio_dev);
  823. if (ret < 0) {
  824. dev_err(dev, "unable to register iio device\n");
  825. goto err_pm_cleanup;
  826. }
  827. dev_dbg(dev, "Registered device %s\n", name);
  828. return 0;
  829. err_pm_cleanup:
  830. pm_runtime_dont_use_autosuspend(dev);
  831. pm_runtime_disable(dev);
  832. err_buffer_cleanup:
  833. iio_triggered_buffer_cleanup(indio_dev);
  834. err_free_irq:
  835. if (irq > 0)
  836. free_irq(irq, data->dready_trig);
  837. err_trigger_unregister:
  838. if (data->dready_trig)
  839. iio_trigger_unregister(data->dready_trig);
  840. err_poweroff:
  841. bmc150_magn_set_power_mode(data, BMC150_MAGN_POWER_MODE_SUSPEND, true);
  842. return ret;
  843. }
  844. EXPORT_SYMBOL_NS(bmc150_magn_probe, IIO_BMC150_MAGN);
  845. void bmc150_magn_remove(struct device *dev)
  846. {
  847. struct iio_dev *indio_dev = dev_get_drvdata(dev);
  848. struct bmc150_magn_data *data = iio_priv(indio_dev);
  849. iio_device_unregister(indio_dev);
  850. pm_runtime_disable(dev);
  851. pm_runtime_set_suspended(dev);
  852. iio_triggered_buffer_cleanup(indio_dev);
  853. if (data->irq > 0)
  854. free_irq(data->irq, data->dready_trig);
  855. if (data->dready_trig)
  856. iio_trigger_unregister(data->dready_trig);
  857. mutex_lock(&data->mutex);
  858. bmc150_magn_set_power_mode(data, BMC150_MAGN_POWER_MODE_SUSPEND, true);
  859. mutex_unlock(&data->mutex);
  860. regulator_bulk_disable(ARRAY_SIZE(data->regulators), data->regulators);
  861. }
  862. EXPORT_SYMBOL_NS(bmc150_magn_remove, IIO_BMC150_MAGN);
  863. #ifdef CONFIG_PM
  864. static int bmc150_magn_runtime_suspend(struct device *dev)
  865. {
  866. struct iio_dev *indio_dev = dev_get_drvdata(dev);
  867. struct bmc150_magn_data *data = iio_priv(indio_dev);
  868. int ret;
  869. mutex_lock(&data->mutex);
  870. ret = bmc150_magn_set_power_mode(data, BMC150_MAGN_POWER_MODE_SLEEP,
  871. true);
  872. mutex_unlock(&data->mutex);
  873. if (ret < 0) {
  874. dev_err(dev, "powering off device failed\n");
  875. return ret;
  876. }
  877. return 0;
  878. }
  879. /*
  880. * Should be called with data->mutex held.
  881. */
  882. static int bmc150_magn_runtime_resume(struct device *dev)
  883. {
  884. struct iio_dev *indio_dev = dev_get_drvdata(dev);
  885. struct bmc150_magn_data *data = iio_priv(indio_dev);
  886. return bmc150_magn_set_power_mode(data, BMC150_MAGN_POWER_MODE_NORMAL,
  887. true);
  888. }
  889. #endif
  890. #ifdef CONFIG_PM_SLEEP
  891. static int bmc150_magn_suspend(struct device *dev)
  892. {
  893. struct iio_dev *indio_dev = dev_get_drvdata(dev);
  894. struct bmc150_magn_data *data = iio_priv(indio_dev);
  895. int ret;
  896. mutex_lock(&data->mutex);
  897. ret = bmc150_magn_set_power_mode(data, BMC150_MAGN_POWER_MODE_SLEEP,
  898. true);
  899. mutex_unlock(&data->mutex);
  900. return ret;
  901. }
  902. static int bmc150_magn_resume(struct device *dev)
  903. {
  904. struct iio_dev *indio_dev = dev_get_drvdata(dev);
  905. struct bmc150_magn_data *data = iio_priv(indio_dev);
  906. int ret;
  907. mutex_lock(&data->mutex);
  908. ret = bmc150_magn_set_power_mode(data, BMC150_MAGN_POWER_MODE_NORMAL,
  909. true);
  910. mutex_unlock(&data->mutex);
  911. return ret;
  912. }
  913. #endif
  914. const struct dev_pm_ops bmc150_magn_pm_ops = {
  915. SET_SYSTEM_SLEEP_PM_OPS(bmc150_magn_suspend, bmc150_magn_resume)
  916. SET_RUNTIME_PM_OPS(bmc150_magn_runtime_suspend,
  917. bmc150_magn_runtime_resume, NULL)
  918. };
  919. EXPORT_SYMBOL_NS(bmc150_magn_pm_ops, IIO_BMC150_MAGN);
  920. MODULE_AUTHOR("Irina Tirdea <[email protected]>");
  921. MODULE_LICENSE("GPL v2");
  922. MODULE_DESCRIPTION("BMC150 magnetometer core driver");