hid-cp2112.c 37 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * hid-cp2112.c - Silicon Labs HID USB to SMBus master bridge
  4. * Copyright (c) 2013,2014 Uplogix, Inc.
  5. * David Barksdale <[email protected]>
  6. */
  7. /*
  8. * The Silicon Labs CP2112 chip is a USB HID device which provides an
  9. * SMBus controller for talking to slave devices and 8 GPIO pins. The
  10. * host communicates with the CP2112 via raw HID reports.
  11. *
  12. * Data Sheet:
  13. * https://www.silabs.com/Support%20Documents/TechnicalDocs/CP2112.pdf
  14. * Programming Interface Specification:
  15. * https://www.silabs.com/documents/public/application-notes/an495-cp2112-interface-specification.pdf
  16. */
  17. #include <linux/gpio/consumer.h>
  18. #include <linux/gpio/machine.h>
  19. #include <linux/gpio/driver.h>
  20. #include <linux/hid.h>
  21. #include <linux/hidraw.h>
  22. #include <linux/i2c.h>
  23. #include <linux/module.h>
  24. #include <linux/nls.h>
  25. #include <linux/usb/ch9.h>
  26. #include "hid-ids.h"
  27. #define CP2112_REPORT_MAX_LENGTH 64
  28. #define CP2112_GPIO_CONFIG_LENGTH 5
  29. #define CP2112_GPIO_GET_LENGTH 2
  30. #define CP2112_GPIO_SET_LENGTH 3
  31. enum {
  32. CP2112_GPIO_CONFIG = 0x02,
  33. CP2112_GPIO_GET = 0x03,
  34. CP2112_GPIO_SET = 0x04,
  35. CP2112_GET_VERSION_INFO = 0x05,
  36. CP2112_SMBUS_CONFIG = 0x06,
  37. CP2112_DATA_READ_REQUEST = 0x10,
  38. CP2112_DATA_WRITE_READ_REQUEST = 0x11,
  39. CP2112_DATA_READ_FORCE_SEND = 0x12,
  40. CP2112_DATA_READ_RESPONSE = 0x13,
  41. CP2112_DATA_WRITE_REQUEST = 0x14,
  42. CP2112_TRANSFER_STATUS_REQUEST = 0x15,
  43. CP2112_TRANSFER_STATUS_RESPONSE = 0x16,
  44. CP2112_CANCEL_TRANSFER = 0x17,
  45. CP2112_LOCK_BYTE = 0x20,
  46. CP2112_USB_CONFIG = 0x21,
  47. CP2112_MANUFACTURER_STRING = 0x22,
  48. CP2112_PRODUCT_STRING = 0x23,
  49. CP2112_SERIAL_STRING = 0x24,
  50. };
  51. enum {
  52. STATUS0_IDLE = 0x00,
  53. STATUS0_BUSY = 0x01,
  54. STATUS0_COMPLETE = 0x02,
  55. STATUS0_ERROR = 0x03,
  56. };
  57. enum {
  58. STATUS1_TIMEOUT_NACK = 0x00,
  59. STATUS1_TIMEOUT_BUS = 0x01,
  60. STATUS1_ARBITRATION_LOST = 0x02,
  61. STATUS1_READ_INCOMPLETE = 0x03,
  62. STATUS1_WRITE_INCOMPLETE = 0x04,
  63. STATUS1_SUCCESS = 0x05,
  64. };
  65. struct cp2112_smbus_config_report {
  66. u8 report; /* CP2112_SMBUS_CONFIG */
  67. __be32 clock_speed; /* Hz */
  68. u8 device_address; /* Stored in the upper 7 bits */
  69. u8 auto_send_read; /* 1 = enabled, 0 = disabled */
  70. __be16 write_timeout; /* ms, 0 = no timeout */
  71. __be16 read_timeout; /* ms, 0 = no timeout */
  72. u8 scl_low_timeout; /* 1 = enabled, 0 = disabled */
  73. __be16 retry_time; /* # of retries, 0 = no limit */
  74. } __packed;
  75. struct cp2112_usb_config_report {
  76. u8 report; /* CP2112_USB_CONFIG */
  77. __le16 vid; /* Vendor ID */
  78. __le16 pid; /* Product ID */
  79. u8 max_power; /* Power requested in 2mA units */
  80. u8 power_mode; /* 0x00 = bus powered
  81. 0x01 = self powered & regulator off
  82. 0x02 = self powered & regulator on */
  83. u8 release_major;
  84. u8 release_minor;
  85. u8 mask; /* What fields to program */
  86. } __packed;
  87. struct cp2112_read_req_report {
  88. u8 report; /* CP2112_DATA_READ_REQUEST */
  89. u8 slave_address;
  90. __be16 length;
  91. } __packed;
  92. struct cp2112_write_read_req_report {
  93. u8 report; /* CP2112_DATA_WRITE_READ_REQUEST */
  94. u8 slave_address;
  95. __be16 length;
  96. u8 target_address_length;
  97. u8 target_address[16];
  98. } __packed;
  99. struct cp2112_write_req_report {
  100. u8 report; /* CP2112_DATA_WRITE_REQUEST */
  101. u8 slave_address;
  102. u8 length;
  103. u8 data[61];
  104. } __packed;
  105. struct cp2112_force_read_report {
  106. u8 report; /* CP2112_DATA_READ_FORCE_SEND */
  107. __be16 length;
  108. } __packed;
  109. struct cp2112_xfer_status_report {
  110. u8 report; /* CP2112_TRANSFER_STATUS_RESPONSE */
  111. u8 status0; /* STATUS0_* */
  112. u8 status1; /* STATUS1_* */
  113. __be16 retries;
  114. __be16 length;
  115. } __packed;
  116. struct cp2112_string_report {
  117. u8 dummy; /* force .string to be aligned */
  118. struct_group_attr(contents, __packed,
  119. u8 report; /* CP2112_*_STRING */
  120. u8 length; /* length in bytes of everything after .report */
  121. u8 type; /* USB_DT_STRING */
  122. wchar_t string[30]; /* UTF16_LITTLE_ENDIAN string */
  123. );
  124. } __packed;
  125. /* Number of times to request transfer status before giving up waiting for a
  126. transfer to complete. This may need to be changed if SMBUS clock, retries,
  127. or read/write/scl_low timeout settings are changed. */
  128. static const int XFER_STATUS_RETRIES = 10;
  129. /* Time in ms to wait for a CP2112_DATA_READ_RESPONSE or
  130. CP2112_TRANSFER_STATUS_RESPONSE. */
  131. static const int RESPONSE_TIMEOUT = 50;
  132. static const struct hid_device_id cp2112_devices[] = {
  133. { HID_USB_DEVICE(USB_VENDOR_ID_CYGNAL, USB_DEVICE_ID_CYGNAL_CP2112) },
  134. { }
  135. };
  136. MODULE_DEVICE_TABLE(hid, cp2112_devices);
  137. struct cp2112_device {
  138. struct i2c_adapter adap;
  139. struct hid_device *hdev;
  140. wait_queue_head_t wait;
  141. u8 read_data[61];
  142. u8 read_length;
  143. u8 hwversion;
  144. int xfer_status;
  145. atomic_t read_avail;
  146. atomic_t xfer_avail;
  147. struct gpio_chip gc;
  148. u8 *in_out_buffer;
  149. struct mutex lock;
  150. struct gpio_desc *desc[8];
  151. bool gpio_poll;
  152. struct delayed_work gpio_poll_worker;
  153. unsigned long irq_mask;
  154. u8 gpio_prev_state;
  155. };
  156. static int gpio_push_pull = 0xFF;
  157. module_param(gpio_push_pull, int, S_IRUGO | S_IWUSR);
  158. MODULE_PARM_DESC(gpio_push_pull, "GPIO push-pull configuration bitmask");
  159. static int cp2112_gpio_direction_input(struct gpio_chip *chip, unsigned offset)
  160. {
  161. struct cp2112_device *dev = gpiochip_get_data(chip);
  162. struct hid_device *hdev = dev->hdev;
  163. u8 *buf = dev->in_out_buffer;
  164. int ret;
  165. mutex_lock(&dev->lock);
  166. ret = hid_hw_raw_request(hdev, CP2112_GPIO_CONFIG, buf,
  167. CP2112_GPIO_CONFIG_LENGTH, HID_FEATURE_REPORT,
  168. HID_REQ_GET_REPORT);
  169. if (ret != CP2112_GPIO_CONFIG_LENGTH) {
  170. hid_err(hdev, "error requesting GPIO config: %d\n", ret);
  171. if (ret >= 0)
  172. ret = -EIO;
  173. goto exit;
  174. }
  175. buf[1] &= ~(1 << offset);
  176. buf[2] = gpio_push_pull;
  177. ret = hid_hw_raw_request(hdev, CP2112_GPIO_CONFIG, buf,
  178. CP2112_GPIO_CONFIG_LENGTH, HID_FEATURE_REPORT,
  179. HID_REQ_SET_REPORT);
  180. if (ret != CP2112_GPIO_CONFIG_LENGTH) {
  181. hid_err(hdev, "error setting GPIO config: %d\n", ret);
  182. if (ret >= 0)
  183. ret = -EIO;
  184. goto exit;
  185. }
  186. ret = 0;
  187. exit:
  188. mutex_unlock(&dev->lock);
  189. return ret;
  190. }
  191. static void cp2112_gpio_set(struct gpio_chip *chip, unsigned offset, int value)
  192. {
  193. struct cp2112_device *dev = gpiochip_get_data(chip);
  194. struct hid_device *hdev = dev->hdev;
  195. u8 *buf = dev->in_out_buffer;
  196. int ret;
  197. mutex_lock(&dev->lock);
  198. buf[0] = CP2112_GPIO_SET;
  199. buf[1] = value ? 0xff : 0;
  200. buf[2] = 1 << offset;
  201. ret = hid_hw_raw_request(hdev, CP2112_GPIO_SET, buf,
  202. CP2112_GPIO_SET_LENGTH, HID_FEATURE_REPORT,
  203. HID_REQ_SET_REPORT);
  204. if (ret < 0)
  205. hid_err(hdev, "error setting GPIO values: %d\n", ret);
  206. mutex_unlock(&dev->lock);
  207. }
  208. static int cp2112_gpio_get_all(struct gpio_chip *chip)
  209. {
  210. struct cp2112_device *dev = gpiochip_get_data(chip);
  211. struct hid_device *hdev = dev->hdev;
  212. u8 *buf = dev->in_out_buffer;
  213. int ret;
  214. mutex_lock(&dev->lock);
  215. ret = hid_hw_raw_request(hdev, CP2112_GPIO_GET, buf,
  216. CP2112_GPIO_GET_LENGTH, HID_FEATURE_REPORT,
  217. HID_REQ_GET_REPORT);
  218. if (ret != CP2112_GPIO_GET_LENGTH) {
  219. hid_err(hdev, "error requesting GPIO values: %d\n", ret);
  220. ret = ret < 0 ? ret : -EIO;
  221. goto exit;
  222. }
  223. ret = buf[1];
  224. exit:
  225. mutex_unlock(&dev->lock);
  226. return ret;
  227. }
  228. static int cp2112_gpio_get(struct gpio_chip *chip, unsigned int offset)
  229. {
  230. int ret;
  231. ret = cp2112_gpio_get_all(chip);
  232. if (ret < 0)
  233. return ret;
  234. return (ret >> offset) & 1;
  235. }
  236. static int cp2112_gpio_direction_output(struct gpio_chip *chip,
  237. unsigned offset, int value)
  238. {
  239. struct cp2112_device *dev = gpiochip_get_data(chip);
  240. struct hid_device *hdev = dev->hdev;
  241. u8 *buf = dev->in_out_buffer;
  242. int ret;
  243. mutex_lock(&dev->lock);
  244. ret = hid_hw_raw_request(hdev, CP2112_GPIO_CONFIG, buf,
  245. CP2112_GPIO_CONFIG_LENGTH, HID_FEATURE_REPORT,
  246. HID_REQ_GET_REPORT);
  247. if (ret != CP2112_GPIO_CONFIG_LENGTH) {
  248. hid_err(hdev, "error requesting GPIO config: %d\n", ret);
  249. goto fail;
  250. }
  251. buf[1] |= 1 << offset;
  252. buf[2] = gpio_push_pull;
  253. ret = hid_hw_raw_request(hdev, CP2112_GPIO_CONFIG, buf,
  254. CP2112_GPIO_CONFIG_LENGTH, HID_FEATURE_REPORT,
  255. HID_REQ_SET_REPORT);
  256. if (ret < 0) {
  257. hid_err(hdev, "error setting GPIO config: %d\n", ret);
  258. goto fail;
  259. }
  260. mutex_unlock(&dev->lock);
  261. /*
  262. * Set gpio value when output direction is already set,
  263. * as specified in AN495, Rev. 0.2, cpt. 4.4
  264. */
  265. cp2112_gpio_set(chip, offset, value);
  266. return 0;
  267. fail:
  268. mutex_unlock(&dev->lock);
  269. return ret < 0 ? ret : -EIO;
  270. }
  271. static int cp2112_hid_get(struct hid_device *hdev, unsigned char report_number,
  272. u8 *data, size_t count, unsigned char report_type)
  273. {
  274. u8 *buf;
  275. int ret;
  276. buf = kmalloc(count, GFP_KERNEL);
  277. if (!buf)
  278. return -ENOMEM;
  279. ret = hid_hw_raw_request(hdev, report_number, buf, count,
  280. report_type, HID_REQ_GET_REPORT);
  281. memcpy(data, buf, count);
  282. kfree(buf);
  283. return ret;
  284. }
  285. static int cp2112_hid_output(struct hid_device *hdev, u8 *data, size_t count,
  286. unsigned char report_type)
  287. {
  288. u8 *buf;
  289. int ret;
  290. buf = kmemdup(data, count, GFP_KERNEL);
  291. if (!buf)
  292. return -ENOMEM;
  293. if (report_type == HID_OUTPUT_REPORT)
  294. ret = hid_hw_output_report(hdev, buf, count);
  295. else
  296. ret = hid_hw_raw_request(hdev, buf[0], buf, count, report_type,
  297. HID_REQ_SET_REPORT);
  298. kfree(buf);
  299. return ret;
  300. }
  301. static int cp2112_wait(struct cp2112_device *dev, atomic_t *avail)
  302. {
  303. int ret = 0;
  304. /* We have sent either a CP2112_TRANSFER_STATUS_REQUEST or a
  305. * CP2112_DATA_READ_FORCE_SEND and we are waiting for the response to
  306. * come in cp2112_raw_event or timeout. There will only be one of these
  307. * in flight at any one time. The timeout is extremely large and is a
  308. * last resort if the CP2112 has died. If we do timeout we don't expect
  309. * to receive the response which would cause data races, it's not like
  310. * we can do anything about it anyway.
  311. */
  312. ret = wait_event_interruptible_timeout(dev->wait,
  313. atomic_read(avail), msecs_to_jiffies(RESPONSE_TIMEOUT));
  314. if (-ERESTARTSYS == ret)
  315. return ret;
  316. if (!ret)
  317. return -ETIMEDOUT;
  318. atomic_set(avail, 0);
  319. return 0;
  320. }
  321. static int cp2112_xfer_status(struct cp2112_device *dev)
  322. {
  323. struct hid_device *hdev = dev->hdev;
  324. u8 buf[2];
  325. int ret;
  326. buf[0] = CP2112_TRANSFER_STATUS_REQUEST;
  327. buf[1] = 0x01;
  328. atomic_set(&dev->xfer_avail, 0);
  329. ret = cp2112_hid_output(hdev, buf, 2, HID_OUTPUT_REPORT);
  330. if (ret < 0) {
  331. hid_warn(hdev, "Error requesting status: %d\n", ret);
  332. return ret;
  333. }
  334. ret = cp2112_wait(dev, &dev->xfer_avail);
  335. if (ret)
  336. return ret;
  337. return dev->xfer_status;
  338. }
  339. static int cp2112_read(struct cp2112_device *dev, u8 *data, size_t size)
  340. {
  341. struct hid_device *hdev = dev->hdev;
  342. struct cp2112_force_read_report report;
  343. int ret;
  344. if (size > sizeof(dev->read_data))
  345. size = sizeof(dev->read_data);
  346. report.report = CP2112_DATA_READ_FORCE_SEND;
  347. report.length = cpu_to_be16(size);
  348. atomic_set(&dev->read_avail, 0);
  349. ret = cp2112_hid_output(hdev, &report.report, sizeof(report),
  350. HID_OUTPUT_REPORT);
  351. if (ret < 0) {
  352. hid_warn(hdev, "Error requesting data: %d\n", ret);
  353. return ret;
  354. }
  355. ret = cp2112_wait(dev, &dev->read_avail);
  356. if (ret)
  357. return ret;
  358. hid_dbg(hdev, "read %d of %zd bytes requested\n",
  359. dev->read_length, size);
  360. if (size > dev->read_length)
  361. size = dev->read_length;
  362. memcpy(data, dev->read_data, size);
  363. return dev->read_length;
  364. }
  365. static int cp2112_read_req(void *buf, u8 slave_address, u16 length)
  366. {
  367. struct cp2112_read_req_report *report = buf;
  368. if (length < 1 || length > 512)
  369. return -EINVAL;
  370. report->report = CP2112_DATA_READ_REQUEST;
  371. report->slave_address = slave_address << 1;
  372. report->length = cpu_to_be16(length);
  373. return sizeof(*report);
  374. }
  375. static int cp2112_write_read_req(void *buf, u8 slave_address, u16 length,
  376. u8 command, u8 *data, u8 data_length)
  377. {
  378. struct cp2112_write_read_req_report *report = buf;
  379. if (length < 1 || length > 512
  380. || data_length > sizeof(report->target_address) - 1)
  381. return -EINVAL;
  382. report->report = CP2112_DATA_WRITE_READ_REQUEST;
  383. report->slave_address = slave_address << 1;
  384. report->length = cpu_to_be16(length);
  385. report->target_address_length = data_length + 1;
  386. report->target_address[0] = command;
  387. memcpy(&report->target_address[1], data, data_length);
  388. return data_length + 6;
  389. }
  390. static int cp2112_write_req(void *buf, u8 slave_address, u8 command, u8 *data,
  391. u8 data_length)
  392. {
  393. struct cp2112_write_req_report *report = buf;
  394. if (data_length > sizeof(report->data) - 1)
  395. return -EINVAL;
  396. report->report = CP2112_DATA_WRITE_REQUEST;
  397. report->slave_address = slave_address << 1;
  398. report->length = data_length + 1;
  399. report->data[0] = command;
  400. memcpy(&report->data[1], data, data_length);
  401. return data_length + 4;
  402. }
  403. static int cp2112_i2c_write_req(void *buf, u8 slave_address, u8 *data,
  404. u8 data_length)
  405. {
  406. struct cp2112_write_req_report *report = buf;
  407. if (data_length > sizeof(report->data))
  408. return -EINVAL;
  409. report->report = CP2112_DATA_WRITE_REQUEST;
  410. report->slave_address = slave_address << 1;
  411. report->length = data_length;
  412. memcpy(report->data, data, data_length);
  413. return data_length + 3;
  414. }
  415. static int cp2112_i2c_write_read_req(void *buf, u8 slave_address,
  416. u8 *addr, int addr_length,
  417. int read_length)
  418. {
  419. struct cp2112_write_read_req_report *report = buf;
  420. if (read_length < 1 || read_length > 512 ||
  421. addr_length > sizeof(report->target_address))
  422. return -EINVAL;
  423. report->report = CP2112_DATA_WRITE_READ_REQUEST;
  424. report->slave_address = slave_address << 1;
  425. report->length = cpu_to_be16(read_length);
  426. report->target_address_length = addr_length;
  427. memcpy(report->target_address, addr, addr_length);
  428. return addr_length + 5;
  429. }
  430. static int cp2112_i2c_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs,
  431. int num)
  432. {
  433. struct cp2112_device *dev = (struct cp2112_device *)adap->algo_data;
  434. struct hid_device *hdev = dev->hdev;
  435. u8 buf[64];
  436. ssize_t count;
  437. ssize_t read_length = 0;
  438. u8 *read_buf = NULL;
  439. unsigned int retries;
  440. int ret;
  441. hid_dbg(hdev, "I2C %d messages\n", num);
  442. if (num == 1) {
  443. if (msgs->flags & I2C_M_RD) {
  444. hid_dbg(hdev, "I2C read %#04x len %d\n",
  445. msgs->addr, msgs->len);
  446. read_length = msgs->len;
  447. read_buf = msgs->buf;
  448. count = cp2112_read_req(buf, msgs->addr, msgs->len);
  449. } else {
  450. hid_dbg(hdev, "I2C write %#04x len %d\n",
  451. msgs->addr, msgs->len);
  452. count = cp2112_i2c_write_req(buf, msgs->addr,
  453. msgs->buf, msgs->len);
  454. }
  455. if (count < 0)
  456. return count;
  457. } else if (dev->hwversion > 1 && /* no repeated start in rev 1 */
  458. num == 2 &&
  459. msgs[0].addr == msgs[1].addr &&
  460. !(msgs[0].flags & I2C_M_RD) && (msgs[1].flags & I2C_M_RD)) {
  461. hid_dbg(hdev, "I2C write-read %#04x wlen %d rlen %d\n",
  462. msgs[0].addr, msgs[0].len, msgs[1].len);
  463. read_length = msgs[1].len;
  464. read_buf = msgs[1].buf;
  465. count = cp2112_i2c_write_read_req(buf, msgs[0].addr,
  466. msgs[0].buf, msgs[0].len, msgs[1].len);
  467. if (count < 0)
  468. return count;
  469. } else {
  470. hid_err(hdev,
  471. "Multi-message I2C transactions not supported\n");
  472. return -EOPNOTSUPP;
  473. }
  474. ret = hid_hw_power(hdev, PM_HINT_FULLON);
  475. if (ret < 0) {
  476. hid_err(hdev, "power management error: %d\n", ret);
  477. return ret;
  478. }
  479. ret = cp2112_hid_output(hdev, buf, count, HID_OUTPUT_REPORT);
  480. if (ret < 0) {
  481. hid_warn(hdev, "Error starting transaction: %d\n", ret);
  482. goto power_normal;
  483. }
  484. for (retries = 0; retries < XFER_STATUS_RETRIES; ++retries) {
  485. ret = cp2112_xfer_status(dev);
  486. if (-EBUSY == ret)
  487. continue;
  488. if (ret < 0)
  489. goto power_normal;
  490. break;
  491. }
  492. if (XFER_STATUS_RETRIES <= retries) {
  493. hid_warn(hdev, "Transfer timed out, cancelling.\n");
  494. buf[0] = CP2112_CANCEL_TRANSFER;
  495. buf[1] = 0x01;
  496. ret = cp2112_hid_output(hdev, buf, 2, HID_OUTPUT_REPORT);
  497. if (ret < 0)
  498. hid_warn(hdev, "Error cancelling transaction: %d\n",
  499. ret);
  500. ret = -ETIMEDOUT;
  501. goto power_normal;
  502. }
  503. for (count = 0; count < read_length;) {
  504. ret = cp2112_read(dev, read_buf + count, read_length - count);
  505. if (ret < 0)
  506. goto power_normal;
  507. if (ret == 0) {
  508. hid_err(hdev, "read returned 0\n");
  509. ret = -EIO;
  510. goto power_normal;
  511. }
  512. count += ret;
  513. if (count > read_length) {
  514. /*
  515. * The hardware returned too much data.
  516. * This is mostly harmless because cp2112_read()
  517. * has a limit check so didn't overrun our
  518. * buffer. Nevertheless, we return an error
  519. * because something is seriously wrong and
  520. * it shouldn't go unnoticed.
  521. */
  522. hid_err(hdev, "long read: %d > %zd\n",
  523. ret, read_length - count + ret);
  524. ret = -EIO;
  525. goto power_normal;
  526. }
  527. }
  528. /* return the number of transferred messages */
  529. ret = num;
  530. power_normal:
  531. hid_hw_power(hdev, PM_HINT_NORMAL);
  532. hid_dbg(hdev, "I2C transfer finished: %d\n", ret);
  533. return ret;
  534. }
  535. static int cp2112_xfer(struct i2c_adapter *adap, u16 addr,
  536. unsigned short flags, char read_write, u8 command,
  537. int size, union i2c_smbus_data *data)
  538. {
  539. struct cp2112_device *dev = (struct cp2112_device *)adap->algo_data;
  540. struct hid_device *hdev = dev->hdev;
  541. u8 buf[64];
  542. __le16 word;
  543. ssize_t count;
  544. size_t read_length = 0;
  545. unsigned int retries;
  546. int ret;
  547. hid_dbg(hdev, "%s addr 0x%x flags 0x%x cmd 0x%x size %d\n",
  548. read_write == I2C_SMBUS_WRITE ? "write" : "read",
  549. addr, flags, command, size);
  550. switch (size) {
  551. case I2C_SMBUS_BYTE:
  552. read_length = 1;
  553. if (I2C_SMBUS_READ == read_write)
  554. count = cp2112_read_req(buf, addr, read_length);
  555. else
  556. count = cp2112_write_req(buf, addr, command, NULL,
  557. 0);
  558. break;
  559. case I2C_SMBUS_BYTE_DATA:
  560. read_length = 1;
  561. if (I2C_SMBUS_READ == read_write)
  562. count = cp2112_write_read_req(buf, addr, read_length,
  563. command, NULL, 0);
  564. else
  565. count = cp2112_write_req(buf, addr, command,
  566. &data->byte, 1);
  567. break;
  568. case I2C_SMBUS_WORD_DATA:
  569. read_length = 2;
  570. word = cpu_to_le16(data->word);
  571. if (I2C_SMBUS_READ == read_write)
  572. count = cp2112_write_read_req(buf, addr, read_length,
  573. command, NULL, 0);
  574. else
  575. count = cp2112_write_req(buf, addr, command,
  576. (u8 *)&word, 2);
  577. break;
  578. case I2C_SMBUS_PROC_CALL:
  579. size = I2C_SMBUS_WORD_DATA;
  580. read_write = I2C_SMBUS_READ;
  581. read_length = 2;
  582. word = cpu_to_le16(data->word);
  583. count = cp2112_write_read_req(buf, addr, read_length, command,
  584. (u8 *)&word, 2);
  585. break;
  586. case I2C_SMBUS_I2C_BLOCK_DATA:
  587. if (read_write == I2C_SMBUS_READ) {
  588. read_length = data->block[0];
  589. count = cp2112_write_read_req(buf, addr, read_length,
  590. command, NULL, 0);
  591. } else {
  592. count = cp2112_write_req(buf, addr, command,
  593. data->block + 1,
  594. data->block[0]);
  595. }
  596. break;
  597. case I2C_SMBUS_BLOCK_DATA:
  598. if (I2C_SMBUS_READ == read_write) {
  599. count = cp2112_write_read_req(buf, addr,
  600. I2C_SMBUS_BLOCK_MAX,
  601. command, NULL, 0);
  602. } else {
  603. count = cp2112_write_req(buf, addr, command,
  604. data->block,
  605. data->block[0] + 1);
  606. }
  607. break;
  608. case I2C_SMBUS_BLOCK_PROC_CALL:
  609. size = I2C_SMBUS_BLOCK_DATA;
  610. read_write = I2C_SMBUS_READ;
  611. count = cp2112_write_read_req(buf, addr, I2C_SMBUS_BLOCK_MAX,
  612. command, data->block,
  613. data->block[0] + 1);
  614. break;
  615. default:
  616. hid_warn(hdev, "Unsupported transaction %d\n", size);
  617. return -EOPNOTSUPP;
  618. }
  619. if (count < 0)
  620. return count;
  621. ret = hid_hw_power(hdev, PM_HINT_FULLON);
  622. if (ret < 0) {
  623. hid_err(hdev, "power management error: %d\n", ret);
  624. return ret;
  625. }
  626. ret = cp2112_hid_output(hdev, buf, count, HID_OUTPUT_REPORT);
  627. if (ret < 0) {
  628. hid_warn(hdev, "Error starting transaction: %d\n", ret);
  629. goto power_normal;
  630. }
  631. for (retries = 0; retries < XFER_STATUS_RETRIES; ++retries) {
  632. ret = cp2112_xfer_status(dev);
  633. if (-EBUSY == ret)
  634. continue;
  635. if (ret < 0)
  636. goto power_normal;
  637. break;
  638. }
  639. if (XFER_STATUS_RETRIES <= retries) {
  640. hid_warn(hdev, "Transfer timed out, cancelling.\n");
  641. buf[0] = CP2112_CANCEL_TRANSFER;
  642. buf[1] = 0x01;
  643. ret = cp2112_hid_output(hdev, buf, 2, HID_OUTPUT_REPORT);
  644. if (ret < 0)
  645. hid_warn(hdev, "Error cancelling transaction: %d\n",
  646. ret);
  647. ret = -ETIMEDOUT;
  648. goto power_normal;
  649. }
  650. if (I2C_SMBUS_WRITE == read_write) {
  651. ret = 0;
  652. goto power_normal;
  653. }
  654. if (I2C_SMBUS_BLOCK_DATA == size)
  655. read_length = ret;
  656. ret = cp2112_read(dev, buf, read_length);
  657. if (ret < 0)
  658. goto power_normal;
  659. if (ret != read_length) {
  660. hid_warn(hdev, "short read: %d < %zd\n", ret, read_length);
  661. ret = -EIO;
  662. goto power_normal;
  663. }
  664. switch (size) {
  665. case I2C_SMBUS_BYTE:
  666. case I2C_SMBUS_BYTE_DATA:
  667. data->byte = buf[0];
  668. break;
  669. case I2C_SMBUS_WORD_DATA:
  670. data->word = le16_to_cpup((__le16 *)buf);
  671. break;
  672. case I2C_SMBUS_I2C_BLOCK_DATA:
  673. if (read_length > I2C_SMBUS_BLOCK_MAX) {
  674. ret = -EINVAL;
  675. goto power_normal;
  676. }
  677. memcpy(data->block + 1, buf, read_length);
  678. break;
  679. case I2C_SMBUS_BLOCK_DATA:
  680. if (read_length > I2C_SMBUS_BLOCK_MAX) {
  681. ret = -EPROTO;
  682. goto power_normal;
  683. }
  684. memcpy(data->block, buf, read_length);
  685. break;
  686. }
  687. ret = 0;
  688. power_normal:
  689. hid_hw_power(hdev, PM_HINT_NORMAL);
  690. hid_dbg(hdev, "transfer finished: %d\n", ret);
  691. return ret;
  692. }
  693. static u32 cp2112_functionality(struct i2c_adapter *adap)
  694. {
  695. return I2C_FUNC_I2C |
  696. I2C_FUNC_SMBUS_BYTE |
  697. I2C_FUNC_SMBUS_BYTE_DATA |
  698. I2C_FUNC_SMBUS_WORD_DATA |
  699. I2C_FUNC_SMBUS_BLOCK_DATA |
  700. I2C_FUNC_SMBUS_I2C_BLOCK |
  701. I2C_FUNC_SMBUS_PROC_CALL |
  702. I2C_FUNC_SMBUS_BLOCK_PROC_CALL;
  703. }
  704. static const struct i2c_algorithm smbus_algorithm = {
  705. .master_xfer = cp2112_i2c_xfer,
  706. .smbus_xfer = cp2112_xfer,
  707. .functionality = cp2112_functionality,
  708. };
  709. static int cp2112_get_usb_config(struct hid_device *hdev,
  710. struct cp2112_usb_config_report *cfg)
  711. {
  712. int ret;
  713. ret = cp2112_hid_get(hdev, CP2112_USB_CONFIG, (u8 *)cfg, sizeof(*cfg),
  714. HID_FEATURE_REPORT);
  715. if (ret != sizeof(*cfg)) {
  716. hid_err(hdev, "error reading usb config: %d\n", ret);
  717. if (ret < 0)
  718. return ret;
  719. return -EIO;
  720. }
  721. return 0;
  722. }
  723. static int cp2112_set_usb_config(struct hid_device *hdev,
  724. struct cp2112_usb_config_report *cfg)
  725. {
  726. int ret;
  727. BUG_ON(cfg->report != CP2112_USB_CONFIG);
  728. ret = cp2112_hid_output(hdev, (u8 *)cfg, sizeof(*cfg),
  729. HID_FEATURE_REPORT);
  730. if (ret != sizeof(*cfg)) {
  731. hid_err(hdev, "error writing usb config: %d\n", ret);
  732. if (ret < 0)
  733. return ret;
  734. return -EIO;
  735. }
  736. return 0;
  737. }
  738. static void chmod_sysfs_attrs(struct hid_device *hdev);
  739. #define CP2112_CONFIG_ATTR(name, store, format, ...) \
  740. static ssize_t name##_store(struct device *kdev, \
  741. struct device_attribute *attr, const char *buf, \
  742. size_t count) \
  743. { \
  744. struct hid_device *hdev = to_hid_device(kdev); \
  745. struct cp2112_usb_config_report cfg; \
  746. int ret = cp2112_get_usb_config(hdev, &cfg); \
  747. if (ret) \
  748. return ret; \
  749. store; \
  750. ret = cp2112_set_usb_config(hdev, &cfg); \
  751. if (ret) \
  752. return ret; \
  753. chmod_sysfs_attrs(hdev); \
  754. return count; \
  755. } \
  756. static ssize_t name##_show(struct device *kdev, \
  757. struct device_attribute *attr, char *buf) \
  758. { \
  759. struct hid_device *hdev = to_hid_device(kdev); \
  760. struct cp2112_usb_config_report cfg; \
  761. int ret = cp2112_get_usb_config(hdev, &cfg); \
  762. if (ret) \
  763. return ret; \
  764. return scnprintf(buf, PAGE_SIZE, format, ##__VA_ARGS__); \
  765. } \
  766. static DEVICE_ATTR_RW(name);
  767. CP2112_CONFIG_ATTR(vendor_id, ({
  768. u16 vid;
  769. if (sscanf(buf, "%hi", &vid) != 1)
  770. return -EINVAL;
  771. cfg.vid = cpu_to_le16(vid);
  772. cfg.mask = 0x01;
  773. }), "0x%04x\n", le16_to_cpu(cfg.vid));
  774. CP2112_CONFIG_ATTR(product_id, ({
  775. u16 pid;
  776. if (sscanf(buf, "%hi", &pid) != 1)
  777. return -EINVAL;
  778. cfg.pid = cpu_to_le16(pid);
  779. cfg.mask = 0x02;
  780. }), "0x%04x\n", le16_to_cpu(cfg.pid));
  781. CP2112_CONFIG_ATTR(max_power, ({
  782. int mA;
  783. if (sscanf(buf, "%i", &mA) != 1)
  784. return -EINVAL;
  785. cfg.max_power = (mA + 1) / 2;
  786. cfg.mask = 0x04;
  787. }), "%u mA\n", cfg.max_power * 2);
  788. CP2112_CONFIG_ATTR(power_mode, ({
  789. if (sscanf(buf, "%hhi", &cfg.power_mode) != 1)
  790. return -EINVAL;
  791. cfg.mask = 0x08;
  792. }), "%u\n", cfg.power_mode);
  793. CP2112_CONFIG_ATTR(release_version, ({
  794. if (sscanf(buf, "%hhi.%hhi", &cfg.release_major, &cfg.release_minor)
  795. != 2)
  796. return -EINVAL;
  797. cfg.mask = 0x10;
  798. }), "%u.%u\n", cfg.release_major, cfg.release_minor);
  799. #undef CP2112_CONFIG_ATTR
  800. struct cp2112_pstring_attribute {
  801. struct device_attribute attr;
  802. unsigned char report;
  803. };
  804. static ssize_t pstr_store(struct device *kdev,
  805. struct device_attribute *kattr, const char *buf,
  806. size_t count)
  807. {
  808. struct hid_device *hdev = to_hid_device(kdev);
  809. struct cp2112_pstring_attribute *attr =
  810. container_of(kattr, struct cp2112_pstring_attribute, attr);
  811. struct cp2112_string_report report;
  812. int ret;
  813. memset(&report, 0, sizeof(report));
  814. ret = utf8s_to_utf16s(buf, count, UTF16_LITTLE_ENDIAN,
  815. report.string, ARRAY_SIZE(report.string));
  816. report.report = attr->report;
  817. report.length = ret * sizeof(report.string[0]) + 2;
  818. report.type = USB_DT_STRING;
  819. ret = cp2112_hid_output(hdev, &report.report, report.length + 1,
  820. HID_FEATURE_REPORT);
  821. if (ret != report.length + 1) {
  822. hid_err(hdev, "error writing %s string: %d\n", kattr->attr.name,
  823. ret);
  824. if (ret < 0)
  825. return ret;
  826. return -EIO;
  827. }
  828. chmod_sysfs_attrs(hdev);
  829. return count;
  830. }
  831. static ssize_t pstr_show(struct device *kdev,
  832. struct device_attribute *kattr, char *buf)
  833. {
  834. struct hid_device *hdev = to_hid_device(kdev);
  835. struct cp2112_pstring_attribute *attr =
  836. container_of(kattr, struct cp2112_pstring_attribute, attr);
  837. struct cp2112_string_report report;
  838. u8 length;
  839. int ret;
  840. ret = cp2112_hid_get(hdev, attr->report, (u8 *)&report.contents,
  841. sizeof(report.contents), HID_FEATURE_REPORT);
  842. if (ret < 3) {
  843. hid_err(hdev, "error reading %s string: %d\n", kattr->attr.name,
  844. ret);
  845. if (ret < 0)
  846. return ret;
  847. return -EIO;
  848. }
  849. if (report.length < 2) {
  850. hid_err(hdev, "invalid %s string length: %d\n",
  851. kattr->attr.name, report.length);
  852. return -EIO;
  853. }
  854. length = report.length > ret - 1 ? ret - 1 : report.length;
  855. length = (length - 2) / sizeof(report.string[0]);
  856. ret = utf16s_to_utf8s(report.string, length, UTF16_LITTLE_ENDIAN, buf,
  857. PAGE_SIZE - 1);
  858. buf[ret++] = '\n';
  859. return ret;
  860. }
  861. #define CP2112_PSTR_ATTR(name, _report) \
  862. static struct cp2112_pstring_attribute dev_attr_##name = { \
  863. .attr = __ATTR(name, (S_IWUSR | S_IRUGO), pstr_show, pstr_store), \
  864. .report = _report, \
  865. };
  866. CP2112_PSTR_ATTR(manufacturer, CP2112_MANUFACTURER_STRING);
  867. CP2112_PSTR_ATTR(product, CP2112_PRODUCT_STRING);
  868. CP2112_PSTR_ATTR(serial, CP2112_SERIAL_STRING);
  869. #undef CP2112_PSTR_ATTR
  870. static const struct attribute_group cp2112_attr_group = {
  871. .attrs = (struct attribute *[]){
  872. &dev_attr_vendor_id.attr,
  873. &dev_attr_product_id.attr,
  874. &dev_attr_max_power.attr,
  875. &dev_attr_power_mode.attr,
  876. &dev_attr_release_version.attr,
  877. &dev_attr_manufacturer.attr.attr,
  878. &dev_attr_product.attr.attr,
  879. &dev_attr_serial.attr.attr,
  880. NULL
  881. }
  882. };
  883. /* Chmoding our sysfs attributes is simply a way to expose which fields in the
  884. * PROM have already been programmed. We do not depend on this preventing
  885. * writing to these attributes since the CP2112 will simply ignore writes to
  886. * already-programmed fields. This is why there is no sense in fixing this
  887. * racy behaviour.
  888. */
  889. static void chmod_sysfs_attrs(struct hid_device *hdev)
  890. {
  891. struct attribute **attr;
  892. u8 buf[2];
  893. int ret;
  894. ret = cp2112_hid_get(hdev, CP2112_LOCK_BYTE, buf, sizeof(buf),
  895. HID_FEATURE_REPORT);
  896. if (ret != sizeof(buf)) {
  897. hid_err(hdev, "error reading lock byte: %d\n", ret);
  898. return;
  899. }
  900. for (attr = cp2112_attr_group.attrs; *attr; ++attr) {
  901. umode_t mode = (buf[1] & 1) ? S_IWUSR | S_IRUGO : S_IRUGO;
  902. ret = sysfs_chmod_file(&hdev->dev.kobj, *attr, mode);
  903. if (ret < 0)
  904. hid_err(hdev, "error chmoding sysfs file %s\n",
  905. (*attr)->name);
  906. buf[1] >>= 1;
  907. }
  908. }
  909. static void cp2112_gpio_irq_ack(struct irq_data *d)
  910. {
  911. }
  912. static void cp2112_gpio_irq_mask(struct irq_data *d)
  913. {
  914. struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
  915. struct cp2112_device *dev = gpiochip_get_data(gc);
  916. irq_hw_number_t hwirq = irqd_to_hwirq(d);
  917. __clear_bit(hwirq, &dev->irq_mask);
  918. gpiochip_disable_irq(gc, hwirq);
  919. }
  920. static void cp2112_gpio_irq_unmask(struct irq_data *d)
  921. {
  922. struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
  923. struct cp2112_device *dev = gpiochip_get_data(gc);
  924. irq_hw_number_t hwirq = irqd_to_hwirq(d);
  925. gpiochip_enable_irq(gc, hwirq);
  926. __set_bit(hwirq, &dev->irq_mask);
  927. }
  928. static void cp2112_gpio_poll_callback(struct work_struct *work)
  929. {
  930. struct cp2112_device *dev = container_of(work, struct cp2112_device,
  931. gpio_poll_worker.work);
  932. struct irq_data *d;
  933. u8 gpio_mask;
  934. u8 virqs = (u8)dev->irq_mask;
  935. u32 irq_type;
  936. int irq, virq, ret;
  937. ret = cp2112_gpio_get_all(&dev->gc);
  938. if (ret == -ENODEV) /* the hardware has been disconnected */
  939. return;
  940. if (ret < 0)
  941. goto exit;
  942. gpio_mask = ret;
  943. while (virqs) {
  944. virq = ffs(virqs) - 1;
  945. virqs &= ~BIT(virq);
  946. if (!dev->gc.to_irq)
  947. break;
  948. irq = dev->gc.to_irq(&dev->gc, virq);
  949. d = irq_get_irq_data(irq);
  950. if (!d)
  951. continue;
  952. irq_type = irqd_get_trigger_type(d);
  953. if (gpio_mask & BIT(virq)) {
  954. /* Level High */
  955. if (irq_type & IRQ_TYPE_LEVEL_HIGH)
  956. handle_nested_irq(irq);
  957. if ((irq_type & IRQ_TYPE_EDGE_RISING) &&
  958. !(dev->gpio_prev_state & BIT(virq)))
  959. handle_nested_irq(irq);
  960. } else {
  961. /* Level Low */
  962. if (irq_type & IRQ_TYPE_LEVEL_LOW)
  963. handle_nested_irq(irq);
  964. if ((irq_type & IRQ_TYPE_EDGE_FALLING) &&
  965. (dev->gpio_prev_state & BIT(virq)))
  966. handle_nested_irq(irq);
  967. }
  968. }
  969. dev->gpio_prev_state = gpio_mask;
  970. exit:
  971. if (dev->gpio_poll)
  972. schedule_delayed_work(&dev->gpio_poll_worker, 10);
  973. }
  974. static unsigned int cp2112_gpio_irq_startup(struct irq_data *d)
  975. {
  976. struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
  977. struct cp2112_device *dev = gpiochip_get_data(gc);
  978. if (!dev->gpio_poll) {
  979. dev->gpio_poll = true;
  980. schedule_delayed_work(&dev->gpio_poll_worker, 0);
  981. }
  982. cp2112_gpio_irq_unmask(d);
  983. return 0;
  984. }
  985. static void cp2112_gpio_irq_shutdown(struct irq_data *d)
  986. {
  987. struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
  988. struct cp2112_device *dev = gpiochip_get_data(gc);
  989. cp2112_gpio_irq_mask(d);
  990. if (!dev->irq_mask) {
  991. dev->gpio_poll = false;
  992. cancel_delayed_work_sync(&dev->gpio_poll_worker);
  993. }
  994. }
  995. static int cp2112_gpio_irq_type(struct irq_data *d, unsigned int type)
  996. {
  997. return 0;
  998. }
  999. static int __maybe_unused cp2112_allocate_irq(struct cp2112_device *dev,
  1000. int pin)
  1001. {
  1002. int ret;
  1003. if (dev->desc[pin])
  1004. return -EINVAL;
  1005. dev->desc[pin] = gpiochip_request_own_desc(&dev->gc, pin,
  1006. "HID/I2C:Event",
  1007. GPIO_ACTIVE_HIGH,
  1008. GPIOD_IN);
  1009. if (IS_ERR(dev->desc[pin])) {
  1010. dev_err(dev->gc.parent, "Failed to request GPIO\n");
  1011. return PTR_ERR(dev->desc[pin]);
  1012. }
  1013. ret = cp2112_gpio_direction_input(&dev->gc, pin);
  1014. if (ret < 0) {
  1015. dev_err(dev->gc.parent, "Failed to set GPIO to input dir\n");
  1016. goto err_desc;
  1017. }
  1018. ret = gpiochip_lock_as_irq(&dev->gc, pin);
  1019. if (ret) {
  1020. dev_err(dev->gc.parent, "Failed to lock GPIO as interrupt\n");
  1021. goto err_desc;
  1022. }
  1023. ret = gpiod_to_irq(dev->desc[pin]);
  1024. if (ret < 0) {
  1025. dev_err(dev->gc.parent, "Failed to translate GPIO to IRQ\n");
  1026. goto err_lock;
  1027. }
  1028. return ret;
  1029. err_lock:
  1030. gpiochip_unlock_as_irq(&dev->gc, pin);
  1031. err_desc:
  1032. gpiochip_free_own_desc(dev->desc[pin]);
  1033. dev->desc[pin] = NULL;
  1034. return ret;
  1035. }
  1036. static const struct irq_chip cp2112_gpio_irqchip = {
  1037. .name = "cp2112-gpio",
  1038. .irq_startup = cp2112_gpio_irq_startup,
  1039. .irq_shutdown = cp2112_gpio_irq_shutdown,
  1040. .irq_ack = cp2112_gpio_irq_ack,
  1041. .irq_mask = cp2112_gpio_irq_mask,
  1042. .irq_unmask = cp2112_gpio_irq_unmask,
  1043. .irq_set_type = cp2112_gpio_irq_type,
  1044. .flags = IRQCHIP_MASK_ON_SUSPEND | IRQCHIP_IMMUTABLE,
  1045. GPIOCHIP_IRQ_RESOURCE_HELPERS,
  1046. };
  1047. static int cp2112_probe(struct hid_device *hdev, const struct hid_device_id *id)
  1048. {
  1049. struct cp2112_device *dev;
  1050. u8 buf[3];
  1051. struct cp2112_smbus_config_report config;
  1052. struct gpio_irq_chip *girq;
  1053. int ret;
  1054. dev = devm_kzalloc(&hdev->dev, sizeof(*dev), GFP_KERNEL);
  1055. if (!dev)
  1056. return -ENOMEM;
  1057. dev->in_out_buffer = devm_kzalloc(&hdev->dev, CP2112_REPORT_MAX_LENGTH,
  1058. GFP_KERNEL);
  1059. if (!dev->in_out_buffer)
  1060. return -ENOMEM;
  1061. mutex_init(&dev->lock);
  1062. ret = hid_parse(hdev);
  1063. if (ret) {
  1064. hid_err(hdev, "parse failed\n");
  1065. return ret;
  1066. }
  1067. ret = hid_hw_start(hdev, HID_CONNECT_HIDRAW);
  1068. if (ret) {
  1069. hid_err(hdev, "hw start failed\n");
  1070. return ret;
  1071. }
  1072. ret = hid_hw_open(hdev);
  1073. if (ret) {
  1074. hid_err(hdev, "hw open failed\n");
  1075. goto err_hid_stop;
  1076. }
  1077. ret = hid_hw_power(hdev, PM_HINT_FULLON);
  1078. if (ret < 0) {
  1079. hid_err(hdev, "power management error: %d\n", ret);
  1080. goto err_hid_close;
  1081. }
  1082. ret = cp2112_hid_get(hdev, CP2112_GET_VERSION_INFO, buf, sizeof(buf),
  1083. HID_FEATURE_REPORT);
  1084. if (ret != sizeof(buf)) {
  1085. hid_err(hdev, "error requesting version\n");
  1086. if (ret >= 0)
  1087. ret = -EIO;
  1088. goto err_power_normal;
  1089. }
  1090. hid_info(hdev, "Part Number: 0x%02X Device Version: 0x%02X\n",
  1091. buf[1], buf[2]);
  1092. ret = cp2112_hid_get(hdev, CP2112_SMBUS_CONFIG, (u8 *)&config,
  1093. sizeof(config), HID_FEATURE_REPORT);
  1094. if (ret != sizeof(config)) {
  1095. hid_err(hdev, "error requesting SMBus config\n");
  1096. if (ret >= 0)
  1097. ret = -EIO;
  1098. goto err_power_normal;
  1099. }
  1100. config.retry_time = cpu_to_be16(1);
  1101. ret = cp2112_hid_output(hdev, (u8 *)&config, sizeof(config),
  1102. HID_FEATURE_REPORT);
  1103. if (ret != sizeof(config)) {
  1104. hid_err(hdev, "error setting SMBus config\n");
  1105. if (ret >= 0)
  1106. ret = -EIO;
  1107. goto err_power_normal;
  1108. }
  1109. hid_set_drvdata(hdev, (void *)dev);
  1110. dev->hdev = hdev;
  1111. dev->adap.owner = THIS_MODULE;
  1112. dev->adap.class = I2C_CLASS_HWMON;
  1113. dev->adap.algo = &smbus_algorithm;
  1114. dev->adap.algo_data = dev;
  1115. dev->adap.dev.parent = &hdev->dev;
  1116. snprintf(dev->adap.name, sizeof(dev->adap.name),
  1117. "CP2112 SMBus Bridge on hidraw%d",
  1118. ((struct hidraw *)hdev->hidraw)->minor);
  1119. dev->hwversion = buf[2];
  1120. init_waitqueue_head(&dev->wait);
  1121. hid_device_io_start(hdev);
  1122. ret = i2c_add_adapter(&dev->adap);
  1123. hid_device_io_stop(hdev);
  1124. if (ret) {
  1125. hid_err(hdev, "error registering i2c adapter\n");
  1126. goto err_power_normal;
  1127. }
  1128. hid_dbg(hdev, "adapter registered\n");
  1129. dev->gc.label = "cp2112_gpio";
  1130. dev->gc.direction_input = cp2112_gpio_direction_input;
  1131. dev->gc.direction_output = cp2112_gpio_direction_output;
  1132. dev->gc.set = cp2112_gpio_set;
  1133. dev->gc.get = cp2112_gpio_get;
  1134. dev->gc.base = -1;
  1135. dev->gc.ngpio = 8;
  1136. dev->gc.can_sleep = 1;
  1137. dev->gc.parent = &hdev->dev;
  1138. girq = &dev->gc.irq;
  1139. gpio_irq_chip_set_chip(girq, &cp2112_gpio_irqchip);
  1140. /* The event comes from the outside so no parent handler */
  1141. girq->parent_handler = NULL;
  1142. girq->num_parents = 0;
  1143. girq->parents = NULL;
  1144. girq->default_type = IRQ_TYPE_NONE;
  1145. girq->handler = handle_simple_irq;
  1146. girq->threaded = true;
  1147. INIT_DELAYED_WORK(&dev->gpio_poll_worker, cp2112_gpio_poll_callback);
  1148. ret = gpiochip_add_data(&dev->gc, dev);
  1149. if (ret < 0) {
  1150. hid_err(hdev, "error registering gpio chip\n");
  1151. goto err_free_i2c;
  1152. }
  1153. ret = sysfs_create_group(&hdev->dev.kobj, &cp2112_attr_group);
  1154. if (ret < 0) {
  1155. hid_err(hdev, "error creating sysfs attrs\n");
  1156. goto err_gpiochip_remove;
  1157. }
  1158. chmod_sysfs_attrs(hdev);
  1159. hid_hw_power(hdev, PM_HINT_NORMAL);
  1160. return ret;
  1161. err_gpiochip_remove:
  1162. gpiochip_remove(&dev->gc);
  1163. err_free_i2c:
  1164. i2c_del_adapter(&dev->adap);
  1165. err_power_normal:
  1166. hid_hw_power(hdev, PM_HINT_NORMAL);
  1167. err_hid_close:
  1168. hid_hw_close(hdev);
  1169. err_hid_stop:
  1170. hid_hw_stop(hdev);
  1171. return ret;
  1172. }
  1173. static void cp2112_remove(struct hid_device *hdev)
  1174. {
  1175. struct cp2112_device *dev = hid_get_drvdata(hdev);
  1176. int i;
  1177. sysfs_remove_group(&hdev->dev.kobj, &cp2112_attr_group);
  1178. i2c_del_adapter(&dev->adap);
  1179. if (dev->gpio_poll) {
  1180. dev->gpio_poll = false;
  1181. cancel_delayed_work_sync(&dev->gpio_poll_worker);
  1182. }
  1183. for (i = 0; i < ARRAY_SIZE(dev->desc); i++) {
  1184. gpiochip_unlock_as_irq(&dev->gc, i);
  1185. gpiochip_free_own_desc(dev->desc[i]);
  1186. }
  1187. gpiochip_remove(&dev->gc);
  1188. /* i2c_del_adapter has finished removing all i2c devices from our
  1189. * adapter. Well behaved devices should no longer call our cp2112_xfer
  1190. * and should have waited for any pending calls to finish. It has also
  1191. * waited for device_unregister(&adap->dev) to complete. Therefore we
  1192. * can safely free our struct cp2112_device.
  1193. */
  1194. hid_hw_close(hdev);
  1195. hid_hw_stop(hdev);
  1196. }
  1197. static int cp2112_raw_event(struct hid_device *hdev, struct hid_report *report,
  1198. u8 *data, int size)
  1199. {
  1200. struct cp2112_device *dev = hid_get_drvdata(hdev);
  1201. struct cp2112_xfer_status_report *xfer = (void *)data;
  1202. switch (data[0]) {
  1203. case CP2112_TRANSFER_STATUS_RESPONSE:
  1204. hid_dbg(hdev, "xfer status: %02x %02x %04x %04x\n",
  1205. xfer->status0, xfer->status1,
  1206. be16_to_cpu(xfer->retries), be16_to_cpu(xfer->length));
  1207. switch (xfer->status0) {
  1208. case STATUS0_IDLE:
  1209. dev->xfer_status = -EAGAIN;
  1210. break;
  1211. case STATUS0_BUSY:
  1212. dev->xfer_status = -EBUSY;
  1213. break;
  1214. case STATUS0_COMPLETE:
  1215. dev->xfer_status = be16_to_cpu(xfer->length);
  1216. break;
  1217. case STATUS0_ERROR:
  1218. switch (xfer->status1) {
  1219. case STATUS1_TIMEOUT_NACK:
  1220. case STATUS1_TIMEOUT_BUS:
  1221. dev->xfer_status = -ETIMEDOUT;
  1222. break;
  1223. default:
  1224. dev->xfer_status = -EIO;
  1225. break;
  1226. }
  1227. break;
  1228. default:
  1229. dev->xfer_status = -EINVAL;
  1230. break;
  1231. }
  1232. atomic_set(&dev->xfer_avail, 1);
  1233. break;
  1234. case CP2112_DATA_READ_RESPONSE:
  1235. hid_dbg(hdev, "read response: %02x %02x\n", data[1], data[2]);
  1236. dev->read_length = data[2];
  1237. if (dev->read_length > sizeof(dev->read_data))
  1238. dev->read_length = sizeof(dev->read_data);
  1239. memcpy(dev->read_data, &data[3], dev->read_length);
  1240. atomic_set(&dev->read_avail, 1);
  1241. break;
  1242. default:
  1243. hid_err(hdev, "unknown report\n");
  1244. return 0;
  1245. }
  1246. wake_up_interruptible(&dev->wait);
  1247. return 1;
  1248. }
  1249. static struct hid_driver cp2112_driver = {
  1250. .name = "cp2112",
  1251. .id_table = cp2112_devices,
  1252. .probe = cp2112_probe,
  1253. .remove = cp2112_remove,
  1254. .raw_event = cp2112_raw_event,
  1255. };
  1256. module_hid_driver(cp2112_driver);
  1257. MODULE_DESCRIPTION("Silicon Labs HID USB to SMBus master bridge");
  1258. MODULE_AUTHOR("David Barksdale <[email protected]>");
  1259. MODULE_LICENSE("GPL");