gpio-mpc5200.c 8.9 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366
  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * MPC52xx gpio driver
  4. *
  5. * Copyright (c) 2008 Sascha Hauer <[email protected]>, Pengutronix
  6. */
  7. #include <linux/of.h>
  8. #include <linux/kernel.h>
  9. #include <linux/slab.h>
  10. #include <linux/of_gpio.h>
  11. #include <linux/io.h>
  12. #include <linux/of_platform.h>
  13. #include <linux/module.h>
  14. #include <asm/mpc52xx.h>
  15. #include <sysdev/fsl_soc.h>
  16. static DEFINE_SPINLOCK(gpio_lock);
  17. struct mpc52xx_gpiochip {
  18. struct of_mm_gpio_chip mmchip;
  19. unsigned int shadow_dvo;
  20. unsigned int shadow_gpioe;
  21. unsigned int shadow_ddr;
  22. };
  23. /*
  24. * GPIO LIB API implementation for wakeup GPIOs.
  25. *
  26. * There's a maximum of 8 wakeup GPIOs. Which of these are available
  27. * for use depends on your board setup.
  28. *
  29. * 0 -> GPIO_WKUP_7
  30. * 1 -> GPIO_WKUP_6
  31. * 2 -> PSC6_1
  32. * 3 -> PSC6_0
  33. * 4 -> ETH_17
  34. * 5 -> PSC3_9
  35. * 6 -> PSC2_4
  36. * 7 -> PSC1_4
  37. *
  38. */
  39. static int mpc52xx_wkup_gpio_get(struct gpio_chip *gc, unsigned int gpio)
  40. {
  41. struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
  42. struct mpc52xx_gpio_wkup __iomem *regs = mm_gc->regs;
  43. unsigned int ret;
  44. ret = (in_8(&regs->wkup_ival) >> (7 - gpio)) & 1;
  45. pr_debug("%s: gpio: %d ret: %d\n", __func__, gpio, ret);
  46. return ret;
  47. }
  48. static inline void
  49. __mpc52xx_wkup_gpio_set(struct gpio_chip *gc, unsigned int gpio, int val)
  50. {
  51. struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
  52. struct mpc52xx_gpiochip *chip = gpiochip_get_data(gc);
  53. struct mpc52xx_gpio_wkup __iomem *regs = mm_gc->regs;
  54. if (val)
  55. chip->shadow_dvo |= 1 << (7 - gpio);
  56. else
  57. chip->shadow_dvo &= ~(1 << (7 - gpio));
  58. out_8(&regs->wkup_dvo, chip->shadow_dvo);
  59. }
  60. static void
  61. mpc52xx_wkup_gpio_set(struct gpio_chip *gc, unsigned int gpio, int val)
  62. {
  63. unsigned long flags;
  64. spin_lock_irqsave(&gpio_lock, flags);
  65. __mpc52xx_wkup_gpio_set(gc, gpio, val);
  66. spin_unlock_irqrestore(&gpio_lock, flags);
  67. pr_debug("%s: gpio: %d val: %d\n", __func__, gpio, val);
  68. }
  69. static int mpc52xx_wkup_gpio_dir_in(struct gpio_chip *gc, unsigned int gpio)
  70. {
  71. struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
  72. struct mpc52xx_gpiochip *chip = gpiochip_get_data(gc);
  73. struct mpc52xx_gpio_wkup __iomem *regs = mm_gc->regs;
  74. unsigned long flags;
  75. spin_lock_irqsave(&gpio_lock, flags);
  76. /* set the direction */
  77. chip->shadow_ddr &= ~(1 << (7 - gpio));
  78. out_8(&regs->wkup_ddr, chip->shadow_ddr);
  79. /* and enable the pin */
  80. chip->shadow_gpioe |= 1 << (7 - gpio);
  81. out_8(&regs->wkup_gpioe, chip->shadow_gpioe);
  82. spin_unlock_irqrestore(&gpio_lock, flags);
  83. return 0;
  84. }
  85. static int
  86. mpc52xx_wkup_gpio_dir_out(struct gpio_chip *gc, unsigned int gpio, int val)
  87. {
  88. struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
  89. struct mpc52xx_gpio_wkup __iomem *regs = mm_gc->regs;
  90. struct mpc52xx_gpiochip *chip = gpiochip_get_data(gc);
  91. unsigned long flags;
  92. spin_lock_irqsave(&gpio_lock, flags);
  93. __mpc52xx_wkup_gpio_set(gc, gpio, val);
  94. /* Then set direction */
  95. chip->shadow_ddr |= 1 << (7 - gpio);
  96. out_8(&regs->wkup_ddr, chip->shadow_ddr);
  97. /* Finally enable the pin */
  98. chip->shadow_gpioe |= 1 << (7 - gpio);
  99. out_8(&regs->wkup_gpioe, chip->shadow_gpioe);
  100. spin_unlock_irqrestore(&gpio_lock, flags);
  101. pr_debug("%s: gpio: %d val: %d\n", __func__, gpio, val);
  102. return 0;
  103. }
  104. static int mpc52xx_wkup_gpiochip_probe(struct platform_device *ofdev)
  105. {
  106. struct mpc52xx_gpiochip *chip;
  107. struct mpc52xx_gpio_wkup __iomem *regs;
  108. struct gpio_chip *gc;
  109. int ret;
  110. chip = devm_kzalloc(&ofdev->dev, sizeof(*chip), GFP_KERNEL);
  111. if (!chip)
  112. return -ENOMEM;
  113. platform_set_drvdata(ofdev, chip);
  114. gc = &chip->mmchip.gc;
  115. gc->ngpio = 8;
  116. gc->direction_input = mpc52xx_wkup_gpio_dir_in;
  117. gc->direction_output = mpc52xx_wkup_gpio_dir_out;
  118. gc->get = mpc52xx_wkup_gpio_get;
  119. gc->set = mpc52xx_wkup_gpio_set;
  120. ret = of_mm_gpiochip_add_data(ofdev->dev.of_node, &chip->mmchip, chip);
  121. if (ret)
  122. return ret;
  123. regs = chip->mmchip.regs;
  124. chip->shadow_gpioe = in_8(&regs->wkup_gpioe);
  125. chip->shadow_ddr = in_8(&regs->wkup_ddr);
  126. chip->shadow_dvo = in_8(&regs->wkup_dvo);
  127. return 0;
  128. }
  129. static int mpc52xx_gpiochip_remove(struct platform_device *ofdev)
  130. {
  131. struct mpc52xx_gpiochip *chip = platform_get_drvdata(ofdev);
  132. of_mm_gpiochip_remove(&chip->mmchip);
  133. return 0;
  134. }
  135. static const struct of_device_id mpc52xx_wkup_gpiochip_match[] = {
  136. { .compatible = "fsl,mpc5200-gpio-wkup", },
  137. {}
  138. };
  139. static struct platform_driver mpc52xx_wkup_gpiochip_driver = {
  140. .driver = {
  141. .name = "mpc5200-gpio-wkup",
  142. .of_match_table = mpc52xx_wkup_gpiochip_match,
  143. },
  144. .probe = mpc52xx_wkup_gpiochip_probe,
  145. .remove = mpc52xx_gpiochip_remove,
  146. };
  147. /*
  148. * GPIO LIB API implementation for simple GPIOs
  149. *
  150. * There's a maximum of 32 simple GPIOs. Which of these are available
  151. * for use depends on your board setup.
  152. * The numbering reflects the bit numbering in the port registers:
  153. *
  154. * 0..1 > reserved
  155. * 2..3 > IRDA
  156. * 4..7 > ETHR
  157. * 8..11 > reserved
  158. * 12..15 > USB
  159. * 16..17 > reserved
  160. * 18..23 > PSC3
  161. * 24..27 > PSC2
  162. * 28..31 > PSC1
  163. */
  164. static int mpc52xx_simple_gpio_get(struct gpio_chip *gc, unsigned int gpio)
  165. {
  166. struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
  167. struct mpc52xx_gpio __iomem *regs = mm_gc->regs;
  168. unsigned int ret;
  169. ret = (in_be32(&regs->simple_ival) >> (31 - gpio)) & 1;
  170. return ret;
  171. }
  172. static inline void
  173. __mpc52xx_simple_gpio_set(struct gpio_chip *gc, unsigned int gpio, int val)
  174. {
  175. struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
  176. struct mpc52xx_gpiochip *chip = gpiochip_get_data(gc);
  177. struct mpc52xx_gpio __iomem *regs = mm_gc->regs;
  178. if (val)
  179. chip->shadow_dvo |= 1 << (31 - gpio);
  180. else
  181. chip->shadow_dvo &= ~(1 << (31 - gpio));
  182. out_be32(&regs->simple_dvo, chip->shadow_dvo);
  183. }
  184. static void
  185. mpc52xx_simple_gpio_set(struct gpio_chip *gc, unsigned int gpio, int val)
  186. {
  187. unsigned long flags;
  188. spin_lock_irqsave(&gpio_lock, flags);
  189. __mpc52xx_simple_gpio_set(gc, gpio, val);
  190. spin_unlock_irqrestore(&gpio_lock, flags);
  191. pr_debug("%s: gpio: %d val: %d\n", __func__, gpio, val);
  192. }
  193. static int mpc52xx_simple_gpio_dir_in(struct gpio_chip *gc, unsigned int gpio)
  194. {
  195. struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
  196. struct mpc52xx_gpiochip *chip = gpiochip_get_data(gc);
  197. struct mpc52xx_gpio __iomem *regs = mm_gc->regs;
  198. unsigned long flags;
  199. spin_lock_irqsave(&gpio_lock, flags);
  200. /* set the direction */
  201. chip->shadow_ddr &= ~(1 << (31 - gpio));
  202. out_be32(&regs->simple_ddr, chip->shadow_ddr);
  203. /* and enable the pin */
  204. chip->shadow_gpioe |= 1 << (31 - gpio);
  205. out_be32(&regs->simple_gpioe, chip->shadow_gpioe);
  206. spin_unlock_irqrestore(&gpio_lock, flags);
  207. return 0;
  208. }
  209. static int
  210. mpc52xx_simple_gpio_dir_out(struct gpio_chip *gc, unsigned int gpio, int val)
  211. {
  212. struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
  213. struct mpc52xx_gpiochip *chip = gpiochip_get_data(gc);
  214. struct mpc52xx_gpio __iomem *regs = mm_gc->regs;
  215. unsigned long flags;
  216. spin_lock_irqsave(&gpio_lock, flags);
  217. /* First set initial value */
  218. __mpc52xx_simple_gpio_set(gc, gpio, val);
  219. /* Then set direction */
  220. chip->shadow_ddr |= 1 << (31 - gpio);
  221. out_be32(&regs->simple_ddr, chip->shadow_ddr);
  222. /* Finally enable the pin */
  223. chip->shadow_gpioe |= 1 << (31 - gpio);
  224. out_be32(&regs->simple_gpioe, chip->shadow_gpioe);
  225. spin_unlock_irqrestore(&gpio_lock, flags);
  226. pr_debug("%s: gpio: %d val: %d\n", __func__, gpio, val);
  227. return 0;
  228. }
  229. static int mpc52xx_simple_gpiochip_probe(struct platform_device *ofdev)
  230. {
  231. struct mpc52xx_gpiochip *chip;
  232. struct gpio_chip *gc;
  233. struct mpc52xx_gpio __iomem *regs;
  234. int ret;
  235. chip = devm_kzalloc(&ofdev->dev, sizeof(*chip), GFP_KERNEL);
  236. if (!chip)
  237. return -ENOMEM;
  238. platform_set_drvdata(ofdev, chip);
  239. gc = &chip->mmchip.gc;
  240. gc->ngpio = 32;
  241. gc->direction_input = mpc52xx_simple_gpio_dir_in;
  242. gc->direction_output = mpc52xx_simple_gpio_dir_out;
  243. gc->get = mpc52xx_simple_gpio_get;
  244. gc->set = mpc52xx_simple_gpio_set;
  245. ret = of_mm_gpiochip_add_data(ofdev->dev.of_node, &chip->mmchip, chip);
  246. if (ret)
  247. return ret;
  248. regs = chip->mmchip.regs;
  249. chip->shadow_gpioe = in_be32(&regs->simple_gpioe);
  250. chip->shadow_ddr = in_be32(&regs->simple_ddr);
  251. chip->shadow_dvo = in_be32(&regs->simple_dvo);
  252. return 0;
  253. }
  254. static const struct of_device_id mpc52xx_simple_gpiochip_match[] = {
  255. { .compatible = "fsl,mpc5200-gpio", },
  256. {}
  257. };
  258. static struct platform_driver mpc52xx_simple_gpiochip_driver = {
  259. .driver = {
  260. .name = "mpc5200-gpio",
  261. .of_match_table = mpc52xx_simple_gpiochip_match,
  262. },
  263. .probe = mpc52xx_simple_gpiochip_probe,
  264. .remove = mpc52xx_gpiochip_remove,
  265. };
  266. static struct platform_driver * const drivers[] = {
  267. &mpc52xx_wkup_gpiochip_driver,
  268. &mpc52xx_simple_gpiochip_driver,
  269. };
  270. static int __init mpc52xx_gpio_init(void)
  271. {
  272. return platform_register_drivers(drivers, ARRAY_SIZE(drivers));
  273. }
  274. /* Make sure we get initialised before anyone else tries to use us */
  275. subsys_initcall(mpc52xx_gpio_init);
  276. static void __exit mpc52xx_gpio_exit(void)
  277. {
  278. platform_unregister_drivers(drivers, ARRAY_SIZE(drivers));
  279. }
  280. module_exit(mpc52xx_gpio_exit);
  281. MODULE_DESCRIPTION("Freescale MPC52xx gpio driver");
  282. MODULE_AUTHOR("Sascha Hauer <[email protected]");
  283. MODULE_LICENSE("GPL v2");