gpio-it87.c 9.0 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * GPIO interface for IT87xx Super I/O chips
  4. *
  5. * Author: Diego Elio Pettenò <[email protected]>
  6. * Copyright (c) 2017 Google, Inc.
  7. *
  8. * Based on it87_wdt.c by Oliver Schuster
  9. * gpio-it8761e.c by Denis Turischev
  10. * gpio-stmpe.c by Rabin Vincent
  11. */
  12. #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  13. #include <linux/init.h>
  14. #include <linux/kernel.h>
  15. #include <linux/module.h>
  16. #include <linux/io.h>
  17. #include <linux/errno.h>
  18. #include <linux/ioport.h>
  19. #include <linux/slab.h>
  20. #include <linux/gpio/driver.h>
  21. /* Chip Id numbers */
  22. #define NO_DEV_ID 0xffff
  23. #define IT8613_ID 0x8613
  24. #define IT8620_ID 0x8620
  25. #define IT8628_ID 0x8628
  26. #define IT8718_ID 0x8718
  27. #define IT8728_ID 0x8728
  28. #define IT8732_ID 0x8732
  29. #define IT8761_ID 0x8761
  30. #define IT8772_ID 0x8772
  31. #define IT8786_ID 0x8786
  32. /* IO Ports */
  33. #define REG 0x2e
  34. #define VAL 0x2f
  35. /* Logical device Numbers LDN */
  36. #define GPIO 0x07
  37. /* Configuration Registers and Functions */
  38. #define LDNREG 0x07
  39. #define CHIPID 0x20
  40. #define CHIPREV 0x22
  41. /**
  42. * struct it87_gpio - it87-specific GPIO chip
  43. * @chip: the underlying gpio_chip structure
  44. * @lock: a lock to avoid races between operations
  45. * @io_base: base address for gpio ports
  46. * @io_size: size of the port rage starting from io_base.
  47. * @output_base: Super I/O register address for Output Enable register
  48. * @simple_base: Super I/O 'Simple I/O' Enable register
  49. * @simple_size: Super IO 'Simple I/O' Enable register size; this is
  50. * required because IT87xx chips might only provide Simple I/O
  51. * switches on a subset of lines, whereas the others keep the
  52. * same status all time.
  53. */
  54. struct it87_gpio {
  55. struct gpio_chip chip;
  56. spinlock_t lock;
  57. u16 io_base;
  58. u16 io_size;
  59. u8 output_base;
  60. u8 simple_base;
  61. u8 simple_size;
  62. };
  63. static struct it87_gpio it87_gpio_chip = {
  64. .lock = __SPIN_LOCK_UNLOCKED(it87_gpio_chip.lock),
  65. };
  66. /* Superio chip access functions; copied from wdt_it87 */
  67. static inline int superio_enter(void)
  68. {
  69. /*
  70. * Try to reserve REG and REG + 1 for exclusive access.
  71. */
  72. if (!request_muxed_region(REG, 2, KBUILD_MODNAME))
  73. return -EBUSY;
  74. outb(0x87, REG);
  75. outb(0x01, REG);
  76. outb(0x55, REG);
  77. outb(0x55, REG);
  78. return 0;
  79. }
  80. static inline void superio_exit(void)
  81. {
  82. outb(0x02, REG);
  83. outb(0x02, VAL);
  84. release_region(REG, 2);
  85. }
  86. static inline void superio_select(int ldn)
  87. {
  88. outb(LDNREG, REG);
  89. outb(ldn, VAL);
  90. }
  91. static inline int superio_inb(int reg)
  92. {
  93. outb(reg, REG);
  94. return inb(VAL);
  95. }
  96. static inline void superio_outb(int val, int reg)
  97. {
  98. outb(reg, REG);
  99. outb(val, VAL);
  100. }
  101. static inline int superio_inw(int reg)
  102. {
  103. int val;
  104. outb(reg++, REG);
  105. val = inb(VAL) << 8;
  106. outb(reg, REG);
  107. val |= inb(VAL);
  108. return val;
  109. }
  110. static inline void superio_set_mask(int mask, int reg)
  111. {
  112. u8 curr_val = superio_inb(reg);
  113. u8 new_val = curr_val | mask;
  114. if (curr_val != new_val)
  115. superio_outb(new_val, reg);
  116. }
  117. static inline void superio_clear_mask(int mask, int reg)
  118. {
  119. u8 curr_val = superio_inb(reg);
  120. u8 new_val = curr_val & ~mask;
  121. if (curr_val != new_val)
  122. superio_outb(new_val, reg);
  123. }
  124. static int it87_gpio_request(struct gpio_chip *chip, unsigned gpio_num)
  125. {
  126. u8 mask, group;
  127. int rc = 0;
  128. struct it87_gpio *it87_gpio = gpiochip_get_data(chip);
  129. mask = 1 << (gpio_num % 8);
  130. group = (gpio_num / 8);
  131. spin_lock(&it87_gpio->lock);
  132. rc = superio_enter();
  133. if (rc)
  134. goto exit;
  135. /* not all the IT87xx chips support Simple I/O and not all of
  136. * them allow all the lines to be set/unset to Simple I/O.
  137. */
  138. if (group < it87_gpio->simple_size)
  139. superio_set_mask(mask, group + it87_gpio->simple_base);
  140. /* clear output enable, setting the pin to input, as all the
  141. * newly-exported GPIO interfaces are set to input.
  142. */
  143. superio_clear_mask(mask, group + it87_gpio->output_base);
  144. superio_exit();
  145. exit:
  146. spin_unlock(&it87_gpio->lock);
  147. return rc;
  148. }
  149. static int it87_gpio_get(struct gpio_chip *chip, unsigned gpio_num)
  150. {
  151. u16 reg;
  152. u8 mask;
  153. struct it87_gpio *it87_gpio = gpiochip_get_data(chip);
  154. mask = 1 << (gpio_num % 8);
  155. reg = (gpio_num / 8) + it87_gpio->io_base;
  156. return !!(inb(reg) & mask);
  157. }
  158. static int it87_gpio_direction_in(struct gpio_chip *chip, unsigned gpio_num)
  159. {
  160. u8 mask, group;
  161. int rc = 0;
  162. struct it87_gpio *it87_gpio = gpiochip_get_data(chip);
  163. mask = 1 << (gpio_num % 8);
  164. group = (gpio_num / 8);
  165. spin_lock(&it87_gpio->lock);
  166. rc = superio_enter();
  167. if (rc)
  168. goto exit;
  169. /* clear the output enable bit */
  170. superio_clear_mask(mask, group + it87_gpio->output_base);
  171. superio_exit();
  172. exit:
  173. spin_unlock(&it87_gpio->lock);
  174. return rc;
  175. }
  176. static void it87_gpio_set(struct gpio_chip *chip,
  177. unsigned gpio_num, int val)
  178. {
  179. u8 mask, curr_vals;
  180. u16 reg;
  181. struct it87_gpio *it87_gpio = gpiochip_get_data(chip);
  182. mask = 1 << (gpio_num % 8);
  183. reg = (gpio_num / 8) + it87_gpio->io_base;
  184. curr_vals = inb(reg);
  185. if (val)
  186. outb(curr_vals | mask, reg);
  187. else
  188. outb(curr_vals & ~mask, reg);
  189. }
  190. static int it87_gpio_direction_out(struct gpio_chip *chip,
  191. unsigned gpio_num, int val)
  192. {
  193. u8 mask, group;
  194. int rc = 0;
  195. struct it87_gpio *it87_gpio = gpiochip_get_data(chip);
  196. mask = 1 << (gpio_num % 8);
  197. group = (gpio_num / 8);
  198. spin_lock(&it87_gpio->lock);
  199. rc = superio_enter();
  200. if (rc)
  201. goto exit;
  202. /* set the output enable bit */
  203. superio_set_mask(mask, group + it87_gpio->output_base);
  204. it87_gpio_set(chip, gpio_num, val);
  205. superio_exit();
  206. exit:
  207. spin_unlock(&it87_gpio->lock);
  208. return rc;
  209. }
  210. static const struct gpio_chip it87_template_chip = {
  211. .label = KBUILD_MODNAME,
  212. .owner = THIS_MODULE,
  213. .request = it87_gpio_request,
  214. .get = it87_gpio_get,
  215. .direction_input = it87_gpio_direction_in,
  216. .set = it87_gpio_set,
  217. .direction_output = it87_gpio_direction_out,
  218. .base = -1
  219. };
  220. static int __init it87_gpio_init(void)
  221. {
  222. int rc = 0, i;
  223. u16 chip_type;
  224. u8 chip_rev, gpio_ba_reg;
  225. char *labels, **labels_table;
  226. struct it87_gpio *it87_gpio = &it87_gpio_chip;
  227. rc = superio_enter();
  228. if (rc)
  229. return rc;
  230. chip_type = superio_inw(CHIPID);
  231. chip_rev = superio_inb(CHIPREV) & 0x0f;
  232. superio_exit();
  233. it87_gpio->chip = it87_template_chip;
  234. switch (chip_type) {
  235. case IT8613_ID:
  236. gpio_ba_reg = 0x62;
  237. it87_gpio->io_size = 8; /* it8613 only needs 6, use 8 for alignment */
  238. it87_gpio->output_base = 0xc8;
  239. it87_gpio->simple_base = 0xc0;
  240. it87_gpio->simple_size = 6;
  241. it87_gpio->chip.ngpio = 64; /* has 48, use 64 for convenient calc */
  242. break;
  243. case IT8620_ID:
  244. case IT8628_ID:
  245. gpio_ba_reg = 0x62;
  246. it87_gpio->io_size = 11;
  247. it87_gpio->output_base = 0xc8;
  248. it87_gpio->simple_size = 0;
  249. it87_gpio->chip.ngpio = 64;
  250. break;
  251. case IT8718_ID:
  252. case IT8728_ID:
  253. case IT8732_ID:
  254. case IT8772_ID:
  255. case IT8786_ID:
  256. gpio_ba_reg = 0x62;
  257. it87_gpio->io_size = 8;
  258. it87_gpio->output_base = 0xc8;
  259. it87_gpio->simple_base = 0xc0;
  260. it87_gpio->simple_size = 5;
  261. it87_gpio->chip.ngpio = 64;
  262. break;
  263. case IT8761_ID:
  264. gpio_ba_reg = 0x60;
  265. it87_gpio->io_size = 4;
  266. it87_gpio->output_base = 0xf0;
  267. it87_gpio->simple_size = 0;
  268. it87_gpio->chip.ngpio = 16;
  269. break;
  270. case NO_DEV_ID:
  271. pr_err("no device\n");
  272. return -ENODEV;
  273. default:
  274. pr_err("Unknown Chip found, Chip %04x Revision %x\n",
  275. chip_type, chip_rev);
  276. return -ENODEV;
  277. }
  278. rc = superio_enter();
  279. if (rc)
  280. return rc;
  281. superio_select(GPIO);
  282. /* fetch GPIO base address */
  283. it87_gpio->io_base = superio_inw(gpio_ba_reg);
  284. superio_exit();
  285. pr_info("Found Chip IT%04x rev %x. %u GPIO lines starting at %04xh\n",
  286. chip_type, chip_rev, it87_gpio->chip.ngpio,
  287. it87_gpio->io_base);
  288. if (!request_region(it87_gpio->io_base, it87_gpio->io_size,
  289. KBUILD_MODNAME))
  290. return -EBUSY;
  291. /* Set up aliases for the GPIO connection.
  292. *
  293. * ITE documentation for recent chips such as the IT8728F
  294. * refers to the GPIO lines as GPxy, with a coordinates system
  295. * where x is the GPIO group (starting from 1) and y is the
  296. * bit within the group.
  297. *
  298. * By creating these aliases, we make it easier to understand
  299. * to which GPIO pin we're referring to.
  300. */
  301. labels = kcalloc(it87_gpio->chip.ngpio, sizeof("it87_gpXY"),
  302. GFP_KERNEL);
  303. labels_table = kcalloc(it87_gpio->chip.ngpio, sizeof(const char *),
  304. GFP_KERNEL);
  305. if (!labels || !labels_table) {
  306. rc = -ENOMEM;
  307. goto labels_free;
  308. }
  309. for (i = 0; i < it87_gpio->chip.ngpio; i++) {
  310. char *label = &labels[i * sizeof("it87_gpXY")];
  311. sprintf(label, "it87_gp%u%u", 1+(i/8), i%8);
  312. labels_table[i] = label;
  313. }
  314. it87_gpio->chip.names = (const char *const*)labels_table;
  315. rc = gpiochip_add_data(&it87_gpio->chip, it87_gpio);
  316. if (rc)
  317. goto labels_free;
  318. return 0;
  319. labels_free:
  320. kfree(labels_table);
  321. kfree(labels);
  322. release_region(it87_gpio->io_base, it87_gpio->io_size);
  323. return rc;
  324. }
  325. static void __exit it87_gpio_exit(void)
  326. {
  327. struct it87_gpio *it87_gpio = &it87_gpio_chip;
  328. gpiochip_remove(&it87_gpio->chip);
  329. release_region(it87_gpio->io_base, it87_gpio->io_size);
  330. kfree(it87_gpio->chip.names[0]);
  331. kfree(it87_gpio->chip.names);
  332. }
  333. module_init(it87_gpio_init);
  334. module_exit(it87_gpio_exit);
  335. MODULE_AUTHOR("Diego Elio Pettenò <[email protected]>");
  336. MODULE_DESCRIPTION("GPIO interface for IT87xx Super I/O chips");
  337. MODULE_LICENSE("GPL");