dmatest.c 35 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * DMA Engine test module
  4. *
  5. * Copyright (C) 2007 Atmel Corporation
  6. * Copyright (C) 2013 Intel Corporation
  7. */
  8. #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  9. #include <linux/err.h>
  10. #include <linux/delay.h>
  11. #include <linux/dma-mapping.h>
  12. #include <linux/dmaengine.h>
  13. #include <linux/freezer.h>
  14. #include <linux/init.h>
  15. #include <linux/kthread.h>
  16. #include <linux/sched/task.h>
  17. #include <linux/module.h>
  18. #include <linux/moduleparam.h>
  19. #include <linux/random.h>
  20. #include <linux/slab.h>
  21. #include <linux/wait.h>
  22. static unsigned int test_buf_size = 16384;
  23. module_param(test_buf_size, uint, 0644);
  24. MODULE_PARM_DESC(test_buf_size, "Size of the memcpy test buffer");
  25. static char test_device[32];
  26. module_param_string(device, test_device, sizeof(test_device), 0644);
  27. MODULE_PARM_DESC(device, "Bus ID of the DMA Engine to test (default: any)");
  28. static unsigned int threads_per_chan = 1;
  29. module_param(threads_per_chan, uint, 0644);
  30. MODULE_PARM_DESC(threads_per_chan,
  31. "Number of threads to start per channel (default: 1)");
  32. static unsigned int max_channels;
  33. module_param(max_channels, uint, 0644);
  34. MODULE_PARM_DESC(max_channels,
  35. "Maximum number of channels to use (default: all)");
  36. static unsigned int iterations;
  37. module_param(iterations, uint, 0644);
  38. MODULE_PARM_DESC(iterations,
  39. "Iterations before stopping test (default: infinite)");
  40. static unsigned int dmatest;
  41. module_param(dmatest, uint, 0644);
  42. MODULE_PARM_DESC(dmatest,
  43. "dmatest 0-memcpy 1-memset (default: 0)");
  44. static unsigned int xor_sources = 3;
  45. module_param(xor_sources, uint, 0644);
  46. MODULE_PARM_DESC(xor_sources,
  47. "Number of xor source buffers (default: 3)");
  48. static unsigned int pq_sources = 3;
  49. module_param(pq_sources, uint, 0644);
  50. MODULE_PARM_DESC(pq_sources,
  51. "Number of p+q source buffers (default: 3)");
  52. static int timeout = 3000;
  53. module_param(timeout, int, 0644);
  54. MODULE_PARM_DESC(timeout, "Transfer Timeout in msec (default: 3000), "
  55. "Pass -1 for infinite timeout");
  56. static bool noverify;
  57. module_param(noverify, bool, 0644);
  58. MODULE_PARM_DESC(noverify, "Disable data verification (default: verify)");
  59. static bool norandom;
  60. module_param(norandom, bool, 0644);
  61. MODULE_PARM_DESC(norandom, "Disable random offset setup (default: random)");
  62. static bool verbose;
  63. module_param(verbose, bool, 0644);
  64. MODULE_PARM_DESC(verbose, "Enable \"success\" result messages (default: off)");
  65. static int alignment = -1;
  66. module_param(alignment, int, 0644);
  67. MODULE_PARM_DESC(alignment, "Custom data address alignment taken as 2^(alignment) (default: not used (-1))");
  68. static unsigned int transfer_size;
  69. module_param(transfer_size, uint, 0644);
  70. MODULE_PARM_DESC(transfer_size, "Optional custom transfer size in bytes (default: not used (0))");
  71. static bool polled;
  72. module_param(polled, bool, 0644);
  73. MODULE_PARM_DESC(polled, "Use polling for completion instead of interrupts");
  74. /**
  75. * struct dmatest_params - test parameters.
  76. * @buf_size: size of the memcpy test buffer
  77. * @channel: bus ID of the channel to test
  78. * @device: bus ID of the DMA Engine to test
  79. * @threads_per_chan: number of threads to start per channel
  80. * @max_channels: maximum number of channels to use
  81. * @iterations: iterations before stopping test
  82. * @xor_sources: number of xor source buffers
  83. * @pq_sources: number of p+q source buffers
  84. * @timeout: transfer timeout in msec, -1 for infinite timeout
  85. * @noverify: disable data verification
  86. * @norandom: disable random offset setup
  87. * @alignment: custom data address alignment taken as 2^alignment
  88. * @transfer_size: custom transfer size in bytes
  89. * @polled: use polling for completion instead of interrupts
  90. */
  91. struct dmatest_params {
  92. unsigned int buf_size;
  93. char channel[20];
  94. char device[32];
  95. unsigned int threads_per_chan;
  96. unsigned int max_channels;
  97. unsigned int iterations;
  98. unsigned int xor_sources;
  99. unsigned int pq_sources;
  100. int timeout;
  101. bool noverify;
  102. bool norandom;
  103. int alignment;
  104. unsigned int transfer_size;
  105. bool polled;
  106. };
  107. /**
  108. * struct dmatest_info - test information.
  109. * @params: test parameters
  110. * @channels: channels under test
  111. * @nr_channels: number of channels under test
  112. * @lock: access protection to the fields of this structure
  113. * @did_init: module has been initialized completely
  114. * @last_error: test has faced configuration issues
  115. */
  116. static struct dmatest_info {
  117. /* Test parameters */
  118. struct dmatest_params params;
  119. /* Internal state */
  120. struct list_head channels;
  121. unsigned int nr_channels;
  122. int last_error;
  123. struct mutex lock;
  124. bool did_init;
  125. } test_info = {
  126. .channels = LIST_HEAD_INIT(test_info.channels),
  127. .lock = __MUTEX_INITIALIZER(test_info.lock),
  128. };
  129. static int dmatest_run_set(const char *val, const struct kernel_param *kp);
  130. static int dmatest_run_get(char *val, const struct kernel_param *kp);
  131. static const struct kernel_param_ops run_ops = {
  132. .set = dmatest_run_set,
  133. .get = dmatest_run_get,
  134. };
  135. static bool dmatest_run;
  136. module_param_cb(run, &run_ops, &dmatest_run, 0644);
  137. MODULE_PARM_DESC(run, "Run the test (default: false)");
  138. static int dmatest_chan_set(const char *val, const struct kernel_param *kp);
  139. static int dmatest_chan_get(char *val, const struct kernel_param *kp);
  140. static const struct kernel_param_ops multi_chan_ops = {
  141. .set = dmatest_chan_set,
  142. .get = dmatest_chan_get,
  143. };
  144. static char test_channel[20];
  145. static struct kparam_string newchan_kps = {
  146. .string = test_channel,
  147. .maxlen = 20,
  148. };
  149. module_param_cb(channel, &multi_chan_ops, &newchan_kps, 0644);
  150. MODULE_PARM_DESC(channel, "Bus ID of the channel to test (default: any)");
  151. static int dmatest_test_list_get(char *val, const struct kernel_param *kp);
  152. static const struct kernel_param_ops test_list_ops = {
  153. .get = dmatest_test_list_get,
  154. };
  155. module_param_cb(test_list, &test_list_ops, NULL, 0444);
  156. MODULE_PARM_DESC(test_list, "Print current test list");
  157. /* Maximum amount of mismatched bytes in buffer to print */
  158. #define MAX_ERROR_COUNT 32
  159. /*
  160. * Initialization patterns. All bytes in the source buffer has bit 7
  161. * set, all bytes in the destination buffer has bit 7 cleared.
  162. *
  163. * Bit 6 is set for all bytes which are to be copied by the DMA
  164. * engine. Bit 5 is set for all bytes which are to be overwritten by
  165. * the DMA engine.
  166. *
  167. * The remaining bits are the inverse of a counter which increments by
  168. * one for each byte address.
  169. */
  170. #define PATTERN_SRC 0x80
  171. #define PATTERN_DST 0x00
  172. #define PATTERN_COPY 0x40
  173. #define PATTERN_OVERWRITE 0x20
  174. #define PATTERN_COUNT_MASK 0x1f
  175. #define PATTERN_MEMSET_IDX 0x01
  176. /* Fixed point arithmetic ops */
  177. #define FIXPT_SHIFT 8
  178. #define FIXPNT_MASK 0xFF
  179. #define FIXPT_TO_INT(a) ((a) >> FIXPT_SHIFT)
  180. #define INT_TO_FIXPT(a) ((a) << FIXPT_SHIFT)
  181. #define FIXPT_GET_FRAC(a) ((((a) & FIXPNT_MASK) * 100) >> FIXPT_SHIFT)
  182. /* poor man's completion - we want to use wait_event_freezable() on it */
  183. struct dmatest_done {
  184. bool done;
  185. wait_queue_head_t *wait;
  186. };
  187. struct dmatest_data {
  188. u8 **raw;
  189. u8 **aligned;
  190. unsigned int cnt;
  191. unsigned int off;
  192. };
  193. struct dmatest_thread {
  194. struct list_head node;
  195. struct dmatest_info *info;
  196. struct task_struct *task;
  197. struct dma_chan *chan;
  198. struct dmatest_data src;
  199. struct dmatest_data dst;
  200. enum dma_transaction_type type;
  201. wait_queue_head_t done_wait;
  202. struct dmatest_done test_done;
  203. bool done;
  204. bool pending;
  205. };
  206. struct dmatest_chan {
  207. struct list_head node;
  208. struct dma_chan *chan;
  209. struct list_head threads;
  210. };
  211. static DECLARE_WAIT_QUEUE_HEAD(thread_wait);
  212. static bool wait;
  213. static bool is_threaded_test_run(struct dmatest_info *info)
  214. {
  215. struct dmatest_chan *dtc;
  216. list_for_each_entry(dtc, &info->channels, node) {
  217. struct dmatest_thread *thread;
  218. list_for_each_entry(thread, &dtc->threads, node) {
  219. if (!thread->done && !thread->pending)
  220. return true;
  221. }
  222. }
  223. return false;
  224. }
  225. static bool is_threaded_test_pending(struct dmatest_info *info)
  226. {
  227. struct dmatest_chan *dtc;
  228. list_for_each_entry(dtc, &info->channels, node) {
  229. struct dmatest_thread *thread;
  230. list_for_each_entry(thread, &dtc->threads, node) {
  231. if (thread->pending)
  232. return true;
  233. }
  234. }
  235. return false;
  236. }
  237. static int dmatest_wait_get(char *val, const struct kernel_param *kp)
  238. {
  239. struct dmatest_info *info = &test_info;
  240. struct dmatest_params *params = &info->params;
  241. if (params->iterations)
  242. wait_event(thread_wait, !is_threaded_test_run(info));
  243. wait = true;
  244. return param_get_bool(val, kp);
  245. }
  246. static const struct kernel_param_ops wait_ops = {
  247. .get = dmatest_wait_get,
  248. .set = param_set_bool,
  249. };
  250. module_param_cb(wait, &wait_ops, &wait, 0444);
  251. MODULE_PARM_DESC(wait, "Wait for tests to complete (default: false)");
  252. static bool dmatest_match_channel(struct dmatest_params *params,
  253. struct dma_chan *chan)
  254. {
  255. if (params->channel[0] == '\0')
  256. return true;
  257. return strcmp(dma_chan_name(chan), params->channel) == 0;
  258. }
  259. static bool dmatest_match_device(struct dmatest_params *params,
  260. struct dma_device *device)
  261. {
  262. if (params->device[0] == '\0')
  263. return true;
  264. return strcmp(dev_name(device->dev), params->device) == 0;
  265. }
  266. static unsigned long dmatest_random(void)
  267. {
  268. unsigned long buf;
  269. get_random_bytes(&buf, sizeof(buf));
  270. return buf;
  271. }
  272. static inline u8 gen_inv_idx(u8 index, bool is_memset)
  273. {
  274. u8 val = is_memset ? PATTERN_MEMSET_IDX : index;
  275. return ~val & PATTERN_COUNT_MASK;
  276. }
  277. static inline u8 gen_src_value(u8 index, bool is_memset)
  278. {
  279. return PATTERN_SRC | gen_inv_idx(index, is_memset);
  280. }
  281. static inline u8 gen_dst_value(u8 index, bool is_memset)
  282. {
  283. return PATTERN_DST | gen_inv_idx(index, is_memset);
  284. }
  285. static void dmatest_init_srcs(u8 **bufs, unsigned int start, unsigned int len,
  286. unsigned int buf_size, bool is_memset)
  287. {
  288. unsigned int i;
  289. u8 *buf;
  290. for (; (buf = *bufs); bufs++) {
  291. for (i = 0; i < start; i++)
  292. buf[i] = gen_src_value(i, is_memset);
  293. for ( ; i < start + len; i++)
  294. buf[i] = gen_src_value(i, is_memset) | PATTERN_COPY;
  295. for ( ; i < buf_size; i++)
  296. buf[i] = gen_src_value(i, is_memset);
  297. buf++;
  298. }
  299. }
  300. static void dmatest_init_dsts(u8 **bufs, unsigned int start, unsigned int len,
  301. unsigned int buf_size, bool is_memset)
  302. {
  303. unsigned int i;
  304. u8 *buf;
  305. for (; (buf = *bufs); bufs++) {
  306. for (i = 0; i < start; i++)
  307. buf[i] = gen_dst_value(i, is_memset);
  308. for ( ; i < start + len; i++)
  309. buf[i] = gen_dst_value(i, is_memset) |
  310. PATTERN_OVERWRITE;
  311. for ( ; i < buf_size; i++)
  312. buf[i] = gen_dst_value(i, is_memset);
  313. }
  314. }
  315. static void dmatest_mismatch(u8 actual, u8 pattern, unsigned int index,
  316. unsigned int counter, bool is_srcbuf, bool is_memset)
  317. {
  318. u8 diff = actual ^ pattern;
  319. u8 expected = pattern | gen_inv_idx(counter, is_memset);
  320. const char *thread_name = current->comm;
  321. if (is_srcbuf)
  322. pr_warn("%s: srcbuf[0x%x] overwritten! Expected %02x, got %02x\n",
  323. thread_name, index, expected, actual);
  324. else if ((pattern & PATTERN_COPY)
  325. && (diff & (PATTERN_COPY | PATTERN_OVERWRITE)))
  326. pr_warn("%s: dstbuf[0x%x] not copied! Expected %02x, got %02x\n",
  327. thread_name, index, expected, actual);
  328. else if (diff & PATTERN_SRC)
  329. pr_warn("%s: dstbuf[0x%x] was copied! Expected %02x, got %02x\n",
  330. thread_name, index, expected, actual);
  331. else
  332. pr_warn("%s: dstbuf[0x%x] mismatch! Expected %02x, got %02x\n",
  333. thread_name, index, expected, actual);
  334. }
  335. static unsigned int dmatest_verify(u8 **bufs, unsigned int start,
  336. unsigned int end, unsigned int counter, u8 pattern,
  337. bool is_srcbuf, bool is_memset)
  338. {
  339. unsigned int i;
  340. unsigned int error_count = 0;
  341. u8 actual;
  342. u8 expected;
  343. u8 *buf;
  344. unsigned int counter_orig = counter;
  345. for (; (buf = *bufs); bufs++) {
  346. counter = counter_orig;
  347. for (i = start; i < end; i++) {
  348. actual = buf[i];
  349. expected = pattern | gen_inv_idx(counter, is_memset);
  350. if (actual != expected) {
  351. if (error_count < MAX_ERROR_COUNT)
  352. dmatest_mismatch(actual, pattern, i,
  353. counter, is_srcbuf,
  354. is_memset);
  355. error_count++;
  356. }
  357. counter++;
  358. }
  359. }
  360. if (error_count > MAX_ERROR_COUNT)
  361. pr_warn("%s: %u errors suppressed\n",
  362. current->comm, error_count - MAX_ERROR_COUNT);
  363. return error_count;
  364. }
  365. static void dmatest_callback(void *arg)
  366. {
  367. struct dmatest_done *done = arg;
  368. struct dmatest_thread *thread =
  369. container_of(done, struct dmatest_thread, test_done);
  370. if (!thread->done) {
  371. done->done = true;
  372. wake_up_all(done->wait);
  373. } else {
  374. /*
  375. * If thread->done, it means that this callback occurred
  376. * after the parent thread has cleaned up. This can
  377. * happen in the case that driver doesn't implement
  378. * the terminate_all() functionality and a dma operation
  379. * did not occur within the timeout period
  380. */
  381. WARN(1, "dmatest: Kernel memory may be corrupted!!\n");
  382. }
  383. }
  384. static unsigned int min_odd(unsigned int x, unsigned int y)
  385. {
  386. unsigned int val = min(x, y);
  387. return val % 2 ? val : val - 1;
  388. }
  389. static void result(const char *err, unsigned int n, unsigned int src_off,
  390. unsigned int dst_off, unsigned int len, unsigned long data)
  391. {
  392. if (IS_ERR_VALUE(data)) {
  393. pr_info("%s: result #%u: '%s' with src_off=0x%x dst_off=0x%x len=0x%x (%ld)\n",
  394. current->comm, n, err, src_off, dst_off, len, data);
  395. } else {
  396. pr_info("%s: result #%u: '%s' with src_off=0x%x dst_off=0x%x len=0x%x (%lu)\n",
  397. current->comm, n, err, src_off, dst_off, len, data);
  398. }
  399. }
  400. static void dbg_result(const char *err, unsigned int n, unsigned int src_off,
  401. unsigned int dst_off, unsigned int len,
  402. unsigned long data)
  403. {
  404. pr_debug("%s: result #%u: '%s' with src_off=0x%x dst_off=0x%x len=0x%x (%lu)\n",
  405. current->comm, n, err, src_off, dst_off, len, data);
  406. }
  407. #define verbose_result(err, n, src_off, dst_off, len, data) ({ \
  408. if (verbose) \
  409. result(err, n, src_off, dst_off, len, data); \
  410. else \
  411. dbg_result(err, n, src_off, dst_off, len, data);\
  412. })
  413. static unsigned long long dmatest_persec(s64 runtime, unsigned int val)
  414. {
  415. unsigned long long per_sec = 1000000;
  416. if (runtime <= 0)
  417. return 0;
  418. /* drop precision until runtime is 32-bits */
  419. while (runtime > UINT_MAX) {
  420. runtime >>= 1;
  421. per_sec <<= 1;
  422. }
  423. per_sec *= val;
  424. per_sec = INT_TO_FIXPT(per_sec);
  425. do_div(per_sec, runtime);
  426. return per_sec;
  427. }
  428. static unsigned long long dmatest_KBs(s64 runtime, unsigned long long len)
  429. {
  430. return FIXPT_TO_INT(dmatest_persec(runtime, len >> 10));
  431. }
  432. static void __dmatest_free_test_data(struct dmatest_data *d, unsigned int cnt)
  433. {
  434. unsigned int i;
  435. for (i = 0; i < cnt; i++)
  436. kfree(d->raw[i]);
  437. kfree(d->aligned);
  438. kfree(d->raw);
  439. }
  440. static void dmatest_free_test_data(struct dmatest_data *d)
  441. {
  442. __dmatest_free_test_data(d, d->cnt);
  443. }
  444. static int dmatest_alloc_test_data(struct dmatest_data *d,
  445. unsigned int buf_size, u8 align)
  446. {
  447. unsigned int i = 0;
  448. d->raw = kcalloc(d->cnt + 1, sizeof(u8 *), GFP_KERNEL);
  449. if (!d->raw)
  450. return -ENOMEM;
  451. d->aligned = kcalloc(d->cnt + 1, sizeof(u8 *), GFP_KERNEL);
  452. if (!d->aligned)
  453. goto err;
  454. for (i = 0; i < d->cnt; i++) {
  455. d->raw[i] = kmalloc(buf_size + align, GFP_KERNEL);
  456. if (!d->raw[i])
  457. goto err;
  458. /* align to alignment restriction */
  459. if (align)
  460. d->aligned[i] = PTR_ALIGN(d->raw[i], align);
  461. else
  462. d->aligned[i] = d->raw[i];
  463. }
  464. return 0;
  465. err:
  466. __dmatest_free_test_data(d, i);
  467. return -ENOMEM;
  468. }
  469. /*
  470. * This function repeatedly tests DMA transfers of various lengths and
  471. * offsets for a given operation type until it is told to exit by
  472. * kthread_stop(). There may be multiple threads running this function
  473. * in parallel for a single channel, and there may be multiple channels
  474. * being tested in parallel.
  475. *
  476. * Before each test, the source and destination buffer is initialized
  477. * with a known pattern. This pattern is different depending on
  478. * whether it's in an area which is supposed to be copied or
  479. * overwritten, and different in the source and destination buffers.
  480. * So if the DMA engine doesn't copy exactly what we tell it to copy,
  481. * we'll notice.
  482. */
  483. static int dmatest_func(void *data)
  484. {
  485. struct dmatest_thread *thread = data;
  486. struct dmatest_done *done = &thread->test_done;
  487. struct dmatest_info *info;
  488. struct dmatest_params *params;
  489. struct dma_chan *chan;
  490. struct dma_device *dev;
  491. struct device *dma_dev;
  492. unsigned int error_count;
  493. unsigned int failed_tests = 0;
  494. unsigned int total_tests = 0;
  495. dma_cookie_t cookie;
  496. enum dma_status status;
  497. enum dma_ctrl_flags flags;
  498. u8 *pq_coefs = NULL;
  499. int ret;
  500. unsigned int buf_size;
  501. struct dmatest_data *src;
  502. struct dmatest_data *dst;
  503. int i;
  504. ktime_t ktime, start, diff;
  505. ktime_t filltime = 0;
  506. ktime_t comparetime = 0;
  507. s64 runtime = 0;
  508. unsigned long long total_len = 0;
  509. unsigned long long iops = 0;
  510. u8 align = 0;
  511. bool is_memset = false;
  512. dma_addr_t *srcs;
  513. dma_addr_t *dma_pq;
  514. set_freezable();
  515. ret = -ENOMEM;
  516. smp_rmb();
  517. thread->pending = false;
  518. info = thread->info;
  519. params = &info->params;
  520. chan = thread->chan;
  521. dev = chan->device;
  522. dma_dev = dmaengine_get_dma_device(chan);
  523. src = &thread->src;
  524. dst = &thread->dst;
  525. if (thread->type == DMA_MEMCPY) {
  526. align = params->alignment < 0 ? dev->copy_align :
  527. params->alignment;
  528. src->cnt = dst->cnt = 1;
  529. } else if (thread->type == DMA_MEMSET) {
  530. align = params->alignment < 0 ? dev->fill_align :
  531. params->alignment;
  532. src->cnt = dst->cnt = 1;
  533. is_memset = true;
  534. } else if (thread->type == DMA_XOR) {
  535. /* force odd to ensure dst = src */
  536. src->cnt = min_odd(params->xor_sources | 1, dev->max_xor);
  537. dst->cnt = 1;
  538. align = params->alignment < 0 ? dev->xor_align :
  539. params->alignment;
  540. } else if (thread->type == DMA_PQ) {
  541. /* force odd to ensure dst = src */
  542. src->cnt = min_odd(params->pq_sources | 1, dma_maxpq(dev, 0));
  543. dst->cnt = 2;
  544. align = params->alignment < 0 ? dev->pq_align :
  545. params->alignment;
  546. pq_coefs = kmalloc(params->pq_sources + 1, GFP_KERNEL);
  547. if (!pq_coefs)
  548. goto err_thread_type;
  549. for (i = 0; i < src->cnt; i++)
  550. pq_coefs[i] = 1;
  551. } else
  552. goto err_thread_type;
  553. /* Check if buffer count fits into map count variable (u8) */
  554. if ((src->cnt + dst->cnt) >= 255) {
  555. pr_err("too many buffers (%d of 255 supported)\n",
  556. src->cnt + dst->cnt);
  557. goto err_free_coefs;
  558. }
  559. buf_size = params->buf_size;
  560. if (1 << align > buf_size) {
  561. pr_err("%u-byte buffer too small for %d-byte alignment\n",
  562. buf_size, 1 << align);
  563. goto err_free_coefs;
  564. }
  565. if (dmatest_alloc_test_data(src, buf_size, align) < 0)
  566. goto err_free_coefs;
  567. if (dmatest_alloc_test_data(dst, buf_size, align) < 0)
  568. goto err_src;
  569. set_user_nice(current, 10);
  570. srcs = kcalloc(src->cnt, sizeof(dma_addr_t), GFP_KERNEL);
  571. if (!srcs)
  572. goto err_dst;
  573. dma_pq = kcalloc(dst->cnt, sizeof(dma_addr_t), GFP_KERNEL);
  574. if (!dma_pq)
  575. goto err_srcs_array;
  576. /*
  577. * src and dst buffers are freed by ourselves below
  578. */
  579. if (params->polled)
  580. flags = DMA_CTRL_ACK;
  581. else
  582. flags = DMA_CTRL_ACK | DMA_PREP_INTERRUPT;
  583. ktime = ktime_get();
  584. while (!(kthread_should_stop() ||
  585. (params->iterations && total_tests >= params->iterations))) {
  586. struct dma_async_tx_descriptor *tx = NULL;
  587. struct dmaengine_unmap_data *um;
  588. dma_addr_t *dsts;
  589. unsigned int len;
  590. total_tests++;
  591. if (params->transfer_size) {
  592. if (params->transfer_size >= buf_size) {
  593. pr_err("%u-byte transfer size must be lower than %u-buffer size\n",
  594. params->transfer_size, buf_size);
  595. break;
  596. }
  597. len = params->transfer_size;
  598. } else if (params->norandom) {
  599. len = buf_size;
  600. } else {
  601. len = dmatest_random() % buf_size + 1;
  602. }
  603. /* Do not alter transfer size explicitly defined by user */
  604. if (!params->transfer_size) {
  605. len = (len >> align) << align;
  606. if (!len)
  607. len = 1 << align;
  608. }
  609. total_len += len;
  610. if (params->norandom) {
  611. src->off = 0;
  612. dst->off = 0;
  613. } else {
  614. src->off = dmatest_random() % (buf_size - len + 1);
  615. dst->off = dmatest_random() % (buf_size - len + 1);
  616. src->off = (src->off >> align) << align;
  617. dst->off = (dst->off >> align) << align;
  618. }
  619. if (!params->noverify) {
  620. start = ktime_get();
  621. dmatest_init_srcs(src->aligned, src->off, len,
  622. buf_size, is_memset);
  623. dmatest_init_dsts(dst->aligned, dst->off, len,
  624. buf_size, is_memset);
  625. diff = ktime_sub(ktime_get(), start);
  626. filltime = ktime_add(filltime, diff);
  627. }
  628. um = dmaengine_get_unmap_data(dma_dev, src->cnt + dst->cnt,
  629. GFP_KERNEL);
  630. if (!um) {
  631. failed_tests++;
  632. result("unmap data NULL", total_tests,
  633. src->off, dst->off, len, ret);
  634. continue;
  635. }
  636. um->len = buf_size;
  637. for (i = 0; i < src->cnt; i++) {
  638. void *buf = src->aligned[i];
  639. struct page *pg = virt_to_page(buf);
  640. unsigned long pg_off = offset_in_page(buf);
  641. um->addr[i] = dma_map_page(dma_dev, pg, pg_off,
  642. um->len, DMA_TO_DEVICE);
  643. srcs[i] = um->addr[i] + src->off;
  644. ret = dma_mapping_error(dma_dev, um->addr[i]);
  645. if (ret) {
  646. result("src mapping error", total_tests,
  647. src->off, dst->off, len, ret);
  648. goto error_unmap_continue;
  649. }
  650. um->to_cnt++;
  651. }
  652. /* map with DMA_BIDIRECTIONAL to force writeback/invalidate */
  653. dsts = &um->addr[src->cnt];
  654. for (i = 0; i < dst->cnt; i++) {
  655. void *buf = dst->aligned[i];
  656. struct page *pg = virt_to_page(buf);
  657. unsigned long pg_off = offset_in_page(buf);
  658. dsts[i] = dma_map_page(dma_dev, pg, pg_off, um->len,
  659. DMA_BIDIRECTIONAL);
  660. ret = dma_mapping_error(dma_dev, dsts[i]);
  661. if (ret) {
  662. result("dst mapping error", total_tests,
  663. src->off, dst->off, len, ret);
  664. goto error_unmap_continue;
  665. }
  666. um->bidi_cnt++;
  667. }
  668. if (thread->type == DMA_MEMCPY)
  669. tx = dev->device_prep_dma_memcpy(chan,
  670. dsts[0] + dst->off,
  671. srcs[0], len, flags);
  672. else if (thread->type == DMA_MEMSET)
  673. tx = dev->device_prep_dma_memset(chan,
  674. dsts[0] + dst->off,
  675. *(src->aligned[0] + src->off),
  676. len, flags);
  677. else if (thread->type == DMA_XOR)
  678. tx = dev->device_prep_dma_xor(chan,
  679. dsts[0] + dst->off,
  680. srcs, src->cnt,
  681. len, flags);
  682. else if (thread->type == DMA_PQ) {
  683. for (i = 0; i < dst->cnt; i++)
  684. dma_pq[i] = dsts[i] + dst->off;
  685. tx = dev->device_prep_dma_pq(chan, dma_pq, srcs,
  686. src->cnt, pq_coefs,
  687. len, flags);
  688. }
  689. if (!tx) {
  690. result("prep error", total_tests, src->off,
  691. dst->off, len, ret);
  692. msleep(100);
  693. goto error_unmap_continue;
  694. }
  695. done->done = false;
  696. if (!params->polled) {
  697. tx->callback = dmatest_callback;
  698. tx->callback_param = done;
  699. }
  700. cookie = tx->tx_submit(tx);
  701. if (dma_submit_error(cookie)) {
  702. result("submit error", total_tests, src->off,
  703. dst->off, len, ret);
  704. msleep(100);
  705. goto error_unmap_continue;
  706. }
  707. if (params->polled) {
  708. status = dma_sync_wait(chan, cookie);
  709. dmaengine_terminate_sync(chan);
  710. if (status == DMA_COMPLETE)
  711. done->done = true;
  712. } else {
  713. dma_async_issue_pending(chan);
  714. wait_event_freezable_timeout(thread->done_wait,
  715. done->done,
  716. msecs_to_jiffies(params->timeout));
  717. status = dma_async_is_tx_complete(chan, cookie, NULL,
  718. NULL);
  719. }
  720. if (!done->done) {
  721. result("test timed out", total_tests, src->off, dst->off,
  722. len, 0);
  723. goto error_unmap_continue;
  724. } else if (status != DMA_COMPLETE &&
  725. !(dma_has_cap(DMA_COMPLETION_NO_ORDER,
  726. dev->cap_mask) &&
  727. status == DMA_OUT_OF_ORDER)) {
  728. result(status == DMA_ERROR ?
  729. "completion error status" :
  730. "completion busy status", total_tests, src->off,
  731. dst->off, len, ret);
  732. goto error_unmap_continue;
  733. }
  734. dmaengine_unmap_put(um);
  735. if (params->noverify) {
  736. verbose_result("test passed", total_tests, src->off,
  737. dst->off, len, 0);
  738. continue;
  739. }
  740. start = ktime_get();
  741. pr_debug("%s: verifying source buffer...\n", current->comm);
  742. error_count = dmatest_verify(src->aligned, 0, src->off,
  743. 0, PATTERN_SRC, true, is_memset);
  744. error_count += dmatest_verify(src->aligned, src->off,
  745. src->off + len, src->off,
  746. PATTERN_SRC | PATTERN_COPY, true, is_memset);
  747. error_count += dmatest_verify(src->aligned, src->off + len,
  748. buf_size, src->off + len,
  749. PATTERN_SRC, true, is_memset);
  750. pr_debug("%s: verifying dest buffer...\n", current->comm);
  751. error_count += dmatest_verify(dst->aligned, 0, dst->off,
  752. 0, PATTERN_DST, false, is_memset);
  753. error_count += dmatest_verify(dst->aligned, dst->off,
  754. dst->off + len, src->off,
  755. PATTERN_SRC | PATTERN_COPY, false, is_memset);
  756. error_count += dmatest_verify(dst->aligned, dst->off + len,
  757. buf_size, dst->off + len,
  758. PATTERN_DST, false, is_memset);
  759. diff = ktime_sub(ktime_get(), start);
  760. comparetime = ktime_add(comparetime, diff);
  761. if (error_count) {
  762. result("data error", total_tests, src->off, dst->off,
  763. len, error_count);
  764. failed_tests++;
  765. } else {
  766. verbose_result("test passed", total_tests, src->off,
  767. dst->off, len, 0);
  768. }
  769. continue;
  770. error_unmap_continue:
  771. dmaengine_unmap_put(um);
  772. failed_tests++;
  773. }
  774. ktime = ktime_sub(ktime_get(), ktime);
  775. ktime = ktime_sub(ktime, comparetime);
  776. ktime = ktime_sub(ktime, filltime);
  777. runtime = ktime_to_us(ktime);
  778. ret = 0;
  779. kfree(dma_pq);
  780. err_srcs_array:
  781. kfree(srcs);
  782. err_dst:
  783. dmatest_free_test_data(dst);
  784. err_src:
  785. dmatest_free_test_data(src);
  786. err_free_coefs:
  787. kfree(pq_coefs);
  788. err_thread_type:
  789. iops = dmatest_persec(runtime, total_tests);
  790. pr_info("%s: summary %u tests, %u failures %llu.%02llu iops %llu KB/s (%d)\n",
  791. current->comm, total_tests, failed_tests,
  792. FIXPT_TO_INT(iops), FIXPT_GET_FRAC(iops),
  793. dmatest_KBs(runtime, total_len), ret);
  794. /* terminate all transfers on specified channels */
  795. if (ret || failed_tests)
  796. dmaengine_terminate_sync(chan);
  797. thread->done = true;
  798. wake_up(&thread_wait);
  799. return ret;
  800. }
  801. static void dmatest_cleanup_channel(struct dmatest_chan *dtc)
  802. {
  803. struct dmatest_thread *thread;
  804. struct dmatest_thread *_thread;
  805. int ret;
  806. list_for_each_entry_safe(thread, _thread, &dtc->threads, node) {
  807. ret = kthread_stop(thread->task);
  808. pr_debug("thread %s exited with status %d\n",
  809. thread->task->comm, ret);
  810. list_del(&thread->node);
  811. put_task_struct(thread->task);
  812. kfree(thread);
  813. }
  814. /* terminate all transfers on specified channels */
  815. dmaengine_terminate_sync(dtc->chan);
  816. kfree(dtc);
  817. }
  818. static int dmatest_add_threads(struct dmatest_info *info,
  819. struct dmatest_chan *dtc, enum dma_transaction_type type)
  820. {
  821. struct dmatest_params *params = &info->params;
  822. struct dmatest_thread *thread;
  823. struct dma_chan *chan = dtc->chan;
  824. char *op;
  825. unsigned int i;
  826. if (type == DMA_MEMCPY)
  827. op = "copy";
  828. else if (type == DMA_MEMSET)
  829. op = "set";
  830. else if (type == DMA_XOR)
  831. op = "xor";
  832. else if (type == DMA_PQ)
  833. op = "pq";
  834. else
  835. return -EINVAL;
  836. for (i = 0; i < params->threads_per_chan; i++) {
  837. thread = kzalloc(sizeof(struct dmatest_thread), GFP_KERNEL);
  838. if (!thread) {
  839. pr_warn("No memory for %s-%s%u\n",
  840. dma_chan_name(chan), op, i);
  841. break;
  842. }
  843. thread->info = info;
  844. thread->chan = dtc->chan;
  845. thread->type = type;
  846. thread->test_done.wait = &thread->done_wait;
  847. init_waitqueue_head(&thread->done_wait);
  848. smp_wmb();
  849. thread->task = kthread_create(dmatest_func, thread, "%s-%s%u",
  850. dma_chan_name(chan), op, i);
  851. if (IS_ERR(thread->task)) {
  852. pr_warn("Failed to create thread %s-%s%u\n",
  853. dma_chan_name(chan), op, i);
  854. kfree(thread);
  855. break;
  856. }
  857. /* srcbuf and dstbuf are allocated by the thread itself */
  858. get_task_struct(thread->task);
  859. list_add_tail(&thread->node, &dtc->threads);
  860. thread->pending = true;
  861. }
  862. return i;
  863. }
  864. static int dmatest_add_channel(struct dmatest_info *info,
  865. struct dma_chan *chan)
  866. {
  867. struct dmatest_chan *dtc;
  868. struct dma_device *dma_dev = chan->device;
  869. unsigned int thread_count = 0;
  870. int cnt;
  871. dtc = kmalloc(sizeof(struct dmatest_chan), GFP_KERNEL);
  872. if (!dtc) {
  873. pr_warn("No memory for %s\n", dma_chan_name(chan));
  874. return -ENOMEM;
  875. }
  876. dtc->chan = chan;
  877. INIT_LIST_HEAD(&dtc->threads);
  878. if (dma_has_cap(DMA_COMPLETION_NO_ORDER, dma_dev->cap_mask) &&
  879. info->params.polled) {
  880. info->params.polled = false;
  881. pr_warn("DMA_COMPLETION_NO_ORDER, polled disabled\n");
  882. }
  883. if (dma_has_cap(DMA_MEMCPY, dma_dev->cap_mask)) {
  884. if (dmatest == 0) {
  885. cnt = dmatest_add_threads(info, dtc, DMA_MEMCPY);
  886. thread_count += cnt > 0 ? cnt : 0;
  887. }
  888. }
  889. if (dma_has_cap(DMA_MEMSET, dma_dev->cap_mask)) {
  890. if (dmatest == 1) {
  891. cnt = dmatest_add_threads(info, dtc, DMA_MEMSET);
  892. thread_count += cnt > 0 ? cnt : 0;
  893. }
  894. }
  895. if (dma_has_cap(DMA_XOR, dma_dev->cap_mask)) {
  896. cnt = dmatest_add_threads(info, dtc, DMA_XOR);
  897. thread_count += cnt > 0 ? cnt : 0;
  898. }
  899. if (dma_has_cap(DMA_PQ, dma_dev->cap_mask)) {
  900. cnt = dmatest_add_threads(info, dtc, DMA_PQ);
  901. thread_count += cnt > 0 ? cnt : 0;
  902. }
  903. pr_info("Added %u threads using %s\n",
  904. thread_count, dma_chan_name(chan));
  905. list_add_tail(&dtc->node, &info->channels);
  906. info->nr_channels++;
  907. return 0;
  908. }
  909. static bool filter(struct dma_chan *chan, void *param)
  910. {
  911. return dmatest_match_channel(param, chan) && dmatest_match_device(param, chan->device);
  912. }
  913. static void request_channels(struct dmatest_info *info,
  914. enum dma_transaction_type type)
  915. {
  916. dma_cap_mask_t mask;
  917. dma_cap_zero(mask);
  918. dma_cap_set(type, mask);
  919. for (;;) {
  920. struct dmatest_params *params = &info->params;
  921. struct dma_chan *chan;
  922. chan = dma_request_channel(mask, filter, params);
  923. if (chan) {
  924. if (dmatest_add_channel(info, chan)) {
  925. dma_release_channel(chan);
  926. break; /* add_channel failed, punt */
  927. }
  928. } else
  929. break; /* no more channels available */
  930. if (params->max_channels &&
  931. info->nr_channels >= params->max_channels)
  932. break; /* we have all we need */
  933. }
  934. }
  935. static void add_threaded_test(struct dmatest_info *info)
  936. {
  937. struct dmatest_params *params = &info->params;
  938. /* Copy test parameters */
  939. params->buf_size = test_buf_size;
  940. strscpy(params->channel, strim(test_channel), sizeof(params->channel));
  941. strscpy(params->device, strim(test_device), sizeof(params->device));
  942. params->threads_per_chan = threads_per_chan;
  943. params->max_channels = max_channels;
  944. params->iterations = iterations;
  945. params->xor_sources = xor_sources;
  946. params->pq_sources = pq_sources;
  947. params->timeout = timeout;
  948. params->noverify = noverify;
  949. params->norandom = norandom;
  950. params->alignment = alignment;
  951. params->transfer_size = transfer_size;
  952. params->polled = polled;
  953. request_channels(info, DMA_MEMCPY);
  954. request_channels(info, DMA_MEMSET);
  955. request_channels(info, DMA_XOR);
  956. request_channels(info, DMA_PQ);
  957. }
  958. static void run_pending_tests(struct dmatest_info *info)
  959. {
  960. struct dmatest_chan *dtc;
  961. unsigned int thread_count = 0;
  962. list_for_each_entry(dtc, &info->channels, node) {
  963. struct dmatest_thread *thread;
  964. thread_count = 0;
  965. list_for_each_entry(thread, &dtc->threads, node) {
  966. wake_up_process(thread->task);
  967. thread_count++;
  968. }
  969. pr_info("Started %u threads using %s\n",
  970. thread_count, dma_chan_name(dtc->chan));
  971. }
  972. }
  973. static void stop_threaded_test(struct dmatest_info *info)
  974. {
  975. struct dmatest_chan *dtc, *_dtc;
  976. struct dma_chan *chan;
  977. list_for_each_entry_safe(dtc, _dtc, &info->channels, node) {
  978. list_del(&dtc->node);
  979. chan = dtc->chan;
  980. dmatest_cleanup_channel(dtc);
  981. pr_debug("dropped channel %s\n", dma_chan_name(chan));
  982. dma_release_channel(chan);
  983. }
  984. info->nr_channels = 0;
  985. }
  986. static void start_threaded_tests(struct dmatest_info *info)
  987. {
  988. /* we might be called early to set run=, defer running until all
  989. * parameters have been evaluated
  990. */
  991. if (!info->did_init)
  992. return;
  993. run_pending_tests(info);
  994. }
  995. static int dmatest_run_get(char *val, const struct kernel_param *kp)
  996. {
  997. struct dmatest_info *info = &test_info;
  998. mutex_lock(&info->lock);
  999. if (is_threaded_test_run(info)) {
  1000. dmatest_run = true;
  1001. } else {
  1002. if (!is_threaded_test_pending(info))
  1003. stop_threaded_test(info);
  1004. dmatest_run = false;
  1005. }
  1006. mutex_unlock(&info->lock);
  1007. return param_get_bool(val, kp);
  1008. }
  1009. static int dmatest_run_set(const char *val, const struct kernel_param *kp)
  1010. {
  1011. struct dmatest_info *info = &test_info;
  1012. int ret;
  1013. mutex_lock(&info->lock);
  1014. ret = param_set_bool(val, kp);
  1015. if (ret) {
  1016. mutex_unlock(&info->lock);
  1017. return ret;
  1018. } else if (dmatest_run) {
  1019. if (!is_threaded_test_pending(info)) {
  1020. /*
  1021. * We have nothing to run. This can be due to:
  1022. */
  1023. ret = info->last_error;
  1024. if (ret) {
  1025. /* 1) Misconfiguration */
  1026. pr_err("Channel misconfigured, can't continue\n");
  1027. mutex_unlock(&info->lock);
  1028. return ret;
  1029. } else {
  1030. /* 2) We rely on defaults */
  1031. pr_info("No channels configured, continue with any\n");
  1032. if (!is_threaded_test_run(info))
  1033. stop_threaded_test(info);
  1034. add_threaded_test(info);
  1035. }
  1036. }
  1037. start_threaded_tests(info);
  1038. } else {
  1039. stop_threaded_test(info);
  1040. }
  1041. mutex_unlock(&info->lock);
  1042. return ret;
  1043. }
  1044. static int dmatest_chan_set(const char *val, const struct kernel_param *kp)
  1045. {
  1046. struct dmatest_info *info = &test_info;
  1047. struct dmatest_chan *dtc;
  1048. char chan_reset_val[20];
  1049. int ret;
  1050. mutex_lock(&info->lock);
  1051. ret = param_set_copystring(val, kp);
  1052. if (ret) {
  1053. mutex_unlock(&info->lock);
  1054. return ret;
  1055. }
  1056. /*Clear any previously run threads */
  1057. if (!is_threaded_test_run(info) && !is_threaded_test_pending(info))
  1058. stop_threaded_test(info);
  1059. /* Reject channels that are already registered */
  1060. if (is_threaded_test_pending(info)) {
  1061. list_for_each_entry(dtc, &info->channels, node) {
  1062. if (strcmp(dma_chan_name(dtc->chan),
  1063. strim(test_channel)) == 0) {
  1064. dtc = list_last_entry(&info->channels,
  1065. struct dmatest_chan,
  1066. node);
  1067. strscpy(chan_reset_val,
  1068. dma_chan_name(dtc->chan),
  1069. sizeof(chan_reset_val));
  1070. ret = -EBUSY;
  1071. goto add_chan_err;
  1072. }
  1073. }
  1074. }
  1075. add_threaded_test(info);
  1076. /* Check if channel was added successfully */
  1077. if (!list_empty(&info->channels)) {
  1078. /*
  1079. * if new channel was not successfully added, revert the
  1080. * "test_channel" string to the name of the last successfully
  1081. * added channel. exception for when users issues empty string
  1082. * to channel parameter.
  1083. */
  1084. dtc = list_last_entry(&info->channels, struct dmatest_chan, node);
  1085. if ((strcmp(dma_chan_name(dtc->chan), strim(test_channel)) != 0)
  1086. && (strcmp("", strim(test_channel)) != 0)) {
  1087. ret = -EINVAL;
  1088. strscpy(chan_reset_val, dma_chan_name(dtc->chan),
  1089. sizeof(chan_reset_val));
  1090. goto add_chan_err;
  1091. }
  1092. } else {
  1093. /* Clear test_channel if no channels were added successfully */
  1094. strscpy(chan_reset_val, "", sizeof(chan_reset_val));
  1095. ret = -EBUSY;
  1096. goto add_chan_err;
  1097. }
  1098. info->last_error = ret;
  1099. mutex_unlock(&info->lock);
  1100. return ret;
  1101. add_chan_err:
  1102. param_set_copystring(chan_reset_val, kp);
  1103. info->last_error = ret;
  1104. mutex_unlock(&info->lock);
  1105. return ret;
  1106. }
  1107. static int dmatest_chan_get(char *val, const struct kernel_param *kp)
  1108. {
  1109. struct dmatest_info *info = &test_info;
  1110. mutex_lock(&info->lock);
  1111. if (!is_threaded_test_run(info) && !is_threaded_test_pending(info)) {
  1112. stop_threaded_test(info);
  1113. strscpy(test_channel, "", sizeof(test_channel));
  1114. }
  1115. mutex_unlock(&info->lock);
  1116. return param_get_string(val, kp);
  1117. }
  1118. static int dmatest_test_list_get(char *val, const struct kernel_param *kp)
  1119. {
  1120. struct dmatest_info *info = &test_info;
  1121. struct dmatest_chan *dtc;
  1122. unsigned int thread_count = 0;
  1123. list_for_each_entry(dtc, &info->channels, node) {
  1124. struct dmatest_thread *thread;
  1125. thread_count = 0;
  1126. list_for_each_entry(thread, &dtc->threads, node) {
  1127. thread_count++;
  1128. }
  1129. pr_info("%u threads using %s\n",
  1130. thread_count, dma_chan_name(dtc->chan));
  1131. }
  1132. return 0;
  1133. }
  1134. static int __init dmatest_init(void)
  1135. {
  1136. struct dmatest_info *info = &test_info;
  1137. struct dmatest_params *params = &info->params;
  1138. if (dmatest_run) {
  1139. mutex_lock(&info->lock);
  1140. add_threaded_test(info);
  1141. run_pending_tests(info);
  1142. mutex_unlock(&info->lock);
  1143. }
  1144. if (params->iterations && wait)
  1145. wait_event(thread_wait, !is_threaded_test_run(info));
  1146. /* module parameters are stable, inittime tests are started,
  1147. * let userspace take over 'run' control
  1148. */
  1149. info->did_init = true;
  1150. return 0;
  1151. }
  1152. /* when compiled-in wait for drivers to load first */
  1153. late_initcall(dmatest_init);
  1154. static void __exit dmatest_exit(void)
  1155. {
  1156. struct dmatest_info *info = &test_info;
  1157. mutex_lock(&info->lock);
  1158. stop_threaded_test(info);
  1159. mutex_unlock(&info->lock);
  1160. }
  1161. module_exit(dmatest_exit);
  1162. MODULE_AUTHOR("Haavard Skinnemoen (Atmel)");
  1163. MODULE_LICENSE("GPL v2");